Backport another LLVM commit to rustc_apfloat

Backports LLVM commit:

    [APFloat] convert SNaN to QNaN in convert() and raise Invalid signal

llvm/llvm-project@149f5b5

SNaN to QNaN conversion also matches what my Intel x86_64 hardware does.

compiler/rustc_apfloat/src/ieee.rs

@@ -1511,23 +1511,16 @@ impl<S: Semantics, T: Semantics> FloatConvert<IeeeFloat<T>> for IeeeFloat<S> {
                 sig::set_bit(&mut r.sig, T::PRECISION - 1);
             }
 
-            // If we are truncating NaN, it is possible that we shifted out all of the
-            // set bits in a signalling NaN payload. But NaN must remain NaN, so some
-            // bit in the significand must be set (otherwise it is Inf).
-            // This can only happen with sNaN. Set the 1st bit after the quiet bit,
-            // so that we still have an sNaN.
-            if r.sig[0] == 0 {
-                assert!(shift < 0, "Should not lose NaN payload on extend");
-                assert!(T::PRECISION >= 3, "Unexpectedly narrow significand");
-                assert!(*loses_info, "Missing payload should have set lost info");
-                sig::set_bit(&mut r.sig, T::PRECISION - 3);
-            }
-
-            // gcc forces the Quiet bit on, which means (float)(double)(float_sNan)
-            // does not give you back the same bits. This is dubious, and we
-            // don't currently do it. You're really supposed to get
-            // an invalid operation signal at runtime, but nobody does that.
-            status = Status::OK;
+            // Convert of sNaN creates qNaN and raises an exception (invalid op).
+            // This also guarantees that a sNaN does not become Inf on a truncation
+            // that loses all payload bits.
+            if self.is_signaling() {
+                // Quiet signaling NaN.
+                sig::set_bit(&mut r.sig, T::QNAN_BIT);
+                status = Status::INVALID_OP;
+            } else {
+                status = Status::OK;
+            }
         } else {
             *loses_info = false;
             status = Status::OK;

compiler/rustc_apfloat/tests/ieee.rs

@@ -570,9 +570,11 @@ fn fma() {
 fn issue_69532() {
     let f = Double::from_bits(0x7FF0_0000_0000_0001u64 as u128);
     let mut loses_info = false;
-    let r: Single = f.convert(&mut loses_info).value;
+    let sta = f.convert(&mut loses_info);
+    let r: Single = sta.value;
     assert!(loses_info);
     assert!(r.is_nan());
+    assert_eq!(sta.status, Status::INVALID_OP);
 }
 
 #[test]
@@ -1501,27 +1503,32 @@ fn convert() {
     assert_eq!(4294967295.0, test.to_f64());
     assert!(!loses_info);
 
-    let test = Single::snan(None);
-    let x87_snan = X87DoubleExtended::snan(None);
-    let test: X87DoubleExtended = test.convert(&mut loses_info).value;
-    assert!(test.bitwise_eq(x87_snan));
-    assert!(!loses_info);
-
     let test = Single::qnan(None);
     let x87_qnan = X87DoubleExtended::qnan(None);
     let test: X87DoubleExtended = test.convert(&mut loses_info).value;
     assert!(test.bitwise_eq(x87_qnan));
     assert!(!loses_info);
 
-    let test = X87DoubleExtended::snan(None);
-    let test: X87DoubleExtended = test.convert(&mut loses_info).value;
-    assert!(test.bitwise_eq(x87_snan));
+    let test = Single::snan(None);
+    let sta = test.convert(&mut loses_info);
+    let test: X87DoubleExtended = sta.value;
+    assert!(test.is_nan());
+    assert!(!test.is_signaling());
     assert!(!loses_info);
+    assert_eq!(sta.status, Status::INVALID_OP);
 
     let test = X87DoubleExtended::qnan(None);
     let test: X87DoubleExtended = test.convert(&mut loses_info).value;
     assert!(test.bitwise_eq(x87_qnan));
     assert!(!loses_info);
+
+    let test = X87DoubleExtended::snan(None);
+    let sta = test.convert(&mut loses_info);
+    let test: X87DoubleExtended = sta.value;
+    assert!(test.is_nan());
+    assert!(!test.is_signaling());
+    assert!(!loses_info);
+    assert_eq!(sta.status, Status::INVALID_OP);
 }
 
 #[test]