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ZalatharZalathar
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Rollup merge of #144559 - CaiWeiran:extract-insert-dyn_test, r=Mark-Simulacrum
Enable extract-insert-dyn.rs test on RISC-V (riscv64) This PR adds support for running the `tests/codegen-llvm/simd/extract-insert-dyn.rs` test on the RISC-V (riscv64) architecture. Previously, this test would fail on RISC-V targets due to architecture-specific code generation issues. This patch modifies the test to ensure compatibility while preserving its intent. The change has been tested locally using `./x test` on a riscv64 target, and the test now passes as expected. ### Notes: - This change is scoped specifically to improve RISC-V compatibility. - It does not affect behavior or test results on other architectures.
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‎tests/codegen-llvm/simd/extract-insert-dyn.rs‎

Lines changed: 18 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,8 @@
55
repr_simd,
66
arm_target_feature,
77
mips_target_feature,
8-
s390x_target_feature
8+
s390x_target_feature,
9+
riscv_target_feature
910
)]
1011
#![no_std]
1112
#![crate_type = "lib"]
@@ -25,97 +26,105 @@ pub struct u32x16([u32; 16]);
2526
pub struct i8x16([i8; 16]);
2627

2728
// CHECK-LABEL: dyn_simd_extract
28-
// CHECK: extractelement <16 x i8> %x, i32 %idx
29+
// CHECK: extractelement <16 x i8> %[[TEMP:.+]], i32 %idx
2930
#[no_mangle]
3031
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
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#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
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#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
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#[cfg_attr(target_arch = "s390x", target_feature(enable = "vector"))]
36+
#[cfg_attr(target_arch = "riscv64", target_feature(enable = "v"))]
3537
unsafe extern "C" fn dyn_simd_extract(x: i8x16, idx: u32) -> i8 {
3638
simd_extract_dyn(x, idx)
3739
}
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// CHECK-LABEL: literal_dyn_simd_extract
40-
// CHECK: extractelement <16 x i8> %x, i32 7
42+
// CHECK: extractelement <16 x i8> %[[TEMP:.+]], i32 7
4143
#[no_mangle]
4244
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
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#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
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#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
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#[cfg_attr(target_arch = "s390x", target_feature(enable = "vector"))]
49+
#[cfg_attr(target_arch = "riscv64", target_feature(enable = "v"))]
4750
unsafe extern "C" fn literal_dyn_simd_extract(x: i8x16) -> i8 {
4851
simd_extract_dyn(x, 7)
4952
}
5053

5154
// CHECK-LABEL: const_dyn_simd_extract
52-
// CHECK: extractelement <16 x i8> %x, i32 7
55+
// CHECK: extractelement <16 x i8> %[[TEMP:.+]], i32 7
5356
#[no_mangle]
5457
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
5558
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
5659
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
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#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
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#[cfg_attr(target_arch = "s390x", target_feature(enable = "vector"))]
62+
#[cfg_attr(target_arch = "riscv64", target_feature(enable = "v"))]
5963
unsafe extern "C" fn const_dyn_simd_extract(x: i8x16) -> i8 {
6064
simd_extract_dyn(x, const { 3 + 4 })
6165
}
6266

6367
// CHECK-LABEL: const_simd_extract
64-
// CHECK: extractelement <16 x i8> %x, i32 7
68+
// CHECK: extractelement <16 x i8> %[[TEMP:.+]], i32 7
6569
#[no_mangle]
6670
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
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#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
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#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
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#[cfg_attr(target_arch = "s390x", target_feature(enable = "vector"))]
75+
#[cfg_attr(target_arch = "riscv64", target_feature(enable = "v"))]
7176
unsafe extern "C" fn const_simd_extract(x: i8x16) -> i8 {
7277
simd_extract(x, const { 3 + 4 })
7378
}
7479

7580
// CHECK-LABEL: dyn_simd_insert
76-
// CHECK: insertelement <16 x i8> %x, i8 %e, i32 %idx
81+
// CHECK: insertelement <16 x i8> %[[TEMP:.+]], i8 %e, i32 %idx
7782
#[no_mangle]
7883
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
7984
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
8085
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
8186
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
8287
#[cfg_attr(target_arch = "s390x", target_feature(enable = "vector"))]
88+
#[cfg_attr(target_arch = "riscv64", target_feature(enable = "v"))]
8389
unsafe extern "C" fn dyn_simd_insert(x: i8x16, e: i8, idx: u32) -> i8x16 {
8490
simd_insert_dyn(x, idx, e)
8591
}
8692

8793
// CHECK-LABEL: literal_dyn_simd_insert
88-
// CHECK: insertelement <16 x i8> %x, i8 %e, i32 7
94+
// CHECK: insertelement <16 x i8> %[[TEMP:.+]], i8 %e, i32 7
8995
#[no_mangle]
9096
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
9197
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
9298
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
9399
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
94100
#[cfg_attr(target_arch = "s390x", target_feature(enable = "vector"))]
101+
#[cfg_attr(target_arch = "riscv64", target_feature(enable = "v"))]
95102
unsafe extern "C" fn literal_dyn_simd_insert(x: i8x16, e: i8) -> i8x16 {
96103
simd_insert_dyn(x, 7, e)
97104
}
98105

99106
// CHECK-LABEL: const_dyn_simd_insert
100-
// CHECK: insertelement <16 x i8> %x, i8 %e, i32 7
107+
// CHECK: insertelement <16 x i8> %[[TEMP:.+]], i8 %e, i32 7
101108
#[no_mangle]
102109
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
103110
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
104111
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
105112
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
106113
#[cfg_attr(target_arch = "s390x", target_feature(enable = "vector"))]
114+
#[cfg_attr(target_arch = "riscv64", target_feature(enable = "v"))]
107115
unsafe extern "C" fn const_dyn_simd_insert(x: i8x16, e: i8) -> i8x16 {
108116
simd_insert_dyn(x, const { 3 + 4 }, e)
109117
}
110118

111119
// CHECK-LABEL: const_simd_insert
112-
// CHECK: insertelement <16 x i8> %x, i8 %e, i32 7
120+
// CHECK: insertelement <16 x i8> %[[TEMP:.+]], i8 %e, i32 7
113121
#[no_mangle]
114122
#[cfg_attr(target_family = "wasm", target_feature(enable = "simd128"))]
115123
#[cfg_attr(target_arch = "arm", target_feature(enable = "neon"))]
116124
#[cfg_attr(target_arch = "x86", target_feature(enable = "sse"))]
117125
#[cfg_attr(target_arch = "mips", target_feature(enable = "msa"))]
118126
#[cfg_attr(target_arch = "s390x", target_feature(enable = "vector"))]
127+
#[cfg_attr(target_arch = "riscv64", target_feature(enable = "v"))]
119128
unsafe extern "C" fn const_simd_insert(x: i8x16, e: i8) -> i8x16 {
120129
simd_insert(x, const { 3 + 4 }, e)
121130
}

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