@@ -91,16 +91,16 @@ pub enum Mid<T> {
9191pub fn mid_bool_eq_discr ( a : Mid < bool > , b : Mid < bool > ) -> bool {
9292 // CHECK-LABEL: @mid_bool_eq_discr(
9393
94+ // CHECK: %[[A_NOT_HOLE:.+]] = icmp ne i8 %a, 3
95+ // CHECK: tail call void @llvm.assume(i1 %[[A_NOT_HOLE]])
9496 // CHECK: %[[A_REL_DISCR:.+]] = add nsw i8 %a, -2
9597 // CHECK: %[[A_IS_NICHE:.+]] = icmp samesign ugt i8 %a, 1
96- // CHECK: %[[A_NOT_HOLE:.+]] = icmp ne i8 %[[A_REL_DISCR]], 1
97- // CHECK: tail call void @llvm.assume(i1 %[[A_NOT_HOLE]])
9898 // CHECK: %[[A_DISCR:.+]] = select i1 %[[A_IS_NICHE]], i8 %[[A_REL_DISCR]], i8 1
9999
100+ // CHECK: %[[B_NOT_HOLE:.+]] = icmp ne i8 %b, 3
101+ // CHECK: tail call void @llvm.assume(i1 %[[B_NOT_HOLE]])
100102 // CHECK: %[[B_REL_DISCR:.+]] = add nsw i8 %b, -2
101103 // CHECK: %[[B_IS_NICHE:.+]] = icmp samesign ugt i8 %b, 1
102- // CHECK: %[[B_NOT_HOLE:.+]] = icmp ne i8 %[[B_REL_DISCR]], 1
103- // CHECK: tail call void @llvm.assume(i1 %[[B_NOT_HOLE]])
104104 // CHECK: %[[B_DISCR:.+]] = select i1 %[[B_IS_NICHE]], i8 %[[B_REL_DISCR]], i8 1
105105
106106 // CHECK: ret i1 %[[R]]
@@ -111,16 +111,16 @@ pub fn mid_bool_eq_discr(a: Mid<bool>, b: Mid<bool>) -> bool {
111111pub fn mid_ord_eq_discr ( a : Mid < Ordering > , b : Mid < Ordering > ) -> bool {
112112 // CHECK-LABEL: @mid_ord_eq_discr(
113113
114+ // CHECK: %[[A_NOT_HOLE:.+]] = icmp ne i8 %a, 3
115+ // CHECK: tail call void @llvm.assume(i1 %[[A_NOT_HOLE]])
114116 // CHECK: %[[A_REL_DISCR:.+]] = add nsw i8 %a, -2
115117 // CHECK: %[[A_IS_NICHE:.+]] = icmp sgt i8 %a, 1
116- // CHECK: %[[A_NOT_HOLE:.+]] = icmp ne i8 %[[A_REL_DISCR]], 1
117- // CHECK: tail call void @llvm.assume(i1 %[[A_NOT_HOLE]])
118118 // CHECK: %[[A_DISCR:.+]] = select i1 %[[A_IS_NICHE]], i8 %[[A_REL_DISCR]], i8 1
119119
120+ // CHECK: %[[B_NOT_HOLE:.+]] = icmp ne i8 %b, 3
121+ // CHECK: tail call void @llvm.assume(i1 %[[B_NOT_HOLE]])
120122 // CHECK: %[[B_REL_DISCR:.+]] = add nsw i8 %b, -2
121123 // CHECK: %[[B_IS_NICHE:.+]] = icmp sgt i8 %b, 1
122- // CHECK: %[[B_NOT_HOLE:.+]] = icmp ne i8 %[[B_REL_DISCR]], 1
123- // CHECK: tail call void @llvm.assume(i1 %[[B_NOT_HOLE]])
124124 // CHECK: %[[B_DISCR:.+]] = select i1 %[[B_IS_NICHE]], i8 %[[B_REL_DISCR]], i8 1
125125
126126 // CHECK: %[[R:.+]] = icmp eq i8 %[[A_DISCR]], %[[B_DISCR]]
@@ -140,16 +140,16 @@ pub fn mid_nz32_eq_discr(a: Mid<NonZero<u32>>, b: Mid<NonZero<u32>>) -> bool {
140140pub fn mid_ac_eq_discr ( a : Mid < AC > , b : Mid < AC > ) -> bool {
141141 // CHECK-LABEL: @mid_ac_eq_discr(
142142
143- // LLVM20: %[[A_REL_DISCR:.+]] = xor i8 %a, -128
144- // CHECK: %[[A_IS_NICHE:.+]] = icmp slt i8 %a, 0
145143 // CHECK: %[[A_NOT_HOLE:.+]] = icmp ne i8 %a, -127
146144 // CHECK: tail call void @llvm.assume(i1 %[[A_NOT_HOLE]])
145+ // LLVM20: %[[A_REL_DISCR:.+]] = xor i8 %a, -128
146+ // CHECK: %[[A_IS_NICHE:.+]] = icmp slt i8 %a, 0
147147 // LLVM20: %[[A_DISCR:.+]] = select i1 %[[A_IS_NICHE]], i8 %[[A_REL_DISCR]], i8 1
148148
149- // LLVM20: %[[B_REL_DISCR:.+]] = xor i8 %b, -128
150- // CHECK: %[[B_IS_NICHE:.+]] = icmp slt i8 %b, 0
151149 // CHECK: %[[B_NOT_HOLE:.+]] = icmp ne i8 %b, -127
152150 // CHECK: tail call void @llvm.assume(i1 %[[B_NOT_HOLE]])
151+ // LLVM20: %[[B_REL_DISCR:.+]] = xor i8 %b, -128
152+ // CHECK: %[[B_IS_NICHE:.+]] = icmp slt i8 %b, 0
153153 // LLVM20: %[[B_DISCR:.+]] = select i1 %[[B_IS_NICHE]], i8 %[[B_REL_DISCR]], i8 1
154154
155155 // LLVM21: %[[A_DISCR:.+]] = select i1 %[[A_IS_NICHE]], i8 %a, i8 -127
@@ -166,21 +166,24 @@ pub fn mid_ac_eq_discr(a: Mid<AC>, b: Mid<AC>) -> bool {
166166pub fn mid_giant_eq_discr ( a : Mid < Giant > , b : Mid < Giant > ) -> bool {
167167 // CHECK-LABEL: @mid_giant_eq_discr(
168168
169+ // CHECK: %[[A_NOT_HOLE:.+]] = icmp ne i128 %a, 6
170+ // CHECK: tail call void @llvm.assume(i1 %[[A_NOT_HOLE]])
169171 // CHECK: %[[A_TRUNC:.+]] = trunc nuw nsw i128 %a to i64
170- // CHECK : %[[A_REL_DISCR:.+]] = add nsw i64 %[[A_TRUNC]], -5
172+ // LLVM20 : %[[A_REL_DISCR:.+]] = add nsw i64 %[[A_TRUNC]], -5
171173 // CHECK: %[[A_IS_NICHE:.+]] = icmp samesign ugt i128 %a, 4
172- // CHECK: %[[A_NOT_HOLE:.+]] = icmp ne i64 %[[A_REL_DISCR]], 1
173- // CHECK: tail call void @llvm.assume(i1 %[[A_NOT_HOLE]])
174- // CHECK: %[[A_DISCR:.+]] = select i1 %[[A_IS_NICHE]], i64 %[[A_REL_DISCR]], i64 1
174+ // LLVM20: %[[A_DISCR:.+]] = select i1 %[[A_IS_NICHE]], i64 %[[A_REL_DISCR]], i64 1
175+ // LLVM21: %[[A_MODIFIED_TAG:.+]] = select i1 %[[A_IS_NICHE]], i64 %[[A_TRUNC]], i64 6
175176
177+ // CHECK: %[[B_NOT_HOLE:.+]] = icmp ne i128 %b, 6
178+ // CHECK: tail call void @llvm.assume(i1 %[[B_NOT_HOLE]])
176179 // CHECK: %[[B_TRUNC:.+]] = trunc nuw nsw i128 %b to i64
177- // CHECK : %[[B_REL_DISCR:.+]] = add nsw i64 %[[B_TRUNC]], -5
180+ // LLVM20 : %[[B_REL_DISCR:.+]] = add nsw i64 %[[B_TRUNC]], -5
178181 // CHECK: %[[B_IS_NICHE:.+]] = icmp samesign ugt i128 %b, 4
179- // CHECK: %[[B_NOT_HOLE:.+]] = icmp ne i64 %[[B_REL_DISCR]], 1
180- // CHECK: tail call void @llvm.assume(i1 %[[B_NOT_HOLE]])
181- // CHECK: %[[B_DISCR:.+]] = select i1 %[[B_IS_NICHE]], i64 %[[B_REL_DISCR]], i64 1
182+ // LLVM20: %[[B_DISCR:.+]] = select i1 %[[B_IS_NICHE]], i64 %[[B_REL_DISCR]], i64 1
183+ // LLVM21: %[[B_MODIFIED_TAG:.+]] = select i1 %[[B_IS_NICHE]], i64 %[[B_TRUNC]], i64 6
182184
183- // CHECK: %[[R:.+]] = icmp eq i64 %[[A_DISCR]], %[[B_DISCR]]
185+ // LLVM20: %[[R:.+]] = icmp eq i64 %[[A_DISCR]], %[[B_DISCR]]
186+ // LLVM21: %[[R:.+]] = icmp eq i64 %[[A_MODIFIED_TAG]], %[[B_MODIFIED_TAG]]
184187 // CHECK: ret i1 %[[R]]
185188 discriminant_value ( & a) == discriminant_value ( & b)
186189}
0 commit comments