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matthiaskrgrmatthiaskrgr
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Rollup merge of #93219 - cr1901:msp430-asm-squashed, r=Amanieu
Add preliminary support for inline assembly for msp430. The `llvm_asm` macro was removed recently, and the MSP430 backend relies on inline assembly to build useful embedded apps. I conveniently "found" time to implement basic support for the new inline `asm` macro syntax with the help of `@Amanieu` :D. In addition to tests in the compiler, I have tested this locally against deployed MSP430 code and have not found any noticeable differences in firmware operation or `objdump` disassemblies between the old `llvm_asm` and the new `asm` syntax.
2 parents 0f2ff4b + 19809ed commit 552b564

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6 files changed

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‎compiler/rustc_codegen_gcc/src/asm.rs

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -560,6 +560,7 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
560560
InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => unimplemented!(),
561561
InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => unimplemented!(),
562562
InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => unimplemented!(),
563+
InlineAsmRegClass::Msp430(_) => unimplemented!(),
563564
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg16) => unimplemented!(),
564565
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg32) => unimplemented!(),
565566
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg64) => unimplemented!(),
@@ -622,6 +623,7 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
622623
InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => cx.type_i32(),
623624
InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => cx.type_i32(),
624625
InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => cx.type_f32(),
626+
InlineAsmRegClass::Msp430(_) => unimplemented!(),
625627
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg16) => cx.type_i16(),
626628
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg32) => cx.type_i32(),
627629
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg64) => cx.type_i64(),
@@ -729,6 +731,7 @@ fn modifier_to_gcc(arch: InlineAsmArch, reg: InlineAsmRegClass, modifier: Option
729731
InlineAsmRegClass::Bpf(_) => unimplemented!(),
730732
InlineAsmRegClass::Hexagon(_) => unimplemented!(),
731733
InlineAsmRegClass::Mips(_) => unimplemented!(),
734+
InlineAsmRegClass::Msp430(_) => unimplemented!(),
732735
InlineAsmRegClass::Nvptx(_) => unimplemented!(),
733736
InlineAsmRegClass::PowerPC(_) => unimplemented!(),
734737
InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg)

‎compiler/rustc_codegen_llvm/src/asm.rs

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -232,6 +232,9 @@ impl<'ll, 'tcx> AsmBuilderMethods<'tcx> for Builder<'_, 'll, 'tcx> {
232232
InlineAsmArch::SpirV => {}
233233
InlineAsmArch::Wasm32 | InlineAsmArch::Wasm64 => {}
234234
InlineAsmArch::Bpf => {}
235+
InlineAsmArch::Msp430 => {
236+
constraints.push("~{sr}".to_string());
237+
}
235238
}
236239
}
237240
if !options.contains(InlineAsmOptions::NOMEM) {
@@ -580,6 +583,7 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'_>>) ->
580583
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_ptr) => "e",
581584
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => "r",
582585
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => "f",
586+
InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg) => "r",
583587
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
584588
bug!("LLVM backend does not support SPIR-V")
585589
}
@@ -666,6 +670,7 @@ fn modifier_to_llvm(
666670
},
667671
InlineAsmRegClass::Avr(_) => None,
668672
InlineAsmRegClass::S390x(_) => None,
673+
InlineAsmRegClass::Msp430(_) => None,
669674
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
670675
bug!("LLVM backend does not support SPIR-V")
671676
}
@@ -734,6 +739,7 @@ fn dummy_output_type<'ll>(cx: &CodegenCx<'ll, '_>, reg: InlineAsmRegClass) -> &'
734739
InlineAsmRegClass::Avr(AvrInlineAsmRegClass::reg_ptr) => cx.type_i16(),
735740
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::reg) => cx.type_i32(),
736741
InlineAsmRegClass::S390x(S390xInlineAsmRegClass::freg) => cx.type_f64(),
742+
InlineAsmRegClass::Msp430(Msp430InlineAsmRegClass::reg) => cx.type_i16(),
737743
InlineAsmRegClass::SpirV(SpirVInlineAsmRegClass::reg) => {
738744
bug!("LLVM backend does not support SPIR-V")
739745
}

‎compiler/rustc_target/src/asm/mod.rs

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -152,6 +152,7 @@ mod avr;
152152
mod bpf;
153153
mod hexagon;
154154
mod mips;
155+
mod msp430;
155156
mod nvptx;
156157
mod powerpc;
157158
mod riscv;
@@ -166,6 +167,7 @@ pub use avr::{AvrInlineAsmReg, AvrInlineAsmRegClass};
166167
pub use bpf::{BpfInlineAsmReg, BpfInlineAsmRegClass};
167168
pub use hexagon::{HexagonInlineAsmReg, HexagonInlineAsmRegClass};
168169
pub use mips::{MipsInlineAsmReg, MipsInlineAsmRegClass};
170+
pub use msp430::{Msp430InlineAsmReg, Msp430InlineAsmRegClass};
169171
pub use nvptx::{NvptxInlineAsmReg, NvptxInlineAsmRegClass};
170172
pub use powerpc::{PowerPCInlineAsmReg, PowerPCInlineAsmRegClass};
171173
pub use riscv::{RiscVInlineAsmReg, RiscVInlineAsmRegClass};
@@ -194,6 +196,7 @@ pub enum InlineAsmArch {
194196
Wasm64,
195197
Bpf,
196198
Avr,
199+
Msp430,
197200
}
198201

199202
impl FromStr for InlineAsmArch {
@@ -219,6 +222,7 @@ impl FromStr for InlineAsmArch {
219222
"wasm64" => Ok(Self::Wasm64),
220223
"bpf" => Ok(Self::Bpf),
221224
"avr" => Ok(Self::Avr),
225+
"msp430" => Ok(Self::Msp430),
222226
_ => Err(()),
223227
}
224228
}
@@ -250,6 +254,7 @@ pub enum InlineAsmReg {
250254
Wasm(WasmInlineAsmReg),
251255
Bpf(BpfInlineAsmReg),
252256
Avr(AvrInlineAsmReg),
257+
Msp430(Msp430InlineAsmReg),
253258
// Placeholder for invalid register constraints for the current target
254259
Err,
255260
}
@@ -267,6 +272,7 @@ impl InlineAsmReg {
267272
Self::S390x(r) => r.name(),
268273
Self::Bpf(r) => r.name(),
269274
Self::Avr(r) => r.name(),
275+
Self::Msp430(r) => r.name(),
270276
Self::Err => "<reg>",
271277
}
272278
}
@@ -283,6 +289,7 @@ impl InlineAsmReg {
283289
Self::S390x(r) => InlineAsmRegClass::S390x(r.reg_class()),
284290
Self::Bpf(r) => InlineAsmRegClass::Bpf(r.reg_class()),
285291
Self::Avr(r) => InlineAsmRegClass::Avr(r.reg_class()),
292+
Self::Msp430(r) => InlineAsmRegClass::Msp430(r.reg_class()),
286293
Self::Err => InlineAsmRegClass::Err,
287294
}
288295
}
@@ -336,6 +343,9 @@ impl InlineAsmReg {
336343
InlineAsmArch::Avr => {
337344
Self::Avr(AvrInlineAsmReg::parse(arch, target_features, target, name)?)
338345
}
346+
InlineAsmArch::Msp430 => {
347+
Self::Msp430(Msp430InlineAsmReg::parse(arch, target_features, target, name)?)
348+
}
339349
})
340350
}
341351

@@ -358,6 +368,7 @@ impl InlineAsmReg {
358368
Self::S390x(r) => r.emit(out, arch, modifier),
359369
Self::Bpf(r) => r.emit(out, arch, modifier),
360370
Self::Avr(r) => r.emit(out, arch, modifier),
371+
Self::Msp430(r) => r.emit(out, arch, modifier),
361372
Self::Err => unreachable!("Use of InlineAsmReg::Err"),
362373
}
363374
}
@@ -374,6 +385,7 @@ impl InlineAsmReg {
374385
Self::S390x(_) => cb(self),
375386
Self::Bpf(r) => r.overlapping_regs(|r| cb(Self::Bpf(r))),
376387
Self::Avr(r) => r.overlapping_regs(|r| cb(Self::Avr(r))),
388+
Self::Msp430(_) => cb(self),
377389
Self::Err => unreachable!("Use of InlineAsmReg::Err"),
378390
}
379391
}
@@ -405,6 +417,7 @@ pub enum InlineAsmRegClass {
405417
Wasm(WasmInlineAsmRegClass),
406418
Bpf(BpfInlineAsmRegClass),
407419
Avr(AvrInlineAsmRegClass),
420+
Msp430(Msp430InlineAsmRegClass),
408421
// Placeholder for invalid register constraints for the current target
409422
Err,
410423
}
@@ -425,6 +438,7 @@ impl InlineAsmRegClass {
425438
Self::Wasm(r) => r.name(),
426439
Self::Bpf(r) => r.name(),
427440
Self::Avr(r) => r.name(),
441+
Self::Msp430(r) => r.name(),
428442
Self::Err => rustc_span::symbol::sym::reg,
429443
}
430444
}
@@ -447,6 +461,7 @@ impl InlineAsmRegClass {
447461
Self::Wasm(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Wasm),
448462
Self::Bpf(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Bpf),
449463
Self::Avr(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Avr),
464+
Self::Msp430(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Msp430),
450465
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
451466
}
452467
}
@@ -476,6 +491,7 @@ impl InlineAsmRegClass {
476491
Self::Wasm(r) => r.suggest_modifier(arch, ty),
477492
Self::Bpf(r) => r.suggest_modifier(arch, ty),
478493
Self::Avr(r) => r.suggest_modifier(arch, ty),
494+
Self::Msp430(r) => r.suggest_modifier(arch, ty),
479495
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
480496
}
481497
}
@@ -501,6 +517,7 @@ impl InlineAsmRegClass {
501517
Self::Wasm(r) => r.default_modifier(arch),
502518
Self::Bpf(r) => r.default_modifier(arch),
503519
Self::Avr(r) => r.default_modifier(arch),
520+
Self::Msp430(r) => r.default_modifier(arch),
504521
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
505522
}
506523
}
@@ -525,6 +542,7 @@ impl InlineAsmRegClass {
525542
Self::Wasm(r) => r.supported_types(arch),
526543
Self::Bpf(r) => r.supported_types(arch),
527544
Self::Avr(r) => r.supported_types(arch),
545+
Self::Msp430(r) => r.supported_types(arch),
528546
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
529547
}
530548
}
@@ -554,6 +572,7 @@ impl InlineAsmRegClass {
554572
}
555573
InlineAsmArch::Bpf => Self::Bpf(BpfInlineAsmRegClass::parse(arch, name)?),
556574
InlineAsmArch::Avr => Self::Avr(AvrInlineAsmRegClass::parse(arch, name)?),
575+
InlineAsmArch::Msp430 => Self::Msp430(Msp430InlineAsmRegClass::parse(arch, name)?),
557576
})
558577
}
559578

@@ -574,6 +593,7 @@ impl InlineAsmRegClass {
574593
Self::Wasm(r) => r.valid_modifiers(arch),
575594
Self::Bpf(r) => r.valid_modifiers(arch),
576595
Self::Avr(r) => r.valid_modifiers(arch),
596+
Self::Msp430(r) => r.valid_modifiers(arch),
577597
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
578598
}
579599
}
@@ -764,6 +784,11 @@ pub fn allocatable_registers(
764784
avr::fill_reg_map(arch, target_features, target, &mut map);
765785
map
766786
}
787+
InlineAsmArch::Msp430 => {
788+
let mut map = msp430::regclass_map();
789+
msp430::fill_reg_map(arch, target_features, target, &mut map);
790+
map
791+
}
767792
}
768793
}
769794

‎compiler/rustc_target/src/asm/msp430.rs

Lines changed: 81 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,81 @@
1+
use super::{InlineAsmArch, InlineAsmType};
2+
use rustc_macros::HashStable_Generic;
3+
use rustc_span::Symbol;
4+
use std::fmt;
5+
6+
def_reg_class! {
7+
Msp430 Msp430InlineAsmRegClass {
8+
reg,
9+
}
10+
}
11+
12+
impl Msp430InlineAsmRegClass {
13+
pub fn valid_modifiers(self, _arch: super::InlineAsmArch) -> &'static [char] {
14+
&[]
15+
}
16+
17+
pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option<Self> {
18+
None
19+
}
20+
21+
pub fn suggest_modifier(
22+
self,
23+
_arch: InlineAsmArch,
24+
_ty: InlineAsmType,
25+
) -> Option<(char, &'static str)> {
26+
None
27+
}
28+
29+
pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<(char, &'static str)> {
30+
None
31+
}
32+
33+
pub fn supported_types(
34+
self,
35+
arch: InlineAsmArch,
36+
) -> &'static [(InlineAsmType, Option<Symbol>)] {
37+
match (self, arch) {
38+
(Self::reg, _) => types! { _: I8, I16; },
39+
}
40+
}
41+
}
42+
43+
// The reserved registers are taken from:
44+
// https://github.com/llvm/llvm-project/blob/36cb29cbbe1b22dcd298ad65e1fabe899b7d7249/llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp#L73.
45+
def_regs! {
46+
Msp430 Msp430InlineAsmReg Msp430InlineAsmRegClass {
47+
r5: reg = ["r5"],
48+
r6: reg = ["r6"],
49+
r7: reg = ["r7"],
50+
r8: reg = ["r8"],
51+
r9: reg = ["r9"],
52+
r10: reg = ["r10"],
53+
r11: reg = ["r11"],
54+
r12: reg = ["r12"],
55+
r13: reg = ["r13"],
56+
r14: reg = ["r14"],
57+
r15: reg = ["r15"],
58+
59+
#error = ["r0", "pc"] =>
60+
"the program counter cannot be used as an operand for inline asm",
61+
#error = ["r1", "sp"] =>
62+
"the stack pointer cannot be used as an operand for inline asm",
63+
#error = ["r2", "sr"] =>
64+
"the status register cannot be used as an operand for inline asm",
65+
#error = ["r3", "cg"] =>
66+
"the constant generator cannot be used as an operand for inline asm",
67+
#error = ["r4", "fp"] =>
68+
"the frame pointer cannot be used as an operand for inline asm",
69+
}
70+
}
71+
72+
impl Msp430InlineAsmReg {
73+
pub fn emit(
74+
self,
75+
out: &mut dyn fmt::Write,
76+
_arch: InlineAsmArch,
77+
_modifier: Option<char>,
78+
) -> fmt::Result {
79+
out.write_str(self.name())
80+
}
81+
}

‎src/doc/unstable-book/src/language-features/asm-experimental-arch.md

Lines changed: 16 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
1515
- BPF
1616
- SPIR-V
1717
- AVR
18+
- MSP430
1819

1920
## Register classes
2021

@@ -39,6 +40,7 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
3940
| AVR | `reg_pair` | `r3r2` .. `r25r24`, `X`, `Z` | `r` |
4041
| AVR | `reg_iw` | `r25r24`, `X`, `Z` | `w` |
4142
| AVR | `reg_ptr` | `X`, `Z` | `e` |
43+
| MSP430 | `reg` | `r[0-15]` | `r` |
4244

4345
> **Notes**:
4446
> - NVPTX doesn't have a fixed register set, so named registers are not supported.
@@ -67,6 +69,7 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
6769
| BPF | `wreg` | `alu32` | `i8` `i16` `i32` |
6870
| AVR | `reg`, `reg_upper` | None | `i8` |
6971
| AVR | `reg_pair`, `reg_iw`, `reg_ptr` | None | `i16` |
72+
| MSP430 | `reg` | None | `i8`, `i16` |
7073

7174
## Register aliases
7275

@@ -80,13 +83,22 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
8083
| AVR | `XL` | `r26` |
8184
| AVR | `ZH` | `r31` |
8285
| AVR | `ZL` | `r30` |
86+
| MSP430 | `r0` | `pc` |
87+
| MSP430 | `r1` | `sp` |
88+
| MSP430 | `r2` | `sr` |
89+
| MSP430 | `r3` | `cg` |
90+
| MSP430 | `r4` | `fp` |
91+
92+
> **Notes**:
93+
> - TI does not mandate a frame pointer for MSP430, but toolchains are allowed
94+
to use one; LLVM uses `r4`.
8395

8496
## Unsupported registers
8597

8698
| Architecture | Unsupported register | Reason |
8799
| ------------ | --------------------------------------- | ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- |
88100
| All | `sp` | The stack pointer must be restored to its original value at the end of an asm code block. |
89-
| All | `fr` (Hexagon), `$fp` (MIPS), `Y` (AVR) | The frame pointer cannot be used as an input or output. |
101+
| All | `fr` (Hexagon), `$fp` (MIPS), `Y` (AVR), `r4` (MSP430) | The frame pointer cannot be used as an input or output. |
90102
| All | `r19` (Hexagon) | This is used internally by LLVM as a "base pointer" for functions with complex stack frames. |
91103
| MIPS | `$0` or `$zero` | This is a constant zero register which can't be modified. |
92104
| MIPS | `$1` or `$at` | Reserved for assembler. |
@@ -95,6 +107,7 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
95107
| MIPS | `$ra` | Return address cannot be used as inputs or outputs. |
96108
| Hexagon | `lr` | This is the link register which cannot be used as an input or output. |
97109
| AVR | `r0`, `r1`, `r1r0` | Due to an issue in LLVM, the `r0` and `r1` registers cannot be used as inputs or outputs. If modified, they must be restored to their original values before the end of the block. |
110+
|MSP430 | `r0`, `r2`, `r3` | These are the program counter, status register, and constant generator respectively. Neither the status register nor constant generator can be written to. |
98111

99112
## Template modifiers
100113

@@ -115,3 +128,5 @@ This feature tracks `asm!` and `global_asm!` support for the following architect
115128
These flags registers must be restored upon exiting the asm block if the `preserves_flags` option is set:
116129
- AVR
117130
- The status register `SREG`.
131+
- MSP430
132+
- The status register `r2`.

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