rustc_target: introduce Architecture

Improve type safety by using an enum rather than strings.

Author: tamird

compiler/rustc_attr_parsing/src/attributes/link_attrs.rs

@@ -4,7 +4,7 @@ use rustc_hir::attrs::*;
 use rustc_session::Session;
 use rustc_session::parse::feature_err;
 use rustc_span::kw;
-use rustc_target::spec::BinaryFormat;
+use rustc_target::spec::{Architecture, BinaryFormat};
 
 use super::prelude::*;
 use super::util::parse_single_integer;
@@ -439,7 +439,7 @@ impl LinkParser {
             cx.expected_name_value(item.span(), Some(sym::import_name_type));
             return true;
         };
-        if cx.sess().target.arch != "x86" {
+        if cx.sess().target.arch != Architecture::X86 {
             cx.emit_err(ImportNameTypeX86 { span: item.span() });
             return true;
         }

compiler/rustc_codegen_cranelift/src/abi/mod.rs

@@ -20,6 +20,7 @@ use rustc_middle::ty::print::with_no_trimmed_paths;
 use rustc_session::Session;
 use rustc_span::source_map::Spanned;
 use rustc_target::callconv::{FnAbi, PassMode};
+use rustc_target::spec::Architecture;
 use smallvec::SmallVec;
 
 use self::pass_mode::*;
@@ -155,7 +156,7 @@ impl<'tcx> FunctionCx<'_, '_, 'tcx> {
             let ret = self.lib_call_unadjusted(name, params, returns, &args)[0];
 
             Cow::Owned(vec![codegen_bitcast(self, types::I128, ret)])
-        } else if ret_single_i128 && self.tcx.sess.target.arch == "s390x" {
+        } else if ret_single_i128 && self.tcx.sess.target.arch == Architecture::S390x {
             // Return i128 using a return area pointer on s390x.
             let mut params = params;
             let mut args = args.to_vec();
@@ -641,7 +642,7 @@ pub(crate) fn codegen_terminator_call<'tcx>(
                 .flat_map(|arg_abi| arg_abi.get_abi_param(fx.tcx).into_iter()),
         );
 
-        if fx.tcx.sess.target.is_like_darwin && fx.tcx.sess.target.arch == "aarch64" {
+        if fx.tcx.sess.target.is_like_darwin && fx.tcx.sess.target.arch == Architecture::AArch64 {
             // Add any padding arguments needed for Apple AArch64.
             // There's no need to pad the argument list unless variadic arguments are actually being
             // passed.
@@ -787,25 +788,25 @@ pub(crate) fn codegen_drop<'tcx>(
 pub(crate) fn lib_call_arg_param(tcx: TyCtxt<'_>, ty: Type, is_signed: bool) -> AbiParam {
     let param = AbiParam::new(ty);
     if ty.is_int() && u64::from(ty.bits()) < tcx.data_layout.pointer_size().bits() {
-        match (&*tcx.sess.target.arch, &*tcx.sess.target.vendor) {
-            ("x86_64", _) | ("aarch64", "apple") => match (ty, is_signed) {
+        match (tcx.sess.target.arch, tcx.sess.target.vendor.as_ref()) {
+            (Architecture::X86_64, _) | (Architecture::AArch64, "apple") => match (ty, is_signed) {
                 (types::I8 | types::I16, true) => param.sext(),
                 (types::I8 | types::I16, false) => param.uext(),
                 _ => param,
             },
-            ("aarch64", _) => param,
-            ("riscv64", _) => match (ty, is_signed) {
+            (Architecture::AArch64, _) => param,
+            (Architecture::RiscV64, _) => match (ty, is_signed) {
                 (types::I32, _) | (_, true) => param.sext(),
                 _ => param.uext(),
             },
-            ("s390x", _) => {
+            (Architecture::S390x, _) => {
                 if is_signed {
                     param.sext()
                 } else {
                     param.uext()
                 }
             }
-            _ => unimplemented!("{:?}", tcx.sess.target.arch),
+            (arch, _) => unimplemented!("{arch:?}"),
         }
     } else {
         param

compiler/rustc_codegen_cranelift/src/codegen_f16_f128.rs

@@ -1,15 +1,18 @@
+use rustc_target::spec::Architecture;
+
 use crate::prelude::*;
 
 pub(crate) fn f16_to_f32(fx: &mut FunctionCx<'_, '_, '_>, value: Value) -> Value {
-    let (value, arg_ty) =
-        if fx.tcx.sess.target.vendor == "apple" && fx.tcx.sess.target.arch == "x86_64" {
-            (
-                fx.bcx.ins().bitcast(types::I16, MemFlags::new(), value),
-                lib_call_arg_param(fx.tcx, types::I16, false),
-            )
-        } else {
-            (value, AbiParam::new(types::F16))
-        };
+    let (value, arg_ty) = if fx.tcx.sess.target.vendor == "apple"
+        && fx.tcx.sess.target.arch == Architecture::X86_64
+    {
+        (
+            fx.bcx.ins().bitcast(types::I16, MemFlags::new(), value),
+            lib_call_arg_param(fx.tcx, types::I16, false),
+        )
+    } else {
+        (value, AbiParam::new(types::F16))
+    };
     fx.lib_call("__extendhfsf2", vec![arg_ty], vec![AbiParam::new(types::F32)], &[value])[0]
 }
 
@@ -19,7 +22,9 @@ fn f16_to_f64(fx: &mut FunctionCx<'_, '_, '_>, value: Value) -> Value {
 }
 
 pub(crate) fn f32_to_f16(fx: &mut FunctionCx<'_, '_, '_>, value: Value) -> Value {
-    let ret_ty = if fx.tcx.sess.target.vendor == "apple" && fx.tcx.sess.target.arch == "x86_64" {
+    let ret_ty = if fx.tcx.sess.target.vendor == "apple"
+        && fx.tcx.sess.target.arch == Architecture::X86_64
+    {
         types::I16
     } else {
         types::F16
@@ -34,7 +39,9 @@ pub(crate) fn f32_to_f16(fx: &mut FunctionCx<'_, '_, '_>, value: Value) -> Value
 }
 
 fn f64_to_f16(fx: &mut FunctionCx<'_, '_, '_>, value: Value) -> Value {
-    let ret_ty = if fx.tcx.sess.target.vendor == "apple" && fx.tcx.sess.target.arch == "x86_64" {
+    let ret_ty = if fx.tcx.sess.target.vendor == "apple"
+        && fx.tcx.sess.target.arch == Architecture::X86_64
+    {
         types::I16
     } else {
         types::F16

compiler/rustc_codegen_cranelift/src/common.rs

@@ -8,7 +8,7 @@ use rustc_middle::ty::layout::{
 };
 use rustc_span::source_map::Spanned;
 use rustc_target::callconv::FnAbi;
-use rustc_target::spec::{HasTargetSpec, Target};
+use rustc_target::spec::{Architecture, HasTargetSpec, Target};
 
 use crate::constant::ConstantCx;
 use crate::debuginfo::FunctionDebugContext;
@@ -373,7 +373,7 @@ impl<'tcx> FunctionCx<'_, '_, 'tcx> {
             "size must be a multiple of alignment (size={size}, align={align})"
         );
 
-        let abi_align = if self.tcx.sess.target.arch == "s390x" { 8 } else { 16 };
+        let abi_align = if self.tcx.sess.target.arch == Architecture::S390x { 8 } else { 16 };
         if align <= abi_align {
             let stack_slot = self.bcx.create_sized_stack_slot(StackSlotData {
                 kind: StackSlotKind::ExplicitSlot,

compiler/rustc_codegen_cranelift/src/lib.rs

@@ -50,6 +50,7 @@ use rustc_middle::dep_graph::{WorkProduct, WorkProductId};
 use rustc_session::Session;
 use rustc_session::config::OutputFilenames;
 use rustc_span::{Symbol, sym};
+use rustc_target::spec::Architecture;
 
 pub use crate::config::*;
 use crate::prelude::*;
@@ -186,20 +187,20 @@ impl CodegenBackend for CraneliftCodegenBackend {
 
     fn target_config(&self, sess: &Session) -> TargetConfig {
         // FIXME return the actually used target features. this is necessary for #[cfg(target_feature)]
-        let target_features = if sess.target.arch == "x86_64" && sess.target.os != "none" {
-            // x86_64 mandates SSE2 support and rustc requires the x87 feature to be enabled
-            vec![sym::fxsr, sym::sse, sym::sse2, Symbol::intern("x87")]
-        } else if sess.target.arch == "aarch64" {
-            match &*sess.target.os {
+        let target_features = match sess.target.arch {
+            Architecture::X86_64 if sess.target.os != "none" => {
+                // x86_64 mandates SSE2 support and rustc requires the x87 feature to be enabled
+                vec![sym::fxsr, sym::sse, sym::sse2, Symbol::intern("x87")]
+            }
+            Architecture::AArch64 => match &*sess.target.os {
                 "none" => vec![],
                 // On macOS the aes, sha2 and sha3 features are enabled by default and ring
                 // fails to compile on macOS when they are not present.
                 "macos" => vec![sym::neon, sym::aes, sym::sha2, sym::sha3],
                 // AArch64 mandates Neon support
                 _ => vec![sym::neon],
-            }
-        } else {
-            vec![]
+            },
+            _ => vec![],
         };
         // FIXME do `unstable_target_features` properly
         let unstable_target_features = target_features.clone();
@@ -208,14 +209,14 @@ impl CodegenBackend for CraneliftCodegenBackend {
         // Windows, whereas LLVM 21+ and Cranelift pass it indirectly. This means that `f128` won't
         // work when linking against a LLVM-built sysroot.
         let has_reliable_f128 = !sess.target.is_like_windows;
-        let has_reliable_f16 = match &*sess.target.arch {
+        let has_reliable_f16 = match sess.target.arch {
             // FIXME(f16_f128): LLVM 20 does not support `f16` on s390x, meaning the required
             // builtins are not available in `compiler-builtins`.
-            "s390x" => false,
+            Architecture::S390x => false,
             // FIXME(f16_f128): `rustc_codegen_llvm` currently disables support on Windows GNU
             // targets due to GCC using a different ABI than LLVM. Therefore `f16` won't be
             // available when using a LLVM-built sysroot.
-            "x86_64"
+            Architecture::X86_64
                 if sess.target.os == "windows"
                     && sess.target.env == "gnu"
                     && sess.target.abi != "llvm" =>

compiler/rustc_codegen_gcc/src/abi.rs

@@ -12,6 +12,8 @@ use rustc_middle::ty::layout::LayoutOf;
 #[cfg(feature = "master")]
 use rustc_session::config;
 use rustc_target::callconv::{ArgAttributes, CastTarget, FnAbi, PassMode};
+#[cfg(feature = "master")]
+use rustc_target::spec::Architecture;
 
 use crate::builder::Builder;
 use crate::context::CodegenCx;
@@ -233,12 +235,12 @@ impl<'gcc, 'tcx> FnAbiGccExt<'gcc, 'tcx> for FnAbi<'tcx, Ty<'tcx>> {
 
     #[cfg(feature = "master")]
     fn gcc_cconv(&self, cx: &CodegenCx<'gcc, 'tcx>) -> Option<FnAttribute<'gcc>> {
-        conv_to_fn_attribute(self.conv, &cx.tcx.sess.target.arch)
+        conv_to_fn_attribute(self.conv, cx.tcx.sess.target.arch)
     }
 }
 
 #[cfg(feature = "master")]
-pub fn conv_to_fn_attribute<'gcc>(conv: CanonAbi, arch: &str) -> Option<FnAttribute<'gcc>> {
+pub fn conv_to_fn_attribute<'gcc>(conv: CanonAbi, arch: Architecture) -> Option<FnAttribute<'gcc>> {
     let attribute = match conv {
         CanonAbi::C | CanonAbi::Rust => return None,
         CanonAbi::RustCold => FnAttribute::Cold,
@@ -251,15 +253,11 @@ pub fn conv_to_fn_attribute<'gcc>(conv: CanonAbi, arch: &str) -> Option<FnAttrib
             ArmCall::CCmseNonSecureEntry => FnAttribute::ArmCmseNonsecureEntry,
             ArmCall::Aapcs => FnAttribute::ArmPcs("aapcs"),
         },
-        CanonAbi::GpuKernel => {
-            if arch == "amdgpu" {
-                FnAttribute::GcnAmdGpuHsaKernel
-            } else if arch == "nvptx64" {
-                FnAttribute::NvptxKernel
-            } else {
-                panic!("Architecture {} does not support GpuKernel calling convention", arch);
-            }
-        }
+        CanonAbi::GpuKernel => match arch {
+            Architecture::AmdGpu => FnAttribute::GcnAmdGpuHsaKernel,
+            Architecture::Nvptx64 => FnAttribute::NvptxKernel,
+            arch => panic!("Architecture {arch} does not support GpuKernel calling convention"),
+        },
         // TODO(antoyo): check if those AVR attributes are mapped correctly.
         CanonAbi::Interrupt(interrupt_kind) => match interrupt_kind {
             InterruptKind::Avr => FnAttribute::AvrSignal,

compiler/rustc_codegen_gcc/src/attributes.rs

@@ -9,6 +9,8 @@ use rustc_middle::middle::codegen_fn_attrs::CodegenFnAttrFlags;
 #[cfg(feature = "master")]
 use rustc_middle::mir::TerminatorKind;
 use rustc_middle::ty;
+#[cfg(feature = "master")]
+use rustc_target::spec::Architecture;
 
 use crate::context::CodegenCx;
 use crate::gcc_util::to_gcc_features;
@@ -70,7 +72,7 @@ fn inline_attr<'gcc, 'tcx>(
         InlineAttr::Hint => Some(FnAttribute::Inline),
         InlineAttr::Force { .. } => Some(FnAttribute::AlwaysInline),
         InlineAttr::Never => {
-            if cx.sess().target.arch != "amdgpu" {
+            if cx.sess().target.arch != Architecture::AmdGpu {
                 Some(FnAttribute::NoInline)
             } else {
                 None
@@ -153,8 +155,8 @@ pub fn from_fn_attrs<'gcc, 'tcx>(
         .join(",");
     if !target_features.is_empty() {
         #[cfg(feature = "master")]
-        match cx.sess().target.arch.as_ref() {
-            "x86" | "x86_64" | "powerpc" => {
+        match cx.sess().target.arch {
+            Architecture::X86 | Architecture::X86_64 | Architecture::PowerPC => {
                 func.add_attribute(FnAttribute::Target(&target_features))
             }
             // The target attribute is not supported on other targets in GCC.

compiler/rustc_codegen_gcc/src/base.rs

@@ -15,9 +15,9 @@ use rustc_middle::mir::mono::Visibility;
 use rustc_middle::ty::TyCtxt;
 use rustc_session::config::DebugInfo;
 use rustc_span::Symbol;
-use rustc_target::spec::RelocModel;
 #[cfg(feature = "master")]
 use rustc_target::spec::SymbolVisibility;
+use rustc_target::spec::{Architecture, RelocModel};
 
 use crate::builder::Builder;
 use crate::context::CodegenCx;
@@ -116,7 +116,7 @@ pub fn compile_codegen_unit(
             .map(|string| &string[1..])
             .collect();
 
-        if !disabled_features.contains("avx") && tcx.sess.target.arch == "x86_64" {
+        if !disabled_features.contains("avx") && tcx.sess.target.arch == Architecture::X86_64 {
             // NOTE: we always enable AVX because the equivalent of llvm.x86.sse2.cmp.pd in GCC for
             // SSE2 is multiple builtins, so we use the AVX __builtin_ia32_cmppd instead.
             // FIXME(antoyo): use the proper builtins for llvm.x86.sse2.cmp.pd and similar.

compiler/rustc_codegen_gcc/src/context.rs

@@ -487,7 +487,7 @@ impl<'gcc, 'tcx> MiscCodegenMethods<'tcx> for CodegenCx<'gcc, 'tcx> {
         let entry_name = self.sess().target.entry_name.as_ref();
         if !self.functions.borrow().contains_key(entry_name) {
             #[cfg(feature = "master")]
-            let conv = conv_to_fn_attribute(self.sess().target.entry_abi, &self.sess().target.arch);
+            let conv = conv_to_fn_attribute(self.sess().target.entry_abi, self.sess().target.arch);
             #[cfg(not(feature = "master"))]
             let conv = None;
             Some(self.declare_entry_fn(entry_name, fn_type, conv))

compiler/rustc_codegen_gcc/src/gcc_util.rs

@@ -2,6 +2,7 @@
 use gccjit::Context;
 use rustc_codegen_ssa::target_features;
 use rustc_session::Session;
+use rustc_target::spec::Architecture;
 use smallvec::{SmallVec, smallvec};
 
 fn gcc_features_by_flags(sess: &Session, features: &mut Vec<String>) {
@@ -65,44 +66,47 @@ pub(crate) fn global_gcc_features(sess: &Session, diagnostics: bool) -> Vec<Stri
 
 // To find a list of GCC's names, check https://gcc.gnu.org/onlinedocs/gcc/Function-Attributes.html
 pub fn to_gcc_features<'a>(sess: &Session, s: &'a str) -> SmallVec<[&'a str; 2]> {
-    let arch = if sess.target.arch == "x86_64" { "x86" } else { &*sess.target.arch };
     // cSpell:disable
-    match (arch, s) {
+    match (sess.target.arch, s) {
         // FIXME: seems like x87 does not exist?
-        ("x86", "x87") => smallvec![],
-        ("x86", "sse4.2") => smallvec!["sse4.2", "crc32"],
-        ("x86", "pclmulqdq") => smallvec!["pclmul"],
-        ("x86", "rdrand") => smallvec!["rdrnd"],
-        ("x86", "bmi1") => smallvec!["bmi"],
-        ("x86", "cmpxchg16b") => smallvec!["cx16"],
-        ("x86", "avx512vaes") => smallvec!["vaes"],
-        ("x86", "avx512gfni") => smallvec!["gfni"],
-        ("x86", "avx512vpclmulqdq") => smallvec!["vpclmulqdq"],
+        (Architecture::X86 | Architecture::X86_64, "x87") => smallvec![],
+        (Architecture::X86 | Architecture::X86_64, "sse4.2") => smallvec!["sse4.2", "crc32"],
+        (Architecture::X86 | Architecture::X86_64, "pclmulqdq") => smallvec!["pclmul"],
+        (Architecture::X86 | Architecture::X86_64, "rdrand") => smallvec!["rdrnd"],
+        (Architecture::X86 | Architecture::X86_64, "bmi1") => smallvec!["bmi"],
+        (Architecture::X86 | Architecture::X86_64, "cmpxchg16b") => smallvec!["cx16"],
+        (Architecture::X86 | Architecture::X86_64, "avx512vaes") => smallvec!["vaes"],
+        (Architecture::X86 | Architecture::X86_64, "avx512gfni") => smallvec!["gfni"],
+        (Architecture::X86 | Architecture::X86_64, "avx512vpclmulqdq") => smallvec!["vpclmulqdq"],
         // NOTE: seems like GCC requires 'avx512bw' for 'avx512vbmi2'.
-        ("x86", "avx512vbmi2") => smallvec!["avx512vbmi2", "avx512bw"],
+        (Architecture::X86 | Architecture::X86_64, "avx512vbmi2") => {
+            smallvec!["avx512vbmi2", "avx512bw"]
+        }
         // NOTE: seems like GCC requires 'avx512bw' for 'avx512bitalg'.
-        ("x86", "avx512bitalg") => smallvec!["avx512bitalg", "avx512bw"],
-        ("aarch64", "rcpc2") => smallvec!["rcpc-immo"],
-        ("aarch64", "dpb") => smallvec!["ccpp"],
-        ("aarch64", "dpb2") => smallvec!["ccdp"],
-        ("aarch64", "frintts") => smallvec!["fptoint"],
-        ("aarch64", "fcma") => smallvec!["complxnum"],
-        ("aarch64", "pmuv3") => smallvec!["perfmon"],
-        ("aarch64", "paca") => smallvec!["pauth"],
-        ("aarch64", "pacg") => smallvec!["pauth"],
+        (Architecture::X86 | Architecture::X86_64, "avx512bitalg") => {
+            smallvec!["avx512bitalg", "avx512bw"]
+        }
+        (Architecture::AArch64, "rcpc2") => smallvec!["rcpc-immo"],
+        (Architecture::AArch64, "dpb") => smallvec!["ccpp"],
+        (Architecture::AArch64, "dpb2") => smallvec!["ccdp"],
+        (Architecture::AArch64, "frintts") => smallvec!["fptoint"],
+        (Architecture::AArch64, "fcma") => smallvec!["complxnum"],
+        (Architecture::AArch64, "pmuv3") => smallvec!["perfmon"],
+        (Architecture::AArch64, "paca") => smallvec!["pauth"],
+        (Architecture::AArch64, "pacg") => smallvec!["pauth"],
         // Rust ties fp and neon together. In GCC neon implicitly enables fp,
         // but we manually enable neon when a feature only implicitly enables fp
-        ("aarch64", "f32mm") => smallvec!["f32mm", "neon"],
-        ("aarch64", "f64mm") => smallvec!["f64mm", "neon"],
-        ("aarch64", "fhm") => smallvec!["fp16fml", "neon"],
-        ("aarch64", "fp16") => smallvec!["fullfp16", "neon"],
-        ("aarch64", "jsconv") => smallvec!["jsconv", "neon"],
-        ("aarch64", "sve") => smallvec!["sve", "neon"],
-        ("aarch64", "sve2") => smallvec!["sve2", "neon"],
-        ("aarch64", "sve2-aes") => smallvec!["sve2-aes", "neon"],
-        ("aarch64", "sve2-sm4") => smallvec!["sve2-sm4", "neon"],
-        ("aarch64", "sve2-sha3") => smallvec!["sve2-sha3", "neon"],
-        ("aarch64", "sve2-bitperm") => smallvec!["sve2-bitperm", "neon"],
+        (Architecture::AArch64, "f32mm") => smallvec!["f32mm", "neon"],
+        (Architecture::AArch64, "f64mm") => smallvec!["f64mm", "neon"],
+        (Architecture::AArch64, "fhm") => smallvec!["fp16fml", "neon"],
+        (Architecture::AArch64, "fp16") => smallvec!["fullfp16", "neon"],
+        (Architecture::AArch64, "jsconv") => smallvec!["jsconv", "neon"],
+        (Architecture::AArch64, "sve") => smallvec!["sve", "neon"],
+        (Architecture::AArch64, "sve2") => smallvec!["sve2", "neon"],
+        (Architecture::AArch64, "sve2-aes") => smallvec!["sve2-aes", "neon"],
+        (Architecture::AArch64, "sve2-sm4") => smallvec!["sve2-sm4", "neon"],
+        (Architecture::AArch64, "sve2-sha3") => smallvec!["sve2-sha3", "neon"],
+        (Architecture::AArch64, "sve2-bitperm") => smallvec!["sve2-bitperm", "neon"],
         (_, s) => smallvec![s],
     }
     // cSpell:enable