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AMDGPU/InsertWaitcnts: Use foreach loops for inst and wait event types
Summary: It hides the type casting ugliness, and I happened to have to add a new such loop (in a later patch). Reviewers: msearles, rampitec, scott.linder, kanarayan Subscribers: arsenm, kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits, hakzsam Differential Revision: https://reviews.llvm.org/D54227 llvm-svn: 347849
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+39
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1 file changed

+39
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llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp

Lines changed: 39 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -69,6 +69,25 @@ static cl::opt<unsigned> ForceEmitZeroFlag(
6969

7070
namespace {
7171

72+
template <typename EnumT>
73+
class enum_iterator
74+
: public iterator_facade_base<enum_iterator<EnumT>,
75+
std::forward_iterator_tag, const EnumT> {
76+
EnumT Value;
77+
public:
78+
enum_iterator() = default;
79+
enum_iterator(EnumT Value) : Value(Value) {}
80+
81+
enum_iterator &operator++() {
82+
Value = static_cast<EnumT>(Value + 1);
83+
return *this;
84+
}
85+
86+
bool operator==(const enum_iterator &RHS) const { return Value == RHS.Value; }
87+
88+
EnumT operator*() const { return Value; }
89+
};
90+
7291
// Class of object that encapsulates latest instruction counter score
7392
// associated with the operand. Used for determining whether
7493
// s_waitcnt instruction needs to be emited.
@@ -77,6 +96,11 @@ namespace {
7796

7897
enum InstCounterType { VM_CNT = 0, LGKM_CNT, EXP_CNT, NUM_INST_CNTS };
7998

99+
iterator_range<enum_iterator<InstCounterType>> inst_counter_types() {
100+
return make_range(enum_iterator<InstCounterType>(VM_CNT),
101+
enum_iterator<InstCounterType>(NUM_INST_CNTS));
102+
}
103+
80104
using RegInterval = std::pair<signed, signed>;
81105

82106
struct {
@@ -108,6 +132,11 @@ enum WaitEventType {
108132
NUM_WAIT_EVENTS,
109133
};
110134

135+
iterator_range<enum_iterator<WaitEventType>> wait_event_types() {
136+
return make_range(enum_iterator<WaitEventType>(VMEM_ACCESS),
137+
enum_iterator<WaitEventType>(NUM_WAIT_EVENTS));
138+
}
139+
111140
// The mapping is:
112141
// 0 .. SQ_MAX_PGM_VGPRS-1 real VGPRs
113142
// SQ_MAX_PGM_VGPRS .. NUM_ALL_VGPRS-1 extra VGPR-like slots
@@ -122,11 +151,6 @@ enum RegisterMapping {
122151
NUM_ALL_VGPRS = SQ_MAX_PGM_VGPRS + NUM_EXTRA_VGPRS, // Where SGPR starts.
123152
};
124153

125-
#define ForAllWaitEventType(w) \
126-
for (enum WaitEventType w = (enum WaitEventType)0; \
127-
(w) < (enum WaitEventType)NUM_WAIT_EVENTS; \
128-
(w) = (enum WaitEventType)((w) + 1))
129-
130154
void addWait(AMDGPU::Waitcnt &Wait, InstCounterType T, unsigned Count) {
131155
switch (T) {
132156
case VM_CNT:
@@ -153,10 +177,8 @@ void addWait(AMDGPU::Waitcnt &Wait, InstCounterType T, unsigned Count) {
153177
class BlockWaitcntBrackets {
154178
public:
155179
BlockWaitcntBrackets(const GCNSubtarget *SubTarget) : ST(SubTarget) {
156-
for (enum InstCounterType T = VM_CNT; T < NUM_INST_CNTS;
157-
T = (enum InstCounterType)(T + 1)) {
180+
for (auto T : inst_counter_types())
158181
memset(VgprScores[T], 0, sizeof(VgprScores[T]));
159-
}
160182
}
161183

162184
~BlockWaitcntBrackets() = default;
@@ -257,10 +279,8 @@ class BlockWaitcntBrackets {
257279
memset(ScoreLBs, 0, sizeof(ScoreLBs));
258280
memset(ScoreUBs, 0, sizeof(ScoreUBs));
259281
memset(EventUBs, 0, sizeof(EventUBs));
260-
for (enum InstCounterType T = VM_CNT; T < NUM_INST_CNTS;
261-
T = (enum InstCounterType)(T + 1)) {
282+
for (auto T : inst_counter_types())
262283
memset(VgprScores[T], 0, sizeof(VgprScores[T]));
263-
}
264284
memset(SgprScores, 0, sizeof(SgprScores));
265285
}
266286

@@ -426,8 +446,7 @@ class SIInsertWaitcnts : public MachineFunctionPass {
426446
}
427447

428448
bool isForceEmitWaitcnt() const {
429-
for (enum InstCounterType T = VM_CNT; T < NUM_INST_CNTS;
430-
T = (enum InstCounterType)(T + 1))
449+
for (auto T : inst_counter_types())
431450
if (ForceEmitWaitcnt[T])
432451
return true;
433452
return false;
@@ -679,8 +698,7 @@ void BlockWaitcntBrackets::updateByEvent(const SIInstrInfo *TII,
679698

680699
void BlockWaitcntBrackets::print(raw_ostream &OS) {
681700
OS << '\n';
682-
for (enum InstCounterType T = VM_CNT; T < NUM_INST_CNTS;
683-
T = (enum InstCounterType)(T + 1)) {
701+
for (auto T : inst_counter_types()) {
684702
int LB = getScoreLB(T);
685703
int UB = getScoreUB(T);
686704

@@ -1325,8 +1343,7 @@ void SIInsertWaitcnts::mergeInputScoreBrackets(MachineBasicBlock &Block) {
13251343
if (!Visited || PredScoreBrackets->getWaitAtBeginning()) {
13261344
continue;
13271345
}
1328-
for (enum InstCounterType T = VM_CNT; T < NUM_INST_CNTS;
1329-
T = (enum InstCounterType)(T + 1)) {
1346+
for (auto T : inst_counter_types()) {
13301347
int span =
13311348
PredScoreBrackets->getScoreUB(T) - PredScoreBrackets->getScoreLB(T);
13321349
MaxPending[T] = std::max(MaxPending[T], span);
@@ -1367,8 +1384,7 @@ void SIInsertWaitcnts::mergeInputScoreBrackets(MachineBasicBlock &Block) {
13671384
#endif
13681385

13691386
// Now set the current Block's brackets to the largest ending bracket.
1370-
for (enum InstCounterType T = VM_CNT; T < NUM_INST_CNTS;
1371-
T = (enum InstCounterType)(T + 1)) {
1387+
for (auto T : inst_counter_types()) {
13721388
ScoreBrackets->setScoreUB(T, MaxPending[T]);
13731389
ScoreBrackets->setScoreLB(T, 0);
13741390
ScoreBrackets->setLastFlat(T, MaxFlat[T]);
@@ -1386,8 +1402,7 @@ void SIInsertWaitcnts::mergeInputScoreBrackets(MachineBasicBlock &Block) {
13861402
BlockWaitcntBracketsMap[Pred].get();
13871403

13881404
// Now merge the gpr_reg_score information
1389-
for (enum InstCounterType T = VM_CNT; T < NUM_INST_CNTS;
1390-
T = (enum InstCounterType)(T + 1)) {
1405+
for (auto T : inst_counter_types()) {
13911406
int PredLB = PredScoreBrackets->getScoreLB(T);
13921407
int PredUB = PredScoreBrackets->getScoreUB(T);
13931408
if (PredLB < PredUB) {
@@ -1420,7 +1435,7 @@ void SIInsertWaitcnts::mergeInputScoreBrackets(MachineBasicBlock &Block) {
14201435
}
14211436

14221437
// Also merge the WaitEvent information.
1423-
ForAllWaitEventType(W) {
1438+
for (auto W : wait_event_types()) {
14241439
enum InstCounterType T = PredScoreBrackets->eventCounter(W);
14251440
int PredEventUB = PredScoreBrackets->getEventUB(W);
14261441
if (PredEventUB > PredScoreBrackets->getScoreLB(T)) {
@@ -1623,8 +1638,7 @@ void SIInsertWaitcnts::insertWaitcntInBlock(MachineFunction &MF,
16231638
// generating the precise wait count, just wait on 0.
16241639
bool HasPending = false;
16251640
MachineInstr *SWaitInst = WaitcntData->getWaitcnt();
1626-
for (enum InstCounterType T = VM_CNT; T < NUM_INST_CNTS;
1627-
T = (enum InstCounterType)(T + 1)) {
1641+
for (auto T : inst_counter_types()) {
16281642
if (ScoreBrackets->getScoreUB(T) > ScoreBrackets->getScoreLB(T)) {
16291643
ScoreBrackets->setScoreLB(T, ScoreBrackets->getScoreUB(T));
16301644
HasPending = true;
@@ -1675,8 +1689,7 @@ bool SIInsertWaitcnts::runOnMachineFunction(MachineFunction &MF) {
16751689
const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
16761690

16771691
ForceEmitZeroWaitcnts = ForceEmitZeroFlag;
1678-
for (enum InstCounterType T = VM_CNT; T < NUM_INST_CNTS;
1679-
T = (enum InstCounterType)(T + 1))
1692+
for (auto T : inst_counter_types())
16801693
ForceEmitWaitcnt[T] = false;
16811694

16821695
HardwareLimits.VmcntMax = AMDGPU::getVmcntBitMask(IV);

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