Update zlib library to 2.2.1

Author: JakubOnderka

Cargo.toml

@@ -39,6 +39,8 @@ include = [
     # zlib-ng cmake
     "src/zlib-ng/CMakeLists.txt",
     "src/zlib-ng/zlib.pc.cmakein",
+    "src/zlib-ng/zlib-config.cmake.in",
+    "src/zlib-ng/zlib-ng-config.cmake.in",
     "src/zlib-ng/cmake",
 ]
 

src/zlib-ng

@@ -112,14 +112,10 @@ pub fn build_zlib_ng(target: &str, compat: bool) {
         None,
         &[
             "adler32",
-            "adler32_fold",
-            "chunkset",
-            "compare256",
             "compress",
             "cpu_features",
-            "crc32_braid",
+            "crc32",
             "crc32_braid_comb",
-            "crc32_fold",
             "deflate",
             "deflate_fast",
             "deflate_huff",
@@ -137,13 +133,25 @@ pub fn build_zlib_ng(target: &str, compat: bool) {
             "inftrees",
             "insert_string",
             "insert_string_roll",
-            "slide_hash",
             "trees",
             "uncompr",
             "zutil",
         ],
     );
 
+    cfg.append(
+        Some("arch/generic"),
+        &[
+            "adler32_c",
+            "adler32_fold_c",
+            "chunkset_c",
+            "compare256_c",
+            "crc32_braid_c",
+            "crc32_fold_c",
+            "slide_hash_c",
+        ]
+    );
+
     if compat {
         cfg.define("ZLIB_COMPAT", None);
     }
@@ -238,7 +246,7 @@ pub fn build_zlib_ng(target: &str, compat: bool) {
 
             // SSE4.2
             cfg.define("X86_SSE42", None);
-            cfg.append(Some("arch/x86"), &["adler32_sse42", "insert_string_sse42"]);
+            cfg.append(Some("arch/x86"), &["adler32_sse42"]);
             cfg.mflag("-msse4.2", "/arch:SSE4.2");
 
             // AVX-512
@@ -302,7 +310,7 @@ pub fn build_zlib_ng(target: &str, compat: bool) {
             // for arm, don't know if that is still true though
             if !cfg.is_msvc || is_aarch64 {
                 cfg.define("ARM_ACLE", None).define("HAVE_ARM_ACLE_H", None);
-                cfg.append(Some("arch/arm"), &["crc32_acle", "insert_string_acle"]);
+                cfg.append(Some("arch/arm"), &["crc32_acle"]);
                 // When targeting aarch64 we already need to specify +simd, so
                 // we do that once later in this block
                 if !is_aarch64 {