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Fix compilation for thumbv8m.main-none-eabihf
Some files were not assembling for the Armv8-M Mainline architecture profile with FPU extension. Reason being the same as for Armv7-M: the conversion intrinsics including double precision floating point variables do not work with single precision FPUs. Also removes from exclusion files that are assembling without errors for Armv7-M and Armv8-M Mainline.
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build.rs

Lines changed: 20 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -360,24 +360,36 @@ mod c {
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}
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if llvm_target.last().unwrap().ends_with("eabihf") {
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if !llvm_target[0].starts_with("thumbv7em") {
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if !llvm_target[0].starts_with("thumbv7em") &&
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!llvm_target[0].starts_with("thumbv8m.main") {
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// The FPU option chosen for these architectures in cc-rs, ie:
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// -mfpu=fpv4-sp-d16 for thumbv7em
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// -mfpu=fpv5-sp-d16 for thumbv8m.main
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// do not support double precision floating points conversions so the files
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// that include such instructions are not included for these targets.
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sources.extend(
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&[
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"arm/fixdfsivfp.S",
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"arm/fixsfsivfp.S",
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"arm/fixunsdfsivfp.S",
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"arm/fixunssfsivfp.S",
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"arm/floatsidfvfp.S",
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"arm/floatsisfvfp.S",
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"arm/floatunssidfvfp.S",
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"arm/floatunssisfvfp.S",
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"arm/restore_vfp_d8_d15_regs.S",
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"arm/save_vfp_d8_d15_regs.S",
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],
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);
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}
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380-
sources.extend(&["arm/negdf2vfp.S", "arm/negsf2vfp.S"]);
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sources.extend(
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&[
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"arm/fixsfsivfp.S",
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"arm/fixunssfsivfp.S",
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"arm/floatsisfvfp.S",
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"arm/floatunssisfvfp.S",
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"arm/floatunssisfvfp.S",
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"arm/restore_vfp_d8_d15_regs.S",
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"arm/save_vfp_d8_d15_regs.S",
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"arm/negdf2vfp.S",
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"arm/negsf2vfp.S",
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]
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);
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}
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