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This enables math module for riscv32 targets
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This is likely a bug fix since in math.rs there are already
config attributes that are mentioning this target
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mchodzikiewicz committed Oct 30, 2023
1 parent d1d785a commit a8fd405
Showing 1 changed file with 1 addition and 0 deletions.
1 change: 1 addition & 0 deletions src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,7 @@ pub mod int;
all(target_arch = "x86_64", target_os = "none"),
all(target_arch = "x86_64", target_os = "uefi"),
all(target_arch = "arm", target_os = "none"),
all(target_arch = "riscv32", target_os = "none"),
all(target_arch = "xtensa", target_os = "none"),
all(target_arch = "mips", target_os = "none"),
target_os = "xous",
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