Auto merge of rust-lang#136831 - ehuss:update-stdarch, r=<try>

Update stdarch

Updates stdarch

- s390x_is_feature_detected!: detect more features: rust-lang/stdarch#1720
- fix - neon type signed unsigned conversions: rust-lang/stdarch#1729
- Remove some allow(unsafe_op_in_unsafe_fn)s and use target_feature 1.1 in examples: rust-lang/stdarch#1727
- Changed altivec.rs to new intrinsic declaration: rust-lang/stdarch#1722
- powerpc: use simd_ceil and simd_floor: rust-lang/stdarch#1723
- nvptx: use simd_fmin and simd_fmax for minnum and maxnum: rust-lang/stdarch#1725
- wasm: use simd_as for float to integer conversions: rust-lang/stdarch#1724
- AArch64: Add NEON fp16 intrinsics: rust-lang/stdarch#1726
- mark x86 intrinsics as safe: rust-lang/stdarch#1714
- Fix - AArch64 Big Endian Intrinsics: rust-lang/stdarch#1708
- change redundant transmutations of sign to cast_unsigned: rust-lang/stdarch#1711
- mark riscv intrinsics as safe: rust-lang/stdarch#1717
- S390x float rounding: rust-lang/stdarch#1712
- powerpc: use more target-independent llvm intrinsics (min, max, round, countlz): rust-lang/stdarch#1713
- Update wasm sub sat intrinsics for LLVM 20: rust-lang/stdarch#1719
- Update CI to FreeBSD 13.4: rust-lang/stdarch#1715
- S390x vector bitwise operations: rust-lang/stdarch#1709
- Add keylocker (kl and widekl) intrinsics and runtime feature detection: rust-lang/stdarch#1706
- Update all stdarch crates to Rust 2024: rust-lang/stdarch#1710
- Fix some test naming, and refactor stdarch-verify in general: rust-lang/stdarch#1707
- Fix build and CLI behaviour for stdarch-gen-arm. rust-lang/stdarch#1705
- s390x: add vec_sub, vec_mul, vec_min, vec_max, vec_abs and vec_splats: rust-lang/stdarch#1704
- add vec_add for s390x: rust-lang/stdarch#1703
- add is_s390x_feature_detected: rust-lang/stdarch#1699
- Fix typo and prettify comment: rust-lang/stdarch#1697
- Tidying x86 `as_*` functions: rust-lang/stdarch#1696
- Expand feature detection on AArch64 Darwin: rust-lang/stdarch#1695
- Fix the bug in CMPINT intrinsics with IMM3=7: rust-lang/stdarch#1694
- New ARM intrinsic generator: rust-lang/stdarch#1693
- core_arch: Add LoongArch basic intrinsics: rust-lang/stdarch#1688

try-job: aarch64-apple
try-job: aarch64-gnu
try-job: aarch64-gnu-debug
try-job: dist-powerpc-linux
try-job: i686-gnu-1
try-job: i686-gnu-2

Author: bors

compiler/rustc_span/src/analyze_source_file.rs

@@ -83,17 +83,17 @@ cfg_match! {
 
                 // For character in the chunk, see if its byte value is < 0, which
                 // indicates that it's part of a UTF-8 char.
-                let multibyte_test = unsafe { _mm_cmplt_epi8(chunk, _mm_set1_epi8(0)) };
+                let multibyte_test = _mm_cmplt_epi8(chunk, _mm_set1_epi8(0));
                 // Create a bit mask from the comparison results.
-                let multibyte_mask = unsafe { _mm_movemask_epi8(multibyte_test) };
+                let multibyte_mask = _mm_movemask_epi8(multibyte_test);
 
                 // If the bit mask is all zero, we only have ASCII chars here:
                 if multibyte_mask == 0 {
                     assert!(intra_chunk_offset == 0);
 
                     // Check for newlines in the chunk
-                    let newlines_test = unsafe { _mm_cmpeq_epi8(chunk, _mm_set1_epi8(b'\n' as i8)) };
-                    let mut newlines_mask = unsafe { _mm_movemask_epi8(newlines_test) };
+                    let newlines_test = _mm_cmpeq_epi8(chunk, _mm_set1_epi8(b'\n' as i8));
+                    let mut newlines_mask = _mm_movemask_epi8(newlines_test);
 
                     let output_offset = RelativeBytePos::from_usize(chunk_index * CHUNK_SIZE + 1);
 

library/core/Cargo.toml

@@ -32,6 +32,8 @@ check-cfg = [
     'cfg(bootstrap)',
     'cfg(no_fp_fmt_parse)',
     'cfg(stdarch_intel_sde)',
+    # #[cfg(bootstrap)]
+    'cfg(target_feature, values("vector-enhancements-1"))',
     # core use #[path] imports to portable-simd `core_simd` crate
     # and to stdarch `core_arch` crate which messes-up with Cargo list
     # of declared features, we therefor expect any feature cfg

library/core/src/lib.rs

@@ -205,11 +205,13 @@
 #![feature(arm_target_feature)]
 #![feature(avx512_target_feature)]
 #![feature(hexagon_target_feature)]
+#![feature(keylocker_x86)]
 #![feature(loongarch_target_feature)]
 #![feature(mips_target_feature)]
 #![feature(powerpc_target_feature)]
 #![feature(riscv_target_feature)]
 #![feature(rtm_target_feature)]
+#![feature(s390x_target_feature)]
 #![feature(sha512_sm_x86)]
 #![feature(sse4a_target_feature)]
 #![feature(tbm_target_feature)]