From 9e62f5546e2679cdcf42af9229e997e793d6a214 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 22 Aug 2022 13:05:57 +0300 Subject: [PATCH 001/319] max cluster size --- CHANGELOG.md | 2 ++ src/generate/peripheral.rs | 15 ++++++++++++--- src/main.rs | 8 ++++++++ src/util.rs | 8 +++++--- 4 files changed, 27 insertions(+), 6 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index ba5a436a..941da2b1 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- Check cluster size, add `max_cluster_size` option + ## [v0.25.0] - 2022-08-02 - Add `feature_peripheral` option which generates cfg features for each peripheral diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index b593666d..ae8344de 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -670,7 +670,7 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result Result { - let sequential_addresses = - (array_info.dim == 1) || (cluster_size == array_info.dim_increment * BITS_PER_BYTE); + let increment_bits = array_info.dim_increment * BITS_PER_BYTE; + if cluster_size > increment_bits { + let cname = &cluster.name; + return Err(anyhow!("Cluster {cname} has size {cluster_size} bits that is more then array increment {increment_bits} bits")); + } + let cluster_size = if config.max_cluster_size { + increment_bits + } else { + cluster_size + }; + let sequential_addresses = (array_info.dim == 1) || (cluster_size == increment_bits); // if dimIndex exists, test if it is a sequence of numbers from 0 to dim let sequential_indexes_from0 = array_info diff --git a/src/main.rs b/src/main.rs index a5f9e162..15de5cb0 100755 --- a/src/main.rs +++ b/src/main.rs @@ -85,6 +85,11 @@ fn run() -> Result<()> { .long("feature_peripheral") .help("Use independent cfg feature flags for each peripheral"), ) + .arg( + Arg::with_name("max_cluster_size") + .long("max_cluster_size") + .help("Use array increment for cluster size"), + ) .arg( Arg::with_name("make_mod") .long("make_mod") @@ -183,6 +188,8 @@ fn run() -> Result<()> { cfg.bool_flag("feature_group", Filter::Arg) || cfg.bool_flag("feature_group", Filter::Conf); let feature_peripheral = cfg.bool_flag("feature_peripheral", Filter::Arg) || cfg.bool_flag("feature_peripheral", Filter::Conf); + let max_cluster_size = cfg.bool_flag("max_cluster_size", Filter::Arg) + || cfg.bool_flag("max_cluster_size", Filter::Conf); let mut source_type = cfg .grab() @@ -209,6 +216,7 @@ fn run() -> Result<()> { derive_more, feature_group, feature_peripheral, + max_cluster_size, output_dir: path.clone(), source_type, }; diff --git a/src/util.rs b/src/util.rs index d0545e55..3d25f22b 100644 --- a/src/util.rs +++ b/src/util.rs @@ -22,7 +22,7 @@ pub const BITS_PER_BYTE: u32 = 8; /// that are not valid in Rust ident const BLACKLIST_CHARS: &[char] = &['(', ')', '[', ']', '/', ' ', '-']; -#[derive(Clone, PartialEq, Debug)] +#[derive(Clone, PartialEq, Eq, Debug)] pub struct Config { pub target: Target, pub nightly: bool, @@ -36,6 +36,7 @@ pub struct Config { pub derive_more: bool, pub feature_group: bool, pub feature_peripheral: bool, + pub max_cluster_size: bool, pub output_dir: PathBuf, pub source_type: SourceType, } @@ -55,6 +56,7 @@ impl Default for Config { derive_more: false, feature_group: false, feature_peripheral: false, + max_cluster_size: false, output_dir: PathBuf::from("."), source_type: SourceType::default(), } @@ -63,7 +65,7 @@ impl Default for Config { #[allow(clippy::upper_case_acronyms)] #[allow(non_camel_case_types)] -#[derive(Clone, Copy, PartialEq, Debug)] +#[derive(Clone, Copy, PartialEq, Eq, Debug)] pub enum Target { CortexM, Msp430, @@ -93,7 +95,7 @@ impl Default for Target { } } -#[derive(Clone, Copy, PartialEq, Debug)] +#[derive(Clone, Copy, PartialEq, Eq, Debug)] pub enum SourceType { Xml, #[cfg(feature = "yaml")] From 9df2ceff548eecd6b1dd097179b1fec88defe2d7 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 22 Aug 2022 21:07:01 +0300 Subject: [PATCH 002/319] fix parentheses --- CHANGELOG.md | 1 + src/generate/peripheral.rs | 84 ++++++++++++++++++++++++++------------ 2 files changed, 58 insertions(+), 27 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 941da2b1..af8481f5 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- Fixed parentheses in RegisterBlock field accessors - Check cluster size, add `max_cluster_size` option ## [v0.25.0] - 2022-08-02 diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index ae8344de..befb1520 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -222,13 +222,40 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result Ok(out) } +#[derive(Clone, Debug)] +pub struct ArrayAccessor { + pub doc: String, + pub name: Ident, + pub ty: syn::Type, + pub basename: Ident, + pub i: syn::LitInt, +} + +impl ArrayAccessor { + pub fn to_tokens(&self, method: bool) -> TokenStream { + let parens = method.then(|| quote! {()}); + let doc = &self.doc; + let name = &self.name; + let ty = &self.ty; + let basename = &self.basename; + let i = &self.i; + quote! { + #[doc = #doc] + #[inline(always)] + pub fn #name(&self) -> &#ty { + &self.#basename#parens[#i] + } + } + } +} + #[derive(Clone, Debug)] struct RegisterBlockField { syn_field: syn::Field, description: String, offset: u32, size: u32, - accessors: Option, + accessors: Vec, } #[derive(Clone, Debug)] @@ -471,9 +498,6 @@ fn register_or_cluster_block( for reg_block_field in &ercs_expanded { regions.add(reg_block_field)?; - if let Some(ts) = ®_block_field.accessors { - accessors.extend(ts.clone()); - } } // We need to compute the idents of each register/union block first to make sure no conflicts exists. @@ -524,6 +548,12 @@ fn register_or_cluster_block( reg_block_field.syn_field.to_tokens(&mut region_rbfs); Punct::new(',', Spacing::Alone).to_tokens(&mut region_rbfs); } + accessors.extend( + reg_block_field + .accessors + .iter() + .map(|a| a.to_tokens(is_region_a_union)), + ); } if !is_region_a_union { @@ -692,7 +722,7 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result { @@ -726,10 +756,10 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result Result &#ty { - &self.#nb_name_cs[#i] - } + accessors.push(ArrayAccessor { + doc: comment, + name: idx_name, + ty: ty.clone(), + basename: nb_name_cs.clone(), + i, }); } - Some(accessors) + accessors }; let array_ty = new_syn_array(ty, array_info.dim); cluster_expanded.push(RegisterBlockField { @@ -772,7 +802,7 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result Result Result { @@ -847,10 +877,10 @@ fn expand_register(register: &Register, config: &Config) -> Result Result &#ty { - &self.#nb_name_cs[#i] - } + accessors.push(ArrayAccessor { + doc: comment, + name: idx_name, + ty: ty.clone(), + basename: nb_name_cs.clone(), + i, }); } - Some(accessors) + accessors }; let array_ty = new_syn_array(ty, array_info.dim); let syn_field = @@ -892,7 +922,7 @@ fn expand_register(register: &Register, config: &Config) -> Result Date: Mon, 22 Aug 2022 21:52:11 +0300 Subject: [PATCH 003/319] release 0.25.1 --- CHANGELOG.md | 5 ++++- Cargo.toml | 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index af8481f5..6d778f8b 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +## [v0.25.1] - 2022-08-22 + - Fixed parentheses in RegisterBlock field accessors - Check cluster size, add `max_cluster_size` option @@ -735,7 +737,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.25.0...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.25.1...HEAD +[v0.25.1]: https://github.com/rust-embedded/svd2rust/compare/v0.25.0...v0.25.1 [v0.25.0]: https://github.com/rust-embedded/svd2rust/compare/v0.24.1...v0.25.0 [v0.24.1]: https://github.com/rust-embedded/svd2rust/compare/v0.24.0...v0.24.1 [v0.24.0]: https://github.com/rust-embedded/svd2rust/compare/v0.23.1...v0.24.0 diff --git a/Cargo.toml b/Cargo.toml index 599bd86e..f73a7467 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.25.0" +version = "0.25.1" readme = "README.md" rust-version = "1.60" From 47b76795ffdb4dc744ec53922a17afab1878a44d Mon Sep 17 00:00:00 2001 From: Markus Reiter Date: Wed, 24 Aug 2022 02:04:56 +0200 Subject: [PATCH 004/319] Use `critical_section` for `Peripherals::take`. --- CHANGELOG.md | 2 + ci/svd2rust-regress/src/svd_test.rs | 6 +-- src/generate/device.rs | 50 +++++++++---------- src/lib.rs | 74 +++++++++++++++-------------- 4 files changed, 65 insertions(+), 67 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 6d778f8b..5edffccd 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- Use `critical_section::with` instead of `interrupt::free` for `Peripherals::take`. + ## [v0.25.1] - 2022-08-22 - Fixed parentheses in RegisterBlock field accessors diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index b0f6dd22..f20d4b75 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -5,11 +5,11 @@ use std::io::prelude::*; use std::path::PathBuf; use std::process::{Command, Output}; -const CRATES_ALL: &[&str] = &["bare-metal = \"0.2.0\"", "vcell = \"0.1.2\""]; +const CRATES_ALL: &[&str] = &["critical-section = \"1.0\"", "vcell = \"0.1.2\""]; const CRATES_MSP430: &[&str] = &["msp430 = \"0.2.2\"", "msp430-rt = \"0.2.0\""]; const CRATES_MSP430_NIGHTLY: &[&str] = &["msp430-atomic = \"0.1.2\""]; -const CRATES_CORTEX_M: &[&str] = &["cortex-m = \"0.7.0\"", "cortex-m-rt = \"0.6.13\""]; -const CRATES_RISCV: &[&str] = &["riscv = \"0.5.0\"", "riscv-rt = \"0.6.0\""]; +const CRATES_CORTEX_M: &[&str] = &["cortex-m = \"0.7.6\"", "cortex-m-rt = \"0.6.13\""]; +const CRATES_RISCV: &[&str] = &["riscv = \"0.9.0\"", "riscv-rt = \"0.9.0\""]; const CRATES_XTENSALX: &[&str] = &["xtensa-lx-rt = \"0.9.0\"", "xtensa-lx = \"0.6.0\""]; const CRATES_MIPS: &[&str] = &["mips-mcu = \"0.1.0\""]; const PROFILE_ALL: &[&str] = &["[profile.dev]", "incremental = false"]; diff --git a/src/generate/device.rs b/src/generate/device.rs index ae438ea1..11bf0a04 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -300,31 +300,6 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Some(Ident::new("cortex_m", span)), - Target::Msp430 => Some(Ident::new("msp430", span)), - Target::RISCV => Some(Ident::new("riscv", span)), - Target::XtensaLX => Some(Ident::new("xtensa_lx", span)), - Target::Mips => Some(Ident::new("mips_mcu", span)), - Target::None => None, - } - .map(|krate| { - quote! { - ///Returns all the peripherals *once* - #[inline] - pub fn take() -> Option { - #krate::interrupt::free(|_| { - if unsafe { DEVICE_PERIPHERALS } { - None - } else { - Some(unsafe { Peripherals::steal() }) - } - }) - } - } - }); - out.extend(quote! { // NOTE `no_mangle` is used here to prevent linking different minor versions of the device // crate as that would let you `take` the device peripherals more than once (one per minor @@ -332,16 +307,35 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Option { + critical_section::with(|_| { + // SAFETY: We are in a critical section, so we have exclusive access + // to `DEVICE_PERIPHERALS`. + if unsafe { DEVICE_PERIPHERALS } { + return None + } + + // SAFETY: `DEVICE_PERIPHERALS` is set to `true` by `Peripherals::steal`, + // ensuring the peripherals can only be returned once. + Some(unsafe { Peripherals::steal() }) + }) + } - ///Unchecked version of `Peripherals::take` + /// Unchecked version of `Peripherals::take`. + /// + /// # Safety + /// + /// Each of the returned peripherals must be used at most once. #[inline] pub unsafe fn steal() -> Self { DEVICE_PERIPHERALS = true; diff --git a/src/lib.rs b/src/lib.rs index 8e8c5de7..b2be050e 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -2,7 +2,7 @@ //! //! [CMSIS-SVD]: http://www.keil.com/pack/doc/CMSIS/SVD/html/index.html //! -//! A SVD file is an XML file that describes the hardware features of a +//! An SVD file is an XML file that describes the hardware features of a //! microcontroller. In particular, it lists all the peripherals available to the //! device, where the registers associated to each device are located in memory, //! and what's the function of each register. @@ -56,20 +56,23 @@ //! $ cargo fmt //! ``` //! -//! The resulting crate must provide an opt-in "rt" feature and depend on these crates: -//! `cortex-m` v0.7, `cortex-m-rt` >=v0.6.13 and `vcell` >=v0.1.2. Furthermore -//! the "device" feature of `cortex-m-rt` must be enabled when the "rt" feature is enabled. The -//! `Cargo.toml` of the device crate will look like this: +//! The resulting crate must provide an opt-in `rt` feature and depend on these crates: +//! +//! - [`critical-section`](https://crates.io/crates/critical-section) v1.x +//! - [`cortex-m`](https://crates.io/crates/cortex-m) >=v0.7.6 +//! - [`cortex-m-rt`](https://crates.io/crates/cortex-m-rt) >=v0.6.13 +//! - [`vcell`](https://crates.io/crates/vcell) >=v0.1.2 +//! +//! Furthermore, the "device" feature of `cortex-m-rt` must be enabled when the `rt` feature +//! is enabled. The `Cargo.toml` of the device crate will look like this: //! //! ``` toml //! [dependencies] -//! cortex-m = "0.7" +//! critical-section = { version = "1.0", optional = true } +//! cortex-m = "0.7.6" +//! cortex-m-rt = { version = "0.6.13", optional = true } //! vcell = "0.1.2" //! -//! [dependencies.cortex-m-rt] -//! optional = true -//! version = "0.6.13" -//! //! [features] //! rt = ["cortex-m-rt/device"] //! ``` @@ -110,21 +113,24 @@ //! $ cargo fmt //! ``` //! -//! The resulting crate must provide opt-in "rt" feature and depend on these crates: `msp430` -//! v0.3.x, `msp430-rt` v0.3.x, and `vcell` v0.1.x. If the `--nightly` flag is provided to -//! `svd2rust`, then `msp430-atomic` v0.1.4 is also needed. Furthermore the "device" feature of -//! `msp430-rt` must be enabled when the "rt" feature is enabled. The `Cargo.toml` of the device -//! crate will look like this: +//! The resulting crate must provide opt-in `rt` feature and depend on these crates: +//! +//! - [`critical-section`](https://crates.io/crates/critical-section) v1.x +//! - [`msp430`](https://crates.io/crates/msp430) v0.3.x +//! - [`msp430-rt`](https://crates.io/crates/msp430-rt) v0.3.x +//! - [`vcell`](https://crates.io/crates/vcell) v0.1.x +//! +//! If the `--nightly` flag is provided to `svd2rust`, then `msp430-atomic` v0.1.4 is also needed. +//! Furthermore the "device" feature of `msp430-rt` must be enabled when the `rt` feature is +//! enabled. The `Cargo.toml` of the device crate will look like this: //! //! ``` toml //! [dependencies] +//! critical-section = { version = "1.0", optional = true } //! msp430 = "0.3.0" -//! vcell = "0.1.0" //! msp430-atomic = "0.1.4" # Only when using the --nightly flag -//! -//! [dependencies.msp430-rt] -//! optional = true -//! version = "0.3.0" +//! msp430-rt = { version = "0.3.0", optional = true } +//! vcell = "0.1.0" //! //! [features] //! rt = ["msp430-rt/device"] @@ -134,28 +140,25 @@ //! ## Other targets //! //! When the target is riscv or none `svd2rust` will emit only the `lib.rs` file. Like in -//! the cortex-m case we recommend you use `form` and `rustfmt` on the output. +//! the `cortex-m` case, we recommend you use `form` and `rustfmt` on the output. //! -//! The resulting crate must provide an opt-in "rt" feature and depend on these crates: +//! The resulting crate must provide an opt-in `rt` feature and depend on these crates: //! -//! - [`bare-metal`](https://crates.io/crates/bare-metal) v0.2.x +//! - [`critical-section`](https://crates.io/crates/critical-section) v1.x +//! - [`riscv`](https://crates.io/crates/riscv) v0.9.x (if target is RISC-V) +//! - [`riscv-rt`](https://crates.io/crates/riscv-rt) v0.9.x (if target is RISC-V) //! - [`vcell`](https://crates.io/crates/vcell) v0.1.x -//! - [`riscv`](https://crates.io/crates/riscv) v0.4.x if target = riscv. -//! - [`riscv-rt`](https://crates.io/crates/riscv-rt) v0.4.x if target = riscv. //! -//! The `*-rt` dependencies must be optional only enabled when the "rt" feature is enabled. The -//! `Cargo.toml` of the device crate will look like this for a riscv target: +//! The `*-rt` dependencies must be optional only enabled when the `rt` feature is enabled. The +//! `Cargo.toml` of the device crate will look like this for a RISC-V target: //! //! ``` toml //! [dependencies] -//! bare-metal = "0.2.0" -//! riscv = "0.4.0" +//! critical-section = { version = "1.0", optional = true } +//! riscv = "0.9.0" +//! riscv-rt = { version = "0.9.0", optional = true } //! vcell = "0.1.0" //! -//! [dependencies.riscv-rt] -//! optional = true -//! version = "0.4.0" -//! //! [features] //! rt = ["riscv-rt"] //! ``` @@ -458,7 +461,6 @@ //! used with the `cortex-m` crate `NVIC` API. //! //! ```ignore -//! use cortex_m::interrupt; //! use cortex_m::peripheral::Peripherals; //! use stm32f30x::Interrupt; //! @@ -469,9 +471,9 @@ //! nvic.enable(Interrupt::TIM3); //! ``` //! -//! ## the "rt" feature +//! ## the `rt` feature //! -//! If the "rt" Cargo feature of the svd2rust generated crate is enabled, the crate will populate the +//! If the `rt` Cargo feature of the svd2rust generated crate is enabled, the crate will populate the //! part of the vector table that contains the interrupt vectors and provide an //! [`interrupt!`](macro.interrupt.html) macro (non Cortex-M/MSP430 targets) or [`interrupt`] attribute //! (Cortex-M or [MSP430](https://docs.rs/msp430-rt-macros/0.1/msp430_rt_macros/attr.interrupt.html)) From 0e8ad2dbba747e6646131c2ca4f6c8048148b2a1 Mon Sep 17 00:00:00 2001 From: "William D. Jones" Date: Fri, 2 Sep 2022 22:53:08 -0400 Subject: [PATCH 005/319] Improve MSP430 documentation. --- src/lib.rs | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index b2be050e..9fa30bbc 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -81,7 +81,9 @@ //! //! MSP430 does not natively use the SVD format. However, SVD files can be generated using the //! [`msp430_svd` application](https://github.com/pftbest/msp430_svd). Most header and DSLite -//! files provided by TI are mirrored in the repository of `msp430_svd`. +//! files provided by TI are mirrored in the repository of `msp430_svd`. The application does +//! not need to be installed; the `msp430gen` command below can be substituted by +//! `cargo run -- msp430g2553 > msp430g2553.svd` from the `msp430_svd` crate root. //! //! When targeting the MSP430 architecture `svd2rust` will _also_ generate three files in the //! current directory: @@ -98,9 +100,9 @@ //! [`form`]: https://crates.io/crates/form //! //! ``` text -//! $ msp430gen msp430g2553 > out.svd +//! $ msp430gen msp430g2553 > msp430g2553.svd //! -//! $ xmllint -format out.svd > msp430g2553.svd +//! $ xmllint -format msp430g2553.svd --output msp430g2553.svd //! //! $ svd2rust -g --target=msp430 -i msp430g2553.svd //! @@ -116,8 +118,8 @@ //! The resulting crate must provide opt-in `rt` feature and depend on these crates: //! //! - [`critical-section`](https://crates.io/crates/critical-section) v1.x -//! - [`msp430`](https://crates.io/crates/msp430) v0.3.x -//! - [`msp430-rt`](https://crates.io/crates/msp430-rt) v0.3.x +//! - [`msp430`](https://crates.io/crates/msp430) v0.4.x +//! - [`msp430-rt`](https://crates.io/crates/msp430-rt) v0.4.x //! - [`vcell`](https://crates.io/crates/vcell) v0.1.x //! //! If the `--nightly` flag is provided to `svd2rust`, then `msp430-atomic` v0.1.4 is also needed. @@ -127,9 +129,9 @@ //! ``` toml //! [dependencies] //! critical-section = { version = "1.0", optional = true } -//! msp430 = "0.3.0" +//! msp430 = "0.4.0" //! msp430-atomic = "0.1.4" # Only when using the --nightly flag -//! msp430-rt = { version = "0.3.0", optional = true } +//! msp430-rt = { version = "0.4.0", optional = true } //! vcell = "0.1.0" //! //! [features] From 85a39f619f1981c525478a2054a46481b31f57f1 Mon Sep 17 00:00:00 2001 From: "William D. Jones" Date: Fri, 2 Sep 2022 22:59:56 -0400 Subject: [PATCH 006/319] Mention MSP430 doc changes in CHANGELOG.md. --- CHANGELOG.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 5edffccd..6a7ffe52 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -8,6 +8,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] - Use `critical_section::with` instead of `interrupt::free` for `Peripherals::take`. +- Bring documentation on how to generate MSP430 PACs up to date (in line with + [msp430_svd](https://github.com/pftbest/msp430_svd)). ## [v0.25.1] - 2022-08-22 From 35575258bc59323b903cb516866486878c7822cb Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 4 Sep 2022 16:05:58 +0300 Subject: [PATCH 007/319] update --- Cargo.toml | 7 +++---- src/generate/interrupt.rs | 5 ++--- src/generate/register.rs | 7 +++---- 3 files changed, 8 insertions(+), 11 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index f73a7467..db5b5310 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -43,8 +43,7 @@ json = ["dep:serde_json"] yaml = ["dep:serde_yaml"] [dependencies] -cast = "0.3" -clap = { version = "2.33", optional = true } +clap = { version = "2.34", optional = true } clap_conf = { version = "0.1.5", optional = true } env_logger = { version = "0.9", optional = true } inflections = "1.1" @@ -53,8 +52,8 @@ quote = "1.0" proc-macro2 = "1.0" anyhow = "1.0" thiserror = "1.0" -serde_json = { version = "1.0.79", optional = true } -serde_yaml = { version = "0.8.23", optional = true } +serde_json = { version = "1.0.85", optional = true } +serde_yaml = { version = "0.9.11", optional = true } [dependencies.svd-parser] features = ["expand"] diff --git a/src/generate/interrupt.rs b/src/generate/interrupt.rs index a93b3a33..c0d536f3 100644 --- a/src/generate/interrupt.rs +++ b/src/generate/interrupt.rs @@ -2,7 +2,6 @@ use std::collections::HashMap; use std::fmt::Write; use crate::svd::Peripheral; -use cast::u64; use proc_macro2::{Span, TokenStream}; use quote::quote; @@ -68,7 +67,7 @@ pub fn render( .unwrap_or_else(|| interrupt.0.name.clone()) ); - let value = util::unsuffixed(u64(interrupt.0.value)); + let value = util::unsuffixed(interrupt.0.value.into()); let mut feature_attribute_flag = false; let mut feature_attribute = TokenStream::new(); @@ -112,7 +111,7 @@ pub fn render( names_cfg_attr.push(feature_attribute); } - let n = util::unsuffixed(u64(pos)); + let n = util::unsuffixed(pos.into()); match target { Target::CortexM => { for name in &names { diff --git a/src/generate/register.rs b/src/generate/register.rs index cd6408c7..b373e1ab 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -2,7 +2,6 @@ use crate::svd::{ Access, BitRange, EnumeratedValues, Field, ModifiedWriteValues, ReadAction, Register, RegisterProperties, Usage, WriteConstraint, }; -use cast::u64; use core::u64; use log::warn; use proc_macro2::{Ident, Punct, Spacing, Span, TokenStream}; @@ -1006,9 +1005,9 @@ impl Variant { // generate code for them .filter(|field| field.name.to_lowercase() != "reserved" && field.is_default == None) .map(|ev| { - let value = u64(ev.value.ok_or_else(|| { - anyhow!("EnumeratedValue {} has no `` field", ev.name) - })?); + let value = ev + .value + .ok_or_else(|| anyhow!("EnumeratedValue {} has no `` field", ev.name))?; let nksc = ev.name.to_sanitized_not_keyword_snake_case(); let sc = util::sanitize_keyword(nksc.clone()); From a7288e6a77c18e14e10e38c0822816f528cb3539 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 4 Sep 2022 11:13:55 +0300 Subject: [PATCH 008/319] Eq impl --- CHANGELOG.md | 1 + src/generate/register.rs | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 6a7ffe52..5385eaf7 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- Add `Eq` autoimplementation for enums - Use `critical_section::with` instead of `interrupt::free` for `Peripherals::take`. - Bring documentation on how to generate MSP430 PACs up to date (in line with [msp430_svd](https://github.com/pftbest/msp430_svd)). diff --git a/src/generate/register.rs b/src/generate/register.rs index b373e1ab..67a381d3 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -1051,7 +1051,7 @@ fn add_with_no_variants( mod_items.extend(quote! { #[doc = #desc] - #[derive(Clone, Copy, Debug, PartialEq)] + #[derive(Clone, Copy, Debug, PartialEq, Eq)] pub struct #pc(#fty); impl From<#pc> for #fty { #[inline(always)] @@ -1097,7 +1097,7 @@ fn add_from_variants( mod_items.extend(quote! { #[doc = #desc] - #[derive(Clone, Copy, Debug, PartialEq)] + #[derive(Clone, Copy, Debug, PartialEq, Eq)] #repr pub enum #pc { #vars From 4236021b4092ce7015a2569225712b3317bf5229 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 4 Sep 2022 14:00:09 +0300 Subject: [PATCH 009/319] add Safety doc --- src/generate/generic.rs | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/generate/generic.rs b/src/generate/generic.rs index 5d1814ce..51fa1ef6 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -130,6 +130,10 @@ where /// Writes 0 to a `Writable` register. /// /// Similar to `write`, but unused bits will contain 0. + /// + /// # Safety + /// + /// Unsafe to use with registers which don't allow to write 0. #[inline(always)] pub unsafe fn write_with_zero(&self, f: F) where @@ -232,6 +236,10 @@ pub struct W { impl W { /// Writes raw bits to the register. + /// + /// # Safety + /// + /// Read datasheet or reference manual to find what values are allowed to pass. #[inline(always)] pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self { self.bits = bits; From 9b882da1aa420d96f11badec23069d638211d885 Mon Sep 17 00:00:00 2001 From: pellico Date: Wed, 28 Sep 2022 14:01:58 +0200 Subject: [PATCH 010/319] Fixing issue https://github.com/rust-embedded/svd2rust/issues/657 Added self:: when referencing submodule to avoid ambiguity --- src/generate/peripheral.rs | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index befb1520..4f0626b4 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -114,7 +114,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result out.extend(quote! { #[doc = #description] #feature_any_attribute - pub use #base as #name_snake_case; + pub use self::#base as #name_snake_case; }); return Ok(out); } @@ -170,7 +170,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result out.extend(quote! { #[doc = #description] #feature_attribute - pub use #base as #name_snake_case; + pub use self::#base as #name_snake_case; }); return Ok(out); } @@ -1014,8 +1014,8 @@ fn cluster_block( Ok(quote! { #[doc = #description] - pub use #derived as #name_constant_case; - pub use #mod_derived as #name_snake_case; + pub use self::#derived as #name_constant_case; + pub use self::#mod_derived as #name_snake_case; }) } else { let cpath = path.new_cluster(&c.name); @@ -1032,7 +1032,7 @@ fn cluster_block( Ok(quote! { #[doc = #description] - pub use #name_snake_case::#name_constant_case; + pub use self::#name_snake_case::#name_constant_case; ///Cluster #[doc = #description] From 1aeb9408032321e84c64a94bdf116122137e0d95 Mon Sep 17 00:00:00 2001 From: pellico Date: Wed, 28 Sep 2022 14:27:37 +0200 Subject: [PATCH 011/319] Updated CHANGELOG.md --- CHANGELOG.md | 1 + 1 file changed, 1 insertion(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 5385eaf7..58df08bf 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -11,6 +11,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - Use `critical_section::with` instead of `interrupt::free` for `Peripherals::take`. - Bring documentation on how to generate MSP430 PACs up to date (in line with [msp430_svd](https://github.com/pftbest/msp430_svd)). +- Prefix submodule path with self:: when reexporting submodules to avoid ambiguity in crate path. ## [v0.25.1] - 2022-08-22 From 1d5378594ee02608dddb20ff958148f242c82940 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 5 Oct 2022 17:55:17 +0300 Subject: [PATCH 012/319] fix max_cluster_size end _reserved --- CHANGELOG.md | 1 + src/generate/peripheral.rs | 25 +++++++++++++++++++++++-- 2 files changed, 24 insertions(+), 2 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 58df08bf..2bc92d86 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- Fix adding ending reserved field when `max_cluster_size` option enabled - Add `Eq` autoimplementation for enums - Use `critical_section::with` instead of `interrupt::free` for `Peripherals::take`. - Bring documentation on how to generate MSP430 PACs up to date (in line with diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 4f0626b4..a0ec1314 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -201,7 +201,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result "Pushing {} register or cluster blocks into output", ercs.len() ); - let reg_block = register_or_cluster_block(&ercs, None, config)?; + let reg_block = register_or_cluster_block(&ercs, None, None, config)?; let open = Punct::new('{', Spacing::Alone); let close = Punct::new('}', Spacing::Alone); @@ -485,6 +485,7 @@ fn make_comment(size: u32, offset: u32, description: &str) -> String { fn register_or_cluster_block( ercs: &[RegisterCluster], name: Option<&str>, + size: Option, config: &Config, ) -> Result { let mut rbfs = TokenStream::new(); @@ -588,6 +589,19 @@ fn register_or_cluster_block( last_end = region.end; } + if let Some(size) = size { + let pad = size + .checked_sub(last_end) + .ok_or_else(|| anyhow!("Incorrect block size"))?; + if pad > 0 { + let name = Ident::new("_reserved_end", span); + let pad = util::hex(pad as u64); + rbfs.extend(quote! { + #name : [u8; #pad], + }); + } + } + let name = if let Some(name) = name { name.to_constant_case_ident(span) } else { @@ -1022,7 +1036,14 @@ fn cluster_block( let mod_items = render_ercs(&mut c.children, &cpath, index, config)?; // Generate the register block. - let reg_block = register_or_cluster_block(&c.children, Some(&mod_name), config)?; + let cluster_size = match c { + Cluster::Array(_, array_info) if config.max_cluster_size => { + Some(array_info.dim_increment) + } + _ => None, + }; + let reg_block = + register_or_cluster_block(&c.children, Some(&mod_name), cluster_size, config)?; let mod_items = quote! { #reg_block From c67d6c6e5348465829c75f8a9733d257dd7cbd14 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 4 Oct 2022 17:00:20 +0300 Subject: [PATCH 013/319] edition 2021 --- Cargo.toml | 2 +- src/generate/peripheral.rs | 2 +- src/generate/register.rs | 12 ++++++------ 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index db5b5310..529d5590 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -1,5 +1,5 @@ [package] -edition = "2018" +edition = "2021" authors = [ "The ToolsTeam ", "Jorge Aparicio ", diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index a0ec1314..fbd98d9f 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -243,7 +243,7 @@ impl ArrayAccessor { #[doc = #doc] #[inline(always)] pub fn #name(&self) -> &#ty { - &self.#basename#parens[#i] + &self.#basename #parens[#i] } } } diff --git a/src/generate/register.rs b/src/generate/register.rs index 67a381d3..f3dded77 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -545,7 +545,7 @@ pub fn fields( if let Some((evs, None)) = lookup_filter(&lookup_results, Usage::Read) { // we have enumeration for read, record this. If the enumeration for write operation // later on is the same as the read enumeration, we reuse and do not generate again. - evs_r = Some(evs.clone()); + evs_r = Some(evs); // do we have finite definition of this enumeration in svd? If not, the later code would // return an Option when the value read from field does not match any defined values. @@ -647,7 +647,7 @@ pub fn fields( // if necessary. if let Some((evs, Some(base))) = lookup_filter(&lookup_results, Usage::Read) { // preserve value; if read type equals write type, writer would not generate value type again - evs_r = Some(evs.clone()); + evs_r = Some(evs); // generate pub use field_1 reader as field_2 reader let base_field = util::replace_suffix(&base.field.name, ""); let base_r = (base_field + "_R").to_constant_case_ident(span); @@ -759,7 +759,7 @@ pub fn fields( let value_write_ty = if let Some((evs, _)) = lookup_filter(&lookup_results, Usage::Write) { - let writer_reader_different_enum = evs_r.as_ref() != Some(evs); + let writer_reader_different_enum = evs_r != Some(evs); let ty_suffix = if writer_reader_different_enum { "AW" } else { @@ -794,7 +794,7 @@ pub fn fields( // does the read and the write value has the same name? If we have the same, // we can reuse read value type other than generating a new one. - let writer_reader_different_enum = evs_r.as_ref() != Some(evs); + let writer_reader_different_enum = evs_r != Some(evs); // generate write value structure and From conversation if we can't reuse read value structure. if writer_reader_different_enum { @@ -816,7 +816,7 @@ pub fn fields( for v in &variants { let pc = &v.pc; let sc = &v.sc; - let doc = util::escape_brackets(util::respace(&v.doc).as_ref()); + let doc = util::escape_brackets(&util::respace(&v.doc)); proxy_items.extend(quote! { #[doc = #doc] #inline @@ -885,7 +885,7 @@ pub fn fields( if let Some((evs, Some(base))) = lookup_filter(&lookup_results, Usage::Write) { // if base.register == None, it emits pub use structure from same module. if base.register() != fpath.register() { - let writer_reader_different_enum = evs_r.as_ref() != Some(evs); + let writer_reader_different_enum = evs_r != Some(evs); if writer_reader_different_enum { // use the same enum structure name if !writer_enum_derives.contains(&value_write_ty) { From 55272300798c068760a8b34f3c6740f32e7559d8 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 7 Oct 2022 19:30:20 +0300 Subject: [PATCH 014/319] changelog --- CHANGELOG.md | 1 + 1 file changed, 1 insertion(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 2bc92d86..55ef3546 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- Use edition 2021 - Fix adding ending reserved field when `max_cluster_size` option enabled - Add `Eq` autoimplementation for enums - Use `critical_section::with` instead of `interrupt::free` for `Peripherals::take`. From dcd28f50dea0bcc6d8aaaba3b85e61929c95eb97 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 7 Oct 2022 18:53:54 +0300 Subject: [PATCH 015/319] release 0.26 --- CHANGELOG.md | 5 ++++- Cargo.toml | 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 55ef3546..00eb3d15 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +## [v0.26.0] - 2022-10-07 + - Use edition 2021 - Fix adding ending reserved field when `max_cluster_size` option enabled - Add `Eq` autoimplementation for enums @@ -745,7 +747,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.25.1...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.26.0...HEAD +[v0.26.0]: https://github.com/rust-embedded/svd2rust/compare/v0.25.1...v0.26.0 [v0.25.1]: https://github.com/rust-embedded/svd2rust/compare/v0.25.0...v0.25.1 [v0.25.0]: https://github.com/rust-embedded/svd2rust/compare/v0.24.1...v0.25.0 [v0.24.1]: https://github.com/rust-embedded/svd2rust/compare/v0.24.0...v0.24.1 diff --git a/Cargo.toml b/Cargo.toml index 529d5590..1af2f7f4 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.25.1" +version = "0.26.0" readme = "README.md" rust-version = "1.60" From 06cf966408a2f34fe5d08a39ecb54e1855f1ee74 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 12 Oct 2022 18:39:54 +0300 Subject: [PATCH 016/319] must_use for writers --- CHANGELOG.md | 2 ++ src/generate/register.rs | 3 +++ 2 files changed, 5 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 00eb3d15..213e8b06 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- Add #[must_use] to prevent hanging field writers + ## [v0.26.0] - 2022-10-07 - Use edition 2021 diff --git a/src/generate/register.rs b/src/generate/register.rs index f3dded77..6a133971 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -929,6 +929,7 @@ pub fn fields( w_impl_items.extend(quote! { #[doc = #doc] #inline + #[must_use] pub unsafe fn #name_snake_case(&mut self) -> #writer_ty { #writer_ty::new(self) } @@ -947,6 +948,7 @@ pub fn fields( w_impl_items.extend(quote! { #[doc = #doc] #inline + #[must_use] pub fn #name_snake_case_n(&mut self) -> #writer_ty<#sub_offset> { #writer_ty::new(self) } @@ -958,6 +960,7 @@ pub fn fields( w_impl_items.extend(quote! { #[doc = #doc] #inline + #[must_use] pub fn #name_snake_case(&mut self) -> #writer_ty<#offset> { #writer_ty::new(self) } From b585e97f5d3ddb953ff84956ab269c9d2a261844 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 4 Sep 2022 18:42:08 +0300 Subject: [PATCH 017/319] clap3 & irx-config --- CHANGELOG.md | 1 + Cargo.toml | 7 ++- src/main.rs | 169 +++++++++++++++++++++------------------------------ src/util.rs | 40 +++++++++++- 4 files changed, 114 insertions(+), 103 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 213e8b06..726d5cbc 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- Update `clap` to 3.2, use `irx-config` instead of `clap_conf` - Add #[must_use] to prevent hanging field writers ## [v0.26.0] - 2022-10-07 diff --git a/Cargo.toml b/Cargo.toml index 1af2f7f4..715f7116 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -38,13 +38,13 @@ required-features = ["bin"] [features] default = ["bin", "json", "yaml"] -bin = ["dep:clap", "dep:clap_conf", "dep:env_logger"] +bin = ["dep:clap", "dep:env_logger", "serde", "dep:irx-config"] json = ["dep:serde_json"] yaml = ["dep:serde_yaml"] [dependencies] -clap = { version = "2.34", optional = true } -clap_conf = { version = "0.1.5", optional = true } +clap = { version = "3.2", optional = true } +irx-config = { version = "2.3.1", features = ["cmd", "toml-parser"], optional = true } env_logger = { version = "0.9", optional = true } inflections = "1.1" log = { version = "~0.4", features = ["std"] } @@ -52,6 +52,7 @@ quote = "1.0" proc-macro2 = "1.0" anyhow = "1.0" thiserror = "1.0" +serde = { version = "1.0", optional = true } serde_json = { version = "1.0.85", optional = true } serde_yaml = { version = "0.9.11", optional = true } diff --git a/src/main.rs b/src/main.rs index 15de5cb0..324b9cee 100755 --- a/src/main.rs +++ b/src/main.rs @@ -1,38 +1,62 @@ #![recursion_limit = "128"] -use log::{error, info}; -use std::path::{Path, PathBuf}; +use log::{debug, error, info}; use std::fs::File; use std::io::Write; use std::process; use anyhow::{Context, Result}; -use clap::{App, Arg}; +use clap::{Arg, Command}; use svd2rust::{ generate, load_from, util::{self, build_rs, Config, SourceType, Target}, }; +fn parse_configs(app: Command) -> Result { + use irx_config::parsers::{cmd, toml}; + use irx_config::ConfigBuilder; + let irxconfig = ConfigBuilder::default() + .append_parser( + cmd::ParserBuilder::new(app) + .single_flags_as_bool(true) + .build()?, + ) + .append_parser( + toml::ParserBuilder::default() + .default_path("svd2rust.toml") + .path_option("config") + .ignore_missing_file(true) + .build()?, + ) + .load()?; + + irxconfig.get().map_err(Into::into) +} + fn run() -> Result<()> { - use clap_conf::prelude::*; use std::io::Read; - let matches = App::new("svd2rust") + let log_help = format!( + "Choose which messages to log (overrides {})", + env_logger::DEFAULT_FILTER_ENV + ); + + let app = Command::new("svd2rust") .about("Generate a Rust API from SVD files") .arg( Arg::with_name("input") .help("Input SVD file") - .short("i") + .short('i') .takes_value(true) .value_name("FILE"), ) .arg( - Arg::with_name("output") + Arg::with_name("output_dir") .long("output-dir") .help("Directory to place generated files") - .short("o") + .short('o') .takes_value(true) .value_name("PATH"), ) @@ -40,7 +64,7 @@ fn run() -> Result<()> { Arg::with_name("config") .long("config") .help("Config TOML file") - .short("c") + .short('c') .takes_value(true) .value_name("TOML_FILE"), ) @@ -52,7 +76,7 @@ fn run() -> Result<()> { .value_name("ARCH"), ) .arg( - Arg::with_name("nightly_features") + Arg::with_name("nightly") .long("nightly") .help("Enable features only available to nightly rustc"), ) @@ -72,7 +96,7 @@ fn run() -> Result<()> { .arg( Arg::with_name("generic_mod") .long("generic_mod") - .short("g") + .short('g') .help("Push generic mod in separate file"), ) .arg( @@ -93,13 +117,13 @@ fn run() -> Result<()> { .arg( Arg::with_name("make_mod") .long("make_mod") - .short("m") + .short('m') .help("Create mod.rs instead of lib.rs, without inner attributes"), ) .arg( Arg::with_name("strict") .long("strict") - .short("s") + .short('s') .help("Make advanced checks due to parsing SVD"), ) .arg( @@ -120,22 +144,31 @@ fn run() -> Result<()> { .arg( Arg::with_name("log_level") .long("log") - .short("l") - .help(&format!( - "Choose which messages to log (overrides {})", - env_logger::DEFAULT_FILTER_ENV - )) + .short('l') + .help(log_help.as_ref()) .takes_value(true) .possible_values(&["off", "error", "warn", "info", "debug", "trace"]), ) .version(concat!( env!("CARGO_PKG_VERSION"), include_str!(concat!(env!("OUT_DIR"), "/commit-info.txt")) - )) - .get_matches(); + )); + + let mut config = match parse_configs(app) { + Ok(config) => { + setup_logging(&config.log_level); + config + } + Err(e) => { + setup_logging(&None); + return Err(e); + } + }; + + debug!("Current svd2rust config: {config:#?}"); let input = &mut String::new(); - match matches.value_of("input") { + match config.input.as_ref() { Some(file) => { File::open(file) .context("Cannot open the SVD file")? @@ -151,75 +184,10 @@ fn run() -> Result<()> { } } - let path = PathBuf::from(matches.value_of("output").unwrap_or(".")); - - let config_filename = matches.value_of("config").unwrap_or(""); - - let cfg = with_toml_env(&matches, &[config_filename, "svd2rust.toml"]); - - setup_logging(&cfg); - - let target = cfg - .grab() - .arg("target") - .conf("target") - .done() - .map(|s| Target::parse(&s)) - .unwrap_or_else(|| Ok(Target::default()))?; - - let nightly = - cfg.bool_flag("nightly_features", Filter::Arg) || cfg.bool_flag("nightly", Filter::Conf); - let generic_mod = - cfg.bool_flag("generic_mod", Filter::Arg) || cfg.bool_flag("generic_mod", Filter::Conf); - let make_mod = - cfg.bool_flag("make_mod", Filter::Arg) || cfg.bool_flag("make_mod", Filter::Conf); - let const_generic = - cfg.bool_flag("const_generic", Filter::Arg) || cfg.bool_flag("const_generic", Filter::Conf); - let ignore_groups = - cfg.bool_flag("ignore_groups", Filter::Arg) || cfg.bool_flag("ignore_groups", Filter::Conf); - let keep_list = - cfg.bool_flag("keep_list", Filter::Arg) || cfg.bool_flag("keep_list", Filter::Conf); - let strict = cfg.bool_flag("strict", Filter::Arg) || cfg.bool_flag("strict", Filter::Conf); - let pascal_enum_values = cfg.bool_flag("pascal_enum_values", Filter::Arg) - || cfg.bool_flag("pascal_enum_values", Filter::Conf); - let derive_more = - cfg.bool_flag("derive_more", Filter::Arg) || cfg.bool_flag("derive_more", Filter::Conf); - let feature_group = - cfg.bool_flag("feature_group", Filter::Arg) || cfg.bool_flag("feature_group", Filter::Conf); - let feature_peripheral = cfg.bool_flag("feature_peripheral", Filter::Arg) - || cfg.bool_flag("feature_peripheral", Filter::Conf); - let max_cluster_size = cfg.bool_flag("max_cluster_size", Filter::Arg) - || cfg.bool_flag("max_cluster_size", Filter::Conf); - - let mut source_type = cfg - .grab() - .arg("source_type") - .conf("source_type") - .done() - .and_then(|s| SourceType::from_extension(&s)) - .unwrap_or_default(); - - if let Some(file) = matches.value_of("input") { - source_type = SourceType::from_path(Path::new(file)) + if let Some(file) = config.input.as_ref() { + config.source_type = SourceType::from_path(file) } - - let config = Config { - target, - nightly, - generic_mod, - make_mod, - const_generic, - ignore_groups, - keep_list, - strict, - pascal_enum_values, - derive_more, - feature_group, - feature_peripheral, - max_cluster_size, - output_dir: path.clone(), - source_type, - }; + let path = &config.output_dir; info!("Parsing device from SVD file"); let device = load_from(input, &config)?; @@ -229,25 +197,28 @@ fn run() -> Result<()> { let items = generate::device::render(&device, &config, &mut device_x) .with_context(|| "Error rendering device")?; - let filename = if make_mod { "mod.rs" } else { "lib.rs" }; + let filename = if config.make_mod { "mod.rs" } else { "lib.rs" }; let mut file = File::create(path.join(filename)).expect("Couldn't create output file"); let data = items.to_string().replace("] ", "]\n"); file.write_all(data.as_ref()) .expect("Could not write code to lib.rs"); - if target == Target::CortexM - || target == Target::Msp430 - || target == Target::XtensaLX - || target == Target::RISCV + if [ + Target::CortexM, + Target::Msp430, + Target::XtensaLX, + Target::RISCV, + ] + .contains(&config.target) { writeln!(File::create(path.join("device.x"))?, "{}", device_x)?; writeln!(File::create(path.join("build.rs"))?, "{}", build_rs())?; } - if feature_group || feature_peripheral { + if config.feature_group || config.feature_peripheral { let mut features = Vec::new(); - if feature_group { + if config.feature_group { features.extend( util::group_names(&device) .iter() @@ -259,7 +230,7 @@ fn run() -> Result<()> { .collect(); features.push(format!("all-groups = [{}]\n", add_groups.join(","))) } - if feature_peripheral { + if config.feature_peripheral { features.extend( util::peripheral_names(&device) .iter() @@ -287,7 +258,7 @@ fn run() -> Result<()> { Ok(()) } -fn setup_logging<'a>(getter: &'a impl clap_conf::Getter<'a, String>) { +fn setup_logging(log_level: &Option) { // * Log at info by default. // * Allow users the option of setting complex logging filters using // env_logger's `RUST_LOG` environment variable. @@ -302,7 +273,7 @@ fn setup_logging<'a>(getter: &'a impl clap_conf::Getter<'a, String>) { if log_lvl_from_env { log::set_max_level(log::LevelFilter::Trace); } else { - let level = match getter.grab().arg("log_level").conf("log_level").done() { + let level = match log_level { Some(lvl) => lvl.parse().unwrap(), None => log::LevelFilter::Info, }; diff --git a/src/util.rs b/src/util.rs index 3d25f22b..12fbc2ac 100644 --- a/src/util.rs +++ b/src/util.rs @@ -22,23 +22,47 @@ pub const BITS_PER_BYTE: u32 = 8; /// that are not valid in Rust ident const BLACKLIST_CHARS: &[char] = &['(', ')', '[', ']', '/', ' ', '-']; +#[cfg_attr(feature = "serde", derive(serde::Deserialize))] #[derive(Clone, PartialEq, Eq, Debug)] pub struct Config { + #[cfg_attr(feature = "serde", serde(default))] pub target: Target, + #[cfg_attr(feature = "serde", serde(default))] pub nightly: bool, + #[cfg_attr(feature = "serde", serde(default))] pub generic_mod: bool, + #[cfg_attr(feature = "serde", serde(default))] pub make_mod: bool, + #[cfg_attr(feature = "serde", serde(default))] pub const_generic: bool, + #[cfg_attr(feature = "serde", serde(default))] pub ignore_groups: bool, + #[cfg_attr(feature = "serde", serde(default))] pub keep_list: bool, + #[cfg_attr(feature = "serde", serde(default))] pub strict: bool, + #[cfg_attr(feature = "serde", serde(default))] pub pascal_enum_values: bool, + #[cfg_attr(feature = "serde", serde(default))] pub derive_more: bool, + #[cfg_attr(feature = "serde", serde(default))] pub feature_group: bool, + #[cfg_attr(feature = "serde", serde(default))] pub feature_peripheral: bool, + #[cfg_attr(feature = "serde", serde(default))] pub max_cluster_size: bool, + #[cfg_attr(feature = "serde", serde(default = "current_dir"))] pub output_dir: PathBuf, + #[cfg_attr(feature = "serde", serde(default))] + pub input: Option, + #[cfg_attr(feature = "serde", serde(default))] pub source_type: SourceType, + #[cfg_attr(feature = "serde", serde(default))] + pub log_level: Option, +} + +fn current_dir() -> PathBuf { + PathBuf::from(".") } impl Default for Config { @@ -57,21 +81,30 @@ impl Default for Config { feature_group: false, feature_peripheral: false, max_cluster_size: false, - output_dir: PathBuf::from("."), + output_dir: current_dir(), + input: None, source_type: SourceType::default(), + log_level: None, } } } #[allow(clippy::upper_case_acronyms)] #[allow(non_camel_case_types)] +#[cfg_attr(feature = "serde", derive(serde::Deserialize))] #[derive(Clone, Copy, PartialEq, Eq, Debug)] pub enum Target { + #[cfg_attr(feature = "serde", serde(rename = "cortex-m"))] CortexM, + #[cfg_attr(feature = "serde", serde(rename = "msp430"))] Msp430, + #[cfg_attr(feature = "serde", serde(rename = "riscv"))] RISCV, + #[cfg_attr(feature = "serde", serde(rename = "xtensa-lx"))] XtensaLX, + #[cfg_attr(feature = "serde", serde(rename = "mips"))] Mips, + #[cfg_attr(feature = "serde", serde(rename = "none"))] None, } @@ -95,6 +128,11 @@ impl Default for Target { } } +#[cfg_attr( + feature = "serde", + derive(serde::Deserialize), + serde(rename_all = "lowercase") +)] #[derive(Clone, Copy, PartialEq, Eq, Debug)] pub enum SourceType { Xml, From ae2093028bf4ee4fcd6d53a513c501285bdb88c9 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Thu, 6 Oct 2022 17:11:40 +0300 Subject: [PATCH 018/319] update to clap v4 --- CHANGELOG.md | 2 +- Cargo.toml | 4 +-- src/main.rs | 83 +++++++++++++++++++++++++++++----------------------- 3 files changed, 50 insertions(+), 39 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 726d5cbc..1a468bf9 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,7 +7,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] -- Update `clap` to 3.2, use `irx-config` instead of `clap_conf` +- Update `clap` to 4.0, use `irx-config` instead of `clap_conf` - Add #[must_use] to prevent hanging field writers ## [v0.26.0] - 2022-10-07 diff --git a/Cargo.toml b/Cargo.toml index 715f7116..a5b258aa 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -43,8 +43,8 @@ json = ["dep:serde_json"] yaml = ["dep:serde_yaml"] [dependencies] -clap = { version = "3.2", optional = true } -irx-config = { version = "2.3.1", features = ["cmd", "toml-parser"], optional = true } +clap = { version = "4.0", optional = true } +irx-config = { version = "3.1", features = ["cmd", "toml-parser"], optional = true } env_logger = { version = "0.9", optional = true } inflections = "1.1" log = { version = "~0.4", features = ["std"] } diff --git a/src/main.rs b/src/main.rs index 324b9cee..6dc2b74e 100755 --- a/src/main.rs +++ b/src/main.rs @@ -7,7 +7,7 @@ use std::io::Write; use std::process; use anyhow::{Context, Result}; -use clap::{Arg, Command}; +use clap::{Arg, ArgAction, Command}; use svd2rust::{ generate, load_from, @@ -18,11 +18,7 @@ fn parse_configs(app: Command) -> Result { use irx_config::parsers::{cmd, toml}; use irx_config::ConfigBuilder; let irxconfig = ConfigBuilder::default() - .append_parser( - cmd::ParserBuilder::new(app) - .single_flags_as_bool(true) - .build()?, - ) + .append_parser(cmd::ParserBuilder::new(app).build()?) .append_parser( toml::ParserBuilder::default() .default_path("svd2rust.toml") @@ -38,116 +34,131 @@ fn parse_configs(app: Command) -> Result { fn run() -> Result<()> { use std::io::Read; - let log_help = format!( - "Choose which messages to log (overrides {})", - env_logger::DEFAULT_FILTER_ENV - ); - let app = Command::new("svd2rust") .about("Generate a Rust API from SVD files") .arg( - Arg::with_name("input") + Arg::new("input") .help("Input SVD file") .short('i') - .takes_value(true) + .action(ArgAction::Set) .value_name("FILE"), ) .arg( - Arg::with_name("output_dir") + Arg::new("output_dir") .long("output-dir") .help("Directory to place generated files") .short('o') - .takes_value(true) + .action(ArgAction::Set) .value_name("PATH"), ) .arg( - Arg::with_name("config") + Arg::new("config") .long("config") .help("Config TOML file") .short('c') - .takes_value(true) + .action(ArgAction::Set) .value_name("TOML_FILE"), ) .arg( - Arg::with_name("target") + Arg::new("target") .long("target") .help("Target architecture") - .takes_value(true) + .action(ArgAction::Set) .value_name("ARCH"), ) .arg( - Arg::with_name("nightly") + Arg::new("nightly") .long("nightly") + .action(ArgAction::SetTrue) .help("Enable features only available to nightly rustc"), ) .arg( - Arg::with_name("const_generic").long("const_generic").help( + Arg::new("const_generic") + .long("const_generic") + .action(ArgAction::SetTrue) + .help( "Use const generics to generate writers for same fields with different offsets", ), ) .arg( - Arg::with_name("ignore_groups") + Arg::new("ignore_groups") .long("ignore_groups") + .action(ArgAction::SetTrue) .help("Don't add alternateGroup name as prefix to register name"), ) - .arg(Arg::with_name("keep_list").long("keep_list").help( + .arg( + Arg::new("keep_list") + .long("keep_list") + .action(ArgAction::SetTrue) + .help( "Keep lists when generating code of dimElement, instead of trying to generate arrays", )) .arg( - Arg::with_name("generic_mod") + Arg::new("generic_mod") .long("generic_mod") .short('g') + .action(ArgAction::SetTrue) .help("Push generic mod in separate file"), ) .arg( - Arg::with_name("feature_group") + Arg::new("feature_group") .long("feature_group") + .action(ArgAction::SetTrue) .help("Use group_name of peripherals as feature"), ) .arg( - Arg::with_name("feature_peripheral") + Arg::new("feature_peripheral") .long("feature_peripheral") + .action(ArgAction::SetTrue) .help("Use independent cfg feature flags for each peripheral"), ) .arg( - Arg::with_name("max_cluster_size") + Arg::new("max_cluster_size") .long("max_cluster_size") + .action(ArgAction::SetTrue) .help("Use array increment for cluster size"), ) .arg( - Arg::with_name("make_mod") + Arg::new("make_mod") .long("make_mod") .short('m') + .action(ArgAction::SetTrue) .help("Create mod.rs instead of lib.rs, without inner attributes"), ) .arg( - Arg::with_name("strict") + Arg::new("strict") .long("strict") .short('s') + .action(ArgAction::SetTrue) .help("Make advanced checks due to parsing SVD"), ) .arg( - Arg::with_name("pascal_enum_values") + Arg::new("pascal_enum_values") .long("pascal_enum_values") + .action(ArgAction::SetTrue) .help("Use PascalCase in stead of UPPER_CASE for enumerated values"), ) .arg( - Arg::with_name("derive_more") + Arg::new("derive_more") .long("derive_more") + .action(ArgAction::SetTrue) .help("Use derive_more procedural macros to implement Deref and From"), ) .arg( - Arg::with_name("source_type") + Arg::new("source_type") .long("source_type") .help("Specify file/stream format"), ) .arg( - Arg::with_name("log_level") + Arg::new("log_level") .long("log") .short('l') - .help(log_help.as_ref()) - .takes_value(true) - .possible_values(&["off", "error", "warn", "info", "debug", "trace"]), + .help(format!( + "Choose which messages to log (overrides {})", + env_logger::DEFAULT_FILTER_ENV + )) + .action(ArgAction::Set) + .value_parser(["off", "error", "warn", "info", "debug", "trace"]), ) .version(concat!( env!("CARGO_PKG_VERSION"), From 81efde7433450b71e43536eb643a4e4083dbf724 Mon Sep 17 00:00:00 2001 From: Campbell He Date: Thu, 13 Oct 2022 15:10:21 +0800 Subject: [PATCH 019/319] style(generic): remove explicit deref Clippy warning deref is done by auto-deref, so no explicit deref is needed. --- CHANGELOG.md | 1 + src/generate/generic.rs | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 213e8b06..e26af313 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -8,6 +8,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] - Add #[must_use] to prevent hanging field writers +- remove explicit deref in `generic.rs` since it's done by auto-deref ## [v0.26.0] - 2022-10-07 diff --git a/src/generate/generic.rs b/src/generate/generic.rs index 51fa1ef6..6c642c0a 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -140,10 +140,10 @@ where F: FnOnce(&mut REG::Writer) -> &mut W { self.register.set( - (*f(&mut REG::Writer::from(W { + f(&mut REG::Writer::from(W { bits: REG::Ux::default(), _reg: marker::PhantomData, - }))) + })) .bits, ); } From b039835659617704d81d85779e8654fafb39b9f7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Stelmach?= Date: Tue, 11 Oct 2022 12:26:08 +0200 Subject: [PATCH 020/319] Mark bits() as safe if the register has no reserved bits If a register has no fields but its write constraints allow full range of values to be written, then mark bits() as safe. Replace match block with unsafety() function call. --- src/generate/register.rs | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/src/generate/register.rs b/src/generate/register.rs index 6a133971..d9c441c7 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -264,17 +264,16 @@ pub fn render_register_mod( // the writer can be safe if: // * there is a single field that covers the entire register // * that field can represent all values - let can_write_safe = match register - .fields - .as_ref() - .and_then(|fields| fields.iter().next()) - .and_then(|field| field.write_constraint) - { - Some(WriteConstraint::Range(range)) => { - range.min == 0 && range.max == u64::MAX >> (64 - rsize) - } - _ => false, - }; + // * the write constraints of the register allow full range of values + let can_write_safe = !unsafety( + register + .fields + .as_ref() + .and_then(|fields| fields.first()) + .and_then(|field| field.write_constraint) + .as_ref(), + rsize, + ) || !unsafety(register.write_constraint.as_ref(), rsize); if can_write_safe { mod_items.extend(quote! { From 583fc0429fb32add69513d246a8b70a7e2682f28 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C5=81ukasz=20Stelmach?= Date: Tue, 11 Oct 2022 16:48:38 +0200 Subject: [PATCH 021/319] Update changelog --- CHANGELOG.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 61e39914..b21b66fc 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -10,6 +10,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - Update `clap` to 4.0, use `irx-config` instead of `clap_conf` - Add #[must_use] to prevent hanging field writers - remove explicit deref in `generic.rs` since it's done by auto-deref +- Make writing raw bits to a whole register safe if the SVD indicates + so through the element (see [v0.7.1] too). ## [v0.26.0] - 2022-10-07 From 630c52332eb1127ddf921bc8e2109df3d6a5caaf Mon Sep 17 00:00:00 2001 From: Luo Jia / Zhouqi Jiang Date: Sat, 15 Oct 2022 11:20:48 +0800 Subject: [PATCH 022/319] fix: remove lint #![deny(const_err)] MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This lint has been removed in Rust, see: #669 . We remove it here to avoid compile warnings. Signed-off-by: Luo Jia Co-authored-by: Emil Gardström --- CHANGELOG.md | 3 ++- src/generate/device.rs | 1 - 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index b21b66fc..26e24bc9 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -9,9 +9,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - Update `clap` to 4.0, use `irx-config` instead of `clap_conf` - Add #[must_use] to prevent hanging field writers -- remove explicit deref in `generic.rs` since it's done by auto-deref +- Remove explicit deref in `generic.rs` since it's done by auto-deref - Make writing raw bits to a whole register safe if the SVD indicates so through the element (see [v0.7.1] too). +- Remove lint #![deny(const_err)] as it is a hard error in Rust now ## [v0.26.0] - 2022-10-07 diff --git a/src/generate/device.rs b/src/generate/device.rs index 11bf0a04..17eeef42 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -52,7 +52,6 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Date: Sun, 16 Oct 2022 14:27:02 +0300 Subject: [PATCH 023/319] initial_write_value for registers with modifiedWriteValues & Also for `modify` --- CHANGELOG.md | 1 + src/generate/generic.rs | 35 +++++++++++++++++++----------- src/generate/register.rs | 47 ++++++++++++++++++++++++++++------------ 3 files changed, 56 insertions(+), 27 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 26e24bc9..36160423 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- Change initial write value for registers with modifiedWriteValues - Update `clap` to 4.0, use `irx-config` instead of `clap_conf` - Add #[must_use] to prevent hanging field writers - Remove explicit deref in `generic.rs` since it's done by auto-deref diff --git a/src/generate/generic.rs b/src/generate/generic.rs index 6c642c0a..0fe53973 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -3,7 +3,7 @@ use core::marker; /// Raw register type pub trait RegisterSpec { /// Raw register type (`u8`, `u16`, `u32`, ...). - type Ux: Copy; + type Ux: Copy + Default + core::ops::BitOr + core::ops::BitAnd + core::ops::Not; } /// Trait implemented by readable registers to enable the `read` method. @@ -22,6 +22,12 @@ pub trait Readable: RegisterSpec { pub trait Writable: RegisterSpec { /// Writer type argument to `write`, et al. type Writer: From> + core::ops::DerefMut>; + + /// Specifies the register bits that are not changed if you pass `1` and are changed if you pass `0` + const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux; + + /// Specifies the register bits that are not changed if you pass `0` and are changed if you pass `1` + const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux; } /// Reset value of the register. @@ -30,7 +36,13 @@ pub trait Writable: RegisterSpec { /// register by using the `reset` method. pub trait Resettable: RegisterSpec { /// Reset value of the register. - fn reset_value() -> Self::Ux; + const RESET_VALUE: Self::Ux; + + /// Reset value of the register. + #[inline(always)] + fn reset_value() -> Self::Ux { + Self::RESET_VALUE + } } /// This structure provides volatile access to registers. @@ -82,7 +94,7 @@ impl Reg { /// Resets the register to its initial state. #[inline(always)] pub fn reset(&self) { - self.register.set(REG::reset_value()) + self.register.set(REG::RESET_VALUE) } /// Writes bits to a `Writable` register. @@ -115,7 +127,7 @@ impl Reg { { self.register.set( f(&mut REG::Writer::from(W { - bits: REG::reset_value(), + bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData, })) .bits, @@ -123,16 +135,13 @@ impl Reg { } } -impl Reg -where - REG::Ux: Default, -{ +impl Reg { /// Writes 0 to a `Writable` register. /// /// Similar to `write`, but unused bits will contain 0. - /// + /// /// # Safety - /// + /// /// Unsafe to use with registers which don't allow to write 0. #[inline(always)] pub unsafe fn write_with_zero(&self, f: F) @@ -188,7 +197,7 @@ impl Reg { _reg: marker::PhantomData, }), &mut REG::Writer::from(W { - bits, + bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData, }), ) @@ -236,9 +245,9 @@ pub struct W { impl W { /// Writes raw bits to the register. - /// + /// /// # Safety - /// + /// /// Read datasheet or reference manual to find what values are allowed to pass. #[inline(always)] pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self { diff --git a/src/generate/register.rs b/src/generate/register.rs index d9c441c7..01a2b55b 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -219,6 +219,9 @@ pub fn render_register_mod( methods.push("modify"); } + let mut zero_to_modify_fields_bitmap: u64 = 0; + let mut one_to_modify_fields_bitmap: u64 = 0; + if let Some(cur_fields) = register.fields.as_ref() { // filter out all reserved fields, as we should not generate code for // them @@ -240,6 +243,8 @@ pub fn render_register_mod( &mut mod_items, &mut r_impl_items, &mut w_impl_items, + &mut zero_to_modify_fields_bitmap, + &mut one_to_modify_fields_bitmap, config, )?; } @@ -343,21 +348,25 @@ pub fn render_register_mod( if can_write { let doc = format!("`write(|w| ..)` method takes [{name_snake_case}::W](W) writer structure",); + + let zero_to_modify_fields_bitmap = util::hex(zero_to_modify_fields_bitmap); + let one_to_modify_fields_bitmap = util::hex(one_to_modify_fields_bitmap); + mod_items.extend(quote! { #[doc = #doc] impl crate::Writable for #name_constant_case_spec { type Writer = W; + const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = #zero_to_modify_fields_bitmap; + const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = #one_to_modify_fields_bitmap; } }); } if let Some(rv) = properties.reset_value.map(util::hex) { - let rv = rv.into_token_stream(); let doc = format!("`reset()` method sets {} to value {rv}", register.name); mod_items.extend(quote! { #[doc = #doc] impl crate::Resettable for #name_constant_case_spec { - #[inline(always)] - fn reset_value() -> Self::Ux { #rv } + const RESET_VALUE: Self::Ux = #rv; } }); } @@ -377,6 +386,8 @@ pub fn fields( mod_items: &mut TokenStream, r_impl_items: &mut TokenStream, w_impl_items: &mut TokenStream, + zero_to_modify_fields_bitmap: &mut u64, + one_to_modify_fields_bitmap: &mut u64, config: &Config, ) -> Result<()> { let span = Span::call_site(); @@ -837,19 +848,16 @@ pub fn fields( // derive writer structure by type alias to generic write proxy structure. if should_derive_writer { let proxy = if width == 1 { + use ModifiedWriteValues::*; let wproxy = Ident::new( match mwv { - ModifiedWriteValues::Modify => "BitWriter", - ModifiedWriteValues::OneToSet | ModifiedWriteValues::Set => { - "BitWriter1S" - } - ModifiedWriteValues::ZeroToClear | ModifiedWriteValues::Clear => { - "BitWriter0C" - } - ModifiedWriteValues::OneToClear => "BitWriter1C", - ModifiedWriteValues::ZeroToSet => "BitWriter0C", - ModifiedWriteValues::OneToToggle => "BitWriter1T", - ModifiedWriteValues::ZeroToToggle => "BitWriter0T", + Modify | Set | Clear => "BitWriter", + OneToSet => "BitWriter1S", + ZeroToClear => "BitWriter0C", + OneToClear => "BitWriter1C", + ZeroToSet => "BitWriter0C", + OneToToggle => "BitWriter1T", + ZeroToToggle => "BitWriter0T", }, span, ); @@ -965,6 +973,17 @@ pub fn fields( } }); } + let bitmask = (u64::MAX >> (64 - width)) << offset; + use ModifiedWriteValues::*; + match mwv { + Modify | Set | Clear => {} + OneToSet | OneToClear | OneToToggle => { + *one_to_modify_fields_bitmap |= bitmask; + } + ZeroToClear | ZeroToSet | ZeroToToggle => { + *zero_to_modify_fields_bitmap |= bitmask; + } + } } } From 3a6b7162e25935aed3f60a2df753ed5e8f971f03 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Thu, 20 Oct 2022 21:53:34 +0300 Subject: [PATCH 024/319] generic mask --- src/generate/generic.rs | 360 ++++++++++++++++++++++------------------ 1 file changed, 203 insertions(+), 157 deletions(-) diff --git a/src/generate/generic.rs b/src/generate/generic.rs index 0fe53973..b1f5a8c8 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -1,9 +1,44 @@ use core::marker; +pub trait RawReg: + Copy + + Default + + core::ops::BitOr + + core::ops::BitAnd + + core::ops::Not + + core::ops::Shl +{ + fn mask() -> Self; + fn one() -> Self; +} + +macro_rules! raw_reg { + ($U:ty, $size:literal, $mask:ident) => { + impl RawReg for $U { + #[inline(always)] + fn mask() -> Self { + $mask::() + } + #[inline(always)] + fn one() -> Self { + 1 + } + } + const fn $mask() -> $U { + <$U>::MAX >> ($size - WI) + } + } +} + +raw_reg!(u8, 8, mask_u8); +raw_reg!(u16, 16, mask_u16); +raw_reg!(u32, 32, mask_u32); +raw_reg!(u64, 64, mask_u64); + /// Raw register type pub trait RegisterSpec { /// Raw register type (`u8`, `u16`, `u32`, ...). - type Ux: Copy + Default + core::ops::BitOr + core::ops::BitAnd + core::ops::Not; + type Ux: RawReg; } /// Trait implemented by readable registers to enable the `read` method. @@ -123,11 +158,12 @@ impl Reg { #[inline(always)] pub fn write(&self, f: F) where - F: FnOnce(&mut REG::Writer) -> &mut W + F: FnOnce(&mut REG::Writer) -> &mut W, { self.register.set( f(&mut REG::Writer::from(W { - bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, + bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP + | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData, })) .bits, @@ -146,7 +182,7 @@ impl Reg { #[inline(always)] pub unsafe fn write_with_zero(&self, f: F) where - F: FnOnce(&mut REG::Writer) -> &mut W + F: FnOnce(&mut REG::Writer) -> &mut W, { self.register.set( f(&mut REG::Writer::from(W { @@ -187,7 +223,7 @@ impl Reg { #[inline(always)] pub fn modify(&self, f: F) where - for<'w> F: FnOnce(®::Reader, &'w mut REG::Writer) -> &'w mut W + for<'w> F: FnOnce(®::Reader, &'w mut REG::Writer) -> &'w mut W, { let bits = self.register.get(); self.register.set( @@ -197,7 +233,8 @@ impl Reg { _reg: marker::PhantomData, }), &mut REG::Writer::from(W { - bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, + bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP + | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData, }), ) @@ -368,7 +405,8 @@ where _field: marker::PhantomData<(N, FI, Safety)>, } -impl<'a, U, REG, N, FI, Safety, const WI: u8, const O: u8> FieldWriterRaw<'a, U, REG, N, FI, Safety, WI, O> +impl<'a, U, REG, N, FI, Safety, const WI: u8, const O: u8> + FieldWriterRaw<'a, U, REG, N, FI, Safety, WI, O> where REG: Writable + RegisterSpec, FI: Into, @@ -411,10 +449,11 @@ where } /// Write field Proxy with unsafe `bits` -pub type FieldWriter<'a, U, REG, N, FI, const WI: u8, const O: u8> = FieldWriterRaw<'a, U, REG, N, FI, Unsafe, WI, O>; +pub type FieldWriter<'a, U, REG, N, FI, const WI: u8, const O: u8> = + FieldWriterRaw<'a, U, REG, N, FI, Unsafe, WI, O>; /// Write field Proxy with safe `bits` -pub type FieldWriterSafe<'a, U, REG, N, FI, const WI: u8, const O: u8> = FieldWriterRaw<'a, U, REG, N, FI, Safe, WI, O>; - +pub type FieldWriterSafe<'a, U, REG, N, FI, const WI: u8, const O: u8> = + FieldWriterRaw<'a, U, REG, N, FI, Safe, WI, O>; impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriter<'a, U, REG, N, FI, WI, OF> where @@ -423,8 +462,6 @@ where { /// Field width pub const WIDTH: u8 = WI; - /// Field offset - pub const OFFSET: u8 = OF; } impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriterSafe<'a, U, REG, N, FI, WI, OF> @@ -434,8 +471,6 @@ where { /// Field width pub const WIDTH: u8 = WI; - /// Field offset - pub const OFFSET: u8 = OF; } macro_rules! bit_proxy { @@ -453,23 +488,24 @@ macro_rules! bit_proxy { { /// Field width pub const WIDTH: u8 = 1; - /// Field offset - pub const OFFSET: u8 = OF; } - } + }; } macro_rules! impl_bit_proxy { - ($writer:ident, $U:ty) => { - impl<'a, REG, FI, const OF: u8> $writer<'a, $U, REG, FI, OF> + ($writer:ident) => { + impl<'a, U, REG, FI, const OF: u8> $writer<'a, U, REG, FI, OF> where - REG: Writable + RegisterSpec, + REG: Writable + RegisterSpec, + U: RawReg, + U: From, FI: Into, { /// Writes bit to the field #[inline(always)] pub fn bit(self, value: bool) -> &'a mut REG::Writer { - self.w.bits = (self.w.bits & !(1 << { OF })) | ((<$U>::from(value) & 1) << { OF }); + self.w.bits = (self.w.bits & !(U::one() << { OF })) + | ((U::from(value) & U::one()) << { OF }); self.w } /// Writes `variant` to the field @@ -478,7 +514,7 @@ macro_rules! impl_bit_proxy { self.bit(variant.into()) } } - } + }; } bit_proxy!(BitWriter, BitM); @@ -489,140 +525,150 @@ bit_proxy!(BitWriter0S, Bit0S); bit_proxy!(BitWriter1T, Bit1T); bit_proxy!(BitWriter0T, Bit0T); -macro_rules! impl_proxy { - ($U:ty) => { - impl<'a, REG, N, FI, const WI: u8, const OF: u8> FieldWriter<'a, $U, REG, N, FI, WI, OF> - where - REG: Writable + RegisterSpec, - N: Into<$U>, - FI: Into, - { - const MASK: $U = <$U>::MAX >> (<$U>::MAX.leading_ones() as u8 - { WI }); - /// Writes raw bits to the field - /// - /// # Safety - /// - /// Passing incorrect value can cause undefined behaviour. See reference manual - #[inline(always)] - pub unsafe fn bits(self, value: N) -> &'a mut REG::Writer { - self.w.bits = - (self.w.bits & !(Self::MASK << { OF })) | ((value.into() & Self::MASK) << { OF }); - self.w - } - /// Writes `variant` to the field - #[inline(always)] - pub fn variant(self, variant: FI) -> &'a mut REG::Writer { - unsafe { self.bits(variant.into()) } - } - } - impl<'a, REG, N, FI, const WI: u8, const OF: u8> FieldWriterSafe<'a, $U, REG, N, FI, WI, OF> - where - REG: Writable + RegisterSpec, - N: Into<$U>, - FI: Into, - { - const MASK: $U = <$U>::MAX >> (<$U>::MAX.leading_ones() as u8 - { WI }); - /// Writes raw bits to the field - #[inline(always)] - pub fn bits(self, value: N) -> &'a mut REG::Writer { - self.w.bits = - (self.w.bits & !(Self::MASK << { OF })) | ((value.into() & Self::MASK) << { OF }); - self.w - } - /// Writes `variant` to the field - #[inline(always)] - pub fn variant(self, variant: FI) -> &'a mut REG::Writer { - self.bits(variant.into()) - } - } - impl_bit_proxy!(BitWriter, $U); - impl_bit_proxy!(BitWriter1S, $U); - impl_bit_proxy!(BitWriter0C, $U); - impl_bit_proxy!(BitWriter1C, $U); - impl_bit_proxy!(BitWriter0S, $U); - impl_bit_proxy!(BitWriter1T, $U); - impl_bit_proxy!(BitWriter0T, $U); - impl<'a, REG, FI, const OF: u8> BitWriter<'a, $U, REG, FI, OF> - where - REG: Writable + RegisterSpec, - FI: Into, - { - /// Sets the field bit - #[inline(always)] - pub fn set_bit(self) -> &'a mut REG::Writer { - self.bit(true) - } - /// Clears the field bit - #[inline(always)] - pub fn clear_bit(self) -> &'a mut REG::Writer { - self.bit(false) - } - } - impl<'a, REG, FI, const OF: u8> BitWriter1S<'a, $U, REG, FI, OF> - where - REG: Writable + RegisterSpec, - FI: Into, - { - /// Sets the field bit - #[inline(always)] - pub fn set_bit(self) -> &'a mut REG::Writer { - self.bit(true) - } - } - impl<'a, REG, FI, const OF: u8> BitWriter0C<'a, $U, REG, FI, OF> - where - REG: Writable + RegisterSpec, - FI: Into, - { - /// Clears the field bit - #[inline(always)] - pub fn clear_bit(self) -> &'a mut REG::Writer { - self.bit(false) - } - } - impl<'a, REG, FI, const OF: u8> BitWriter1C<'a, $U, REG, FI, OF> - where - REG: Writable + RegisterSpec, - FI: Into, - { - ///Clears the field bit by passing one - #[inline(always)] - pub fn clear_bit_by_one(self) -> &'a mut REG::Writer { - self.bit(true) - } - } - impl<'a, REG, FI, const OF: u8> BitWriter0S<'a, $U, REG, FI, OF> - where - REG: Writable + RegisterSpec, - FI: Into, - { - ///Sets the field bit by passing zero - #[inline(always)] - pub fn set_bit_by_zero(self) -> &'a mut REG::Writer { - self.bit(false) - } - } - impl<'a, REG, FI, const OF: u8> BitWriter1T<'a, $U, REG, FI, OF> - where - REG: Writable + RegisterSpec, - FI: Into, - { - ///Toggle the field bit by passing one - #[inline(always)] - pub fn toggle_bit(self) -> &'a mut REG::Writer { - self.bit(true) - } - } - impl<'a, REG, FI, const OF: u8> BitWriter0T<'a, $U, REG, FI, OF> - where - REG: Writable + RegisterSpec, - FI: Into, - { - ///Toggle the field bit by passing zero - #[inline(always)] - pub fn toggle_bit(self) -> &'a mut REG::Writer { - self.bit(false) - } - } +impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriter<'a, U, REG, N, FI, WI, OF> +where + REG: Writable + RegisterSpec, + U: RawReg, + N: Into, + FI: Into, +{ + /// Writes raw bits to the field + /// + /// # Safety + /// + /// Passing incorrect value can cause undefined behaviour. See reference manual + #[inline(always)] + pub unsafe fn bits(self, value: N) -> &'a mut REG::Writer { + self.w.bits = (self.w.bits & !(U::mask::() << { OF })) + | ((value.into() & U::mask::()) << { OF }); + self.w + } + /// Writes `variant` to the field + #[inline(always)] + pub fn variant(self, variant: FI) -> &'a mut REG::Writer { + unsafe { self.bits(variant.into()) } + } +} +impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriterSafe<'a, U, REG, N, FI, WI, OF> +where + REG: Writable + RegisterSpec, + U: RawReg, + N: Into, + FI: Into, +{ + /// Writes raw bits to the field + #[inline(always)] + pub fn bits(self, value: N) -> &'a mut REG::Writer { + self.w.bits = (self.w.bits & !(U::mask::() << { OF })) + | ((value.into() & U::mask::()) << { OF }); + self.w + } + /// Writes `variant` to the field + #[inline(always)] + pub fn variant(self, variant: FI) -> &'a mut REG::Writer { + self.bits(variant.into()) + } +} +impl_bit_proxy!(BitWriter); +impl_bit_proxy!(BitWriter1S); +impl_bit_proxy!(BitWriter0C); +impl_bit_proxy!(BitWriter1C); +impl_bit_proxy!(BitWriter0S); +impl_bit_proxy!(BitWriter1T); +impl_bit_proxy!(BitWriter0T); +impl<'a, U, REG, FI, const OF: u8> BitWriter<'a, U, REG, FI, OF> +where + REG: Writable + RegisterSpec, + U: RawReg, + U: From, + FI: Into, +{ + /// Sets the field bit + #[inline(always)] + pub fn set_bit(self) -> &'a mut REG::Writer { + self.bit(true) + } + /// Clears the field bit + #[inline(always)] + pub fn clear_bit(self) -> &'a mut REG::Writer { + self.bit(false) + } +} +impl<'a, U, REG, FI, const OF: u8> BitWriter1S<'a, U, REG, FI, OF> +where + REG: Writable + RegisterSpec, + U: RawReg, + U: From, + FI: Into, +{ + /// Sets the field bit + #[inline(always)] + pub fn set_bit(self) -> &'a mut REG::Writer { + self.bit(true) + } +} +impl<'a, U, REG, FI, const OF: u8> BitWriter0C<'a, U, REG, FI, OF> +where + REG: Writable + RegisterSpec, + U: RawReg, + U: From, + FI: Into, +{ + /// Clears the field bit + #[inline(always)] + pub fn clear_bit(self) -> &'a mut REG::Writer { + self.bit(false) + } +} +impl<'a, U, REG, FI, const OF: u8> BitWriter1C<'a, U, REG, FI, OF> +where + REG: Writable + RegisterSpec, + U: RawReg, + U: From, + FI: Into, +{ + ///Clears the field bit by passing one + #[inline(always)] + pub fn clear_bit_by_one(self) -> &'a mut REG::Writer { + self.bit(true) + } +} +impl<'a, U, REG, FI, const OF: u8> BitWriter0S<'a, U, REG, FI, OF> +where + REG: Writable + RegisterSpec, + U: RawReg, + U: From, + FI: Into, +{ + ///Sets the field bit by passing zero + #[inline(always)] + pub fn set_bit_by_zero(self) -> &'a mut REG::Writer { + self.bit(false) + } +} +impl<'a, U, REG, FI, const OF: u8> BitWriter1T<'a, U, REG, FI, OF> +where + REG: Writable + RegisterSpec, + U: RawReg, + U: From, + FI: Into, +{ + ///Toggle the field bit by passing one + #[inline(always)] + pub fn toggle_bit(self) -> &'a mut REG::Writer { + self.bit(true) + } +} +impl<'a, U, REG, FI, const OF: u8> BitWriter0T<'a, U, REG, FI, OF> +where + REG: Writable + RegisterSpec, + U: RawReg, + U: From, + FI: Into, +{ + ///Toggle the field bit by passing zero + #[inline(always)] + pub fn toggle_bit(self) -> &'a mut REG::Writer { + self.bit(false) } } From ef010c69f14a88588cbe193b3de7c31a616f12f2 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Thu, 20 Oct 2022 22:15:11 +0300 Subject: [PATCH 025/319] rm reg_sizes --- CHANGELOG.md | 1 + src/generate/device.rs | 11 +---------- src/generate/generic.rs | 12 ++++++++++++ src/util.rs | 14 -------------- 4 files changed, 14 insertions(+), 24 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 36160423..e4155c4d 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- Make `generic.rs` generic - Change initial write value for registers with modifiedWriteValues - Update `clap` to 4.0, use `irx-config` instead of `clap_conf` - Add #[must_use] to prevent hanging field writers diff --git a/src/generate/device.rs b/src/generate/device.rs index 17eeef42..4065f4b9 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -7,7 +7,7 @@ use std::borrow::Cow; use std::fs::File; use std::io::Write; -use crate::util::{self, Config, ToSanitizedCase, U32Ext}; +use crate::util::{self, Config, ToSanitizedCase}; use crate::Target; use anyhow::{Context, Result}; @@ -146,15 +146,10 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Result + core::ops::Shl { + /// Mask for bits of width `WI` fn mask() -> Self; + /// Mask for bits of width 1 fn one() -> Self; } @@ -549,6 +552,7 @@ where unsafe { self.bits(variant.into()) } } } + impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriterSafe<'a, U, REG, N, FI, WI, OF> where REG: Writable + RegisterSpec, @@ -569,6 +573,7 @@ where self.bits(variant.into()) } } + impl_bit_proxy!(BitWriter); impl_bit_proxy!(BitWriter1S); impl_bit_proxy!(BitWriter0C); @@ -576,6 +581,7 @@ impl_bit_proxy!(BitWriter1C); impl_bit_proxy!(BitWriter0S); impl_bit_proxy!(BitWriter1T); impl_bit_proxy!(BitWriter0T); + impl<'a, U, REG, FI, const OF: u8> BitWriter<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, @@ -594,6 +600,7 @@ where self.bit(false) } } + impl<'a, U, REG, FI, const OF: u8> BitWriter1S<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, @@ -607,6 +614,7 @@ where self.bit(true) } } + impl<'a, U, REG, FI, const OF: u8> BitWriter0C<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, @@ -620,6 +628,7 @@ where self.bit(false) } } + impl<'a, U, REG, FI, const OF: u8> BitWriter1C<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, @@ -633,6 +642,7 @@ where self.bit(true) } } + impl<'a, U, REG, FI, const OF: u8> BitWriter0S<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, @@ -646,6 +656,7 @@ where self.bit(false) } } + impl<'a, U, REG, FI, const OF: u8> BitWriter1T<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, @@ -659,6 +670,7 @@ where self.bit(true) } } + impl<'a, U, REG, FI, const OF: u8> BitWriter0T<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, diff --git a/src/util.rs b/src/util.rs index 12fbc2ac..e19b411d 100644 --- a/src/util.rs +++ b/src/util.rs @@ -545,20 +545,6 @@ pub fn build_rs() -> TokenStream { } } -pub fn get_register_sizes(d: &Device) -> Vec { - let mut reg_sizes = HashSet::new(); - for p in &d.peripherals { - for r in p.all_registers() { - if let Some(size) = r.properties.size { - reg_sizes.insert(size); - } - } - } - let mut reg_sizes: Vec<_> = reg_sizes.into_iter().collect(); - reg_sizes.sort(); - reg_sizes -} - pub trait FullName { fn fullname(&self, ignore_group: bool) -> Cow; } From 7f551454f332d792b68f8cfa6f31ec683f284f63 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 21 Oct 2022 18:48:00 +0300 Subject: [PATCH 026/319] BitAssign --- src/generate/generic.rs | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/src/generate/generic.rs b/src/generate/generic.rs index 5ffc0c61..61d046d4 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -6,6 +6,8 @@ pub trait RawReg: + Default + core::ops::BitOr + core::ops::BitAnd + + core::ops::BitOrAssign + + core::ops::BitAndAssign + core::ops::Not + core::ops::Shl { @@ -30,7 +32,7 @@ macro_rules! raw_reg { const fn $mask() -> $U { <$U>::MAX >> ($size - WI) } - } + }; } raw_reg!(u8, 8, mask_u8); @@ -507,8 +509,8 @@ macro_rules! impl_bit_proxy { /// Writes bit to the field #[inline(always)] pub fn bit(self, value: bool) -> &'a mut REG::Writer { - self.w.bits = (self.w.bits & !(U::one() << { OF })) - | ((U::from(value) & U::one()) << { OF }); + self.w.bits &= !(U::one() << { OF }); + self.w.bits |= (U::from(value) & U::one()) << { OF }; self.w } /// Writes `variant` to the field @@ -542,8 +544,8 @@ where /// Passing incorrect value can cause undefined behaviour. See reference manual #[inline(always)] pub unsafe fn bits(self, value: N) -> &'a mut REG::Writer { - self.w.bits = (self.w.bits & !(U::mask::() << { OF })) - | ((value.into() & U::mask::()) << { OF }); + self.w.bits &= !(U::mask::() << { OF }); + self.w.bits |= (value.into() & U::mask::()) << { OF }; self.w } /// Writes `variant` to the field @@ -552,7 +554,6 @@ where unsafe { self.bits(variant.into()) } } } - impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriterSafe<'a, U, REG, N, FI, WI, OF> where REG: Writable + RegisterSpec, @@ -563,8 +564,8 @@ where /// Writes raw bits to the field #[inline(always)] pub fn bits(self, value: N) -> &'a mut REG::Writer { - self.w.bits = (self.w.bits & !(U::mask::() << { OF })) - | ((value.into() & U::mask::()) << { OF }); + self.w.bits &= !(U::mask::() << { OF }); + self.w.bits |= (value.into() & U::mask::()) << { OF }; self.w } /// Writes `variant` to the field From 9191c1393f8e85cbcbb6b8835c0a6eccc2d5a9ee Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 21 Oct 2022 20:57:48 +0300 Subject: [PATCH 027/319] use_cast --- CHANGELOG.md | 1 + src/generate/generic.rs | 19 +++++-------------- src/generate/register.rs | 23 ++++++++++++++++++----- 3 files changed, 24 insertions(+), 19 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index e4155c4d..8ed83ba5 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- Don't cast fields with width 17-31 - Make `generic.rs` generic - Change initial write value for registers with modifiedWriteValues - Update `clap` to 4.0, use `irx-config` instead of `clap_conf` diff --git a/src/generate/generic.rs b/src/generate/generic.rs index 61d046d4..7b52f6d7 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -4,6 +4,7 @@ use core::marker; pub trait RawReg: Copy + Default + + From + core::ops::BitOr + core::ops::BitAnd + core::ops::BitOrAssign @@ -503,7 +504,6 @@ macro_rules! impl_bit_proxy { where REG: Writable + RegisterSpec, U: RawReg, - U: From, FI: Into, { /// Writes bit to the field @@ -533,8 +533,7 @@ bit_proxy!(BitWriter0T, Bit0T); impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriter<'a, U, REG, N, FI, WI, OF> where REG: Writable + RegisterSpec, - U: RawReg, - N: Into, + U: RawReg + From, FI: Into, { /// Writes raw bits to the field @@ -545,7 +544,7 @@ where #[inline(always)] pub unsafe fn bits(self, value: N) -> &'a mut REG::Writer { self.w.bits &= !(U::mask::() << { OF }); - self.w.bits |= (value.into() & U::mask::()) << { OF }; + self.w.bits |= (U::from(value) & U::mask::()) << { OF }; self.w } /// Writes `variant` to the field @@ -557,15 +556,14 @@ where impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriterSafe<'a, U, REG, N, FI, WI, OF> where REG: Writable + RegisterSpec, - U: RawReg, - N: Into, + U: RawReg + From, FI: Into, { /// Writes raw bits to the field #[inline(always)] pub fn bits(self, value: N) -> &'a mut REG::Writer { self.w.bits &= !(U::mask::() << { OF }); - self.w.bits |= (value.into() & U::mask::()) << { OF }; + self.w.bits |= (U::from(value) & U::mask::()) << { OF }; self.w } /// Writes `variant` to the field @@ -587,7 +585,6 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, U: RawReg, - U: From, FI: Into, { /// Sets the field bit @@ -606,7 +603,6 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter1S<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, U: RawReg, - U: From, FI: Into, { /// Sets the field bit @@ -620,7 +616,6 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter0C<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, U: RawReg, - U: From, FI: Into, { /// Clears the field bit @@ -634,7 +629,6 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter1C<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, U: RawReg, - U: From, FI: Into, { ///Clears the field bit by passing one @@ -648,7 +642,6 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter0S<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, U: RawReg, - U: From, FI: Into, { ///Sets the field bit by passing zero @@ -662,7 +655,6 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter1T<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, U: RawReg, - U: From, FI: Into, { ///Toggle the field bit by passing one @@ -676,7 +668,6 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter0T<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, U: RawReg, - U: From, FI: Into, { ///Toggle the field bit by passing zero diff --git a/src/generate/register.rs b/src/generate/register.rs index 01a2b55b..fefb3dcc 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -436,10 +436,15 @@ pub fn fields( let rv = properties.reset_value.map(|rv| (rv >> offset) & mask); let fty = width.to_ty()?; - let use_mask = if let Some(size) = properties.size { - size != width + let use_mask; + let use_cast; + if let Some(size) = properties.size { + let size = size.to_ty_width()?; + use_cast = size != width.to_ty_width()?; + use_mask = size != width; } else { - true + use_cast = true; + use_mask = true; }; let mut lookup_results = Vec::new(); @@ -481,10 +486,14 @@ pub fn fields( quote! { ((self.bits >> #offset) & #hexmask) #cast } - } else if use_mask { + } else if use_cast { quote! { (self.bits & #hexmask) #cast } + } else if use_mask { + quote! { + self.bits & #hexmask + } } else { quote! { self.bits @@ -713,10 +722,14 @@ pub fn fields( quote! { ((self.bits >> #sub_offset) & #hexmask) #cast } - } else if use_mask { + } else if use_cast { quote! { (self.bits & #hexmask) #cast } + } else if use_mask { + quote! { + self.bits & #hexmask + } } else { quote! { self.bits From bf93c6251b64ef013f8ec0c4266a8396db06038a Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 21 Oct 2022 22:11:41 +0300 Subject: [PATCH 028/319] From instead of Into --- src/generate/generic.rs | 55 ++++++++++++++++++++++------------------- 1 file changed, 29 insertions(+), 26 deletions(-) diff --git a/src/generate/generic.rs b/src/generate/generic.rs index 7b52f6d7..2b5fbc61 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -269,11 +269,12 @@ impl R { impl PartialEq for R where REG::Ux: PartialEq, - FI: Copy + Into, + FI: Copy, + REG::Ux: From { #[inline(always)] fn eq(&self, other: &FI) -> bool { - self.bits.eq(&(*other).into()) + self.bits.eq(®::Ux::from(*other)) } } @@ -360,21 +361,23 @@ where impl PartialEq for FieldReader where U: PartialEq, - FI: Copy + Into, + FI: Copy, + U: From, { #[inline(always)] fn eq(&self, other: &FI) -> bool { - self.bits.eq(&(*other).into()) + self.bits.eq(&U::from(*other)) } } impl PartialEq for BitReader where - FI: Copy + Into, + FI: Copy, + bool: From, { #[inline(always)] fn eq(&self, other: &FI) -> bool { - self.bits.eq(&(*other).into()) + self.bits.eq(&bool::from(*other)) } } @@ -405,7 +408,7 @@ pub struct Unsafe; pub struct FieldWriterRaw<'a, U, REG, N, FI, Safety, const WI: u8, const O: u8> where REG: Writable + RegisterSpec, - FI: Into, + N: From, { pub(crate) w: &'a mut REG::Writer, _field: marker::PhantomData<(N, FI, Safety)>, @@ -415,7 +418,7 @@ impl<'a, U, REG, N, FI, Safety, const WI: u8, const O: u8> FieldWriterRaw<'a, U, REG, N, FI, Safety, WI, O> where REG: Writable + RegisterSpec, - FI: Into, + N: From, { /// Creates a new instance of the writer #[allow(unused)] @@ -432,7 +435,7 @@ where pub struct BitWriterRaw<'a, U, REG, FI, M, const O: u8> where REG: Writable + RegisterSpec, - FI: Into, + bool: From, { pub(crate) w: &'a mut REG::Writer, _field: marker::PhantomData<(FI, M)>, @@ -441,7 +444,7 @@ where impl<'a, U, REG, FI, M, const O: u8> BitWriterRaw<'a, U, REG, FI, M, O> where REG: Writable + RegisterSpec, - FI: Into, + bool: From, { /// Creates a new instance of the writer #[allow(unused)] @@ -464,7 +467,7 @@ pub type FieldWriterSafe<'a, U, REG, N, FI, const WI: u8, const O: u8> = impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriter<'a, U, REG, N, FI, WI, OF> where REG: Writable + RegisterSpec, - FI: Into, + N: From, { /// Field width pub const WIDTH: u8 = WI; @@ -473,7 +476,7 @@ where impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriterSafe<'a, U, REG, N, FI, WI, OF> where REG: Writable + RegisterSpec, - FI: Into, + N: From, { /// Field width pub const WIDTH: u8 = WI; @@ -490,7 +493,7 @@ macro_rules! bit_proxy { impl<'a, U, REG, FI, const OF: u8> $writer<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, - FI: Into, + bool: From, { /// Field width pub const WIDTH: u8 = 1; @@ -504,7 +507,7 @@ macro_rules! impl_bit_proxy { where REG: Writable + RegisterSpec, U: RawReg, - FI: Into, + bool: From, { /// Writes bit to the field #[inline(always)] @@ -516,7 +519,7 @@ macro_rules! impl_bit_proxy { /// Writes `variant` to the field #[inline(always)] pub fn variant(self, variant: FI) -> &'a mut REG::Writer { - self.bit(variant.into()) + self.bit(bool::from(variant)) } } }; @@ -534,7 +537,7 @@ impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriter<'a, U, REG, N, F where REG: Writable + RegisterSpec, U: RawReg + From, - FI: Into, + N: From, { /// Writes raw bits to the field /// @@ -550,14 +553,14 @@ where /// Writes `variant` to the field #[inline(always)] pub fn variant(self, variant: FI) -> &'a mut REG::Writer { - unsafe { self.bits(variant.into()) } + unsafe { self.bits(N::from(variant)) } } } impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriterSafe<'a, U, REG, N, FI, WI, OF> where REG: Writable + RegisterSpec, U: RawReg + From, - FI: Into, + N: From, { /// Writes raw bits to the field #[inline(always)] @@ -569,7 +572,7 @@ where /// Writes `variant` to the field #[inline(always)] pub fn variant(self, variant: FI) -> &'a mut REG::Writer { - self.bits(variant.into()) + self.bits(N::from(variant)) } } @@ -585,7 +588,7 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, U: RawReg, - FI: Into, + bool: From, { /// Sets the field bit #[inline(always)] @@ -603,7 +606,7 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter1S<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, U: RawReg, - FI: Into, + bool: From, { /// Sets the field bit #[inline(always)] @@ -616,7 +619,7 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter0C<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, U: RawReg, - FI: Into, + bool: From, { /// Clears the field bit #[inline(always)] @@ -629,7 +632,7 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter1C<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, U: RawReg, - FI: Into, + bool: From, { ///Clears the field bit by passing one #[inline(always)] @@ -642,7 +645,7 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter0S<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, U: RawReg, - FI: Into, + bool: From, { ///Sets the field bit by passing zero #[inline(always)] @@ -655,7 +658,7 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter1T<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, U: RawReg, - FI: Into, + bool: From, { ///Toggle the field bit by passing one #[inline(always)] @@ -668,7 +671,7 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter0T<'a, U, REG, FI, OF> where REG: Writable + RegisterSpec, U: RawReg, - FI: Into, + bool: From, { ///Toggle the field bit by passing zero #[inline(always)] From 0ddd5836c63804060870f96f6df0a1a7bd4b70cc Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 22 Oct 2022 19:39:36 +0300 Subject: [PATCH 029/319] inline set/clear_bit --- CHANGELOG.md | 1 + src/generate/generic.rs | 38 +++++++++++++++++++++++--------------- 2 files changed, 24 insertions(+), 15 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 8ed83ba5..578d25b5 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- Manually inline set/clear_bit - Don't cast fields with width 17-31 - Make `generic.rs` generic - Change initial write value for registers with modifiedWriteValues diff --git a/src/generate/generic.rs b/src/generate/generic.rs index 2b5fbc61..4ed05dc4 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -270,7 +270,7 @@ impl PartialEq for R where REG::Ux: PartialEq, FI: Copy, - REG::Ux: From + REG::Ux: From, { #[inline(always)] fn eq(&self, other: &FI) -> bool { @@ -512,8 +512,8 @@ macro_rules! impl_bit_proxy { /// Writes bit to the field #[inline(always)] pub fn bit(self, value: bool) -> &'a mut REG::Writer { - self.w.bits &= !(U::one() << { OF }); - self.w.bits |= (U::from(value) & U::one()) << { OF }; + self.w.bits &= !(U::one() << OF); + self.w.bits |= (U::from(value) & U::one()) << OF; self.w } /// Writes `variant` to the field @@ -546,8 +546,8 @@ where /// Passing incorrect value can cause undefined behaviour. See reference manual #[inline(always)] pub unsafe fn bits(self, value: N) -> &'a mut REG::Writer { - self.w.bits &= !(U::mask::() << { OF }); - self.w.bits |= (U::from(value) & U::mask::()) << { OF }; + self.w.bits &= !(U::mask::() << OF); + self.w.bits |= (U::from(value) & U::mask::()) << OF; self.w } /// Writes `variant` to the field @@ -565,8 +565,8 @@ where /// Writes raw bits to the field #[inline(always)] pub fn bits(self, value: N) -> &'a mut REG::Writer { - self.w.bits &= !(U::mask::() << { OF }); - self.w.bits |= (U::from(value) & U::mask::()) << { OF }; + self.w.bits &= !(U::mask::() << OF); + self.w.bits |= (U::from(value) & U::mask::()) << OF; self.w } /// Writes `variant` to the field @@ -593,12 +593,14 @@ where /// Sets the field bit #[inline(always)] pub fn set_bit(self) -> &'a mut REG::Writer { - self.bit(true) + self.w.bits |= U::one() << OF; + self.w } /// Clears the field bit #[inline(always)] pub fn clear_bit(self) -> &'a mut REG::Writer { - self.bit(false) + self.w.bits &= !(U::one() << OF); + self.w } } @@ -611,7 +613,8 @@ where /// Sets the field bit #[inline(always)] pub fn set_bit(self) -> &'a mut REG::Writer { - self.bit(true) + self.w.bits |= U::one() << OF; + self.w } } @@ -624,7 +627,8 @@ where /// Clears the field bit #[inline(always)] pub fn clear_bit(self) -> &'a mut REG::Writer { - self.bit(false) + self.w.bits &= !(U::one() << OF); + self.w } } @@ -637,7 +641,8 @@ where ///Clears the field bit by passing one #[inline(always)] pub fn clear_bit_by_one(self) -> &'a mut REG::Writer { - self.bit(true) + self.w.bits |= U::one() << OF; + self.w } } @@ -650,7 +655,8 @@ where ///Sets the field bit by passing zero #[inline(always)] pub fn set_bit_by_zero(self) -> &'a mut REG::Writer { - self.bit(false) + self.w.bits &= !(U::one() << OF); + self.w } } @@ -663,7 +669,8 @@ where ///Toggle the field bit by passing one #[inline(always)] pub fn toggle_bit(self) -> &'a mut REG::Writer { - self.bit(true) + self.w.bits |= U::one() << OF; + self.w } } @@ -676,6 +683,7 @@ where ///Toggle the field bit by passing zero #[inline(always)] pub fn toggle_bit(self) -> &'a mut REG::Writer { - self.bit(false) + self.w.bits &= !(U::one() << OF); + self.w } } From 716c8ffb503e0d8fc920c51b31869c8c5c619223 Mon Sep 17 00:00:00 2001 From: Campbell He Date: Mon, 24 Oct 2022 17:29:03 +0800 Subject: [PATCH 030/319] docs: brief intro to `critical-section` --- CHANGELOG.md | 1 + src/lib.rs | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 578d25b5..9b4c5b86 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -17,6 +17,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - Make writing raw bits to a whole register safe if the SVD indicates so through the element (see [v0.7.1] too). - Remove lint #![deny(const_err)] as it is a hard error in Rust now +- Add doc of using `critical-section` ## [v0.26.0] - 2022-10-07 diff --git a/src/lib.rs b/src/lib.rs index 9fa30bbc..ca309307 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -185,6 +185,10 @@ //! let panics = stm32f30x::Peripherals::take().unwrap(); //! ``` //! +//! This method needs an implementation of `critical-section`. You can implement it yourself or +//! use the implementation provided by the target crate like `cortex-m`, `riscv` and `*-hal` crates. +//! See more details in the [`critical-section`](https://crates.io/crates/critical-section) crate documentation. +//! //! The singleton property can be *unsafely* bypassed using the `ptr` static method which is //! available on all the peripheral types. This method is useful for implementing safe higher //! level abstractions. From f684bde51383cc95475f53f4861158f57aa21b22 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 23 Oct 2022 19:07:05 +0300 Subject: [PATCH 031/319] release 0.27.0 --- CHANGELOG.md | 9 ++++++--- Cargo.toml | 6 +++--- src/generate/peripheral.rs | 2 +- src/util.rs | 7 ------- 4 files changed, 10 insertions(+), 14 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 9b4c5b86..782c8a60 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,14 +7,16 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +## [v0.27.0] - 2022-10-24 + - Manually inline set/clear_bit - Don't cast fields with width 17-31 - Make `generic.rs` generic -- Change initial write value for registers with modifiedWriteValues +- [breaking-change] Change initial write value for registers with modifiedWriteValues - Update `clap` to 4.0, use `irx-config` instead of `clap_conf` - Add #[must_use] to prevent hanging field writers - Remove explicit deref in `generic.rs` since it's done by auto-deref -- Make writing raw bits to a whole register safe if the SVD indicates +- [breaking-change] Make writing raw bits to a whole register safe if the SVD indicates so through the element (see [v0.7.1] too). - Remove lint #![deny(const_err)] as it is a hard error in Rust now - Add doc of using `critical-section` @@ -759,7 +761,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.26.0...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.27.0...HEAD +[v0.27.0]: https://github.com/rust-embedded/svd2rust/compare/v0.26.0...v0.27.0 [v0.26.0]: https://github.com/rust-embedded/svd2rust/compare/v0.25.1...v0.26.0 [v0.25.1]: https://github.com/rust-embedded/svd2rust/compare/v0.25.0...v0.25.1 [v0.25.0]: https://github.com/rust-embedded/svd2rust/compare/v0.24.1...v0.25.0 diff --git a/Cargo.toml b/Cargo.toml index a5b258aa..ed09bd49 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.26.0" +version = "0.27.0" readme = "README.md" rust-version = "1.60" @@ -58,11 +58,11 @@ serde_yaml = { version = "0.9.11", optional = true } [dependencies.svd-parser] features = ["expand"] -version = "0.14.0" +version = "0.14.1" [dependencies.svd-rs] features = ["serde"] -version = "0.14.0" +version = "0.14.1" [dependencies.syn] version = "1.0" diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index fbd98d9f..318d36f1 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -1009,7 +1009,7 @@ fn cluster_block( let name_constant_case = mod_name.to_constant_case_ident(span); if let Some(dpath) = dpath { - let dparent = util::parent(&dpath).unwrap(); + let dparent = dpath.parent().unwrap(); let mut derived = if &dparent == path { type_path(Punctuated::new()) } else { diff --git a/src/util.rs b/src/util.rs index e19b411d..76047352 100644 --- a/src/util.rs +++ b/src/util.rs @@ -6,7 +6,6 @@ use proc_macro2::{Ident, Span, TokenStream}; use quote::quote; use std::collections::HashSet; use std::path::{Path, PathBuf}; -use svd_parser::expand::BlockPath; use svd_rs::{MaybeArray, Peripheral, PeripheralInfo}; use syn::{ @@ -457,12 +456,6 @@ pub fn path_segment(ident: Ident) -> PathSegment { } } -pub fn parent(p: &BlockPath) -> Option { - let mut p = p.clone(); - p.path.pop()?; - Some(p) -} - pub trait U32Ext { fn size_to_str(&self) -> Result<&str>; fn to_ty(&self) -> Result; From fc8868231e8b0cff7ae827e9666abdc42a71ce34 Mon Sep 17 00:00:00 2001 From: Campbell He Date: Tue, 25 Oct 2022 10:33:46 +0800 Subject: [PATCH 032/319] feat: not cast if unnecessary adjust code according to clippy --- CHANGELOG.md | 2 ++ build.rs | 4 ++-- src/generate/interrupt.rs | 2 +- src/generate/peripheral.rs | 2 +- src/generate/register.rs | 48 +++++++++++++++----------------------- src/lib.rs | 2 +- 6 files changed, 26 insertions(+), 34 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 782c8a60..cc52b721 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- Don't cast fields with width 17-31 and non-zero offset. + ## [v0.27.0] - 2022-10-24 - Manually inline set/clear_bit diff --git a/build.rs b/build.rs index 56ee3e0a..34f44d51 100644 --- a/build.rs +++ b/build.rs @@ -35,7 +35,7 @@ fn commit_info() -> String { fn commit_hash() -> Result { Ok(String::from_utf8( Command::new("git") - .args(&["rev-parse", "--short", "HEAD"]) + .args(["rev-parse", "--short", "HEAD"]) .output()? .stdout, )?) @@ -44,7 +44,7 @@ fn commit_hash() -> Result { fn commit_date() -> Result { Ok(String::from_utf8( Command::new("git") - .args(&["log", "-1", "--date=short", "--pretty=format:%cd"]) + .args(["log", "-1", "--date=short", "--pretty=format:%cd"]) .output()? .stdout, )?) diff --git a/src/generate/interrupt.rs b/src/generate/interrupt.rs index c0d536f3..e23facb7 100644 --- a/src/generate/interrupt.rs +++ b/src/generate/interrupt.rs @@ -33,7 +33,7 @@ pub fn render( .map(|i| (i.0.value, (i.0, i.1, i.2))) .collect::>(); - let mut interrupts = interrupts.into_iter().map(|(_, v)| v).collect::>(); + let mut interrupts = interrupts.into_values().collect::>(); interrupts.sort_by_key(|i| i.0.value); let mut root = TokenStream::new(); diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 318d36f1..fba9b431 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -30,7 +30,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result let span = Span::call_site(); let name_str = name.to_sanitized_constant_case(); let name_constant_case = Ident::new(&name_str, span); - let address = util::hex(p.base_address as u64); + let address = util::hex(p.base_address); let description = util::respace(p.description.as_ref().unwrap_or(&p.name)); let name_snake_case = name.to_snake_case_ident(span); diff --git a/src/generate/register.rs b/src/generate/register.rs index fefb3dcc..6e4a8c7b 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -483,21 +483,16 @@ pub fn fields( }; let value = if offset != 0 { let offset = &util::unsuffixed(offset); - quote! { - ((self.bits >> #offset) & #hexmask) #cast - } - } else if use_cast { - quote! { - (self.bits & #hexmask) #cast - } + quote! { (self.bits >> #offset) } + } else { + quote! { self.bits } + }; + let value = if use_mask && use_cast { + quote! { (#value & #hexmask) #cast } } else if use_mask { - quote! { - self.bits & #hexmask - } + quote! { #value & #hexmask } } else { - quote! { - self.bits - } + value }; // get a brief description for this field @@ -719,21 +714,16 @@ pub fn fields( let sub_offset = offset + (i as u64) * (increment as u64); let value = if sub_offset != 0 { let sub_offset = &util::unsuffixed(sub_offset); - quote! { - ((self.bits >> #sub_offset) & #hexmask) #cast - } - } else if use_cast { - quote! { - (self.bits & #hexmask) #cast - } + quote! { (self.bits >> #sub_offset) } + } else { + quote! { self.bits } + }; + let value = if use_mask && use_cast { + quote! { (#value & #hexmask) #cast } } else if use_mask { - quote! { - self.bits & #hexmask - } + quote! { #value & #hexmask } } else { - quote! { - self.bits - } + value }; let name_snake_case_n = util::replace_suffix(&f.name, &suffix) .to_snake_case_ident(Span::call_site()); @@ -963,7 +953,7 @@ pub fn fields( &description_with_bits(description_raw, sub_offset, width), &suffix, ); - let sub_offset = util::unsuffixed(sub_offset as u64); + let sub_offset = util::unsuffixed(sub_offset); w_impl_items.extend(quote! { #[doc = #doc] @@ -976,7 +966,7 @@ pub fn fields( } } else { let doc = description_with_bits(description_raw, offset, width); - let offset = util::unsuffixed(offset as u64); + let offset = util::unsuffixed(offset); w_impl_items.extend(quote! { #[doc = #doc] #inline @@ -1037,7 +1027,7 @@ impl Variant { .iter() // filter out all reserved variants, as we should not // generate code for them - .filter(|field| field.name.to_lowercase() != "reserved" && field.is_default == None) + .filter(|field| field.name.to_lowercase() != "reserved" && field.is_default.is_none()) .map(|ev| { let value = ev .value diff --git a/src/lib.rs b/src/lib.rs index ca309307..381b8a03 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -546,7 +546,7 @@ pub fn generate(input: &str, config: &Config) -> Result { let device = load_from(input, config)?; let mut device_x = String::new(); let items = - generate::device::render(&device, config, &mut device_x).or(Err(SvdError::Render))?; + generate::device::render(&device, config, &mut device_x).map_err(|_| SvdError::Render)?; let mut lib_rs = String::new(); writeln!( From 83b2ec2c4a4e47268364b7beacc89c4a7af52ea8 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 25 Oct 2022 13:40:48 +0300 Subject: [PATCH 033/319] enable exit_on_error --- CHANGELOG.md | 1 + src/main.rs | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index cc52b721..51ba9886 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- fix cli error with --help/version - Don't cast fields with width 17-31 and non-zero offset. ## [v0.27.0] - 2022-10-24 diff --git a/src/main.rs b/src/main.rs index 6dc2b74e..5c8633ec 100755 --- a/src/main.rs +++ b/src/main.rs @@ -18,7 +18,7 @@ fn parse_configs(app: Command) -> Result { use irx_config::parsers::{cmd, toml}; use irx_config::ConfigBuilder; let irxconfig = ConfigBuilder::default() - .append_parser(cmd::ParserBuilder::new(app).build()?) + .append_parser(cmd::ParserBuilder::new(app).exit_on_error(true).build()?) .append_parser( toml::ParserBuilder::default() .default_path("svd2rust.toml") From e688e9a4beda34a40968a8444a03dd437b02bc35 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 25 Oct 2022 19:35:18 +0300 Subject: [PATCH 034/319] release 0.27.1 --- CHANGELOG.md | 5 ++++- Cargo.toml | 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 51ba9886..b0db6836 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +## [v0.27.1] - 2022-10-25 + - fix cli error with --help/version - Don't cast fields with width 17-31 and non-zero offset. @@ -764,7 +766,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.27.0...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.27.1...HEAD +[v0.27.1]: https://github.com/rust-embedded/svd2rust/compare/v0.27.0...v0.27.1 [v0.27.0]: https://github.com/rust-embedded/svd2rust/compare/v0.26.0...v0.27.0 [v0.26.0]: https://github.com/rust-embedded/svd2rust/compare/v0.25.1...v0.26.0 [v0.25.1]: https://github.com/rust-embedded/svd2rust/compare/v0.25.0...v0.25.1 diff --git a/Cargo.toml b/Cargo.toml index ed09bd49..af3be6b6 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.27.0" +version = "0.27.1" readme = "README.md" rust-version = "1.60" From fac2c56be709856fcebe9206f0be4381ff5a2fd8 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 29 Oct 2022 11:08:25 +0300 Subject: [PATCH 035/319] simplify ci strategy --- .github/workflows/ci.yml | 54 +++++++++++++++++++--------------------- CHANGELOG.md | 2 ++ 2 files changed, 27 insertions(+), 29 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 5add5af5..a1b7b53b 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -46,39 +46,35 @@ jobs: needs: [check] strategy: matrix: - # All generated code should be running on stable now - rust: [stable] - - # All vendor files we want to test on stable - vendor: [Atmel, Freescale, Fujitsu, GD32, Holtek, Microchip, Nordic, Nuvoton, NXP, RISC-V, SiliconLabs, Spansion, STMicro, Toshiba] - # Options are all, none, strict and const - options: [all, none] - exclude: - - vendor: Fujitsu - options: all - - vendor: Spansion - options: all - - vendor: STMicro - options: all - - vendor: Nuvoton - options: all - - vendor: Microchip - options: all - - vendor: RISC-V - options: all include: + - { rust: stable, vendor: Atmel, options: all } + - { rust: stable, vendor: Atmel, options: none } + - { rust: stable, vendor: Freescale, options: all } + - { rust: stable, vendor: Freescale, options: none } + - { rust: stable, vendor: Fujitsu, options: none } + - { rust: stable, vendor: GD32, options: all } + - { rust: stable, vendor: GD32, options: none } + - { rust: stable, vendor: Holtek, options: all } + - { rust: stable, vendor: Holtek, options: none } + - { rust: stable, vendor: Microchip, options: none } + - { rust: stable, vendor: Nordic, options: all } + - { rust: stable, vendor: Nordic, options: none } + - { rust: stable, vendor: Nuvoton, options: none } + - { rust: stable, vendor: NXP, options: all } + - { rust: stable, vendor: NXP, options: none } + - { rust: stable, vendor: RISC-V, options: none } + - { rust: stable, vendor: SiliconLabs, options: all } + - { rust: stable, vendor: SiliconLabs, options: none } + - { rust: stable, vendor: Spansion, options: none } + - { rust: stable, vendor: STMicro, options: none } + - { rust: stable, vendor: Toshiba, options: all } + - { rust: stable, vendor: Toshiba, options: none } # Test MSRV - - rust: 1.60.0 - vendor: Nordic - - # Use nightly for architectures which don't support stable - - rust: nightly - vendor: OTHER - + - { rust: 1.60.0, vendor: Nordic, options: none } # Use nightly for architectures which don't support stable - - rust: nightly - vendor: Espressif + - { rust: nightly, vendor: OTHER, options: none } + - { rust: nightly, vendor: Espressif, options: none } steps: - uses: actions/checkout@v3 diff --git a/CHANGELOG.md b/CHANGELOG.md index b0db6836..cbeecf59 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- simplify ci strategy + ## [v0.27.1] - 2022-10-25 - fix cli error with --help/version From 58666b22f5838b35bfe26b7e06cccde648f9d898 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 29 Oct 2022 14:18:13 +0300 Subject: [PATCH 036/319] pass options directly --- .github/workflows/ci.yml | 36 ++++++++++++++++++------------------ ci/script.sh | 29 +++++------------------------ 2 files changed, 23 insertions(+), 42 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index a1b7b53b..cfb23573 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -49,32 +49,32 @@ jobs: # Options are all, none, strict and const include: - { rust: stable, vendor: Atmel, options: all } - - { rust: stable, vendor: Atmel, options: none } + - { rust: stable, vendor: Atmel, options: "" } - { rust: stable, vendor: Freescale, options: all } - - { rust: stable, vendor: Freescale, options: none } - - { rust: stable, vendor: Fujitsu, options: none } + - { rust: stable, vendor: Freescale, options: "" } + - { rust: stable, vendor: Fujitsu, options: "" } - { rust: stable, vendor: GD32, options: all } - - { rust: stable, vendor: GD32, options: none } + - { rust: stable, vendor: GD32, options: "" } - { rust: stable, vendor: Holtek, options: all } - - { rust: stable, vendor: Holtek, options: none } - - { rust: stable, vendor: Microchip, options: none } + - { rust: stable, vendor: Holtek, options: "" } + - { rust: stable, vendor: Microchip, options: "" } - { rust: stable, vendor: Nordic, options: all } - - { rust: stable, vendor: Nordic, options: none } - - { rust: stable, vendor: Nuvoton, options: none } + - { rust: stable, vendor: Nordic, options: "" } + - { rust: stable, vendor: Nuvoton, options: "" } - { rust: stable, vendor: NXP, options: all } - - { rust: stable, vendor: NXP, options: none } - - { rust: stable, vendor: RISC-V, options: none } + - { rust: stable, vendor: NXP, options: "" } + - { rust: stable, vendor: RISC-V, options: "" } - { rust: stable, vendor: SiliconLabs, options: all } - - { rust: stable, vendor: SiliconLabs, options: none } - - { rust: stable, vendor: Spansion, options: none } - - { rust: stable, vendor: STMicro, options: none } + - { rust: stable, vendor: SiliconLabs, options: "" } + - { rust: stable, vendor: Spansion, options: "" } + - { rust: stable, vendor: STMicro, options: "" } - { rust: stable, vendor: Toshiba, options: all } - - { rust: stable, vendor: Toshiba, options: none } + - { rust: stable, vendor: Toshiba, options: "" } # Test MSRV - - { rust: 1.60.0, vendor: Nordic, options: none } + - { rust: 1.60.0, vendor: Nordic, options: "" } # Use nightly for architectures which don't support stable - - { rust: nightly, vendor: OTHER, options: none } - - { rust: nightly, vendor: Espressif, options: none } + - { rust: nightly, vendor: OTHER, options: "" } + - { rust: nightly, vendor: Espressif, options: "" } steps: - uses: actions/checkout@v3 @@ -121,7 +121,7 @@ jobs: - name: Run CI script env: VENDOR: RISC-V - OPTIONS: all + OPTIONS: "" COMMAND: clippy run: bash ci/script.sh diff --git a/ci/script.sh b/ci/script.sh index 351ba907..b7753c8a 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -9,7 +9,7 @@ test_svd() { # NOTE we care about errors in svd2rust, but not about errors / warnings in rustfmt pushd $td - RUST_BACKTRACE=1 svd2rust $strict $const_generic $derive_more -i ${1}.svd + RUST_BACKTRACE=1 svd2rust $options -i ${1}.svd mv lib.rs src/lib.rs @@ -23,7 +23,7 @@ test_svd_for_target() { # NOTE we care about errors in svd2rust, but not about errors / warnings in rustfmt pushd $td - RUST_BACKTRACE=1 svd2rust --target $1 -i input.svd + RUST_BACKTRACE=1 svd2rust $options --target $1 -i input.svd mv lib.rs src/lib.rs @@ -41,29 +41,10 @@ main() { case $OPTIONS in all) - const_generic="--const_generic" - strict="--strict" - derive_more="--derive_more" - ;; - strict) - const_generic="" - strict="--strict" - derive_more="" - ;; - const) - const_generic="--const_generic" - strict="" - derive_more="" - ;; - derive_more) - const_generic="" - strict="" - derive_more="--derive_more" + options="--const_generic --strict --derive_more" ;; *) - const_generic="" - strict="" - derive_more="" + options=$OPTIONS ;; esac @@ -72,7 +53,7 @@ main() { echo 'cortex-m = "0.7.4"' >> $td/Cargo.toml echo 'cortex-m-rt = "0.7.1"' >> $td/Cargo.toml echo 'vcell = "0.1.3"' >> $td/Cargo.toml - if [ $derive_more ]; then + if [[ "$options" == *"--derive_more"* ]]; then echo 'derive_more = "0.99"' >> $td/Cargo.toml fi echo '[profile.dev]' >> $td/Cargo.toml From e0e886d3380b757a5160bc60b72d39e38f2e37d0 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 22 Oct 2022 11:13:26 +0300 Subject: [PATCH 037/319] test patched STM32 --- .github/workflows/ci.yml | 1 + CHANGELOG.md | 1 + ci/script.sh | 35 +++++++++++++++++++++++++++++++++++ 3 files changed, 37 insertions(+) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index cfb23573..b9cf39aa 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -68,6 +68,7 @@ jobs: - { rust: stable, vendor: SiliconLabs, options: "" } - { rust: stable, vendor: Spansion, options: "" } - { rust: stable, vendor: STMicro, options: "" } + - { rust: stable, vendor: STM32-patched, options: "--strict --const_generic --derive_more --pascal_enum_values --max_cluster_size" } - { rust: stable, vendor: Toshiba, options: all } - { rust: stable, vendor: Toshiba, options: "" } # Test MSRV diff --git a/CHANGELOG.md b/CHANGELOG.md index cbeecf59..2f145e87 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- Test patched STM32 - simplify ci strategy ## [v0.27.1] - 2022-10-25 diff --git a/ci/script.sh b/ci/script.sh index b7753c8a..67410d3d 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -18,6 +18,22 @@ test_svd() { cargo $COMMAND --manifest-path $td/Cargo.toml } +test_patched_stm32() { + ( + cd $td && curl -L https://stm32-rs.github.io/stm32-rs/${1}.svd.patched -o ${1}.svd + ) + + # NOTE we care about errors in svd2rust, but not about errors / warnings in rustfmt + pushd $td + RUST_BACKTRACE=1 svd2rust $options -i ${1}.svd + + mv lib.rs src/lib.rs + + popd + + cargo $COMMAND --manifest-path $td/Cargo.toml +} + test_svd_for_target() { curl -L --output $td/input.svd $2 @@ -558,6 +574,25 @@ main() { # test_svd STM32L063x ;; + STM32-patched) + # OK + test_patched_stm32 stm32f0x2 + test_patched_stm32 stm32f103 + test_patched_stm32 stm32f411 + test_patched_stm32 stm32f469 + test_patched_stm32 stm32f7x3 + test_patched_stm32 stm32g070 + test_patched_stm32 stm32g473 + test_patched_stm32 stm32h743 + test_patched_stm32 stm32l0x3 + test_patched_stm32 stm32l162 + test_patched_stm32 stm32l4x6 + test_patched_stm32 stm32l562 + test_patched_stm32 stm32mp157 + test_patched_stm32 stm32wb55 + test_patched_stm32 stm32wle5 + ;; + Toshiba) # BAD-SVD resetValue is bigger than the register size # test_svd M365 From 9235c84390f0d057debf9dd60380863b4bcd020e Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 29 Oct 2022 17:29:28 +0300 Subject: [PATCH 038/319] simplify test_svd --- ci/script.sh | 32 +++----------------------------- 1 file changed, 3 insertions(+), 29 deletions(-) diff --git a/ci/script.sh b/ci/script.sh index 67410d3d..638a6820 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -1,37 +1,11 @@ set -euxo pipefail test_svd() { - ( - cd $td && - curl -LO \ - https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/$VENDOR/${1}.svd - ) - - # NOTE we care about errors in svd2rust, but not about errors / warnings in rustfmt - pushd $td - RUST_BACKTRACE=1 svd2rust $options -i ${1}.svd - - mv lib.rs src/lib.rs - - popd - - cargo $COMMAND --manifest-path $td/Cargo.toml + test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/$VENDOR/${1}.svd } test_patched_stm32() { - ( - cd $td && curl -L https://stm32-rs.github.io/stm32-rs/${1}.svd.patched -o ${1}.svd - ) - - # NOTE we care about errors in svd2rust, but not about errors / warnings in rustfmt - pushd $td - RUST_BACKTRACE=1 svd2rust $options -i ${1}.svd - - mv lib.rs src/lib.rs - - popd - - cargo $COMMAND --manifest-path $td/Cargo.toml + test_svd_for_target cortex-m https://stm32-rs.github.io/stm32-rs/${1}.svd.patched } test_svd_for_target() { @@ -39,7 +13,7 @@ test_svd_for_target() { # NOTE we care about errors in svd2rust, but not about errors / warnings in rustfmt pushd $td - RUST_BACKTRACE=1 svd2rust $options --target $1 -i input.svd + RUST_BACKTRACE=1 svd2rust $options --target $1 --source_type xml -i input.svd mv lib.rs src/lib.rs From 33f91d0b5fd4ac9d9aa03c4b7c367417130e3010 Mon Sep 17 00:00:00 2001 From: YuhanLiin Date: Thu, 27 Oct 2022 00:28:23 -0400 Subject: [PATCH 039/319] Fix generated code for MSP430 atomics Update CHANGELOG Run MSP430FR2355 in CI with nightly flag Replace msp430-atomic with portable-atomic Stop using alternate targets in CI and use portable-atomic in CI script Update MSP430 deps and use portable-atomic in svd2rust-regress --- .github/workflows/ci.yml | 2 +- CHANGELOG.md | 3 +- ci/script.sh | 10 +++-- ci/svd2rust-regress/src/svd_test.rs | 4 +- src/generate/generic_msp430_atomic.rs | 64 ++++++++++++++++++++++----- src/lib.rs | 10 ++--- 6 files changed, 69 insertions(+), 24 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index b9cf39aa..52053ac5 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -74,7 +74,7 @@ jobs: # Test MSRV - { rust: 1.60.0, vendor: Nordic, options: "" } # Use nightly for architectures which don't support stable - - { rust: nightly, vendor: OTHER, options: "" } + - { rust: nightly, vendor: MSP430, options: "--nightly" } - { rust: nightly, vendor: Espressif, options: "" } steps: diff --git a/CHANGELOG.md b/CHANGELOG.md index 2f145e87..7b620b94 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -12,8 +12,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [v0.27.1] - 2022-10-25 -- fix cli error with --help/version +- Fix cli error with --help/version - Don't cast fields with width 17-31 and non-zero offset. +- Fix generated code for MSP430 atomics ## [v0.27.0] - 2022-10-24 diff --git a/ci/script.sh b/ci/script.sh index 638a6820..4dcb8178 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -460,13 +460,17 @@ main() { # test_svd LPC5410x_v0.4 ;; - # test other targets (architectures) - OTHER) + # MSP430 + MSP430) echo '[dependencies.msp430]' >> $td/Cargo.toml - echo 'version = "0.3.0"' >> $td/Cargo.toml + echo 'version = "0.4.0"' >> $td/Cargo.toml + + echo '[dependencies.portable-atomic]' >> $td/Cargo.toml + echo 'version = "0.3.15"' >> $td/Cargo.toml # Test MSP430 test_svd_for_target msp430 https://raw.githubusercontent.com/pftbest/msp430g2553/v0.3.0-svd/msp430g2553.svd + test_svd_for_target msp430 https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/rt-up/msp430fr2355.svd ;; # Community-provided RISC-V SVDs diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index f20d4b75..b82ca4f4 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -6,8 +6,8 @@ use std::path::PathBuf; use std::process::{Command, Output}; const CRATES_ALL: &[&str] = &["critical-section = \"1.0\"", "vcell = \"0.1.2\""]; -const CRATES_MSP430: &[&str] = &["msp430 = \"0.2.2\"", "msp430-rt = \"0.2.0\""]; -const CRATES_MSP430_NIGHTLY: &[&str] = &["msp430-atomic = \"0.1.2\""]; +const CRATES_MSP430: &[&str] = &["msp430 = \"0.4.0\"", "msp430-rt = \"0.4.0\""]; +const CRATES_MSP430_NIGHTLY: &[&str] = &["portable-atomic = \"0.3.15\""]; const CRATES_CORTEX_M: &[&str] = &["cortex-m = \"0.7.6\"", "cortex-m-rt = \"0.6.13\""]; const CRATES_RISCV: &[&str] = &["riscv = \"0.9.0\"", "riscv-rt = \"0.9.0\""]; const CRATES_XTENSALX: &[&str] = &["xtensa-lx-rt = \"0.9.0\"", "xtensa-lx = \"0.6.0\""]; diff --git a/src/generate/generic_msp430_atomic.rs b/src/generate/generic_msp430_atomic.rs index cf2b6874..12e9e87d 100644 --- a/src/generate/generic_msp430_atomic.rs +++ b/src/generate/generic_msp430_atomic.rs @@ -1,51 +1,91 @@ -use msp430_atomic::AtomicOperations; +mod atomic { + use portable_atomic::{AtomicU16, AtomicU8, Ordering}; -impl Reg + pub trait AtomicOperations { + unsafe fn atomic_or(ptr: *mut Self, val: Self); + unsafe fn atomic_and(ptr: *mut Self, val: Self); + unsafe fn atomic_xor(ptr: *mut Self, val: Self); + } + + macro_rules! impl_atomics { + ($U:ty, $Atomic:ty) => { + impl AtomicOperations for $U { + unsafe fn atomic_or(ptr: *mut Self, val: Self) { + (*(ptr as *const $Atomic)).fetch_or(val, Ordering::SeqCst); + } + + unsafe fn atomic_and(ptr: *mut Self, val: Self) { + (*(ptr as *const $Atomic)).fetch_and(val, Ordering::SeqCst); + } + + unsafe fn atomic_xor(ptr: *mut Self, val: Self) { + (*(ptr as *const $Atomic)).fetch_xor(val, Ordering::SeqCst); + } + } + }; + } + impl_atomics!(u8, AtomicU8); + impl_atomics!(u16, AtomicU16); +} +use atomic::AtomicOperations; + +impl Reg where - Self: Readable + Writable, REG::Ux: AtomicOperations + Default + core::ops::Not, { /// Set high every bit in the register that was set in the write proxy. Leave other bits /// untouched. The write is done in a single atomic instruction. + /// + /// # Safety + /// + /// The resultant bit pattern may not be valid for the register. #[inline(always)] pub unsafe fn set_bits(&self, f: F) where - F: FnOnce(&mut W) -> &mut W, + F: FnOnce(&mut REG::Writer) -> &mut W, { - let bits = f(&mut W { + let bits = f(&mut REG::Writer::from(W { bits: Default::default(), _reg: marker::PhantomData, - }) + })) .bits; REG::Ux::atomic_or(self.register.as_ptr(), bits); } /// Clear every bit in the register that was cleared in the write proxy. Leave other bits /// untouched. The write is done in a single atomic instruction. + /// + /// # Safety + /// + /// The resultant bit pattern may not be valid for the register. #[inline(always)] pub unsafe fn clear_bits(&self, f: F) where - F: FnOnce(&mut W) -> &mut W, + F: FnOnce(&mut REG::Writer) -> &mut W, { - let bits = f(&mut W { + let bits = f(&mut REG::Writer::from(W { bits: !REG::Ux::default(), _reg: marker::PhantomData, - }) + })) .bits; REG::Ux::atomic_and(self.register.as_ptr(), bits); } /// Toggle every bit in the register that was set in the write proxy. Leave other bits /// untouched. The write is done in a single atomic instruction. + /// + /// # Safety + /// + /// The resultant bit pattern may not be valid for the register. #[inline(always)] pub unsafe fn toggle_bits(&self, f: F) where - F: FnOnce(&mut W) -> &mut W, + F: FnOnce(&mut REG::Writer) -> &mut W, { - let bits = f(&mut W { + let bits = f(&mut REG::Writer::from(W { bits: Default::default(), _reg: marker::PhantomData, - }) + })) .bits; REG::Ux::atomic_xor(self.register.as_ptr(), bits); } diff --git a/src/lib.rs b/src/lib.rs index 381b8a03..6b7f9142 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -122,7 +122,7 @@ //! - [`msp430-rt`](https://crates.io/crates/msp430-rt) v0.4.x //! - [`vcell`](https://crates.io/crates/vcell) v0.1.x //! -//! If the `--nightly` flag is provided to `svd2rust`, then `msp430-atomic` v0.1.4 is also needed. +//! If the `--nightly` flag is provided to `svd2rust`, then `portable-atomic` v0.3.15 is also needed. //! Furthermore the "device" feature of `msp430-rt` must be enabled when the `rt` feature is //! enabled. The `Cargo.toml` of the device crate will look like this: //! @@ -130,13 +130,13 @@ //! [dependencies] //! critical-section = { version = "1.0", optional = true } //! msp430 = "0.4.0" -//! msp430-atomic = "0.1.4" # Only when using the --nightly flag +//! portable-atomic = "0.3.15" # Only when using the --nightly flag //! msp430-rt = { version = "0.4.0", optional = true } //! vcell = "0.1.0" //! //! [features] //! rt = ["msp430-rt/device"] -//! unstable = ["msp430-atomic"] +//! unstable = ["portable-atomic"] //! ``` //! //! ## Other targets @@ -504,8 +504,8 @@ //! ```ignore //! // These can be called from different contexts even though they are modifying the same register //! P1.p1out.set_bits(|w| unsafe { w.bits(1 << 1) }); -//! P1.p1out.clear(|w| unsafe { w.bits(!(1 << 2)) }); -//! P1.p1out.toggle(|w| unsafe { w.bits(1 << 4) }); +//! P1.p1out.clear_bits(|w| unsafe { w.bits(!(1 << 2)) }); +//! P1.p1out.toggle_bits(|w| unsafe { w.bits(1 << 4) }); //! ``` #![recursion_limit = "128"] From 665cfcc1273ee97f613d75bd4251a55f3cd141dd Mon Sep 17 00:00:00 2001 From: YuhanLiin Date: Sat, 29 Oct 2022 15:19:30 -0400 Subject: [PATCH 040/319] Add MSP430 CI test with no flags --- .github/workflows/ci.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 52053ac5..586a8a83 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -75,6 +75,7 @@ jobs: - { rust: 1.60.0, vendor: Nordic, options: "" } # Use nightly for architectures which don't support stable - { rust: nightly, vendor: MSP430, options: "--nightly" } + - { rust: nightly, vendor: MSP430, options: "" } - { rust: nightly, vendor: Espressif, options: "" } steps: From adda4aa57ed8d5824ab978c5e4d02c520955e196 Mon Sep 17 00:00:00 2001 From: YuhanLiin Date: Sat, 29 Oct 2022 15:34:04 -0400 Subject: [PATCH 041/319] Fix SVD link --- ci/script.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ci/script.sh b/ci/script.sh index 4dcb8178..5b19943b 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -470,7 +470,7 @@ main() { # Test MSP430 test_svd_for_target msp430 https://raw.githubusercontent.com/pftbest/msp430g2553/v0.3.0-svd/msp430g2553.svd - test_svd_for_target msp430 https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/rt-up/msp430fr2355.svd + test_svd_for_target msp430 https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/master/msp430fr2355.svd ;; # Community-provided RISC-V SVDs From fb45e06ac5df5f4f9a90d7bdfc6f93f4e195e58a Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 30 Oct 2022 08:40:22 +0300 Subject: [PATCH 042/319] include_str --- CHANGELOG.md | 2 +- src/generate/device.rs | 10 +++------- 2 files changed, 4 insertions(+), 8 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 7b620b94..4db80703 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -9,12 +9,12 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - Test patched STM32 - simplify ci strategy +- Fix generated code for MSP430 atomics ## [v0.27.1] - 2022-10-25 - Fix cli error with --help/version - Don't cast fields with width 17-31 and non-zero offset. -- Fix generated code for MSP430 atomics ## [v0.27.0] - 2022-10-24 diff --git a/src/generate/device.rs b/src/generate/device.rs index 4065f4b9..569b1117 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -146,17 +146,16 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Result Date: Sun, 30 Oct 2022 08:50:28 +0300 Subject: [PATCH 043/319] to_tokens --- src/generate/device.rs | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/src/generate/device.rs b/src/generate/device.rs index 569b1117..aa5601bb 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -170,12 +170,10 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Date: Tue, 4 Oct 2022 16:58:57 +0300 Subject: [PATCH 044/319] derive_from_base --- CHANGELOG.md | 1 + src/generate/register.rs | 181 ++++++++++++++++++--------------------- 2 files changed, 83 insertions(+), 99 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 7b620b94..ecde92da 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- `fields` fn refactoring - Test patched STM32 - simplify ci strategy diff --git a/src/generate/register.rs b/src/generate/register.rs index 6e4a8c7b..a2c16420 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -56,7 +56,7 @@ pub fn render( pub use #mod_derived as #name_snake_case; }) } else { - let name_constant_case_spec = format!("{name}_SPEC").to_constant_case_ident(span); + let regspec_ident = format!("{name}_SPEC").to_constant_case_ident(span); let access = util::access_of(®ister.properties, register.fields.as_deref()); let accs = if access.can_read() && access.can_write() { "rw" @@ -67,13 +67,12 @@ pub fn render( } else { return Err(anyhow!("Incorrect access of register {}", register.name)); }; - let alias_doc = format!( - "{name} ({accs}) register accessor: an alias for `Reg<{name_constant_case_spec}>`" - ); + let alias_doc = + format!("{name} ({accs}) register accessor: an alias for `Reg<{regspec_ident}>`"); let mut out = TokenStream::new(); out.extend(quote! { #[doc = #alias_doc] - pub type #name_constant_case = crate::Reg<#name_snake_case::#name_constant_case_spec>; + pub type #name_constant_case = crate::Reg<#name_snake_case::#regspec_ident>; }); let mod_items = render_register_mod( register, @@ -104,7 +103,7 @@ pub fn render_register_mod( let properties = ®ister.properties; let name = util::name_of(register, config.ignore_groups); let span = Span::call_site(); - let name_constant_case_spec = format!("{name}_SPEC").to_constant_case_ident(span); + let regspec_ident = format!("{name}_SPEC").to_constant_case_ident(span); let name_snake_case = name.to_snake_case_ident(span); let rsize = properties .size @@ -126,8 +125,6 @@ pub fn render_register_mod( ); let mut mod_items = TokenStream::new(); - let mut r_impl_items = TokenStream::new(); - let mut w_impl_items = TokenStream::new(); let mut methods = vec![]; let can_read = access.can_read(); @@ -144,13 +141,13 @@ pub fn render_register_mod( mod_items.extend(quote! { #[doc = #desc] #derive - pub struct R(crate::R<#name_constant_case_spec>); + pub struct R(crate::R<#regspec_ident>); }); if !config.derive_more { mod_items.extend(quote! { impl core::ops::Deref for R { - type Target = crate::R<#name_constant_case_spec>; + type Target = crate::R<#regspec_ident>; #[inline(always)] fn deref(&self) -> &Self::Target { @@ -158,9 +155,9 @@ pub fn render_register_mod( } } - impl From> for R { + impl From> for R { #[inline(always)] - fn from(reader: crate::R<#name_constant_case_spec>) -> Self { + fn from(reader: crate::R<#regspec_ident>) -> Self { R(reader) } } @@ -179,13 +176,13 @@ pub fn render_register_mod( mod_items.extend(quote! { #[doc = #desc] #derive - pub struct W(crate::W<#name_constant_case_spec>); + pub struct W(crate::W<#regspec_ident>); }); if !config.derive_more { mod_items.extend(quote! { impl core::ops::Deref for W { - type Target = crate::W<#name_constant_case_spec>; + type Target = crate::W<#regspec_ident>; #[inline(always)] fn deref(&self) -> &Self::Target { @@ -200,9 +197,9 @@ pub fn render_register_mod( } } - impl From> for W { + impl From> for W { #[inline(always)] - fn from(writer: crate::W<#name_constant_case_spec>) -> Self { + fn from(writer: crate::W<#regspec_ident>) -> Self { W(writer) } } @@ -219,8 +216,10 @@ pub fn render_register_mod( methods.push("modify"); } - let mut zero_to_modify_fields_bitmap: u64 = 0; - let mut one_to_modify_fields_bitmap: u64 = 0; + let mut r_impl_items = TokenStream::new(); + let mut w_impl_items = TokenStream::new(); + let mut zero_to_modify_fields_bitmap = 0; + let mut one_to_modify_fields_bitmap = 0; if let Some(cur_fields) = register.fields.as_ref() { // filter out all reserved fields, as we should not generate code for @@ -231,20 +230,21 @@ pub fn render_register_mod( .collect(); if !cur_fields.is_empty() { - fields( + ( + r_impl_items, + w_impl_items, + zero_to_modify_fields_bitmap, + one_to_modify_fields_bitmap, + ) = fields( cur_fields, - register, - path, - index, - &name_constant_case_spec, + ®spec_ident, &rty, + register.modified_write_values, access, properties, &mut mod_items, - &mut r_impl_items, - &mut w_impl_items, - &mut zero_to_modify_fields_bitmap, - &mut one_to_modify_fields_bitmap, + path, + index, config, )?; } @@ -329,9 +329,9 @@ pub fn render_register_mod( mod_items.extend(quote! { #[doc = #doc] - pub struct #name_constant_case_spec; + pub struct #regspec_ident; - impl crate::RegisterSpec for #name_constant_case_spec { + impl crate::RegisterSpec for #regspec_ident { type Ux = #rty; } }); @@ -340,7 +340,7 @@ pub fn render_register_mod( let doc = format!("`read()` method returns [{name_snake_case}::R](R) reader structure",); mod_items.extend(quote! { #[doc = #doc] - impl crate::Readable for #name_constant_case_spec { + impl crate::Readable for #regspec_ident { type Reader = R; } }); @@ -354,7 +354,7 @@ pub fn render_register_mod( mod_items.extend(quote! { #[doc = #doc] - impl crate::Writable for #name_constant_case_spec { + impl crate::Writable for #regspec_ident { type Writer = W; const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = #zero_to_modify_fields_bitmap; const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = #one_to_modify_fields_bitmap; @@ -365,7 +365,7 @@ pub fn render_register_mod( let doc = format!("`reset()` method sets {} to value {rv}", register.name); mod_items.extend(quote! { #[doc = #doc] - impl crate::Resettable for #name_constant_case_spec { + impl crate::Resettable for #regspec_ident { const RESET_VALUE: Self::Ux = #rv; } }); @@ -376,20 +376,20 @@ pub fn render_register_mod( #[allow(clippy::too_many_arguments)] pub fn fields( mut fields: Vec<&Field>, - register: &Register, - rpath: &RegisterPath, - index: &Index, - name_constant_case_spec: &Ident, + regspec_ident: &Ident, rty: &Ident, + rmwv: Option, access: Access, properties: &RegisterProperties, mod_items: &mut TokenStream, - r_impl_items: &mut TokenStream, - w_impl_items: &mut TokenStream, - zero_to_modify_fields_bitmap: &mut u64, - one_to_modify_fields_bitmap: &mut u64, + rpath: &RegisterPath, + index: &Index, config: &Config, -) -> Result<()> { +) -> Result<(TokenStream, TokenStream, u64, u64)> { + let mut r_impl_items = TokenStream::new(); + let mut w_impl_items = TokenStream::new(); + let mut zero_to_modify_fields_bitmap = 0u64; + let mut one_to_modify_fields_bitmap = 0u64; let span = Span::call_site(); let can_read = access.can_read(); let can_write = access.can_write(); @@ -666,14 +666,11 @@ pub fn fields( let base_field = util::replace_suffix(&base.field.name, ""); let base_r = (base_field + "_R").to_constant_case_ident(span); if !reader_derives.contains(&reader_ty) { - derive_from_base( - mod_items, - base, - &fpath, - &reader_ty, - &base_r, - &field_reader_brief, - )?; + let base_path = base_syn_path(base, &fpath, &base_r)?; + mod_items.extend(quote! { + #[doc = #field_reader_brief] + pub use #base_path as #reader_ty; + }); reader_derives.insert(reader_ty.clone()); } // only pub use enum when base.register != None. if base.register == None, it emits @@ -681,14 +678,11 @@ pub fn fields( if base.register() != fpath.register() { // use the same enum structure name if !enum_derives.contains(&value_read_ty) { - derive_from_base( - mod_items, - base, - &fpath, - &value_read_ty, - &value_read_ty, - &description, - )?; + let base_path = base_syn_path(base, &fpath, &value_read_ty)?; + mod_items.extend(quote! { + #[doc = #description] + pub use #base_path as #value_read_ty; + }); enum_derives.insert(value_read_ty.clone()); } } @@ -763,10 +757,7 @@ pub fn fields( // If this field can be written, generate write proxy. Generate write value if it differs from // the read value, or else we reuse read value. if can_write { - let mwv = f - .modified_write_values - .or(register.modified_write_values) - .unwrap_or_default(); + let mwv = f.modified_write_values.or(rmwv).unwrap_or_default(); // gets a brief of write proxy let field_writer_brief = format!("Field `{name}{brief_suffix}` writer - {description}"); @@ -864,7 +855,7 @@ pub fn fields( }, span, ); - quote! { crate::#wproxy<'a, #rty, #name_constant_case_spec, #value_write_ty, O> } + quote! { crate::#wproxy<'a, #rty, #regspec_ident, #value_write_ty, O> } } else { let wproxy = Ident::new( if unsafety { @@ -875,7 +866,7 @@ pub fn fields( span, ); let width = &util::unsuffixed(width as _); - quote! { crate::#wproxy<'a, #rty, #name_constant_case_spec, #fty, #value_write_ty, #width, O> } + quote! { crate::#wproxy<'a, #rty, #regspec_ident, #fty, #value_write_ty, #width, O> } }; mod_items.extend(quote! { #[doc = #field_writer_brief] @@ -899,14 +890,11 @@ pub fn fields( if writer_reader_different_enum { // use the same enum structure name if !writer_enum_derives.contains(&value_write_ty) { - derive_from_base( - mod_items, - base, - &fpath, - &value_write_ty, - &value_write_ty, - &description, - )?; + let base_path = base_syn_path(base, &fpath, &value_write_ty)?; + mod_items.extend(quote! { + #[doc = #description] + pub use #base_path as #value_write_ty; + }); writer_enum_derives.insert(value_write_ty.clone()); } } @@ -920,14 +908,11 @@ pub fn fields( let base_field = util::replace_suffix(&base.field.name, ""); let base_w = (base_field + "_W").to_constant_case_ident(span); if !writer_derives.contains(&writer_ty) { - derive_from_base( - mod_items, - base, - &fpath, - &writer_ty, - &base_w, - &field_writer_brief, - )?; + let base_path = base_syn_path(base, &fpath, &base_w)?; + mod_items.extend(quote! { + #[doc = #field_writer_brief] + pub use #base_path as #writer_ty; + }); writer_derives.insert(writer_ty.clone()); } } @@ -981,16 +966,21 @@ pub fn fields( match mwv { Modify | Set | Clear => {} OneToSet | OneToClear | OneToToggle => { - *one_to_modify_fields_bitmap |= bitmask; + one_to_modify_fields_bitmap |= bitmask; } ZeroToClear | ZeroToSet | ZeroToToggle => { - *zero_to_modify_fields_bitmap |= bitmask; + zero_to_modify_fields_bitmap |= bitmask; } } } } - Ok(()) + Ok(( + r_impl_items, + w_impl_items, + zero_to_modify_fields_bitmap, + one_to_modify_fields_bitmap, + )) } fn unsafety(write_constraint: Option<&WriteConstraint>, width: u32) -> bool { @@ -1180,33 +1170,26 @@ fn description_with_bits(description: &str, offset: u64, width: u32) -> String { res } -fn derive_from_base( - mod_items: &mut TokenStream, +fn base_syn_path( base: &EnumPath, - field: &FieldPath, - pc: &Ident, - base_pc: &Ident, - desc: &str, -) -> Result<(), syn::Error> { + fpath: &FieldPath, + base_ident: &Ident, +) -> Result { let span = Span::call_site(); - let path = if base.register() == field.register() { - ident_to_path(base_pc.clone()) - } else if base.register().block == field.register().block { + let path = if base.register() == fpath.register() { + ident_to_path(base_ident.clone()) + } else if base.register().block == fpath.register().block { let mut segments = Punctuated::new(); segments.push(path_segment(Ident::new("super", span))); segments.push(path_segment(base.register().name.to_snake_case_ident(span))); - segments.push(path_segment(base_pc.clone())); + segments.push(path_segment(base_ident.clone())); type_path(segments) } else { let mut rmod_ = crate::util::register_path_to_ty(base.register(), span); - rmod_.path.segments.push(path_segment(base_pc.clone())); + rmod_.path.segments.push(path_segment(base_ident.clone())); rmod_ }; - mod_items.extend(quote! { - #[doc = #desc] - pub use #path as #pc; - }); - Ok(()) + Ok(path) } fn lookup_filter( From 0ab43f0563448d419f459bdde77d05b680573737 Mon Sep 17 00:00:00 2001 From: YuhanLiin Date: Mon, 31 Oct 2022 23:42:43 -0400 Subject: [PATCH 045/319] Enable atomic API generation outside MSP430 --- src/generate/device.rs | 10 +++++----- .../{generic_msp430_atomic.rs => generic_atomic.rs} | 0 2 files changed, 5 insertions(+), 5 deletions(-) rename src/generate/{generic_msp430_atomic.rs => generic_atomic.rs} (100%) diff --git a/src/generate/device.rs b/src/generate/device.rs index aa5601bb..0545b30c 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -147,13 +147,13 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Result Date: Mon, 31 Oct 2022 23:47:22 -0400 Subject: [PATCH 046/319] Update docs --- src/lib.rs | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index 6b7f9142..9099d1d6 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -122,21 +122,18 @@ //! - [`msp430-rt`](https://crates.io/crates/msp430-rt) v0.4.x //! - [`vcell`](https://crates.io/crates/vcell) v0.1.x //! -//! If the `--nightly` flag is provided to `svd2rust`, then `portable-atomic` v0.3.15 is also needed. -//! Furthermore the "device" feature of `msp430-rt` must be enabled when the `rt` feature is +//! The "device" feature of `msp430-rt` must be enabled when the `rt` feature is //! enabled. The `Cargo.toml` of the device crate will look like this: //! //! ``` toml //! [dependencies] //! critical-section = { version = "1.0", optional = true } //! msp430 = "0.4.0" -//! portable-atomic = "0.3.15" # Only when using the --nightly flag //! msp430-rt = { version = "0.4.0", optional = true } //! vcell = "0.1.0" //! //! [features] //! rt = ["msp430-rt/device"] -//! unstable = ["portable-atomic"] //! ``` //! //! ## Other targets @@ -492,13 +489,16 @@ //! The `--nightly` flag can be passed to `svd2rust` to enable features in the generated api that are only available to a nightly //! compiler. The following features are gated by the `--nightly` flag: //! -//! ### MSP430 +//! ### Atomics //! //! Extends the register API with operations to atomically set, clear, and toggle specific bits. //! The atomic operations allow limited modification of register bits without read-modify-write //! sequences. As such, they can be concurrently called on different bits in the same register //! without data races. //! +//! `portable-atomic` v0.3.15 must be added to the dependencies, with default features off if +//! possible to disable the `fallback` feature. +//! //! Usage examples: //! //! ```ignore From 9389237065d4d1f7ed4e0246ae7600923e890606 Mon Sep 17 00:00:00 2001 From: YuhanLiin Date: Mon, 31 Oct 2022 23:53:56 -0400 Subject: [PATCH 047/319] Modify svd2rust-regress with nightly changes --- ci/svd2rust-regress/src/svd_test.rs | 8 +++----- ci/svd2rust-regress/src/tests.rs | 2 +- 2 files changed, 4 insertions(+), 6 deletions(-) diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index b82ca4f4..d398314d 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -7,7 +7,8 @@ use std::process::{Command, Output}; const CRATES_ALL: &[&str] = &["critical-section = \"1.0\"", "vcell = \"0.1.2\""]; const CRATES_MSP430: &[&str] = &["msp430 = \"0.4.0\"", "msp430-rt = \"0.4.0\""]; -const CRATES_MSP430_NIGHTLY: &[&str] = &["portable-atomic = \"0.3.15\""]; +const CRATES_NIGHTLY: &[&str] = + &["portable-atomic = { version = \"0.3.15\", default-features = false }"]; const CRATES_CORTEX_M: &[&str] = &["cortex-m = \"0.7.6\"", "cortex-m-rt = \"0.6.13\""]; const CRATES_RISCV: &[&str] = &["riscv = \"0.9.0\"", "riscv-rt = \"0.9.0\""]; const CRATES_XTENSALX: &[&str] = &["xtensa-lx-rt = \"0.9.0\"", "xtensa-lx = \"0.6.0\""]; @@ -137,10 +138,7 @@ pub fn test( XtensaLX => CRATES_XTENSALX.iter(), }) .chain(if nightly { - match &t.arch { - Msp430 => CRATES_MSP430_NIGHTLY.iter(), - _ => [].iter(), - } + CRATES_NIGHTLY.iter() } else { [].iter() }) diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index 58fce01a..ed73e42c 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -4195,7 +4195,7 @@ pub const TESTS: &[&TestCase] = &[ mfgr: TexasInstruments, chip: "msp430fr2355", svd_url: Some( - "https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/rt-up/msp430fr2355.svd", + "https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/master/msp430fr2355.svd", ), should_pass: true, run_when: Always, From bbc3ce6777ec71bac64251709e466d04e8782f8a Mon Sep 17 00:00:00 2001 From: YuhanLiin Date: Tue, 1 Nov 2022 00:15:45 -0400 Subject: [PATCH 048/319] Add nightly tests to every chip in CI --- .github/workflows/ci.yml | 9 ++++++++- ci/script.sh | 8 ++++---- 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 586a8a83..cdad59d2 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -53,22 +53,28 @@ jobs: - { rust: stable, vendor: Freescale, options: all } - { rust: stable, vendor: Freescale, options: "" } - { rust: stable, vendor: Fujitsu, options: "" } + - { rust: stable, vendor: Fujitsu, options: "--nightly" } - { rust: stable, vendor: GD32, options: all } - { rust: stable, vendor: GD32, options: "" } - { rust: stable, vendor: Holtek, options: all } - { rust: stable, vendor: Holtek, options: "" } - { rust: stable, vendor: Microchip, options: "" } + - { rust: stable, vendor: Microchip, options: "--nightly" } - { rust: stable, vendor: Nordic, options: all } - { rust: stable, vendor: Nordic, options: "" } - { rust: stable, vendor: Nuvoton, options: "" } + - { rust: stable, vendor: Nuvoton, options: "--nightly" } - { rust: stable, vendor: NXP, options: all } - { rust: stable, vendor: NXP, options: "" } - { rust: stable, vendor: RISC-V, options: "" } + - { rust: stable, vendor: RISC-V, options: "--nightly" } - { rust: stable, vendor: SiliconLabs, options: all } - { rust: stable, vendor: SiliconLabs, options: "" } - { rust: stable, vendor: Spansion, options: "" } + - { rust: stable, vendor: Spansion, options: "--nightly" } - { rust: stable, vendor: STMicro, options: "" } - - { rust: stable, vendor: STM32-patched, options: "--strict --const_generic --derive_more --pascal_enum_values --max_cluster_size" } + - { rust: stable, vendor: STMicro, options: "--nightly" } + - { rust: stable, vendor: STM32-patched, options: "--strict --const_generic --derive_more --pascal_enum_values --max_cluster_size --nightly" } - { rust: stable, vendor: Toshiba, options: all } - { rust: stable, vendor: Toshiba, options: "" } # Test MSRV @@ -76,6 +82,7 @@ jobs: # Use nightly for architectures which don't support stable - { rust: nightly, vendor: MSP430, options: "--nightly" } - { rust: nightly, vendor: MSP430, options: "" } + - { rust: nightly, vendor: Espressif, options: "--nightly" } - { rust: nightly, vendor: Espressif, options: "" } steps: diff --git a/ci/script.sh b/ci/script.sh index 5b19943b..66d845bb 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -31,7 +31,7 @@ main() { case $OPTIONS in all) - options="--const_generic --strict --derive_more" + options="--const_generic --strict --derive_more --nightly" ;; *) options=$OPTIONS @@ -46,6 +46,9 @@ main() { if [[ "$options" == *"--derive_more"* ]]; then echo 'derive_more = "0.99"' >> $td/Cargo.toml fi + if [[ "$options" == *"--nightly"* ]]; then + echo 'portable-atomic = { version = "0.3.15", default-features = false }' >> $td/Cargo.toml + fi echo '[profile.dev]' >> $td/Cargo.toml echo 'incremental = false' >> $td/Cargo.toml @@ -465,9 +468,6 @@ main() { echo '[dependencies.msp430]' >> $td/Cargo.toml echo 'version = "0.4.0"' >> $td/Cargo.toml - echo '[dependencies.portable-atomic]' >> $td/Cargo.toml - echo 'version = "0.3.15"' >> $td/Cargo.toml - # Test MSP430 test_svd_for_target msp430 https://raw.githubusercontent.com/pftbest/msp430g2553/v0.3.0-svd/msp430g2553.svd test_svd_for_target msp430 https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/master/msp430fr2355.svd From 7a0a5d40c0172317be3dd23e9b169ef991821ee9 Mon Sep 17 00:00:00 2001 From: YuhanLiin Date: Tue, 1 Nov 2022 00:20:19 -0400 Subject: [PATCH 049/319] Fix build error --- src/generate/device.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/generate/device.rs b/src/generate/device.rs index 0545b30c..51e28b2e 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -152,7 +152,7 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Result Date: Tue, 1 Nov 2022 00:21:58 -0400 Subject: [PATCH 050/319] update CHANGELOG --- CHANGELOG.md | 1 + 1 file changed, 1 insertion(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index cfb2e766..b64aea4c 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -11,6 +11,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - Test patched STM32 - simplify ci strategy - Fix generated code for MSP430 atomics +- Generate atomic register code for non-MSP430 targets ## [v0.27.1] - 2022-10-25 From c5e0b55c8360d4b01e7f21ddc7519ebc1786bbd1 Mon Sep 17 00:00:00 2001 From: YuhanLiin Date: Tue, 1 Nov 2022 20:20:16 -0400 Subject: [PATCH 051/319] Change nightly flag to atomics --- .github/workflows/ci.yml | 18 +++++++++--------- CHANGELOG.md | 1 + ci/script.sh | 4 ++-- ci/svd2rust-regress/src/main.rs | 8 ++++---- ci/svd2rust-regress/src/svd_test.rs | 12 ++++++------ src/generate/device.rs | 4 ++-- src/lib.rs | 15 +++++---------- src/main.rs | 6 +++--- src/util.rs | 4 ++-- 9 files changed, 34 insertions(+), 38 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index cdad59d2..221e5b94 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -53,36 +53,36 @@ jobs: - { rust: stable, vendor: Freescale, options: all } - { rust: stable, vendor: Freescale, options: "" } - { rust: stable, vendor: Fujitsu, options: "" } - - { rust: stable, vendor: Fujitsu, options: "--nightly" } + - { rust: stable, vendor: Fujitsu, options: "--atomics" } - { rust: stable, vendor: GD32, options: all } - { rust: stable, vendor: GD32, options: "" } - { rust: stable, vendor: Holtek, options: all } - { rust: stable, vendor: Holtek, options: "" } - { rust: stable, vendor: Microchip, options: "" } - - { rust: stable, vendor: Microchip, options: "--nightly" } + - { rust: stable, vendor: Microchip, options: "--atomics" } - { rust: stable, vendor: Nordic, options: all } - { rust: stable, vendor: Nordic, options: "" } - { rust: stable, vendor: Nuvoton, options: "" } - - { rust: stable, vendor: Nuvoton, options: "--nightly" } + - { rust: stable, vendor: Nuvoton, options: "--atomics" } - { rust: stable, vendor: NXP, options: all } - { rust: stable, vendor: NXP, options: "" } - { rust: stable, vendor: RISC-V, options: "" } - - { rust: stable, vendor: RISC-V, options: "--nightly" } + - { rust: stable, vendor: RISC-V, options: "--atomics" } - { rust: stable, vendor: SiliconLabs, options: all } - { rust: stable, vendor: SiliconLabs, options: "" } - { rust: stable, vendor: Spansion, options: "" } - - { rust: stable, vendor: Spansion, options: "--nightly" } + - { rust: stable, vendor: Spansion, options: "--atomics" } - { rust: stable, vendor: STMicro, options: "" } - - { rust: stable, vendor: STMicro, options: "--nightly" } - - { rust: stable, vendor: STM32-patched, options: "--strict --const_generic --derive_more --pascal_enum_values --max_cluster_size --nightly" } + - { rust: stable, vendor: STMicro, options: "--atomics" } + - { rust: stable, vendor: STM32-patched, options: "--strict --const_generic --derive_more --pascal_enum_values --max_cluster_size --atomics" } - { rust: stable, vendor: Toshiba, options: all } - { rust: stable, vendor: Toshiba, options: "" } # Test MSRV - { rust: 1.60.0, vendor: Nordic, options: "" } # Use nightly for architectures which don't support stable - - { rust: nightly, vendor: MSP430, options: "--nightly" } + - { rust: nightly, vendor: MSP430, options: "--atomics" } - { rust: nightly, vendor: MSP430, options: "" } - - { rust: nightly, vendor: Espressif, options: "--nightly" } + - { rust: nightly, vendor: Espressif, options: "--atomics" } - { rust: nightly, vendor: Espressif, options: "" } steps: diff --git a/CHANGELOG.md b/CHANGELOG.md index b64aea4c..22eef4c6 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -12,6 +12,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - simplify ci strategy - Fix generated code for MSP430 atomics - Generate atomic register code for non-MSP430 targets +- Change --nightly flag to --atomics ## [v0.27.1] - 2022-10-25 diff --git a/ci/script.sh b/ci/script.sh index 66d845bb..1b697412 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -31,7 +31,7 @@ main() { case $OPTIONS in all) - options="--const_generic --strict --derive_more --nightly" + options="--const_generic --strict --derive_more --atomics" ;; *) options=$OPTIONS @@ -46,7 +46,7 @@ main() { if [[ "$options" == *"--derive_more"* ]]; then echo 'derive_more = "0.99"' >> $td/Cargo.toml fi - if [[ "$options" == *"--nightly"* ]]; then + if [[ "$options" == *"--atomics"* ]]; then echo 'portable-atomic = { version = "0.3.15", default-features = false }' >> $td/Cargo.toml fi echo '[profile.dev]' >> $td/Cargo.toml diff --git a/ci/svd2rust-regress/src/main.rs b/ci/svd2rust-regress/src/main.rs index 2ae4ec90..597fb46a 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/ci/svd2rust-regress/src/main.rs @@ -29,9 +29,9 @@ struct Opt { bin_path: Option, // TODO: Consider using the same strategy cargo uses for passing args to rustc via `--` - /// Run svd2rust with `--nightly` - #[structopt(long = "nightly")] - nightly: bool, + /// Run svd2rust with `--atomics` + #[structopt(long = "atomics")] + atomics: bool, /// Filter by chip name, case sensitive, may be combined with other filters #[structopt(short = "c", long = "chip", raw(validator = "validate_chips"))] @@ -240,7 +240,7 @@ fn main() { tests.par_iter().for_each(|t| { let start = Instant::now(); - match svd_test::test(t, &bin_path, rustfmt_bin_path, opt.nightly, opt.verbose) { + match svd_test::test(t, &bin_path, rustfmt_bin_path, opt.atomics, opt.verbose) { Ok(s) => { if let Some(stderrs) = s { let mut buf = String::new(); diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index d398314d..81e077ae 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -7,7 +7,7 @@ use std::process::{Command, Output}; const CRATES_ALL: &[&str] = &["critical-section = \"1.0\"", "vcell = \"0.1.2\""]; const CRATES_MSP430: &[&str] = &["msp430 = \"0.4.0\"", "msp430-rt = \"0.4.0\""]; -const CRATES_NIGHTLY: &[&str] = +const CRATES_ATOMICS: &[&str] = &["portable-atomic = { version = \"0.3.15\", default-features = false }"]; const CRATES_CORTEX_M: &[&str] = &["cortex-m = \"0.7.6\"", "cortex-m-rt = \"0.6.13\""]; const CRATES_RISCV: &[&str] = &["riscv = \"0.9.0\"", "riscv-rt = \"0.9.0\""]; @@ -85,7 +85,7 @@ pub fn test( t: &TestCase, bin_path: &PathBuf, rustfmt_bin_path: Option<&PathBuf>, - nightly: bool, + atomics: bool, verbosity: u8, ) -> Result>> { let user = match std::env::var("USER") { @@ -137,8 +137,8 @@ pub fn test( Msp430 => CRATES_MSP430.iter(), XtensaLX => CRATES_XTENSALX.iter(), }) - .chain(if nightly { - CRATES_NIGHTLY.iter() + .chain(if atomics { + CRATES_ATOMICS.iter() } else { [].iter() }) @@ -177,8 +177,8 @@ pub fn test( XtensaLX => "xtensa-lx", }; let mut svd2rust_bin = Command::new(bin_path); - if nightly { - svd2rust_bin.arg("--nightly"); + if atomics { + svd2rust_bin.arg("--atomics"); } let output = svd2rust_bin diff --git a/src/generate/device.rs b/src/generate/device.rs index 51e28b2e..eaa70c5e 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -152,7 +152,7 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Result Result<()> { .value_name("ARCH"), ) .arg( - Arg::new("nightly") - .long("nightly") + Arg::new("atomics") + .long("atomics") .action(ArgAction::SetTrue) - .help("Enable features only available to nightly rustc"), + .help("Generate atomic register modification API"), ) .arg( Arg::new("const_generic") diff --git a/src/util.rs b/src/util.rs index 76047352..6f96d64c 100644 --- a/src/util.rs +++ b/src/util.rs @@ -27,7 +27,7 @@ pub struct Config { #[cfg_attr(feature = "serde", serde(default))] pub target: Target, #[cfg_attr(feature = "serde", serde(default))] - pub nightly: bool, + pub atomics: bool, #[cfg_attr(feature = "serde", serde(default))] pub generic_mod: bool, #[cfg_attr(feature = "serde", serde(default))] @@ -68,7 +68,7 @@ impl Default for Config { fn default() -> Self { Self { target: Target::default(), - nightly: false, + atomics: false, generic_mod: false, make_mod: false, const_generic: false, From 6cb9fa44e00e95f0a4ca0d90beb7399d48196225 Mon Sep 17 00:00:00 2001 From: YuhanLiin Date: Tue, 1 Nov 2022 20:24:55 -0400 Subject: [PATCH 052/319] Add atomic support for signed ints and 32-bit ints --- src/generate/generic_atomic.rs | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/src/generate/generic_atomic.rs b/src/generate/generic_atomic.rs index 12e9e87d..6348c2b7 100644 --- a/src/generate/generic_atomic.rs +++ b/src/generate/generic_atomic.rs @@ -1,5 +1,5 @@ mod atomic { - use portable_atomic::{AtomicU16, AtomicU8, Ordering}; + use portable_atomic::Ordering; pub trait AtomicOperations { unsafe fn atomic_or(ptr: *mut Self, val: Self); @@ -24,8 +24,17 @@ mod atomic { } }; } - impl_atomics!(u8, AtomicU8); - impl_atomics!(u16, AtomicU16); + + impl_atomics!(u8, portable_atomic::AtomicU8); + impl_atomics!(i8, portable_atomic::AtomicI8); + impl_atomics!(u16, portable_atomic::AtomicU16); + impl_atomics!(i16, portable_atomic::AtomicI16); + + // Exclude 16-bit archs from 32-bit atomics + #[cfg(not(target_pointer_width = "16"))] + impl_atomics!(u32, portable_atomic::AtomicU32); + #[cfg(not(target_pointer_width = "16"))] + impl_atomics!(i32, portable_atomic::AtomicI32); } use atomic::AtomicOperations; From 74ad83900acb48b7cf7a04495652338250d1556e Mon Sep 17 00:00:00 2001 From: YuhanLiin Date: Tue, 1 Nov 2022 21:58:09 -0400 Subject: [PATCH 053/319] Remove signed atomics and add 64bit atomics for RISCV --- src/generate/generic_atomic.rs | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/generate/generic_atomic.rs b/src/generate/generic_atomic.rs index 6348c2b7..7d9639db 100644 --- a/src/generate/generic_atomic.rs +++ b/src/generate/generic_atomic.rs @@ -26,15 +26,15 @@ mod atomic { } impl_atomics!(u8, portable_atomic::AtomicU8); - impl_atomics!(i8, portable_atomic::AtomicI8); impl_atomics!(u16, portable_atomic::AtomicU16); - impl_atomics!(i16, portable_atomic::AtomicI16); // Exclude 16-bit archs from 32-bit atomics #[cfg(not(target_pointer_width = "16"))] impl_atomics!(u32, portable_atomic::AtomicU32); - #[cfg(not(target_pointer_width = "16"))] - impl_atomics!(i32, portable_atomic::AtomicI32); + + // Enable 64-bit atomics for 64-bit RISCV + #[cfg(any(target_pointer_width = "64", target_has_atomic = "64"))] + impl_atomics!(u64, portable_atomic::AtomicU64); } use atomic::AtomicOperations; From 4b479d065bf0c77d007365fbefcfba1af311f745 Mon Sep 17 00:00:00 2001 From: YuhanLiin Date: Thu, 3 Nov 2022 17:34:58 -0400 Subject: [PATCH 054/319] Document lack of support for RISCV without atomic --- src/lib.rs | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index b294f4c2..de6af1ac 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -489,10 +489,11 @@ //! The `--atomics` flag can be passed to `svd2rust` to extends the register API with operations to //! atomically set, clear, and toggle specific bits. The atomic operations allow limited //! modification of register bits without read-modify-write sequences. As such, they can be -//! concurrently called on different bits in the same register without data races. +//! concurrently called on different bits in the same register without data races. This flag won't +//! work for RISCV chips without the atomic extension. //! -//! `portable-atomic` v0.3.15 must be added to the dependencies, with default features off if -//! possible to disable the `fallback` feature. +//! `portable-atomic` v0.3.15 must be added to the dependencies, with default features off to +//! disable the `fallback` feature. //! //! Usage examples: //! From c83d2992c77ac482b0a02e34ab7cbb6b81eec7b4 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 5 Nov 2022 10:24:30 +0300 Subject: [PATCH 055/319] const alternate register accessors --- .github/workflows/ci.yml | 2 +- CHANGELOG.md | 1 + README.md | 4 ++-- src/generate/peripheral.rs | 6 ++---- 4 files changed, 6 insertions(+), 7 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 586a8a83..fe668471 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -72,7 +72,7 @@ jobs: - { rust: stable, vendor: Toshiba, options: all } - { rust: stable, vendor: Toshiba, options: "" } # Test MSRV - - { rust: 1.60.0, vendor: Nordic, options: "" } + - { rust: 1.61.0, vendor: Nordic, options: "" } # Use nightly for architectures which don't support stable - { rust: nightly, vendor: MSP430, options: "--nightly" } - { rust: nightly, vendor: MSP430, options: "" } diff --git a/CHANGELOG.md b/CHANGELOG.md index cfb2e766..09f7900d 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +- mark alternate register accessors with `const`, bump `pac` MSRV to 1.61 - `fields` fn refactoring - Test patched STM32 - simplify ci strategy diff --git a/README.md b/README.md index f8182757..4ac346f3 100644 --- a/README.md +++ b/README.md @@ -13,9 +13,9 @@ This project is developed and maintained by the [Tools team][team]. ## Minimum Supported Rust Version (MSRV) -The **generated code** is guaranteed to compile on stable Rust 1.60.0 and up. +The **generated code** is guaranteed to compile on stable Rust 1.61.0 and up. -If you encounter compilation errors on any stable version newer than 1.60.0, please open an issue. +If you encounter compilation errors on any stable version newer than 1.61.0, please open an issue. # Testing Locally diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index fba9b431..38f9f004 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -535,10 +535,8 @@ fn register_or_cluster_block( accessors.extend(quote! { #[doc = #comment] #[inline(always)] - pub fn #name(&self) -> &#ty { - unsafe { - &*(((self as *const Self) as *const u8).add(#offset) as *const #ty) - } + pub const fn #name(&self) -> &#ty { + unsafe { &*(self as *const Self).cast::().add(#offset).cast() } } }); } else { From e3cef95074683299a42bb31df958aa832ae9b5ce Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 6 Nov 2022 09:46:28 +0300 Subject: [PATCH 056/319] release 0.27.2 --- CHANGELOG.md | 5 ++++- Cargo.toml | 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 09f7900d..1949fc1e 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ## [Unreleased] +## [v0.27.2] - 2022-11-06 + - mark alternate register accessors with `const`, bump `pac` MSRV to 1.61 - `fields` fn refactoring - Test patched STM32 @@ -772,7 +774,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.27.1...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.27.2...HEAD +[v0.27.2]: https://github.com/rust-embedded/svd2rust/compare/v0.27.1...v0.27.2 [v0.27.1]: https://github.com/rust-embedded/svd2rust/compare/v0.27.0...v0.27.1 [v0.27.0]: https://github.com/rust-embedded/svd2rust/compare/v0.26.0...v0.27.0 [v0.26.0]: https://github.com/rust-embedded/svd2rust/compare/v0.25.1...v0.26.0 diff --git a/Cargo.toml b/Cargo.toml index af3be6b6..c9938a1a 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.27.1" +version = "0.27.2" readme = "README.md" rust-version = "1.60" From 0832b9b9f1fadb32709594043b5d60093157aebb Mon Sep 17 00:00:00 2001 From: n8tlarsen Date: Wed, 5 Oct 2022 11:36:00 -0500 Subject: [PATCH 057/319] Identify disjoint arrays and expand them --- CHANGELOG.md | 1 + Cargo.toml | 1 + src/generate/peripheral.rs | 681 ++++++++++++++++++++++++++++--------- 3 files changed, 515 insertions(+), 168 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index cfb2e766..4992308a 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -40,6 +40,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - Bring documentation on how to generate MSP430 PACs up to date (in line with [msp430_svd](https://github.com/pftbest/msp430_svd)). - Prefix submodule path with self:: when reexporting submodules to avoid ambiguity in crate path. +- Add handling for disjoint arrays ## [v0.25.1] - 2022-08-22 diff --git a/Cargo.toml b/Cargo.toml index af3be6b6..7a1608fa 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -55,6 +55,7 @@ thiserror = "1.0" serde = { version = "1.0", optional = true } serde_json = { version = "1.0.85", optional = true } serde_yaml = { version = "0.9.11", optional = true } +regex = "1.6.0" [dependencies.svd-parser] features = ["expand"] diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index fba9b431..f29f5701 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -1,5 +1,7 @@ +use regex::Regex; use std::borrow::Cow; use std::cmp::Ordering; +use std::fmt; use svd_parser::expand::{derive_cluster, derive_peripheral, derive_register, BlockPath, Index}; use crate::svd::{array::names, Cluster, ClusterInfo, Peripheral, Register, RegisterCluster}; @@ -16,6 +18,31 @@ use anyhow::{anyhow, bail, Context, Result}; use crate::generate::register; +/// An enum defining how to represent registers in the rendered outputs, binding a bool +/// which describes whether or not renderers should include type information, +/// which allows for disjoint arrays to share the same type. +#[derive(Debug)] +enum Repr { + Array { include_info: bool }, + Expand { include_info: bool }, + // String to store the common type when the erc is part of a disjoint array + Single { include_info: bool, common: String }, +} + +impl Default for Repr { + fn default() -> Self { + Repr::Expand { + include_info: false, + } + } +} + +impl fmt::Display for Repr { + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + write!(f, "{self:?}") + } +} + pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result { let mut out = TokenStream::new(); @@ -191,17 +218,20 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result return Ok(TokenStream::new()); } + debug!("Checking array representation information"); + let reprs = check_erc_reprs(&ercs, config)?; + debug!("Pushing cluster & register information into output"); // Push all cluster & register related information into the peripheral module - let mod_items = render_ercs(&mut ercs, &path, index, config)?; + let mod_items = render_ercs(&mut ercs, &reprs, &path, index, config)?; // Push any register or cluster blocks into the output debug!( "Pushing {} register or cluster blocks into output", ercs.len() ); - let reg_block = register_or_cluster_block(&ercs, None, None, config)?; + let reg_block = register_or_cluster_block(&ercs, &reprs, None, None, config)?; let open = Punct::new('{', Spacing::Alone); let close = Punct::new('}', Spacing::Alone); @@ -484,6 +514,7 @@ fn make_comment(size: u32, offset: u32, description: &str) -> String { fn register_or_cluster_block( ercs: &[RegisterCluster], + reprs: &[Repr], name: Option<&str>, size: Option, config: &Config, @@ -491,8 +522,8 @@ fn register_or_cluster_block( let mut rbfs = TokenStream::new(); let mut accessors = TokenStream::new(); - let ercs_expanded = - expand(ercs, config).with_context(|| "Could not expand register or cluster block")?; + let ercs_expanded = expand(ercs, reprs, config) + .with_context(|| "Could not expand register or cluster block")?; // Locate conflicting regions; we'll need to use unions to represent them. let mut regions = FieldRegions::default(); @@ -631,15 +662,20 @@ fn register_or_cluster_block( /// Expand a list of parsed `Register`s or `Cluster`s, and render them to /// `RegisterBlockField`s containing `Field`s. -fn expand(ercs: &[RegisterCluster], config: &Config) -> Result> { +fn expand( + ercs: &[RegisterCluster], + reprs: &[Repr], + config: &Config, +) -> Result> { let mut ercs_expanded = vec![]; - debug!("Expanding registers or clusters into Register Block Fields"); - for erc in ercs { - match &erc { + let zipped = ercs.iter().zip(reprs.iter()); + + for (erc, repr) in zipped { + match erc { RegisterCluster::Register(register) => { let reg_name = ®ister.name; - let expanded_reg = expand_register(register, config).with_context(|| { + let expanded_reg = expand_register(register, repr, config).with_context(|| { let descrip = register.description.as_deref().unwrap_or("No description"); format!("Error expanding register\nName: {reg_name}\nDescription: {descrip}") })?; @@ -648,10 +684,13 @@ fn expand(ercs: &[RegisterCluster], config: &Config) -> Result { let cluster_name = &cluster.name; - let expanded_cluster = expand_cluster(cluster, config).with_context(|| { - let descrip = cluster.description.as_deref().unwrap_or("No description"); - format!("Error expanding cluster\nName: {cluster_name}\nDescription: {descrip}") - })?; + let expanded_cluster = + expand_cluster(cluster, repr, config).with_context(|| { + let descrip = cluster.description.as_deref().unwrap_or("No description"); + format!( + "Error expanding cluster\nName: {cluster_name}\nDescription: {descrip}" + ) + })?; trace!("Cluster: {cluster_name}"); ercs_expanded.extend(expanded_cluster); } @@ -663,12 +702,251 @@ fn expand(ercs: &[RegisterCluster], config: &Config) -> Result Result> { + let mut ercs_type_info: Vec<(String, Option, &RegisterCluster, &mut Repr)> = vec![]; + let mut reprs: Vec = vec![]; + // fill the array so we can slice it (without implementing Clone) + for _i in 0..ercs.len() { + reprs.push(Repr::default()); + } + let reprs_slice = &mut reprs[0..ercs.len()]; + let zipped = ercs.iter().zip(reprs_slice.iter_mut()); + for (erc, repr) in zipped { + match erc { + RegisterCluster::Register(register) => { + let info_name = register.fullname(config.ignore_groups); + match register { + Register::Single(_) => { + let mut ty_name = info_name.to_string(); + let mut prev_match = false; + if ercs_type_info.len() > 0 { + // Check this type against previous regexs + for prev in &ercs_type_info { + let (prev_name, prev_regex, prev_erc, _prev_repr) = prev; + if let RegisterCluster::Register(_) = prev_erc { + if let Some(prev_re) = prev_regex { + // if matched adopt the previous type name + if prev_re.is_match(&ty_name) { + ty_name = prev_name.to_string(); + prev_match = true; + debug!( + "Register {} matched to array {}, expanding array", + register.name, prev_name + ); + break; + } + } + } + } + } + // don't render info if we matched a previous erc + *repr = Repr::Single { + include_info: !prev_match, + common: ty_name.clone(), + }; + ercs_type_info.push((ty_name, None, erc, repr)); + } + + Register::Array(info, array_info) => { + // Only match integer indeces when searching for disjoint arrays + let re_string = util::replace_suffix(&info_name, "([0-9]+|%s)"); + let re = Regex::new(format!("^{re_string}$").as_str()).or_else(|_| { + Err(anyhow!( + "Error creating regex for register {}", + register.name + )) + })?; + let ty_name = info_name.to_string(); // keep suffix for regex matching + let mut prev_match = None; + if ercs_type_info.len() > 0 { + // Check this type regex against previous names + for prev in &mut ercs_type_info { + let (prev_name, _prev_regex, prev_erc, prev_repr) = prev; + if let RegisterCluster::Register(_) = prev_erc { + // if matched force this cluster and the previous one to expand + if re.is_match(&prev_name) { + debug!( + "Array {} matched to register {}, expanding array", + register.name, prev_name + ); + (**prev_repr, prev_match) = + redo_prev_repr(*prev_repr, &prev_match, &ty_name); + } + } + } + } + *repr = if prev_match.is_some() { + Repr::Expand { + // don't duplicate info if another array was matched + include_info: !prev_match.unwrap(), + } + } else { + // Check if the array itself requires expansion + let register_size = register.properties.size.ok_or_else(|| { + anyhow!("Register {} has no `size` field", register.name) + })?; + let sequential_addresses = (array_info.dim == 1) + || (register_size == array_info.dim_increment * BITS_PER_BYTE); + let convert_list = match config.keep_list { + true => match &array_info.dim_name { + Some(dim_name) => dim_name.contains("[%s]"), + None => info.name.contains("[%s]"), + }, + false => true, + }; + let r = if sequential_addresses && convert_list { + Repr::Array { include_info: true } + } else { + Repr::Expand { include_info: true } + }; + r + }; + ercs_type_info.push((ty_name, Some(re), erc, repr)); + } + }; + } + + RegisterCluster::Cluster(cluster) => { + match cluster { + Cluster::Single(_) => { + let mut ty_name = cluster.name.to_string(); + let mut prev_match = false; + if ercs_type_info.len() > 0 { + // Check this type against previous regexs + for prev in &ercs_type_info { + let (prev_name, prev_regex, prev_erc, _prev_repr) = prev; + if let RegisterCluster::Cluster(_) = prev_erc { + if let Some(prev_re) = prev_regex { + // if matched adopt the previous type name + if prev_re.is_match(&ty_name) { + debug!( + "Cluster {} matched to array {}, expanding array", + cluster.name, prev_name + ); + ty_name = prev_name.to_string(); + prev_match = true; + break; + } + } + } + } + } + // don't render info if we matched a previous erc + *repr = Repr::Single { + include_info: !prev_match, + common: ty_name.clone(), + }; + ercs_type_info.push((ty_name, None, erc, repr)); + } + + Cluster::Array(info, array_info) => { + // Only match integer indeces when searching for disjoint arrays + let re_string = util::replace_suffix(&cluster.name, "([0-9]+|%s)"); + let re = Regex::new(format!("^{re_string}$").as_str()).or_else(|_| { + Err(anyhow!( + "creating regex for register {} failed", + cluster.name + )) + })?; + let ty_name = cluster.name.to_string(); // keep suffix for regex matching + let mut prev_match = None; + if ercs_type_info.len() > 0 { + // Check this type regex against previous names + for prev in &mut ercs_type_info { + let (prev_name, _prev_regex, prev_erc, prev_repr) = prev; + if let RegisterCluster::Cluster(_) = prev_erc { + // if matched force this cluster and the previous one to expand + if re.is_match(&prev_name) { + debug!( + "array {} matched to cluster {}, expanding array", + cluster.name, prev_name + ); + (**prev_repr, prev_match) = + redo_prev_repr(*prev_repr, &prev_match, &ty_name); + } + } + } + } + *repr = if prev_match.is_some() { + Repr::Expand { + // don't duplicate info if another array was matched + include_info: !prev_match.unwrap(), + } + } else { + // Check if the array itself requires expansion + let cluster_size = cluster_info_size_in_bits(cluster, repr, config) + .with_context(|| { + format!("Can't calculate cluster {} size", cluster.name) + })?; + let increment_bits = array_info.dim_increment * BITS_PER_BYTE; + let sequential_addresses = + (array_info.dim == 1) || (cluster_size == increment_bits); + let convert_list = match config.keep_list { + true => match &array_info.dim_name { + Some(dim_name) => dim_name.contains("[%s]"), + None => info.name.contains("[%s]"), + }, + false => true, + }; + if sequential_addresses && convert_list { + Repr::Array { include_info: true } + } else { + Repr::Expand { include_info: true } + } + }; + ercs_type_info.push((ty_name, Some(re), erc, repr)) + } + }; + } + }; + } + Ok(reprs) +} + +/// Called when a previous `Repr`esentation needs to be updated because it matches the regex of a +/// disjoint array. Returns a tuple of the updated `Repr` and match status. +fn redo_prev_repr( + prev_repr: &Repr, + prev_match: &Option, + ty_name: &String, +) -> (Repr, Option) { + match prev_repr { + Repr::Array { .. } => ( + // include info only if there wasn't a previous array match + Repr::Expand { + include_info: if let Some(b) = prev_match { !b } else { true }, + }, + Some(true), // found a match and it is an array + ), + Repr::Expand { .. } => ( + Repr::Expand { + include_info: if let Some(b) = prev_match { !b } else { true }, + }, + Some(true), // found a match and it is an array + ), + Repr::Single { .. } => ( + Repr::Single { + include_info: false, + common: ty_name.clone(), + }, + if prev_match.is_none() { + Some(false) // found a match and it isn't an array + } else { + *prev_match // don't overwrite a previous match when this is a single + }, + ), + } +} + /// Calculate the size of a Cluster. If it is an array, then the dimensions /// tell us the size of the array. Otherwise, inspect the contents using /// [cluster_info_size_in_bits]. -fn cluster_size_in_bits(cluster: &Cluster, config: &Config) -> Result { +fn cluster_size_in_bits(cluster: &Cluster, repr: &Repr, config: &Config) -> Result { match cluster { - Cluster::Single(info) => cluster_info_size_in_bits(info, config), + Cluster::Single(info) => cluster_info_size_in_bits(info, repr, config), // If the contained array cluster has a mismatch between the // dimIncrement and the size of the array items, then the array // will get expanded in expand_cluster below. The overall size @@ -678,7 +956,7 @@ fn cluster_size_in_bits(cluster: &Cluster, config: &Config) -> Result { return Ok(0); // Special case! } let last_offset = (dim.dim - 1) * dim.dim_increment * BITS_PER_BYTE; - let last_size = cluster_info_size_in_bits(info, config); + let last_size = cluster_info_size_in_bits(info, repr, config); Ok(last_offset + last_size?) } } @@ -686,13 +964,13 @@ fn cluster_size_in_bits(cluster: &Cluster, config: &Config) -> Result { /// Recursively calculate the size of a ClusterInfo. A cluster's size is the /// maximum end position of its recursive children. -fn cluster_info_size_in_bits(info: &ClusterInfo, config: &Config) -> Result { +fn cluster_info_size_in_bits(info: &ClusterInfo, repr: &Repr, config: &Config) -> Result { let mut size = 0; for c in &info.children { let end = match c { RegisterCluster::Register(reg) => { - let reg_size: u32 = expand_register(reg, config)? + let reg_size: u32 = expand_register(reg, repr, config)? .iter() .map(|rbf| rbf.size) .sum(); @@ -700,7 +978,7 @@ fn cluster_info_size_in_bits(info: &ClusterInfo, config: &Config) -> Result (reg.address_offset * BITS_PER_BYTE) + reg_size } RegisterCluster::Cluster(clust) => { - (clust.address_offset * BITS_PER_BYTE) + cluster_size_in_bits(clust, config)? + (clust.address_offset * BITS_PER_BYTE) + cluster_size_in_bits(clust, repr, config)? } }; @@ -710,10 +988,16 @@ fn cluster_info_size_in_bits(info: &ClusterInfo, config: &Config) -> Result } /// Render a given cluster (and any children) into `RegisterBlockField`s -fn expand_cluster(cluster: &Cluster, config: &Config) -> Result> { +/// `Option`al bool parameter set to `Some(false)` will force an array to be expanded +/// while `None` or `Some(true)` will follow the conversion check. +fn expand_cluster( + cluster: &Cluster, + repr: &Repr, + config: &Config, +) -> Result> { let mut cluster_expanded = vec![]; - let cluster_size = cluster_info_size_in_bits(cluster, config) + let cluster_size = cluster_info_size_in_bits(cluster, repr, config) .with_context(|| format!("Can't calculate cluster {} size", cluster.name))?; let description = cluster .description @@ -722,7 +1006,19 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result util::replace_suffix(&common, ""), + _ => { + bail!( + "Cluster {} is a single, but was given a {}", + cluster.name, + repr + ); + } + } } else { util::replace_suffix(&cluster.name, "") }; @@ -750,7 +1046,6 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result Result match &array_info.dim_name { - Some(dim_name) => dim_name.contains("[%s]"), - None => info.name.contains("[%s]"), - }, - false => true, - }; - - let array_convertible = sequential_addresses && convert_list; + match repr { + Repr::Array { .. } => { + let accessors = if sequential_indexes_from0 { + Vec::new() + } else { + let span = Span::call_site(); + let mut accessors = Vec::new(); + let nb_name_cs = ty_name.to_snake_case_ident(span); + for (i, idx) in array_info.indexes().enumerate() { + let idx_name = + util::replace_suffix(&info.name, &idx).to_snake_case_ident(span); + let comment = make_comment( + cluster_size, + info.address_offset + (i as u32) * cluster_size / 8, + &description, + ); + let i = unsuffixed(i as _); + accessors.push(ArrayAccessor { + doc: comment, + name: idx_name, + ty: ty.clone(), + basename: nb_name_cs.clone(), + i, + }); + } + accessors + }; + let array_ty = new_syn_array(ty, array_info.dim); + cluster_expanded.push(RegisterBlockField { + syn_field: new_syn_field( + ty_name.to_snake_case_ident(Span::call_site()), + array_ty, + ), + description, + offset: info.address_offset, + size: cluster_size * array_info.dim, + accessors, + }); + } - if array_convertible { - let accessors = if sequential_indexes_from0 { - Vec::new() - } else { - let span = Span::call_site(); - let mut accessors = Vec::new(); - let nb_name_cs = ty_name.to_snake_case_ident(span); - for (i, idx) in array_info.indexes().enumerate() { - let idx_name = - util::replace_suffix(&info.name, &idx).to_snake_case_ident(span); - let comment = make_comment( - cluster_size, - info.address_offset + (i as u32) * cluster_size / 8, - &description, - ); - let i = unsuffixed(i as _); - accessors.push(ArrayAccessor { - doc: comment, - name: idx_name, - ty: ty.clone(), - basename: nb_name_cs.clone(), - i, + Repr::Expand { .. } => { + if sequential_indexes_from0 && config.const_generic { + // Include a ZST ArrayProxy giving indexed access to the + // elements. + let ap_path = array_proxy_type(ty, array_info); + let syn_field = + new_syn_field(ty_name.to_snake_case_ident(Span::call_site()), ap_path); + cluster_expanded.push(RegisterBlockField { + syn_field, + description: info.description.as_ref().unwrap_or(&info.name).into(), + offset: info.address_offset, + size: 0, + accessors: Vec::new(), }); + } else { + for (field_num, idx) in array_info.indexes().enumerate() { + let nb_name = util::replace_suffix(&info.name, &idx); + let syn_field = new_syn_field( + nb_name.to_snake_case_ident(Span::call_site()), + ty.clone(), + ); + cluster_expanded.push(RegisterBlockField { + syn_field, + description: description.clone(), + offset: info.address_offset + + field_num as u32 * array_info.dim_increment, + size: cluster_size, + accessors: Vec::new(), + }); + } } - accessors - }; - let array_ty = new_syn_array(ty, array_info.dim); - cluster_expanded.push(RegisterBlockField { - syn_field: new_syn_field( - ty_name.to_snake_case_ident(Span::call_site()), - array_ty, - ), - description, - offset: info.address_offset, - size: cluster_size * array_info.dim, - accessors, - }); - } else if sequential_indexes_from0 && config.const_generic { - // Include a ZST ArrayProxy giving indexed access to the - // elements. - let ap_path = array_proxy_type(ty, array_info); - let syn_field = - new_syn_field(ty_name.to_snake_case_ident(Span::call_site()), ap_path); - cluster_expanded.push(RegisterBlockField { - syn_field, - description: info.description.as_ref().unwrap_or(&info.name).into(), - offset: info.address_offset, - size: 0, - accessors: Vec::new(), - }); - } else { - for (field_num, idx) in array_info.indexes().enumerate() { - let nb_name = util::replace_suffix(&info.name, &idx); - let syn_field = - new_syn_field(nb_name.to_snake_case_ident(Span::call_site()), ty.clone()); - - cluster_expanded.push(RegisterBlockField { - syn_field, - description: description.clone(), - offset: info.address_offset + field_num as u32 * array_info.dim_increment, - size: cluster_size, - accessors: Vec::new(), - }); + } + _ => { + bail!( + "cluster {} is an array, but was given a {}", + cluster.name, + repr + ); } } } @@ -840,8 +1140,14 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result Result> { +/// numeral indexes, or not containing all elements from 0 to size) they will be expanded. +/// `Option`al bool parameter set to `Some(false)` will force an array to be expanded +/// while `None` or `Some(true)` will follow the conversion check. +fn expand_register( + register: &Register, + repr: &Repr, + config: &Config, +) -> Result> { let mut register_expanded = vec![]; let register_size = register @@ -852,7 +1158,19 @@ fn expand_register(register: &Register, config: &Config) -> Result util::replace_suffix(&common, ""), + _ => { + bail!( + "register {} is a single, but was given a {}", + register.name, + repr + ); + } + } } else { util::replace_suffix(&info_name, "") }; @@ -860,7 +1178,7 @@ fn expand_register(register: &Register, config: &Config) -> Result { - let syn_field = new_syn_field(ty_name.to_snake_case_ident(Span::call_site()), ty); + let syn_field = new_syn_field(info_name.to_snake_case_ident(Span::call_site()), ty); register_expanded.push(RegisterBlockField { syn_field, description, @@ -870,75 +1188,75 @@ fn expand_register(register: &Register, config: &Config) -> Result { - let sequential_addresses = (array_info.dim == 1) - || (register_size == array_info.dim_increment * BITS_PER_BYTE); - - let convert_list = match config.keep_list { - true => match &array_info.dim_name { - Some(dim_name) => dim_name.contains("[%s]"), - None => info.name.contains("[%s]"), - }, - false => true, - }; - - let array_convertible = sequential_addresses && convert_list; - - if array_convertible { - // if dimIndex exists, test if it is a sequence of numbers from 0 to dim - let sequential_indexes_from0 = array_info - .indexes_as_range() - .filter(|r| *r.start() == 0) - .is_some(); - - let accessors = if sequential_indexes_from0 { - Vec::new() - } else { - let span = Span::call_site(); - let mut accessors = Vec::new(); - let nb_name_cs = ty_name.to_snake_case_ident(span); - for (i, idx) in array_info.indexes().enumerate() { - let idx_name = - util::replace_suffix(&info_name, &idx).to_snake_case_ident(span); - let comment = make_comment( - register_size, - info.address_offset + (i as u32) * register_size / 8, - &description, - ); - let i = unsuffixed(i as _); - accessors.push(ArrayAccessor { - doc: comment, - name: idx_name, - ty: ty.clone(), - basename: nb_name_cs.clone(), - i, - }); - } - accessors - }; - let array_ty = new_syn_array(ty, array_info.dim); - let syn_field = - new_syn_field(ty_name.to_snake_case_ident(Span::call_site()), array_ty); - register_expanded.push(RegisterBlockField { - syn_field, - description, - offset: info.address_offset, - size: register_size * array_info.dim, - accessors, - }); - } else { - for (field_num, idx) in array_info.indexes().enumerate() { - let nb_name = util::replace_suffix(&info_name, &idx); + match repr { + Repr::Array { .. } => { + // if dimIndex exists, test if it is a sequence of numbers from 0 to dim + let sequential_indexes_from0 = array_info + .indexes_as_range() + .filter(|r| *r.start() == 0) + .is_some(); + + let accessors = if sequential_indexes_from0 { + Vec::new() + } else { + let span = Span::call_site(); + let mut accessors = Vec::new(); + let nb_name_cs = ty_name.to_snake_case_ident(span); + for (i, idx) in array_info.indexes().enumerate() { + let idx_name = + util::replace_suffix(&info_name, &idx).to_snake_case_ident(span); + let comment = make_comment( + register_size, + info.address_offset + (i as u32) * register_size / 8, + &description, + ); + let i = unsuffixed(i as _); + accessors.push(ArrayAccessor { + doc: comment, + name: idx_name, + ty: ty.clone(), + basename: nb_name_cs.clone(), + i, + }); + } + accessors + }; + let array_ty = new_syn_array(ty, array_info.dim); let syn_field = - new_syn_field(nb_name.to_snake_case_ident(Span::call_site()), ty.clone()); - + new_syn_field(ty_name.to_snake_case_ident(Span::call_site()), array_ty); register_expanded.push(RegisterBlockField { syn_field, - description: description.clone(), - offset: info.address_offset + field_num as u32 * array_info.dim_increment, - size: register_size, - accessors: Vec::new(), + description, + offset: info.address_offset, + size: register_size * array_info.dim, + accessors, }); } + Repr::Expand { .. } => { + for (field_num, idx) in array_info.indexes().enumerate() { + let nb_name = util::replace_suffix(&info_name, &idx); + let syn_field = new_syn_field( + nb_name.to_snake_case_ident(Span::call_site()), + ty.clone(), + ); + + register_expanded.push(RegisterBlockField { + syn_field, + description: description.clone(), + offset: info.address_offset + + field_num as u32 * array_info.dim_increment, + size: register_size, + accessors: Vec::new(), + }); + } + } + _ => { + bail!( + "register {} is an array, but was given a {}", + register.name, + repr + ); + } } } } @@ -948,13 +1266,15 @@ fn expand_register(register: &Register, config: &Config) -> Result Result { let mut mod_items = TokenStream::new(); + let zipped = ercs.iter_mut().zip(reprs.iter()); - for erc in ercs { + for (erc, repr) in zipped { match erc { // Generate the sub-cluster blocks. RegisterCluster::Cluster(c) => { @@ -969,6 +1289,27 @@ fn render_ercs( // Generate definition for each of the registers. RegisterCluster::Register(reg) => { + // continue if the type is labeled for `NoInfo` + match repr { + Repr::Array { include_info } => { + if !include_info { + continue; + } + } + Repr::Expand { include_info } => { + if !include_info { + continue; + } + } + Repr::Single { + include_info, + common: _, + } => { + if !include_info { + continue; + } + } + } trace!("Register: {}", reg.name); let mut rpath = None; let dpath = reg.derived_from.take(); @@ -980,9 +1321,7 @@ fn render_ercs( let rendered_reg = register::render(reg, path, rpath, index, config).with_context(|| { let descrip = reg.description.as_deref().unwrap_or("No description"); - format!( - "Error rendering register\nName: {reg_name}\nDescription: {descrip}" - ) + format!("Erro rendering register\nName: {reg_name}\nDescription: {descrip}") })?; mod_items.extend(rendered_reg) } @@ -1033,7 +1372,8 @@ fn cluster_block( }) } else { let cpath = path.new_cluster(&c.name); - let mod_items = render_ercs(&mut c.children, &cpath, index, config)?; + let mod_reprs = check_erc_reprs(&c.children, config)?; + let mod_items = render_ercs(&mut c.children, &mod_reprs, &cpath, index, config)?; // Generate the register block. let cluster_size = match c { @@ -1042,8 +1382,13 @@ fn cluster_block( } _ => None, }; - let reg_block = - register_or_cluster_block(&c.children, Some(&mod_name), cluster_size, config)?; + let reg_block = register_or_cluster_block( + &c.children, + &mod_reprs, + Some(&mod_name), + cluster_size, + config, + )?; let mod_items = quote! { #reg_block From 3a49b3259d6819491d3d8353042642cd8a06bfc8 Mon Sep 17 00:00:00 2001 From: n8tlarsen Date: Mon, 10 Oct 2022 18:37:53 -0500 Subject: [PATCH 058/319] Use derives to handle disjoint arrays --- src/generate/peripheral.rs | 845 +++++++++++++++++-------------------- 1 file changed, 380 insertions(+), 465 deletions(-) diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index f29f5701..a5c9dfaa 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -2,7 +2,9 @@ use regex::Regex; use std::borrow::Cow; use std::cmp::Ordering; use std::fmt; -use svd_parser::expand::{derive_cluster, derive_peripheral, derive_register, BlockPath, Index}; +use svd_parser::expand::{ + derive_cluster, derive_peripheral, derive_register, BlockPath, Index, RegisterPath, +}; use crate::svd::{array::names, Cluster, ClusterInfo, Peripheral, Register, RegisterCluster}; use log::{debug, trace, warn}; @@ -18,31 +20,6 @@ use anyhow::{anyhow, bail, Context, Result}; use crate::generate::register; -/// An enum defining how to represent registers in the rendered outputs, binding a bool -/// which describes whether or not renderers should include type information, -/// which allows for disjoint arrays to share the same type. -#[derive(Debug)] -enum Repr { - Array { include_info: bool }, - Expand { include_info: bool }, - // String to store the common type when the erc is part of a disjoint array - Single { include_info: bool, common: String }, -} - -impl Default for Repr { - fn default() -> Self { - Repr::Expand { - include_info: false, - } - } -} - -impl fmt::Display for Repr { - fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { - write!(f, "{self:?}") - } -} - pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result { let mut out = TokenStream::new(); @@ -218,20 +195,35 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result return Ok(TokenStream::new()); } - debug!("Checking array representation information"); - let reprs = check_erc_reprs(&ercs, config)?; + debug!("Checking derivation information"); + let derive_infos = check_erc_derive_infos(&mut ercs, &path, index, config)?; + let zipped = ercs.iter_mut().zip(derive_infos.iter()); + for (mut erc, derive_info) in zipped { + match &mut erc { + &mut RegisterCluster::Register(register) => match derive_info { + DeriveInfo::Implicit(rpath) => { + debug!( + "register {} implicitly derives from {}", + register.name, rpath.name + ); + } + _ => {} + }, + _ => {} + } + } debug!("Pushing cluster & register information into output"); // Push all cluster & register related information into the peripheral module - let mod_items = render_ercs(&mut ercs, &reprs, &path, index, config)?; + let mod_items = render_ercs(&mut ercs, &derive_infos, &path, index, config)?; // Push any register or cluster blocks into the output debug!( "Pushing {} register or cluster blocks into output", ercs.len() ); - let reg_block = register_or_cluster_block(&ercs, &reprs, None, None, config)?; + let reg_block = register_or_cluster_block(&ercs, &derive_infos, None, None, config)?; let open = Punct::new('{', Spacing::Alone); let close = Punct::new('}', Spacing::Alone); @@ -252,6 +244,28 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result Ok(out) } +/// An enum describing the derivation status of an erc, which allows for disjoint arrays to be +/// implicitly derived from a common type. +#[derive(Debug, PartialEq)] +enum DeriveInfo { + Root, + Explicit(RegisterPath), + Implicit(RegisterPath), + Cluster, // don't do anything different for clusters +} + +impl Default for DeriveInfo { + fn default() -> Self { + DeriveInfo::Root + } +} + +impl fmt::Display for DeriveInfo { + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + write!(f, "{self:?}") + } +} + #[derive(Clone, Debug)] pub struct ArrayAccessor { pub doc: String, @@ -514,7 +528,7 @@ fn make_comment(size: u32, offset: u32, description: &str) -> String { fn register_or_cluster_block( ercs: &[RegisterCluster], - reprs: &[Repr], + derive_infos: &[DeriveInfo], name: Option<&str>, size: Option, config: &Config, @@ -522,10 +536,10 @@ fn register_or_cluster_block( let mut rbfs = TokenStream::new(); let mut accessors = TokenStream::new(); - let ercs_expanded = expand(ercs, reprs, config) + let ercs_expanded = expand(ercs, derive_infos, config) .with_context(|| "Could not expand register or cluster block")?; - // Locate conflicting regions; we'll need to use unions to represent them. + // Locate conflicting regions; we'll need to use unions to derive_infoesent them. let mut regions = FieldRegions::default(); for reg_block_field in &ercs_expanded { @@ -664,33 +678,33 @@ fn register_or_cluster_block( /// `RegisterBlockField`s containing `Field`s. fn expand( ercs: &[RegisterCluster], - reprs: &[Repr], + derive_infos: &[DeriveInfo], config: &Config, ) -> Result> { let mut ercs_expanded = vec![]; debug!("Expanding registers or clusters into Register Block Fields"); - let zipped = ercs.iter().zip(reprs.iter()); + let zipped = ercs.iter().zip(derive_infos.iter()); - for (erc, repr) in zipped { - match erc { + for (erc, derive_info) in zipped { + match &erc { RegisterCluster::Register(register) => { let reg_name = ®ister.name; - let expanded_reg = expand_register(register, repr, config).with_context(|| { - let descrip = register.description.as_deref().unwrap_or("No description"); - format!("Error expanding register\nName: {reg_name}\nDescription: {descrip}") - })?; + let expanded_reg = + expand_register(register, derive_info, config).with_context(|| { + let descrip = register.description.as_deref().unwrap_or("No description"); + format!( + "Error expanding register\nName: {reg_name}\nDescription: {descrip}" + ) + })?; trace!("Register: {reg_name}"); ercs_expanded.extend(expanded_reg); } RegisterCluster::Cluster(cluster) => { let cluster_name = &cluster.name; - let expanded_cluster = - expand_cluster(cluster, repr, config).with_context(|| { - let descrip = cluster.description.as_deref().unwrap_or("No description"); - format!( - "Error expanding cluster\nName: {cluster_name}\nDescription: {descrip}" - ) - })?; + let expanded_cluster = expand_cluster(cluster, config).with_context(|| { + let descrip = cluster.description.as_deref().unwrap_or("No description"); + format!("Error expanding cluster\nName: {cluster_name}\nDescription: {descrip}") + })?; trace!("Cluster: {cluster_name}"); ercs_expanded.extend(expanded_cluster); } @@ -702,55 +716,55 @@ fn expand( Ok(ercs_expanded) } -/// Gathers type information and decides how ercs (arrays in particular) should be -/// represented in the output. Returns a vector of `Repr` which should -/// be `zip`ped with ercs when rendering. -fn check_erc_reprs(ercs: &[RegisterCluster], config: &Config) -> Result> { - let mut ercs_type_info: Vec<(String, Option, &RegisterCluster, &mut Repr)> = vec![]; - let mut reprs: Vec = vec![]; - // fill the array so we can slice it (without implementing Clone) +/// Searches types using regex to find disjoint arrays which should implicitly derive from +/// another register. Returns a vector of `DeriveInfo` which should be `zip`ped with ercs when rendering. +fn check_erc_derive_infos( + ercs: &mut [RegisterCluster], + path: &BlockPath, + index: &Index, + config: &Config, +) -> Result> { + let mut ercs_type_info: Vec<(String, Option, &RegisterCluster, &mut DeriveInfo)> = + vec![]; + let mut derive_infos: Vec = vec![]; + // fill the array so we can slice it (without implementing clone) for _i in 0..ercs.len() { - reprs.push(Repr::default()); + derive_infos.push(DeriveInfo::default()); } - let reprs_slice = &mut reprs[0..ercs.len()]; - let zipped = ercs.iter().zip(reprs_slice.iter_mut()); - for (erc, repr) in zipped { - match erc { - RegisterCluster::Register(register) => { - let info_name = register.fullname(config.ignore_groups); + let derive_infos_slice = &mut derive_infos[0..ercs.len()]; + let zipped = ercs.iter_mut().zip(derive_infos_slice.iter_mut()); + for (mut erc, derive_info) in zipped { + match &mut erc { + &mut RegisterCluster::Register(register) => { + let info_name = register.fullname(config.ignore_groups).to_string(); + let explicit_rpath = match &mut register.derived_from.clone() { + Some(dpath) => Some(find_root(&dpath, path, index)?), + None => None, + }; match register { Register::Single(_) => { - let mut ty_name = info_name.to_string(); - let mut prev_match = false; - if ercs_type_info.len() > 0 { - // Check this type against previous regexs - for prev in &ercs_type_info { - let (prev_name, prev_regex, prev_erc, _prev_repr) = prev; - if let RegisterCluster::Register(_) = prev_erc { - if let Some(prev_re) = prev_regex { - // if matched adopt the previous type name - if prev_re.is_match(&ty_name) { - ty_name = prev_name.to_string(); - prev_match = true; - debug!( - "Register {} matched to array {}, expanding array", - register.name, prev_name - ); - break; + let ty_name = info_name.to_string(); + *derive_info = match explicit_rpath { + None => { + match regex_against_prev(&ty_name, &ercs_type_info) { + Some(prev_name) => { + // make sure the matched register isn't already deriving from this register + let root = find_root(&prev_name, path, index)?; + if ty_name == root.name { + DeriveInfo::Root + } else { + DeriveInfo::Implicit(root) } } + None => DeriveInfo::Root, } } - } - // don't render info if we matched a previous erc - *repr = Repr::Single { - include_info: !prev_match, - common: ty_name.clone(), + Some(rpath) => DeriveInfo::Explicit(rpath), }; - ercs_type_info.push((ty_name, None, erc, repr)); + ercs_type_info.push((ty_name, None, erc, derive_info)); } - Register::Array(info, array_info) => { + Register::Array(..) => { // Only match integer indeces when searching for disjoint arrays let re_string = util::replace_suffix(&info_name, "([0-9]+|%s)"); let re = Regex::new(format!("^{re_string}$").as_str()).or_else(|_| { @@ -760,193 +774,129 @@ fn check_erc_reprs(ercs: &[RegisterCluster], config: &Config) -> Result 0 { - // Check this type regex against previous names - for prev in &mut ercs_type_info { - let (prev_name, _prev_regex, prev_erc, prev_repr) = prev; - if let RegisterCluster::Register(_) = prev_erc { - // if matched force this cluster and the previous one to expand - if re.is_match(&prev_name) { - debug!( - "Array {} matched to register {}, expanding array", - register.name, prev_name - ); - (**prev_repr, prev_match) = - redo_prev_repr(*prev_repr, &prev_match, &ty_name); + *derive_info = match explicit_rpath { + None => { + match regex_against_prev(&ty_name, &ercs_type_info) { + Some(prev_name) => { + let root = find_root(&prev_name, path, index)?; + DeriveInfo::Implicit(root) } - } - } - } - *repr = if prev_match.is_some() { - Repr::Expand { - // don't duplicate info if another array was matched - include_info: !prev_match.unwrap(), - } - } else { - // Check if the array itself requires expansion - let register_size = register.properties.size.ok_or_else(|| { - anyhow!("Register {} has no `size` field", register.name) - })?; - let sequential_addresses = (array_info.dim == 1) - || (register_size == array_info.dim_increment * BITS_PER_BYTE); - let convert_list = match config.keep_list { - true => match &array_info.dim_name { - Some(dim_name) => dim_name.contains("[%s]"), - None => info.name.contains("[%s]"), - }, - false => true, - }; - let r = if sequential_addresses && convert_list { - Repr::Array { include_info: true } - } else { - Repr::Expand { include_info: true } - }; - r - }; - ercs_type_info.push((ty_name, Some(re), erc, repr)); - } - }; - } - - RegisterCluster::Cluster(cluster) => { - match cluster { - Cluster::Single(_) => { - let mut ty_name = cluster.name.to_string(); - let mut prev_match = false; - if ercs_type_info.len() > 0 { - // Check this type against previous regexs - for prev in &ercs_type_info { - let (prev_name, prev_regex, prev_erc, _prev_repr) = prev; - if let RegisterCluster::Cluster(_) = prev_erc { - if let Some(prev_re) = prev_regex { - // if matched adopt the previous type name - if prev_re.is_match(&ty_name) { - debug!( - "Cluster {} matched to array {}, expanding array", - cluster.name, prev_name - ); - ty_name = prev_name.to_string(); - prev_match = true; - break; + None => { + let mut my_derive_info = DeriveInfo::Root; + // Check this type regex against previous names + for prev in &mut ercs_type_info { + let ( + prev_name, + _prev_regex, + prev_erc, + prev_derive_info, + ) = prev; + if let RegisterCluster::Register(prev_reg) = prev_erc { + if let Register::Array(..) = prev_reg { + // Arrays had a chance to match above + continue; + } + if re.is_match(&prev_name) { + let loop_derive_info = match prev_derive_info { + DeriveInfo::Root => { + let implicit_rpath = + find_root(&ty_name, path, index)?; + **prev_derive_info = + DeriveInfo::Implicit(implicit_rpath); + DeriveInfo::Root + } + DeriveInfo::Explicit(rpath) => { + let implicit_rpath = find_root( + &rpath.name, + path, + index, + )?; + DeriveInfo::Implicit(implicit_rpath) + } + DeriveInfo::Implicit(rpath) => { + DeriveInfo::Implicit(rpath.clone()) + } + DeriveInfo::Cluster => { + return Err(anyhow!( + "register {} derive_infoesented as cluster", + register.name + )) + } + }; + if let DeriveInfo::Root = my_derive_info { + if my_derive_info != loop_derive_info { + my_derive_info = loop_derive_info; + } + } + } + } } + my_derive_info } } } - } - // don't render info if we matched a previous erc - *repr = Repr::Single { - include_info: !prev_match, - common: ty_name.clone(), - }; - ercs_type_info.push((ty_name, None, erc, repr)); - } - - Cluster::Array(info, array_info) => { - // Only match integer indeces when searching for disjoint arrays - let re_string = util::replace_suffix(&cluster.name, "([0-9]+|%s)"); - let re = Regex::new(format!("^{re_string}$").as_str()).or_else(|_| { - Err(anyhow!( - "creating regex for register {} failed", - cluster.name - )) - })?; - let ty_name = cluster.name.to_string(); // keep suffix for regex matching - let mut prev_match = None; - if ercs_type_info.len() > 0 { - // Check this type regex against previous names - for prev in &mut ercs_type_info { - let (prev_name, _prev_regex, prev_erc, prev_repr) = prev; - if let RegisterCluster::Cluster(_) = prev_erc { - // if matched force this cluster and the previous one to expand - if re.is_match(&prev_name) { - debug!( - "array {} matched to cluster {}, expanding array", - cluster.name, prev_name - ); - (**prev_repr, prev_match) = - redo_prev_repr(*prev_repr, &prev_match, &ty_name); - } - } - } - } - *repr = if prev_match.is_some() { - Repr::Expand { - // don't duplicate info if another array was matched - include_info: !prev_match.unwrap(), - } - } else { - // Check if the array itself requires expansion - let cluster_size = cluster_info_size_in_bits(cluster, repr, config) - .with_context(|| { - format!("Can't calculate cluster {} size", cluster.name) - })?; - let increment_bits = array_info.dim_increment * BITS_PER_BYTE; - let sequential_addresses = - (array_info.dim == 1) || (cluster_size == increment_bits); - let convert_list = match config.keep_list { - true => match &array_info.dim_name { - Some(dim_name) => dim_name.contains("[%s]"), - None => info.name.contains("[%s]"), - }, - false => true, - }; - if sequential_addresses && convert_list { - Repr::Array { include_info: true } - } else { - Repr::Expand { include_info: true } - } + Some(rpath) => DeriveInfo::Explicit(rpath), }; - ercs_type_info.push((ty_name, Some(re), erc, repr)) + ercs_type_info.push((ty_name, Some(re), erc, derive_info)); } }; } + &mut RegisterCluster::Cluster(cluster) => { + *derive_info = DeriveInfo::Cluster; + ercs_type_info.push((cluster.name.to_string(), None, erc, derive_info)); + } }; } - Ok(reprs) + Ok(derive_infos) } -/// Called when a previous `Repr`esentation needs to be updated because it matches the regex of a -/// disjoint array. Returns a tuple of the updated `Repr` and match status. -fn redo_prev_repr( - prev_repr: &Repr, - prev_match: &Option, - ty_name: &String, -) -> (Repr, Option) { - match prev_repr { - Repr::Array { .. } => ( - // include info only if there wasn't a previous array match - Repr::Expand { - include_info: if let Some(b) = prev_match { !b } else { true }, - }, - Some(true), // found a match and it is an array - ), - Repr::Expand { .. } => ( - Repr::Expand { - include_info: if let Some(b) = prev_match { !b } else { true }, - }, - Some(true), // found a match and it is an array - ), - Repr::Single { .. } => ( - Repr::Single { - include_info: false, - common: ty_name.clone(), - }, - if prev_match.is_none() { - Some(false) // found a match and it isn't an array - } else { - *prev_match // don't overwrite a previous match when this is a single - }, - ), +fn find_root(dpath: &str, path: &BlockPath, index: &Index) -> Result { + let (dblock, dname) = RegisterPath::parse_str(dpath); + let rdpath; + let reg_path; + let d = (if let Some(dblock) = dblock { + reg_path = dblock.new_register(dname); + rdpath = dblock; + index.registers.get(®_path) + } else { + reg_path = path.new_register(dname); + rdpath = path.clone(); + index.registers.get(®_path) + }) + .ok_or_else(|| anyhow!("register {} not found", dpath))?; + match d.derived_from.as_ref() { + Some(dp) => find_root(dp, &rdpath, index), + None => Ok(reg_path), } } +fn regex_against_prev( + ty_name: &str, + ercs_type_info: &Vec<(String, Option, &RegisterCluster, &mut DeriveInfo)>, +) -> Option { + let mut prev_match = None; + // Check this type name against previous regexs + for prev in ercs_type_info { + let (prev_name, prev_regex, prev_erc, _prev_derive_info) = prev; + if let RegisterCluster::Register(_) = prev_erc { + if let Some(prev_re) = prev_regex { + // if matched adopt the previous type name + if prev_re.is_match(&ty_name) { + prev_match = Some(prev_name.to_string()); + break; + } + } + } + } + prev_match +} + /// Calculate the size of a Cluster. If it is an array, then the dimensions /// tell us the size of the array. Otherwise, inspect the contents using /// [cluster_info_size_in_bits]. -fn cluster_size_in_bits(cluster: &Cluster, repr: &Repr, config: &Config) -> Result { +fn cluster_size_in_bits(cluster: &Cluster, config: &Config) -> Result { match cluster { - Cluster::Single(info) => cluster_info_size_in_bits(info, repr, config), + Cluster::Single(info) => cluster_info_size_in_bits(info, config), // If the contained array cluster has a mismatch between the // dimIncrement and the size of the array items, then the array // will get expanded in expand_cluster below. The overall size @@ -956,7 +906,7 @@ fn cluster_size_in_bits(cluster: &Cluster, repr: &Repr, config: &Config) -> Resu return Ok(0); // Special case! } let last_offset = (dim.dim - 1) * dim.dim_increment * BITS_PER_BYTE; - let last_size = cluster_info_size_in_bits(info, repr, config); + let last_size = cluster_info_size_in_bits(info, config); Ok(last_offset + last_size?) } } @@ -964,13 +914,13 @@ fn cluster_size_in_bits(cluster: &Cluster, repr: &Repr, config: &Config) -> Resu /// Recursively calculate the size of a ClusterInfo. A cluster's size is the /// maximum end position of its recursive children. -fn cluster_info_size_in_bits(info: &ClusterInfo, repr: &Repr, config: &Config) -> Result { +fn cluster_info_size_in_bits(info: &ClusterInfo, config: &Config) -> Result { let mut size = 0; for c in &info.children { let end = match c { RegisterCluster::Register(reg) => { - let reg_size: u32 = expand_register(reg, repr, config)? + let reg_size: u32 = expand_register(reg, &DeriveInfo::Root, config)? .iter() .map(|rbf| rbf.size) .sum(); @@ -978,7 +928,7 @@ fn cluster_info_size_in_bits(info: &ClusterInfo, repr: &Repr, config: &Config) - (reg.address_offset * BITS_PER_BYTE) + reg_size } RegisterCluster::Cluster(clust) => { - (clust.address_offset * BITS_PER_BYTE) + cluster_size_in_bits(clust, repr, config)? + (clust.address_offset * BITS_PER_BYTE) + cluster_size_in_bits(clust, config)? } }; @@ -988,16 +938,10 @@ fn cluster_info_size_in_bits(info: &ClusterInfo, repr: &Repr, config: &Config) - } /// Render a given cluster (and any children) into `RegisterBlockField`s -/// `Option`al bool parameter set to `Some(false)` will force an array to be expanded -/// while `None` or `Some(true)` will follow the conversion check. -fn expand_cluster( - cluster: &Cluster, - repr: &Repr, - config: &Config, -) -> Result> { +fn expand_cluster(cluster: &Cluster, config: &Config) -> Result> { let mut cluster_expanded = vec![]; - let cluster_size = cluster_info_size_in_bits(cluster, repr, config) + let cluster_size = cluster_info_size_in_bits(cluster, config) .with_context(|| format!("Can't calculate cluster {} size", cluster.name))?; let description = cluster .description @@ -1006,19 +950,7 @@ fn expand_cluster( .to_string(); let ty_name = if cluster.is_single() { - match repr { - Repr::Single { - include_info: _, - common, - } => util::replace_suffix(&common, ""), - _ => { - bail!( - "Cluster {} is a single, but was given a {}", - cluster.name, - repr - ); - } - } + cluster.name.to_string() } else { util::replace_suffix(&cluster.name, "") }; @@ -1046,6 +978,7 @@ fn expand_cluster( } else { cluster_size }; + let sequential_addresses = (array_info.dim == 1) || (cluster_size == increment_bits); // if dimIndex exists, test if it is a sequence of numbers from 0 to dim let sequential_indexes_from0 = array_info @@ -1053,84 +986,79 @@ fn expand_cluster( .filter(|r| *r.start() == 0) .is_some(); - match repr { - Repr::Array { .. } => { - let accessors = if sequential_indexes_from0 { - Vec::new() - } else { - let span = Span::call_site(); - let mut accessors = Vec::new(); - let nb_name_cs = ty_name.to_snake_case_ident(span); - for (i, idx) in array_info.indexes().enumerate() { - let idx_name = - util::replace_suffix(&info.name, &idx).to_snake_case_ident(span); - let comment = make_comment( - cluster_size, - info.address_offset + (i as u32) * cluster_size / 8, - &description, - ); - let i = unsuffixed(i as _); - accessors.push(ArrayAccessor { - doc: comment, - name: idx_name, - ty: ty.clone(), - basename: nb_name_cs.clone(), - i, - }); - } - accessors - }; - let array_ty = new_syn_array(ty, array_info.dim); - cluster_expanded.push(RegisterBlockField { - syn_field: new_syn_field( - ty_name.to_snake_case_ident(Span::call_site()), - array_ty, - ), - description, - offset: info.address_offset, - size: cluster_size * array_info.dim, - accessors, - }); - } + let convert_list = match config.keep_list { + true => match &array_info.dim_name { + Some(dim_name) => dim_name.contains("[%s]"), + None => info.name.contains("[%s]"), + }, + false => true, + }; - Repr::Expand { .. } => { - if sequential_indexes_from0 && config.const_generic { - // Include a ZST ArrayProxy giving indexed access to the - // elements. - let ap_path = array_proxy_type(ty, array_info); - let syn_field = - new_syn_field(ty_name.to_snake_case_ident(Span::call_site()), ap_path); - cluster_expanded.push(RegisterBlockField { - syn_field, - description: info.description.as_ref().unwrap_or(&info.name).into(), - offset: info.address_offset, - size: 0, - accessors: Vec::new(), + let array_convertible = sequential_addresses && convert_list; + + if array_convertible { + let accessors = if sequential_indexes_from0 { + Vec::new() + } else { + let span = Span::call_site(); + let mut accessors = Vec::new(); + let nb_name_cs = ty_name.to_snake_case_ident(span); + for (i, idx) in array_info.indexes().enumerate() { + let idx_name = + util::replace_suffix(&info.name, &idx).to_snake_case_ident(span); + let comment = make_comment( + cluster_size, + info.address_offset + (i as u32) * cluster_size / 8, + &description, + ); + let i = unsuffixed(i as _); + accessors.push(ArrayAccessor { + doc: comment, + name: idx_name, + ty: ty.clone(), + basename: nb_name_cs.clone(), + i, }); - } else { - for (field_num, idx) in array_info.indexes().enumerate() { - let nb_name = util::replace_suffix(&info.name, &idx); - let syn_field = new_syn_field( - nb_name.to_snake_case_ident(Span::call_site()), - ty.clone(), - ); - cluster_expanded.push(RegisterBlockField { - syn_field, - description: description.clone(), - offset: info.address_offset - + field_num as u32 * array_info.dim_increment, - size: cluster_size, - accessors: Vec::new(), - }); - } } - } - _ => { - bail!( - "cluster {} is an array, but was given a {}", - cluster.name, - repr - ); + accessors + }; + let array_ty = new_syn_array(ty, array_info.dim); + cluster_expanded.push(RegisterBlockField { + syn_field: new_syn_field( + ty_name.to_snake_case_ident(Span::call_site()), + array_ty, + ), + description, + offset: info.address_offset, + size: cluster_size * array_info.dim, + accessors, + }); + } else if sequential_indexes_from0 && config.const_generic { + // Include a ZST ArrayProxy giving indexed access to the + // elements. + let ap_path = array_proxy_type(ty, array_info); + let syn_field = + new_syn_field(ty_name.to_snake_case_ident(Span::call_site()), ap_path); + cluster_expanded.push(RegisterBlockField { + syn_field, + description: info.description.as_ref().unwrap_or(&info.name).into(), + offset: info.address_offset, + size: 0, + accessors: Vec::new(), + }); + } else { + for (field_num, idx) in array_info.indexes().enumerate() { + let nb_name = util::replace_suffix(&info.name, &idx); + let syn_field = + new_syn_field(nb_name.to_snake_case_ident(Span::call_site()), ty.clone()); + + cluster_expanded.push(RegisterBlockField { + syn_field, + description: description.clone(), + offset: info.address_offset + field_num as u32 * array_info.dim_increment, + size: cluster_size, + accessors: Vec::new(), + }); } } } @@ -1141,11 +1069,10 @@ fn expand_cluster( /// If svd register arrays can't be converted to rust arrays (non sequential addresses, non /// numeral indexes, or not containing all elements from 0 to size) they will be expanded. -/// `Option`al bool parameter set to `Some(false)` will force an array to be expanded -/// while `None` or `Some(true)` will follow the conversion check. +/// A `DeriveInfo::Implicit(_)` will also cause an array to be expanded. fn expand_register( register: &Register, - repr: &Repr, + derive_info: &DeriveInfo, config: &Config, ) -> Result> { let mut register_expanded = vec![]; @@ -1158,19 +1085,7 @@ fn expand_register( let info_name = register.fullname(config.ignore_groups); let ty_name = if register.is_single() { - match repr { - Repr::Single { - include_info: _, - common, - } => util::replace_suffix(&common, ""), - _ => { - bail!( - "register {} is a single, but was given a {}", - register.name, - repr - ); - } - } + info_name.to_string() } else { util::replace_suffix(&info_name, "") }; @@ -1178,7 +1093,7 @@ fn expand_register( match register { Register::Single(info) => { - let syn_field = new_syn_field(info_name.to_snake_case_ident(Span::call_site()), ty); + let syn_field = new_syn_field(ty_name.to_snake_case_ident(Span::call_site()), ty); register_expanded.push(RegisterBlockField { syn_field, description, @@ -1188,75 +1103,80 @@ fn expand_register( }) } Register::Array(info, array_info) => { - match repr { - Repr::Array { .. } => { - // if dimIndex exists, test if it is a sequence of numbers from 0 to dim - let sequential_indexes_from0 = array_info - .indexes_as_range() - .filter(|r| *r.start() == 0) - .is_some(); - - let accessors = if sequential_indexes_from0 { - Vec::new() - } else { - let span = Span::call_site(); - let mut accessors = Vec::new(); - let nb_name_cs = ty_name.to_snake_case_ident(span); - for (i, idx) in array_info.indexes().enumerate() { - let idx_name = - util::replace_suffix(&info_name, &idx).to_snake_case_ident(span); - let comment = make_comment( - register_size, - info.address_offset + (i as u32) * register_size / 8, - &description, - ); - let i = unsuffixed(i as _); - accessors.push(ArrayAccessor { - doc: comment, - name: idx_name, - ty: ty.clone(), - basename: nb_name_cs.clone(), - i, - }); - } - accessors - }; - let array_ty = new_syn_array(ty, array_info.dim); + let sequential_addresses = (array_info.dim == 1) + || (register_size == array_info.dim_increment * BITS_PER_BYTE); + + let convert_list = match config.keep_list { + true => match &array_info.dim_name { + Some(dim_name) => dim_name.contains("[%s]"), + None => info.name.contains("[%s]"), + }, + false => true, + }; + + // force expansion if we're implicitly deriving so we don't get name collisions + let array_convertible = if let DeriveInfo::Implicit(_) = derive_info { + false + } else { + sequential_addresses && convert_list + }; + + if array_convertible { + // if dimIndex exists, test if it is a sequence of numbers from 0 to dim + let sequential_indexes_from0 = array_info + .indexes_as_range() + .filter(|r| *r.start() == 0) + .is_some(); + + let accessors = if sequential_indexes_from0 { + Vec::new() + } else { + let span = Span::call_site(); + let mut accessors = Vec::new(); + let nb_name_cs = ty_name.to_snake_case_ident(span); + for (i, idx) in array_info.indexes().enumerate() { + let idx_name = + util::replace_suffix(&info_name, &idx).to_snake_case_ident(span); + let comment = make_comment( + register_size, + info.address_offset + (i as u32) * register_size / 8, + &description, + ); + let i = unsuffixed(i as _); + accessors.push(ArrayAccessor { + doc: comment, + name: idx_name, + ty: ty.clone(), + basename: nb_name_cs.clone(), + i, + }); + } + accessors + }; + let array_ty = new_syn_array(ty, array_info.dim); + let syn_field = + new_syn_field(ty_name.to_snake_case_ident(Span::call_site()), array_ty); + register_expanded.push(RegisterBlockField { + syn_field, + description, + offset: info.address_offset, + size: register_size * array_info.dim, + accessors, + }); + } else { + for (field_num, idx) in array_info.indexes().enumerate() { + let nb_name = util::replace_suffix(&info_name, &idx); let syn_field = - new_syn_field(ty_name.to_snake_case_ident(Span::call_site()), array_ty); + new_syn_field(nb_name.to_snake_case_ident(Span::call_site()), ty.clone()); + register_expanded.push(RegisterBlockField { syn_field, - description, - offset: info.address_offset, - size: register_size * array_info.dim, - accessors, + description: description.clone(), + offset: info.address_offset + field_num as u32 * array_info.dim_increment, + size: register_size, + accessors: Vec::new(), }); } - Repr::Expand { .. } => { - for (field_num, idx) in array_info.indexes().enumerate() { - let nb_name = util::replace_suffix(&info_name, &idx); - let syn_field = new_syn_field( - nb_name.to_snake_case_ident(Span::call_site()), - ty.clone(), - ); - - register_expanded.push(RegisterBlockField { - syn_field, - description: description.clone(), - offset: info.address_offset - + field_num as u32 * array_info.dim_increment, - size: register_size, - accessors: Vec::new(), - }); - } - } - _ => { - bail!( - "register {} is an array, but was given a {}", - register.name, - repr - ); - } } } } @@ -1266,15 +1186,15 @@ fn expand_register( fn render_ercs( ercs: &mut [RegisterCluster], - reprs: &[Repr], + derive_infos: &[DeriveInfo], path: &BlockPath, index: &Index, config: &Config, ) -> Result { let mut mod_items = TokenStream::new(); - let zipped = ercs.iter_mut().zip(reprs.iter()); - for (erc, repr) in zipped { + let zipped = ercs.iter_mut().zip(derive_infos.iter()); + for (erc, derive_info) in zipped { match erc { // Generate the sub-cluster blocks. RegisterCluster::Cluster(c) => { @@ -1289,40 +1209,35 @@ fn render_ercs( // Generate definition for each of the registers. RegisterCluster::Register(reg) => { - // continue if the type is labeled for `NoInfo` - match repr { - Repr::Array { include_info } => { - if !include_info { - continue; + trace!("Register: {}, DeriveInfo: {}", reg.name, derive_info); + let mut rpath = None; + let before_name = reg.name.to_string(); + if let DeriveInfo::Implicit(rp) = derive_info { + let mut idx_name = None; + let info_name = reg.fullname(config.ignore_groups).to_string(); + if let Register::Array(_, array_info) = reg { + for (_, i) in array_info.indexes().enumerate() { + idx_name = Some(util::replace_suffix(&info_name, &i).to_string()); } } - Repr::Expand { include_info } => { - if !include_info { - continue; - } + if let Some(name) = idx_name { + reg.name = name; } - Repr::Single { - include_info, - common: _, - } => { - if !include_info { - continue; - } + rpath = Some(rp.clone()); + } else { + let dpath = reg.derived_from.take(); + if let Some(dpath) = dpath { + rpath = derive_register(reg, &dpath, path, index)?; } } - trace!("Register: {}", reg.name); - let mut rpath = None; - let dpath = reg.derived_from.take(); - if let Some(dpath) = dpath { - rpath = derive_register(reg, &dpath, path, index)?; - } - let reg_name = ®.name; - let rendered_reg = register::render(reg, path, rpath, index, config).with_context(|| { let descrip = reg.description.as_deref().unwrap_or("No description"); - format!("Erro rendering register\nName: {reg_name}\nDescription: {descrip}") + format!( + "Error rendering register\nName: {before_name}\nDescription: {descrip}" + ) })?; + reg.name = before_name; mod_items.extend(rendered_reg) } } @@ -1372,8 +1287,8 @@ fn cluster_block( }) } else { let cpath = path.new_cluster(&c.name); - let mod_reprs = check_erc_reprs(&c.children, config)?; - let mod_items = render_ercs(&mut c.children, &mod_reprs, &cpath, index, config)?; + let mod_derive_infos = check_erc_derive_infos(&mut c.children, &cpath, index, config)?; + let mod_items = render_ercs(&mut c.children, &mod_derive_infos, &cpath, index, config)?; // Generate the register block. let cluster_size = match c { @@ -1384,7 +1299,7 @@ fn cluster_block( }; let reg_block = register_or_cluster_block( &c.children, - &mod_reprs, + &mod_derive_infos, Some(&mod_name), cluster_size, config, From 874f7df2b634e7fe85388b6416c1370e84802a3f Mon Sep 17 00:00:00 2001 From: n8tlarsen Date: Sat, 5 Nov 2022 14:10:05 -0500 Subject: [PATCH 059/319] Resolve name conflicts when deriving --- CHANGELOG.md | 2 +- src/generate/peripheral.rs | 57 +++++++++++++++++++++----------------- src/generate/register.rs | 22 ++++++++++++--- 3 files changed, 50 insertions(+), 31 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 4992308a..ad384a24 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -11,6 +11,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - Test patched STM32 - simplify ci strategy - Fix generated code for MSP430 atomics +- Add handling for disjoint arrays ## [v0.27.1] - 2022-10-25 @@ -40,7 +41,6 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - Bring documentation on how to generate MSP430 PACs up to date (in line with [msp430_svd](https://github.com/pftbest/msp430_svd)). - Prefix submodule path with self:: when reexporting submodules to avoid ambiguity in crate path. -- Add handling for disjoint arrays ## [v0.25.1] - 2022-08-22 diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index a5c9dfaa..2f0cc8ef 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -539,7 +539,7 @@ fn register_or_cluster_block( let ercs_expanded = expand(ercs, derive_infos, config) .with_context(|| "Could not expand register or cluster block")?; - // Locate conflicting regions; we'll need to use unions to derive_infoesent them. + // Locate conflicting regions; we'll need to use unions to represent them. let mut regions = FieldRegions::default(); for reg_block_field in &ercs_expanded { @@ -1084,15 +1084,15 @@ fn expand_register( let description = register.description.clone().unwrap_or_default(); let info_name = register.fullname(config.ignore_groups); - let ty_name = if register.is_single() { + let mut ty_name = if register.is_single() { info_name.to_string() } else { util::replace_suffix(&info_name, "") }; - let ty = name_to_ty(&ty_name); match register { Register::Single(info) => { + let ty = name_to_ty(&ty_name); let syn_field = new_syn_field(ty_name.to_snake_case_ident(Span::call_site()), ty); register_expanded.push(RegisterBlockField { syn_field, @@ -1114,20 +1114,36 @@ fn expand_register( false => true, }; - // force expansion if we're implicitly deriving so we don't get name collisions - let array_convertible = if let DeriveInfo::Implicit(_) = derive_info { - false + // if dimIndex exists, test if it is a sequence of numbers from 0 to dim + let sequential_indexes_from0 = array_info + .indexes_as_range() + .filter(|r| *r.start() == 0) + .is_some(); + + // force expansion and rename if we're deriving an array that doesnt start at 0 so we don't get name collisions + let index: Cow = if let Some(dim_index) = &array_info.dim_index { + dim_index.first().unwrap().into() } else { - sequential_addresses && convert_list + if sequential_indexes_from0 { + "0".into() + } else { + "".into() + } + }; + let array_convertible = match derive_info { + DeriveInfo::Implicit(_) => { + ty_name = util::replace_suffix(&info_name, &index); + sequential_addresses && convert_list && sequential_indexes_from0 + } + DeriveInfo::Explicit(_) => { + ty_name = util::replace_suffix(&info_name, &index); + sequential_addresses && convert_list && sequential_indexes_from0 + } + _ => sequential_addresses && convert_list, }; + let ty = name_to_ty(&ty_name); if array_convertible { - // if dimIndex exists, test if it is a sequence of numbers from 0 to dim - let sequential_indexes_from0 = array_info - .indexes_as_range() - .filter(|r| *r.start() == 0) - .is_some(); - let accessors = if sequential_indexes_from0 { Vec::new() } else { @@ -1211,18 +1227,7 @@ fn render_ercs( RegisterCluster::Register(reg) => { trace!("Register: {}, DeriveInfo: {}", reg.name, derive_info); let mut rpath = None; - let before_name = reg.name.to_string(); if let DeriveInfo::Implicit(rp) = derive_info { - let mut idx_name = None; - let info_name = reg.fullname(config.ignore_groups).to_string(); - if let Register::Array(_, array_info) = reg { - for (_, i) in array_info.indexes().enumerate() { - idx_name = Some(util::replace_suffix(&info_name, &i).to_string()); - } - } - if let Some(name) = idx_name { - reg.name = name; - } rpath = Some(rp.clone()); } else { let dpath = reg.derived_from.take(); @@ -1230,14 +1235,14 @@ fn render_ercs( rpath = derive_register(reg, &dpath, path, index)?; } } + let reg_name = ®.name; let rendered_reg = register::render(reg, path, rpath, index, config).with_context(|| { let descrip = reg.description.as_deref().unwrap_or("No description"); format!( - "Error rendering register\nName: {before_name}\nDescription: {descrip}" + "Error rendering register\nName: {reg_name}\nDescription: {descrip}" ) })?; - reg.name = before_name; mod_items.extend(rendered_reg) } } diff --git a/src/generate/register.rs b/src/generate/register.rs index a2c16420..60aed796 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -1,17 +1,21 @@ use crate::svd::{ - Access, BitRange, EnumeratedValues, Field, ModifiedWriteValues, ReadAction, Register, - RegisterProperties, Usage, WriteConstraint, + Access, BitRange, EnumeratedValues, Field, MaybeArray, ModifiedWriteValues, ReadAction, + Register, RegisterProperties, Usage, WriteConstraint, }; use core::u64; use log::warn; use proc_macro2::{Ident, Punct, Spacing, Span, TokenStream}; use quote::{quote, ToTokens}; +use std::borrow::Cow; use std::collections::HashSet; use svd_parser::expand::{ derive_enumerated_values, derive_field, BlockPath, EnumPath, FieldPath, Index, RegisterPath, }; -use crate::util::{self, ident_to_path, path_segment, type_path, Config, ToSanitizedCase, U32Ext}; +use crate::util::{ + self, ident_to_path, path_segment, replace_suffix, type_path, Config, FullName, + ToSanitizedCase, U32Ext, +}; use anyhow::{anyhow, Result}; use syn::punctuated::Punctuated; @@ -22,7 +26,17 @@ pub fn render( index: &Index, config: &Config, ) -> Result { - let name = util::name_of(register, config.ignore_groups); + let mut name = util::name_of(register, config.ignore_groups); + // Rename if this is a derived array + if dpath.is_some() { + if let MaybeArray::Array(info, array_info) = register { + if let Some(dim_index) = &array_info.dim_index { + let index: Cow = dim_index.first().unwrap().into(); + name = + replace_suffix(&info.fullname(config.ignore_groups), &index.to_string()).into() + } + } + } let span = Span::call_site(); let name_constant_case = name.to_constant_case_ident(span); let name_snake_case = name.to_snake_case_ident(span); From 160b9ee9d1f3440b2e9ef7dcc3287287c92f4c76 Mon Sep 17 00:00:00 2001 From: Alex Touchet Date: Sun, 20 Nov 2022 22:25:11 -0800 Subject: [PATCH 060/319] Use HTTPS for links --- CHANGELOG.md | 4 ++-- CODE_OF_CONDUCT.md | 2 +- README.md | 4 ++-- src/lib.rs | 2 +- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index ff859e6b..40261793 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -2,8 +2,8 @@ All notable changes to this project will be documented in this file. -The format is based on [Keep a Changelog](http://keepachangelog.com/) -and this project adheres to [Semantic Versioning](http://semver.org/). +The format is based on [Keep a Changelog](https://keepachangelog.com/) +and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] diff --git a/CODE_OF_CONDUCT.md b/CODE_OF_CONDUCT.md index a30c4c0d..bd8a797e 100644 --- a/CODE_OF_CONDUCT.md +++ b/CODE_OF_CONDUCT.md @@ -32,6 +32,6 @@ And if someone takes issue with something you said or did, resist the urge to be The enforcement policies listed above apply to all official embedded WG venues; including official IRC channels (#rust-embedded); GitHub repositories under rust-embedded; and all forums under rust-embedded.org (forum.rust-embedded.org). -*Adapted from the [Node.js Policy on Trolling](http://blog.izs.me/post/30036893703/policy-on-trolling) as well as the [Contributor Covenant v1.3.0](https://www.contributor-covenant.org/version/1/3/0/).* +*Adapted from the [Node.js Policy on Trolling](https://blog.izs.me/2012/08/policy-on-trolling/) as well as the [Contributor Covenant v1.3.0](https://www.contributor-covenant.org/version/1/3/0/).* [team]: https://github.com/rust-embedded/wg#the-tools-team diff --git a/README.md b/README.md index 4ac346f3..d0f6bb1b 100644 --- a/README.md +++ b/README.md @@ -28,8 +28,8 @@ Check out the [svd2rust-regress README](ci/svd2rust-regress/README.md) for infor Licensed under either of - Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or - http://www.apache.org/licenses/LICENSE-2.0) -- MIT license ([LICENSE-MIT](LICENSE-MIT) or http://opensource.org/licenses/MIT) + https://www.apache.org/licenses/LICENSE-2.0) +- MIT license ([LICENSE-MIT](LICENSE-MIT) or https://opensource.org/licenses/MIT) at your option. diff --git a/src/lib.rs b/src/lib.rs index 6b7f9142..e478cad9 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -1,6 +1,6 @@ //! Peripheral API generator from [CMSIS-SVD] files //! -//! [CMSIS-SVD]: http://www.keil.com/pack/doc/CMSIS/SVD/html/index.html +//! [CMSIS-SVD]: https://www.keil.com/pack/doc/CMSIS/SVD/html/index.html //! //! An SVD file is an XML file that describes the hardware features of a //! microcontroller. In particular, it lists all the peripherals available to the From 7d4e736b3785d9590e9ea57e125d5ccbc8720df9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Tue, 29 Nov 2022 18:03:45 +0100 Subject: [PATCH 061/319] make it clear how to enable the `take` method --- src/lib.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/lib.rs b/src/lib.rs index e478cad9..72a306f1 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -170,7 +170,7 @@ //! To use a peripheral first you must get an *instance* of the peripheral. All the device //! peripherals are modeled as singletons (there can only ever be, at most, one instance of any //! one of them) and the only way to get an instance of them is through the `Peripherals::take` -//! method. +//! method, enabled via the `critical-section` feature on the generated crate. //! //! ```ignore //! let mut peripherals = stm32f30x::Peripherals::take().unwrap(); From 7d6c6479d1f1b9a4bc054a9bf2fcba94eb8e2612 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Tue, 29 Nov 2022 18:05:04 +0100 Subject: [PATCH 062/319] fix minor typo --- src/generate/generic.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/generate/generic.rs b/src/generate/generic.rs index 4ed05dc4..d1f252f4 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -49,7 +49,7 @@ pub trait RegisterSpec { /// Trait implemented by readable registers to enable the `read` method. /// -/// Registers marked with `Writable` can be also `modify`'ed. +/// Registers marked with `Writable` can be also be `modify`'ed. pub trait Readable: RegisterSpec { /// Result from a call to `read` and argument to `modify`. type Reader: From> + core::ops::Deref>; @@ -59,7 +59,7 @@ pub trait Readable: RegisterSpec { /// /// This enables the `write`, `write_with_zero` and `reset` methods. /// -/// Registers marked with `Readable` can be also `modify`'ed. +/// Registers marked with `Readable` can be also be `modify`'ed. pub trait Writable: RegisterSpec { /// Writer type argument to `write`, et al. type Writer: From> + core::ops::DerefMut>; From cdc3a9d56913f3897204eec572fa24017b64d83f Mon Sep 17 00:00:00 2001 From: n8tlarsen Date: Mon, 21 Nov 2022 11:38:37 -0600 Subject: [PATCH 063/319] Compare properties and fields before implicitly deriving --- CHANGELOG.md | 2 +- src/generate/peripheral.rs | 187 +++++++++++++++++++++++-------------- 2 files changed, 116 insertions(+), 73 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index ff859e6b..81d139a4 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -14,7 +14,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). - Test patched STM32 - simplify ci strategy - Fix generated code for MSP430 atomics -- Add handling for disjoint arrays +- Add handling for disjoint register arrays and validation of derives ## [v0.27.1] - 2022-10-25 diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index b4a3834b..14ffa9c3 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -6,7 +6,10 @@ use svd_parser::expand::{ derive_cluster, derive_peripheral, derive_register, BlockPath, Index, RegisterPath, }; -use crate::svd::{array::names, Cluster, ClusterInfo, Peripheral, Register, RegisterCluster}; +use crate::svd::{ + array::names, Cluster, ClusterInfo, MaybeArray, Peripheral, Register, RegisterCluster, + RegisterInfo, +}; use log::{debug, trace, warn}; use proc_macro2::{Ident, Punct, Spacing, Span, TokenStream}; use quote::{quote, ToTokens}; @@ -736,7 +739,10 @@ fn check_erc_derive_infos( &mut RegisterCluster::Register(register) => { let info_name = register.fullname(config.ignore_groups).to_string(); let explicit_rpath = match &mut register.derived_from.clone() { - Some(dpath) => Some(find_root(&dpath, path, index)?), + Some(dpath) => { + let (_, root) = find_root(&dpath, path, index)?; + Some(root) + } None => None, }; match register { @@ -744,10 +750,15 @@ fn check_erc_derive_infos( let ty_name = info_name.to_string(); *derive_info = match explicit_rpath { None => { - match regex_against_prev(&ty_name, &ercs_type_info) { - Some(prev_name) => { + match compare_this_against_prev( + ®ister, + &ty_name, + path, + index, + &ercs_type_info, + )? { + Some(root) => { // make sure the matched register isn't already deriving from this register - let root = find_root(&prev_name, path, index)?; if ty_name == root.name { DeriveInfo::Root } else { @@ -774,63 +785,22 @@ fn check_erc_derive_infos( let ty_name = info_name.to_string(); // keep suffix for regex matching *derive_info = match explicit_rpath { None => { - match regex_against_prev(&ty_name, &ercs_type_info) { - Some(prev_name) => { - let root = find_root(&prev_name, path, index)?; - DeriveInfo::Implicit(root) - } - None => { - let mut my_derive_info = DeriveInfo::Root; - // Check this type regex against previous names - for prev in &mut ercs_type_info { - let ( - prev_name, - _prev_regex, - prev_erc, - prev_derive_info, - ) = prev; - if let RegisterCluster::Register(prev_reg) = prev_erc { - if let Register::Array(..) = prev_reg { - // Arrays had a chance to match above - continue; - } - if re.is_match(&prev_name) { - let loop_derive_info = match prev_derive_info { - DeriveInfo::Root => { - let implicit_rpath = - find_root(&ty_name, path, index)?; - **prev_derive_info = - DeriveInfo::Implicit(implicit_rpath); - DeriveInfo::Root - } - DeriveInfo::Explicit(rpath) => { - let implicit_rpath = find_root( - &rpath.name, - path, - index, - )?; - DeriveInfo::Implicit(implicit_rpath) - } - DeriveInfo::Implicit(rpath) => { - DeriveInfo::Implicit(rpath.clone()) - } - DeriveInfo::Cluster => { - return Err(anyhow!( - "register {} derive_infoesented as cluster", - register.name - )) - } - }; - if let DeriveInfo::Root = my_derive_info { - if my_derive_info != loop_derive_info { - my_derive_info = loop_derive_info; - } - } - } - } - } - my_derive_info - } + match compare_this_against_prev( + ®ister, + &ty_name, + path, + index, + &ercs_type_info, + )? { + Some(root) => DeriveInfo::Implicit(root), + None => compare_prev_against_this( + ®ister, + &ty_name, + &re, + path, + index, + &mut ercs_type_info, + )?, } } Some(rpath) => DeriveInfo::Explicit(rpath), @@ -848,7 +818,11 @@ fn check_erc_derive_infos( Ok(derive_infos) } -fn find_root(dpath: &str, path: &BlockPath, index: &Index) -> Result { +fn find_root( + dpath: &str, + path: &BlockPath, + index: &Index, +) -> Result<(MaybeArray, RegisterPath)> { let (dblock, dname) = RegisterPath::parse_str(dpath); let rdpath; let reg_path; @@ -864,29 +838,98 @@ fn find_root(dpath: &str, path: &BlockPath, index: &Index) -> Result find_root(dp, &rdpath, index), - None => Ok(reg_path), + None => Ok(((*d).clone(), reg_path)), } } -fn regex_against_prev( +/// Compare the given type name against previous regexs, then inspect fields +fn compare_this_against_prev( + reg: &MaybeArray, ty_name: &str, + path: &BlockPath, + index: &Index, ercs_type_info: &Vec<(String, Option, &RegisterCluster, &mut DeriveInfo)>, -) -> Option { - let mut prev_match = None; - // Check this type name against previous regexs +) -> Result> { for prev in ercs_type_info { let (prev_name, prev_regex, prev_erc, _prev_derive_info) = prev; if let RegisterCluster::Register(_) = prev_erc { if let Some(prev_re) = prev_regex { - // if matched adopt the previous type name if prev_re.is_match(&ty_name) { - prev_match = Some(prev_name.to_string()); - break; + let (source_reg, rpath) = find_root(&prev_name, path, index)?; + if is_derivable(&source_reg, ®) { + return Ok(Some(rpath)); + } } } } } - prev_match + Ok(None) +} + +/// Compare the given type name against previous regexs, then inspect fields +fn compare_prev_against_this( + reg: &MaybeArray, + ty_name: &String, + re: ®ex::Regex, + path: &BlockPath, + index: &Index, + ercs_type_info: &mut Vec<(String, Option, &RegisterCluster, &mut DeriveInfo)>, +) -> Result { + let mut my_derive_info = DeriveInfo::Root; + // Check this type regex against previous names + for prev in ercs_type_info { + let (prev_name, _prev_regex, prev_erc, prev_derive_info) = prev; + if let RegisterCluster::Register(prev_reg) = prev_erc { + if let Register::Array(..) = prev_reg { + // Arrays are covered with compare_this_against_prev + continue; + } + if re.is_match(&prev_name) { + let loop_derive_info = match prev_derive_info { + DeriveInfo::Root => { + // Get the RegisterPath for reg + let (_, implicit_rpath) = find_root(&ty_name, path, index)?; + if is_derivable(&prev_reg, ®) { + **prev_derive_info = DeriveInfo::Implicit(implicit_rpath); + } + DeriveInfo::Root + } + DeriveInfo::Explicit(rpath) => { + let (source_reg, implicit_rpath) = find_root(&rpath.name, path, index)?; + if is_derivable(&source_reg, reg) { + DeriveInfo::Implicit(implicit_rpath) + } else { + DeriveInfo::Root + } + } + DeriveInfo::Implicit(rpath) => { + let (source_reg, _) = find_root(&rpath.name, path, index)?; + if is_derivable(&source_reg, reg) { + DeriveInfo::Implicit(rpath.clone()) + } else { + DeriveInfo::Root + } + } + DeriveInfo::Cluster => { + return Err(anyhow!("register {} represented as cluster", prev_reg.name)) + } + }; + if let DeriveInfo::Root = my_derive_info { + if my_derive_info != loop_derive_info { + my_derive_info = loop_derive_info; + } + } + } + } + } + Ok(my_derive_info) +} + +fn is_derivable( + source_reg: &MaybeArray, + target_reg: &MaybeArray, +) -> bool { + (source_reg.properties == target_reg.properties) && (source_reg.fields == target_reg.fields) } /// Calculate the size of a Cluster. If it is an array, then the dimensions From c97573ad8e3dad35b0374a6f53eeecde296d87ac Mon Sep 17 00:00:00 2001 From: YuhanLiin Date: Sat, 24 Dec 2022 21:45:18 -0500 Subject: [PATCH 064/319] Bump portable-atomic to 0.3.16 and stop using fetch_* methods --- ci/script.sh | 2 +- ci/svd2rust-regress/src/svd_test.rs | 2 +- src/generate/generic_atomic.rs | 6 +++--- src/lib.rs | 2 +- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/ci/script.sh b/ci/script.sh index 1b697412..8d86d40a 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -47,7 +47,7 @@ main() { echo 'derive_more = "0.99"' >> $td/Cargo.toml fi if [[ "$options" == *"--atomics"* ]]; then - echo 'portable-atomic = { version = "0.3.15", default-features = false }' >> $td/Cargo.toml + echo 'portable-atomic = { version = "0.3.16", default-features = false }' >> $td/Cargo.toml fi echo '[profile.dev]' >> $td/Cargo.toml echo 'incremental = false' >> $td/Cargo.toml diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 81e077ae..4c5368af 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -8,7 +8,7 @@ use std::process::{Command, Output}; const CRATES_ALL: &[&str] = &["critical-section = \"1.0\"", "vcell = \"0.1.2\""]; const CRATES_MSP430: &[&str] = &["msp430 = \"0.4.0\"", "msp430-rt = \"0.4.0\""]; const CRATES_ATOMICS: &[&str] = - &["portable-atomic = { version = \"0.3.15\", default-features = false }"]; + &["portable-atomic = { version = \"0.3.16\", default-features = false }"]; const CRATES_CORTEX_M: &[&str] = &["cortex-m = \"0.7.6\"", "cortex-m-rt = \"0.6.13\""]; const CRATES_RISCV: &[&str] = &["riscv = \"0.9.0\"", "riscv-rt = \"0.9.0\""]; const CRATES_XTENSALX: &[&str] = &["xtensa-lx-rt = \"0.9.0\"", "xtensa-lx = \"0.6.0\""]; diff --git a/src/generate/generic_atomic.rs b/src/generate/generic_atomic.rs index 7d9639db..c9f5380a 100644 --- a/src/generate/generic_atomic.rs +++ b/src/generate/generic_atomic.rs @@ -11,15 +11,15 @@ mod atomic { ($U:ty, $Atomic:ty) => { impl AtomicOperations for $U { unsafe fn atomic_or(ptr: *mut Self, val: Self) { - (*(ptr as *const $Atomic)).fetch_or(val, Ordering::SeqCst); + (*(ptr as *const $Atomic)).or(val, Ordering::SeqCst); } unsafe fn atomic_and(ptr: *mut Self, val: Self) { - (*(ptr as *const $Atomic)).fetch_and(val, Ordering::SeqCst); + (*(ptr as *const $Atomic)).and(val, Ordering::SeqCst); } unsafe fn atomic_xor(ptr: *mut Self, val: Self) { - (*(ptr as *const $Atomic)).fetch_xor(val, Ordering::SeqCst); + (*(ptr as *const $Atomic)).xor(val, Ordering::SeqCst); } } }; diff --git a/src/lib.rs b/src/lib.rs index de6af1ac..2f1a90e7 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -492,7 +492,7 @@ //! concurrently called on different bits in the same register without data races. This flag won't //! work for RISCV chips without the atomic extension. //! -//! `portable-atomic` v0.3.15 must be added to the dependencies, with default features off to +//! `portable-atomic` v0.3.16 must be added to the dependencies, with default features off to //! disable the `fallback` feature. //! //! Usage examples: From 3fe8c4fb62b7a12bf06430f892486a4102d73888 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 25 Dec 2022 17:23:17 +0300 Subject: [PATCH 065/319] clippy && release 0.28 --- CHANGELOG.md | 7 +++-- Cargo.toml | 6 ++-- src/generate/peripheral.rs | 59 ++++++++++++++++---------------------- src/generate/register.rs | 3 +- 4 files changed, 34 insertions(+), 41 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 9edee44c..9cb951ad 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,8 +7,11 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.28.0] - 2022-12-25 + - Generate atomic register code for non-MSP430 targets - Change --nightly flag to --atomics +- Add handling for disjoint register arrays and validation of derives ## [v0.27.2] - 2022-11-06 @@ -17,7 +20,6 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Test patched STM32 - simplify ci strategy - Fix generated code for MSP430 atomics -- Add handling for disjoint register arrays and validation of derives ## [v0.27.1] - 2022-10-25 @@ -778,7 +780,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.27.2...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.28.0...HEAD +[v0.28.0]: https://github.com/rust-embedded/svd2rust/compare/v0.27.2...v0.28.0 [v0.27.2]: https://github.com/rust-embedded/svd2rust/compare/v0.27.1...v0.27.2 [v0.27.1]: https://github.com/rust-embedded/svd2rust/compare/v0.27.0...v0.27.1 [v0.27.0]: https://github.com/rust-embedded/svd2rust/compare/v0.26.0...v0.27.0 diff --git a/Cargo.toml b/Cargo.toml index 39ae6656..9c90a853 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.27.2" +version = "0.28.0" readme = "README.md" rust-version = "1.60" @@ -45,7 +45,7 @@ yaml = ["dep:serde_yaml"] [dependencies] clap = { version = "4.0", optional = true } irx-config = { version = "3.1", features = ["cmd", "toml-parser"], optional = true } -env_logger = { version = "0.9", optional = true } +env_logger = { version = "0.10", optional = true } inflections = "1.1" log = { version = "~0.4", features = ["std"] } quote = "1.0" @@ -55,7 +55,7 @@ thiserror = "1.0" serde = { version = "1.0", optional = true } serde_json = { version = "1.0.85", optional = true } serde_yaml = { version = "0.9.11", optional = true } -regex = "1.6.0" +regex = "1.7.0" [dependencies.svd-parser] features = ["expand"] diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 14ffa9c3..8a069d29 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -202,17 +202,13 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result let derive_infos = check_erc_derive_infos(&mut ercs, &path, index, config)?; let zipped = ercs.iter_mut().zip(derive_infos.iter()); for (mut erc, derive_info) in zipped { - match &mut erc { - &mut RegisterCluster::Register(register) => match derive_info { - DeriveInfo::Implicit(rpath) => { - debug!( - "register {} implicitly derives from {}", - register.name, rpath.name - ); - } - _ => {} - }, - _ => {} + if let RegisterCluster::Register(register) = &mut erc { + if let DeriveInfo::Implicit(rpath) = derive_info { + debug!( + "register {} implicitly derives from {}", + register.name, rpath.name + ); + } } } @@ -736,11 +732,11 @@ fn check_erc_derive_infos( let zipped = ercs.iter_mut().zip(derive_infos_slice.iter_mut()); for (mut erc, derive_info) in zipped { match &mut erc { - &mut RegisterCluster::Register(register) => { + RegisterCluster::Register(register) => { let info_name = register.fullname(config.ignore_groups).to_string(); let explicit_rpath = match &mut register.derived_from.clone() { Some(dpath) => { - let (_, root) = find_root(&dpath, path, index)?; + let (_, root) = find_root(dpath, path, index)?; Some(root) } None => None, @@ -751,7 +747,7 @@ fn check_erc_derive_infos( *derive_info = match explicit_rpath { None => { match compare_this_against_prev( - ®ister, + register, &ty_name, path, index, @@ -776,17 +772,14 @@ fn check_erc_derive_infos( Register::Array(..) => { // Only match integer indeces when searching for disjoint arrays let re_string = util::replace_suffix(&info_name, "([0-9]+|%s)"); - let re = Regex::new(format!("^{re_string}$").as_str()).or_else(|_| { - Err(anyhow!( - "Error creating regex for register {}", - register.name - )) + let re = Regex::new(format!("^{re_string}$").as_str()).map_err(|_| { + anyhow!("Error creating regex for register {}", register.name) })?; let ty_name = info_name.to_string(); // keep suffix for regex matching *derive_info = match explicit_rpath { None => { match compare_this_against_prev( - ®ister, + register, &ty_name, path, index, @@ -794,7 +787,7 @@ fn check_erc_derive_infos( )? { Some(root) => DeriveInfo::Implicit(root), None => compare_prev_against_this( - ®ister, + register, &ty_name, &re, path, @@ -809,7 +802,7 @@ fn check_erc_derive_infos( } }; } - &mut RegisterCluster::Cluster(cluster) => { + RegisterCluster::Cluster(cluster) => { *derive_info = DeriveInfo::Cluster; ercs_type_info.push((cluster.name.to_string(), None, erc, derive_info)); } @@ -854,9 +847,9 @@ fn compare_this_against_prev( let (prev_name, prev_regex, prev_erc, _prev_derive_info) = prev; if let RegisterCluster::Register(_) = prev_erc { if let Some(prev_re) = prev_regex { - if prev_re.is_match(&ty_name) { - let (source_reg, rpath) = find_root(&prev_name, path, index)?; - if is_derivable(&source_reg, ®) { + if prev_re.is_match(ty_name) { + let (source_reg, rpath) = find_root(prev_name, path, index)?; + if is_derivable(&source_reg, reg) { return Ok(Some(rpath)); } } @@ -869,7 +862,7 @@ fn compare_this_against_prev( /// Compare the given type name against previous regexs, then inspect fields fn compare_prev_against_this( reg: &MaybeArray, - ty_name: &String, + ty_name: &str, re: ®ex::Regex, path: &BlockPath, index: &Index, @@ -884,12 +877,12 @@ fn compare_prev_against_this( // Arrays are covered with compare_this_against_prev continue; } - if re.is_match(&prev_name) { + if re.is_match(prev_name) { let loop_derive_info = match prev_derive_info { DeriveInfo::Root => { // Get the RegisterPath for reg - let (_, implicit_rpath) = find_root(&ty_name, path, index)?; - if is_derivable(&prev_reg, ®) { + let (_, implicit_rpath) = find_root(ty_name, path, index)?; + if is_derivable(prev_reg, reg) { **prev_derive_info = DeriveInfo::Implicit(implicit_rpath); } DeriveInfo::Root @@ -1164,12 +1157,10 @@ fn expand_register( // force expansion and rename if we're deriving an array that doesnt start at 0 so we don't get name collisions let index: Cow = if let Some(dim_index) = &array_info.dim_index { dim_index.first().unwrap().into() + } else if sequential_indexes_from0 { + "0".into() } else { - if sequential_indexes_from0 { - "0".into() - } else { - "".into() - } + "".into() }; let array_convertible = match derive_info { DeriveInfo::Implicit(_) => { diff --git a/src/generate/register.rs b/src/generate/register.rs index 60aed796..c42ccfd0 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -32,8 +32,7 @@ pub fn render( if let MaybeArray::Array(info, array_info) = register { if let Some(dim_index) = &array_info.dim_index { let index: Cow = dim_index.first().unwrap().into(); - name = - replace_suffix(&info.fullname(config.ignore_groups), &index.to_string()).into() + name = replace_suffix(&info.fullname(config.ignore_groups), &index).into() } } } From 8adf03fd660e0506cf85f2d663e35f5e29b0d08d Mon Sep 17 00:00:00 2001 From: Nathan Date: Wed, 28 Dec 2022 16:00:50 -0600 Subject: [PATCH 066/319] Fix dangling implicit derives --- CHANGELOG.md | 1 + src/generate/peripheral.rs | 17 ++++++++++++++++- 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 9cb951ad..d2a047f7 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -6,6 +6,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/) and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Fix dangling implicit derives ## [v0.28.0] - 2022-12-25 diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 8a069d29..0486c1cd 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -859,7 +859,7 @@ fn compare_this_against_prev( Ok(None) } -/// Compare the given type name against previous regexs, then inspect fields +/// Compare previous type names against the given regex, then inspect fields fn compare_prev_against_this( reg: &MaybeArray, ty_name: &str, @@ -913,6 +913,21 @@ fn compare_prev_against_this( } } } + if let DeriveInfo::Implicit(my_rpath) = &my_derive_info { + match prev_derive_info { + DeriveInfo::Implicit(their_rpath) => { + if their_rpath.name == ty_name { + (_, *their_rpath) = find_root(&my_rpath.name, path, index)?; + } + } + DeriveInfo::Explicit(their_rpath) => { + if their_rpath.name == ty_name { + (_, *their_rpath) = find_root(&my_rpath.name, path, index)?; + } + } + _ => {} + } + } } } Ok(my_derive_info) From 82d2b49bffed719b3d7c3cc677cec1ff53677481 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 29 Jan 2023 17:42:35 +0300 Subject: [PATCH 067/319] clippy fix --- CHANGELOG.md | 1 + src/generate/device.rs | 6 +++--- src/generate/interrupt.rs | 8 ++++---- src/generate/register.rs | 2 +- src/main.rs | 2 +- 5 files changed, 10 insertions(+), 9 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index d2a047f7..c3594b51 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -6,6 +6,7 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/) and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] + - Fix dangling implicit derives ## [v0.28.0] - 2022-12-25 diff --git a/src/generate/device.rs b/src/generate/device.rs index eaa70c5e..a7738af0 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -151,12 +151,12 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result { for name in &names { - writeln!(device_x, "PROVIDE({} = DefaultHandler);", name)?; + writeln!(device_x, "PROVIDE({name} = DefaultHandler);")?; } root.extend(quote! { @@ -141,7 +141,7 @@ pub fn render( } Target::Msp430 => { for name in &names { - writeln!(device_x, "PROVIDE({} = DefaultHandler);", name).unwrap(); + writeln!(device_x, "PROVIDE({name} = DefaultHandler);").unwrap(); } root.extend(quote! { @@ -169,7 +169,7 @@ pub fn render( } Target::RISCV => { for name in &names { - writeln!(device_x, "PROVIDE({} = DefaultHandler);", name)?; + writeln!(device_x, "PROVIDE({name} = DefaultHandler);")?; } root.extend(quote! { @@ -194,7 +194,7 @@ pub fn render( } Target::XtensaLX => { for name in &names { - writeln!(device_x, "PROVIDE({} = DefaultHandler);", name)?; + writeln!(device_x, "PROVIDE({name} = DefaultHandler);")?; } root.extend(quote! { diff --git a/src/generate/register.rs b/src/generate/register.rs index c42ccfd0..0aa8291d 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -318,7 +318,7 @@ pub fn render_register_mod( let methods = methods .iter() - .map(|s| format!("[`{0}`](crate::generic::Reg::{0})", s)) + .map(|s| format!("[`{s}`](crate::generic::Reg::{s})")) .collect::>(); let mut doc = format!("{description}\n\nThis register you can {}. See [API](https://docs.rs/svd2rust/#read--modify--write-api).", methods.join(", ")); diff --git a/src/main.rs b/src/main.rs index 08e14359..4ee7129d 100755 --- a/src/main.rs +++ b/src/main.rs @@ -223,7 +223,7 @@ fn run() -> Result<()> { ] .contains(&config.target) { - writeln!(File::create(path.join("device.x"))?, "{}", device_x)?; + writeln!(File::create(path.join("device.x"))?, "{device_x}")?; writeln!(File::create(path.join("build.rs"))?, "{}", build_rs())?; } From b46c23f6f19e2eafc73df7fb5cd80ca79f266652 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 29 Jan 2023 18:34:22 +0300 Subject: [PATCH 068/319] bump MSRV --- .github/workflows/ci.yml | 2 +- CHANGELOG.md | 1 + README.md | 4 ++-- 3 files changed, 4 insertions(+), 3 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 5c5d2564..666f7a88 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -78,7 +78,7 @@ jobs: - { rust: stable, vendor: Toshiba, options: all } - { rust: stable, vendor: Toshiba, options: "" } # Test MSRV - - { rust: 1.61.0, vendor: Nordic, options: "" } + - { rust: 1.64.0, vendor: Nordic, options: "" } # Use nightly for architectures which don't support stable - { rust: nightly, vendor: MSP430, options: "--atomics" } - { rust: nightly, vendor: MSP430, options: "" } diff --git a/CHANGELOG.md b/CHANGELOG.md index c3594b51..437a04d2 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Bump MSRV to 1.64 - Fix dangling implicit derives ## [v0.28.0] - 2022-12-25 diff --git a/README.md b/README.md index d0f6bb1b..e83bcf63 100644 --- a/README.md +++ b/README.md @@ -13,9 +13,9 @@ This project is developed and maintained by the [Tools team][team]. ## Minimum Supported Rust Version (MSRV) -The **generated code** is guaranteed to compile on stable Rust 1.61.0 and up. +The **generated code** is guaranteed to compile on stable Rust 1.64.0 and up. -If you encounter compilation errors on any stable version newer than 1.61.0, please open an issue. +If you encounter compilation errors on any stable version newer than 1.64.0, please open an issue. # Testing Locally From 01e0807de6df3f14dfe37b8b25a2bb46580fb01c Mon Sep 17 00:00:00 2001 From: pellico Date: Thu, 9 Feb 2023 16:59:02 +0100 Subject: [PATCH 069/319] Escape <> and & symbol in doc attributes. --- Cargo.toml | 1 + src/generate/interrupt.rs | 2 +- src/generate/peripheral.rs | 6 +++--- src/generate/register.rs | 12 ++++++------ src/util.rs | 7 +++++++ 5 files changed, 18 insertions(+), 10 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index 9c90a853..c8755bfd 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -56,6 +56,7 @@ serde = { version = "1.0", optional = true } serde_json = { version = "1.0.85", optional = true } serde_yaml = { version = "0.9.11", optional = true } regex = "1.7.0" +html-escape = "0.2" [dependencies.svd-parser] features = ["expand"] diff --git a/src/generate/interrupt.rs b/src/generate/interrupt.rs index 499cbe09..0f826f6a 100644 --- a/src/generate/interrupt.rs +++ b/src/generate/interrupt.rs @@ -63,7 +63,7 @@ pub fn render( .as_ref() .map(|s| util::respace(s)) .as_ref() - .map(|s| util::escape_brackets(s)) + .map(|s| util::escape_special_chars(s)) .unwrap_or_else(|| interrupt.0.name.clone()) ); diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 0486c1cd..90cdfece 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -184,7 +184,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result } } - let description = util::escape_brackets( + let description = util::escape_special_chars( util::respace(p.description.as_ref().unwrap_or(&name.as_ref().to_owned())).as_ref(), ); @@ -516,7 +516,7 @@ impl FieldRegions { } fn make_comment(size: u32, offset: u32, description: &str) -> String { - let desc = util::escape_brackets(&util::respace(description)); + let desc = util::escape_special_chars(&util::respace(description)); if size > 32 { let end = offset + size / 8; format!("0x{offset:02x}..0x{end:02x} - {desc}") @@ -1306,7 +1306,7 @@ fn cluster_block( config: &Config, ) -> Result { let description = - util::escape_brackets(&util::respace(c.description.as_ref().unwrap_or(&c.name))); + util::escape_special_chars(&util::respace(c.description.as_ref().unwrap_or(&c.name))); let mod_name = util::replace_suffix(&c.name, ""); // name_snake_case needs to take into account array type. diff --git a/src/generate/register.rs b/src/generate/register.rs index 0aa8291d..801b24e0 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -39,7 +39,7 @@ pub fn render( let span = Span::call_site(); let name_constant_case = name.to_constant_case_ident(span); let name_snake_case = name.to_snake_case_ident(span); - let description = util::escape_brackets( + let description = util::escape_special_chars( util::respace(®ister.description.clone().unwrap_or_else(|| { warn!("Missing description for register {}", register.name); Default::default() @@ -129,7 +129,7 @@ pub fn render_register_mod( rsize.next_power_of_two() }; let rty = rsize.to_ty()?; - let description = util::escape_brackets( + let description = util::escape_special_chars( util::respace(®ister.description.clone().unwrap_or_else(|| { warn!("Missing description for register {}", register.name); Default::default() @@ -436,7 +436,7 @@ pub fn fields( let name_snake_case = name.to_snake_case_ident(span); let name_constant_case = name.to_sanitized_constant_case(); let description_raw = f.description.as_deref().unwrap_or(""); // raw description, if absent using empty string - let description = util::respace(&util::escape_brackets(description_raw)); + let description = util::respace(&util::escape_special_chars(description_raw)); let can_read = can_read && (f.access != Some(Access::WriteOnly)) @@ -833,7 +833,7 @@ pub fn fields( for v in &variants { let pc = &v.pc; let sc = &v.sc; - let doc = util::escape_brackets(&util::respace(&v.doc)); + let doc = util::escape_special_chars(&util::respace(&v.doc)); proxy_items.extend(quote! { #[doc = #doc] #inline @@ -1105,7 +1105,7 @@ fn add_from_variants( let mut vars = TokenStream::new(); for v in variants.iter().map(|v| { - let desc = util::escape_brackets(&util::respace(&format!("{}: {}", v.value, v.doc))); + let desc = util::escape_special_chars(&util::respace(&format!("{}: {}", v.value, v.doc))); let pcv = &v.pc; let pcval = &util::unsuffixed(v.value); quote! { @@ -1178,7 +1178,7 @@ fn description_with_bits(description: &str, offset: u64, width: u32) -> String { }; if !description.is_empty() { res.push_str(" - "); - res.push_str(&util::respace(&util::escape_brackets(description))); + res.push_str(&util::respace(&util::escape_special_chars(description))); } res } diff --git a/src/util.rs b/src/util.rs index 6f96d64c..e879f825 100644 --- a/src/util.rs +++ b/src/util.rs @@ -7,6 +7,7 @@ use quote::quote; use std::collections::HashSet; use std::path::{Path, PathBuf}; use svd_rs::{MaybeArray, Peripheral, PeripheralInfo}; +use html_escape::encode_text_minimal; use syn::{ punctuated::Punctuated, token::Colon2, AngleBracketedGenericArguments, GenericArgument, Lit, @@ -287,6 +288,12 @@ pub fn escape_brackets(s: &str) -> String { }) } +/// Escape basic html tags and brackets +pub fn escape_special_chars(s: &str) -> String { + let html_escaped = encode_text_minimal(s); + escape_brackets(&html_escaped) +} + pub fn name_of(maybe_array: &MaybeArray, ignore_group: bool) -> Cow { match maybe_array { MaybeArray::Single(info) => info.fullname(ignore_group), From 480c30105cbd7be99310387e440fb405bf3721bd Mon Sep 17 00:00:00 2001 From: pellico Date: Fri, 10 Feb 2023 10:25:15 +0100 Subject: [PATCH 070/319] Updated CHANGELOG.md & fixed formatting. --- CHANGELOG.md | 1 + src/util.rs | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 437a04d2..ddc69b4e 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Bump MSRV to 1.64 - Fix dangling implicit derives +- Fix escaping <> and & characters in doc attributes ## [v0.28.0] - 2022-12-25 diff --git a/src/util.rs b/src/util.rs index e879f825..3dca4470 100644 --- a/src/util.rs +++ b/src/util.rs @@ -1,13 +1,13 @@ use std::borrow::Cow; use crate::svd::{Access, Device, DimElement, Field, RegisterInfo, RegisterProperties}; +use html_escape::encode_text_minimal; use inflections::Inflect; use proc_macro2::{Ident, Span, TokenStream}; use quote::quote; use std::collections::HashSet; use std::path::{Path, PathBuf}; use svd_rs::{MaybeArray, Peripheral, PeripheralInfo}; -use html_escape::encode_text_minimal; use syn::{ punctuated::Punctuated, token::Colon2, AngleBracketedGenericArguments, GenericArgument, Lit, From 513f69226feb08ed4d0f4e5a433fc06541aa1f42 Mon Sep 17 00:00:00 2001 From: pellico Date: Tue, 14 Feb 2023 13:35:13 +0100 Subject: [PATCH 071/319] Bumped required Rust compiler for generated crates to 1.65 --- .github/workflows/ci.yml | 2 +- CHANGELOG.md | 2 +- README.md | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 666f7a88..eeb35eb1 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -78,7 +78,7 @@ jobs: - { rust: stable, vendor: Toshiba, options: all } - { rust: stable, vendor: Toshiba, options: "" } # Test MSRV - - { rust: 1.64.0, vendor: Nordic, options: "" } + - { rust: 1.65.0, vendor: Nordic, options: "" } # Use nightly for architectures which don't support stable - { rust: nightly, vendor: MSP430, options: "--atomics" } - { rust: nightly, vendor: MSP430, options: "" } diff --git a/CHANGELOG.md b/CHANGELOG.md index ddc69b4e..bcc8faad 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,7 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] -- Bump MSRV to 1.64 +- Bump MSRV to 1.65 - Fix dangling implicit derives - Fix escaping <> and & characters in doc attributes diff --git a/README.md b/README.md index e83bcf63..2022b4a8 100644 --- a/README.md +++ b/README.md @@ -13,9 +13,9 @@ This project is developed and maintained by the [Tools team][team]. ## Minimum Supported Rust Version (MSRV) -The **generated code** is guaranteed to compile on stable Rust 1.64.0 and up. +The **generated code** is guaranteed to compile on stable Rust 1.65.0 and up. -If you encounter compilation errors on any stable version newer than 1.64.0, please open an issue. +If you encounter compilation errors on any stable version newer than 1.65.0, please open an issue. # Testing Locally From 30b35ca350a5a59827e50b4159d327c341734ec4 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 18 Mar 2023 13:04:10 +0300 Subject: [PATCH 072/319] cows, cows everywhere --- CHANGELOG.md | 1 + src/util.rs | 97 ++++++++++++++++++++++++++++++---------------------- 2 files changed, 57 insertions(+), 41 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index bcc8faad..16b1f482 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -8,6 +8,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] - Bump MSRV to 1.65 +- Optimize case change/sanitize - Fix dangling implicit derives - Fix escaping <> and & characters in doc attributes diff --git a/src/util.rs b/src/util.rs index 3dca4470..1e295a80 100644 --- a/src/util.rs +++ b/src/util.rs @@ -61,6 +61,41 @@ pub struct Config { pub log_level: Option, } +#[derive(Clone, Debug, PartialEq, Eq)] +pub enum Case { + Constant, + Pascal, + Snake, +} + +impl Case { + pub fn cow_to_case<'a>(&self, cow: Cow<'a, str>) -> Cow<'a, str> { + match self { + Self::Constant => match cow { + Cow::Borrowed(s) if s.is_constant_case() => cow, + _ => cow.to_constant_case().into(), + }, + Self::Pascal => match cow { + Cow::Borrowed(s) if s.is_pascal_case() => cow, + _ => cow.to_pascal_case().into(), + }, + Self::Snake => match cow { + Cow::Borrowed(s) if s.is_snake_case() => cow, + _ => cow.to_snake_case().into(), + }, + } + } + pub fn sanitize<'a>(&self, s: &'a str) -> Cow<'a, str> { + let s = if s.contains(BLACKLIST_CHARS) { + Cow::Owned(s.replace(BLACKLIST_CHARS, "")) + } else { + s.into() + }; + + self.cow_to_case(s) + } +} + fn current_dir() -> PathBuf { PathBuf::from(".") } @@ -92,9 +127,10 @@ impl Default for Config { #[allow(clippy::upper_case_acronyms)] #[allow(non_camel_case_types)] #[cfg_attr(feature = "serde", derive(serde::Deserialize))] -#[derive(Clone, Copy, PartialEq, Eq, Debug)] +#[derive(Clone, Copy, PartialEq, Eq, Debug, Default)] pub enum Target { #[cfg_attr(feature = "serde", serde(rename = "cortex-m"))] + #[default] CortexM, #[cfg_attr(feature = "serde", serde(rename = "msp430"))] Msp430, @@ -122,19 +158,14 @@ impl Target { } } -impl Default for Target { - fn default() -> Self { - Self::CortexM - } -} - #[cfg_attr( feature = "serde", derive(serde::Deserialize), serde(rename_all = "lowercase") )] -#[derive(Clone, Copy, PartialEq, Eq, Debug)] +#[derive(Clone, Copy, PartialEq, Eq, Debug, Default)] pub enum SourceType { + #[default] Xml, #[cfg(feature = "yaml")] Yaml, @@ -142,12 +173,6 @@ pub enum SourceType { Json, } -impl Default for SourceType { - fn default() -> Self { - Self::Xml - } -} - impl SourceType { /// Make a new [`Source`] from a given extension. pub fn from_extension(s: &str) -> Option { @@ -203,41 +228,31 @@ pub trait ToSanitizedCase { impl ToSanitizedCase for str { fn to_sanitized_pascal_case(&self) -> Cow { - let s = self.replace(BLACKLIST_CHARS, ""); - - match s.chars().next().unwrap_or('\0') { - '0' | '1' | '2' | '3' | '4' | '5' | '6' | '7' | '8' | '9' => { - Cow::from(format!("_{}", s.to_pascal_case())) - } - _ => Cow::from(s.to_pascal_case()), + let s = Case::Pascal.sanitize(self); + if s.as_bytes().get(0).unwrap_or(&0).is_ascii_digit() { + Cow::from(format!("_{}", s)) + } else { + s } } fn to_sanitized_constant_case(&self) -> Cow { - let s = self.replace(BLACKLIST_CHARS, ""); - - match s.chars().next().unwrap_or('\0') { - '0' | '1' | '2' | '3' | '4' | '5' | '6' | '7' | '8' | '9' => { - Cow::from(format!("_{}", s.to_constant_case())) - } - _ => Cow::from(s.to_constant_case()), + let s = Case::Constant.sanitize(self); + if s.as_bytes().get(0).unwrap_or(&0).is_ascii_digit() { + Cow::from(format!("_{}", s)) + } else { + s } } fn to_sanitized_not_keyword_snake_case(&self) -> Cow { const INTERNALS: [&str; 4] = ["set_bit", "clear_bit", "bit", "bits"]; - let s = self.replace(BLACKLIST_CHARS, ""); - match s.chars().next().unwrap_or('\0') { - '0' | '1' | '2' | '3' | '4' | '5' | '6' | '7' | '8' | '9' => { - format!("_{}", s.to_snake_case()).into() - } - _ => { - let s = Cow::from(s.to_snake_case()); - if INTERNALS.contains(&s.as_ref()) { - s + "_" - } else { - s - } - } + let s = Case::Snake.sanitize(self); + if s.as_bytes().get(0).unwrap_or(&0).is_ascii_digit() { + format!("_{}", s).into() + } else if INTERNALS.contains(&s.as_ref()) { + s + "_" + } else { + s } } } From a5a5fff4ef8794b3ef295882c19aa7729d684eba Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 18 Mar 2023 13:58:16 +0300 Subject: [PATCH 073/319] fix svd2rust-regress --- ci/svd2rust-regress/Cargo.toml | 8 ++-- ci/svd2rust-regress/src/main.rs | 46 +++++++++--------- ci/svd2rust-regress/src/svd_test.rs | 35 ++++++++------ ci/svd2rust-regress/src/tests.rs | 73 +++-------------------------- 4 files changed, 53 insertions(+), 109 deletions(-) diff --git a/ci/svd2rust-regress/Cargo.toml b/ci/svd2rust-regress/Cargo.toml index a396cce0..641368f9 100644 --- a/ci/svd2rust-regress/Cargo.toml +++ b/ci/svd2rust-regress/Cargo.toml @@ -1,12 +1,12 @@ [package] -edition = "2018" +edition = "2021" name = "svd2rust-regress" version = "0.1.0" authors = ["James Munns ", "The svd2rust developers"] [dependencies] -reqwest = { version = "0.10", features= ["blocking"] } +clap = { version = "4.1", features = ["color", "derive"] } +svd2rust = { path = "../../" } +reqwest = { version = "0.11", features= ["blocking"] } rayon = "1.4" -structopt = "0.2" error-chain = "0.12" -inflections = "1.1" diff --git a/ci/svd2rust-regress/src/main.rs b/ci/svd2rust-regress/src/main.rs index 597fb46a..3ee39955 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/ci/svd2rust-regress/src/main.rs @@ -5,6 +5,7 @@ mod errors; mod svd_test; mod tests; +use clap::Parser; use error_chain::ChainedError; use rayon::prelude::*; use std::fs::File; @@ -13,76 +14,75 @@ use std::path::PathBuf; use std::process::{exit, Command}; use std::sync::atomic::{AtomicBool, Ordering}; use std::time::Instant; -use structopt::StructOpt; -#[derive(StructOpt, Debug)] -#[structopt(name = "svd2rust-regress")] +#[derive(Parser, Debug)] +#[command(name = "svd2rust-regress")] struct Opt { /// Run a long test (it's very long) - #[structopt(short = "l", long = "long-test")] + #[clap(short = 'l', long)] long_test: bool, /// Path to an `svd2rust` binary, relative or absolute. /// Defaults to `target/release/svd2rust[.exe]` of this repository /// (which must be already built) - #[structopt(short = "p", long = "svd2rust-path", parse(from_os_str))] + #[clap(short = 'p', long = "svd2rust-path")] bin_path: Option, // TODO: Consider using the same strategy cargo uses for passing args to rustc via `--` /// Run svd2rust with `--atomics` - #[structopt(long = "atomics")] + #[clap(long)] atomics: bool, /// Filter by chip name, case sensitive, may be combined with other filters - #[structopt(short = "c", long = "chip", raw(validator = "validate_chips"))] + #[clap(short = 'c', long, value_parser = validate_chips)] chip: Vec, /// Filter by manufacturer, case sensitive, may be combined with other filters - #[structopt( - short = "m", + #[clap( + short = 'm', long = "manufacturer", - raw(validator = "validate_manufacturer") + value_parser = validate_manufacturer, )] mfgr: Option, /// Filter by architecture, case sensitive, may be combined with other filters /// Options are: "CortexM", "RiscV", "Msp430", "Mips" and "XtensaLX" - #[structopt( - short = "a", + #[clap( + short = 'a', long = "architecture", - raw(validator = "validate_architecture") + value_parser = validate_architecture, )] arch: Option, /// Include tests expected to fail (will cause a non-zero return code) - #[structopt(short = "b", long = "bad-tests")] + #[clap(short = 'b', long)] bad_tests: bool, /// Enable formatting with `rustfmt` - #[structopt(short = "f", long = "format")] + #[clap(short = 'f', long)] format: bool, /// Print all available test using the specified filters - #[structopt(long = "list")] + #[clap(long)] list: bool, /// Path to an `rustfmt` binary, relative or absolute. /// Defaults to `$(rustup which rustfmt)` - #[structopt(long = "rustfmt_bin_path", parse(from_os_str))] + #[clap(long)] rustfmt_bin_path: Option, /// Specify what rustup toolchain to use when compiling chip(s) - #[structopt(long = "toolchain", env = "RUSTUP_TOOLCHAIN")] + #[clap(long = "toolchain")] // , env = "RUSTUP_TOOLCHAIN" rustup_toolchain: Option, /// Use verbose output - #[structopt(long = "verbose", short = "v", parse(from_occurrences))] + #[clap(long, short = 'v', action = clap::ArgAction::Count)] verbose: u8, // TODO: Specify smaller subset of tests? Maybe with tags? // TODO: Compile svd2rust? } -fn validate_chips(s: String) -> Result<(), String> { +fn validate_chips(s: &str) -> Result<(), String> { if tests::TESTS.iter().any(|t| t.chip == s) { Ok(()) } else { @@ -90,7 +90,7 @@ fn validate_chips(s: String) -> Result<(), String> { } } -fn validate_architecture(s: String) -> Result<(), String> { +fn validate_architecture(s: &str) -> Result<(), String> { if tests::TESTS.iter().any(|t| format!("{:?}", t.arch) == s) { Ok(()) } else { @@ -98,7 +98,7 @@ fn validate_architecture(s: String) -> Result<(), String> { } } -fn validate_manufacturer(s: String) -> Result<(), String> { +fn validate_manufacturer(s: &str) -> Result<(), String> { if tests::TESTS.iter().any(|t| format!("{:?}", t.mfgr) == s) { Ok(()) } else { @@ -140,7 +140,7 @@ fn read_file(path: &PathBuf, buf: &mut String) { } fn main() { - let opt = Opt::from_args(); + let opt = Opt::parse(); // Validate all test pre-conditions validate_tests(tests::TESTS); diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 4c5368af..a1404660 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -127,15 +127,16 @@ pub fn test( .open(svd_toml) .chain_err(|| "Failed to open Cargo.toml for appending")?; - use crate::tests::Architecture::*; + use crate::tests::Target; let crates = CRATES_ALL .iter() .chain(match &t.arch { - CortexM => CRATES_CORTEX_M.iter(), - RiscV => CRATES_RISCV.iter(), - Mips => CRATES_MIPS.iter(), - Msp430 => CRATES_MSP430.iter(), - XtensaLX => CRATES_XTENSALX.iter(), + Target::CortexM => CRATES_CORTEX_M.iter(), + Target::RISCV => CRATES_RISCV.iter(), + Target::Mips => CRATES_MIPS.iter(), + Target::Msp430 => CRATES_MSP430.iter(), + Target::XtensaLX => CRATES_XTENSALX.iter(), + Target::None => unreachable!(), }) .chain(if atomics { CRATES_ATOMICS.iter() @@ -145,7 +146,7 @@ pub fn test( .chain(PROFILE_ALL.iter()) .chain(FEATURES_ALL.iter()) .chain(match &t.arch { - XtensaLX => FEATURES_XTENSALX.iter(), + Target::XtensaLX => FEATURES_XTENSALX.iter(), _ => [].iter(), }); @@ -170,11 +171,12 @@ pub fn test( let lib_rs_file = path_helper_base(&chip_dir, &["src", "lib.rs"]); let svd2rust_err_file = path_helper_base(&chip_dir, &["svd2rust.err.log"]); let target = match t.arch { - CortexM => "cortex-m", - Msp430 => "msp430", - Mips => "mips", - RiscV => "riscv", - XtensaLX => "xtensa-lx", + Target::CortexM => "cortex-m", + Target::Msp430 => "msp430", + Target::Mips => "mips", + Target::RISCV => "riscv", + Target::XtensaLX => "xtensa-lx", + Target::None => unreachable!(), }; let mut svd2rust_bin = Command::new(bin_path); if atomics { @@ -190,15 +192,18 @@ pub fn test( output.capture_outputs( true, "svd2rust", - Some(&lib_rs_file) - .filter(|_| (t.arch != CortexM) && (t.arch != Msp430) && (t.arch != XtensaLX)), + Some(&lib_rs_file).filter(|_| { + (t.arch != Target::CortexM) + && (t.arch != Target::Msp430) + && (t.arch != Target::XtensaLX) + }), Some(&svd2rust_err_file), &[], )?; process_stderr_paths.push(svd2rust_err_file); match t.arch { - CortexM | Mips | Msp430 | XtensaLX => { + Target::CortexM | Target::Mips | Target::Msp430 | Target::XtensaLX => { // TODO: Give error the path to stderr fs::rename(path_helper_base(&chip_dir, &["lib.rs"]), &lib_rs_file) .chain_err(|| "While moving lib.rs file")? diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index ed73e42c..9020924f 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -1,16 +1,5 @@ -use inflections::Inflect; -use std::borrow::Cow; - -#[derive(Debug, PartialEq)] -pub enum Architecture { - // TODO: Coming soon! - // Avr, - CortexM, - Mips, - Msp430, - RiscV, - XtensaLX, -} +pub use svd2rust::util::Target; +use svd2rust::util::ToSanitizedCase; #[derive(Debug)] pub enum Manufacturer { @@ -41,7 +30,7 @@ pub enum RunWhen { } pub struct TestCase { - pub arch: Architecture, + pub arch: Target, pub mfgr: Manufacturer, pub chip: &'static str, svd_url: Option<&'static str>, @@ -75,59 +64,9 @@ impl TestCase { } } -use self::Architecture::*; use self::Manufacturer::*; use self::RunWhen::*; - -/// List of chars that some vendors use in their peripheral/field names but -/// that are not valid in Rust ident -const BLACKLIST_CHARS: &[char] = &['(', ')', '[', ']']; - -/// Lovingly stolen from `svd2rust` -pub trait ToSanitizedCase { - fn to_sanitized_not_keyword_snake_case(&self) -> Cow; - fn to_sanitized_snake_case(&self) -> Cow { - let s = self.to_sanitized_not_keyword_snake_case(); - sanitize_keyword(s) - } -} - -impl ToSanitizedCase for str { - fn to_sanitized_not_keyword_snake_case(&self) -> Cow { - const INTERNALS: [&str; 4] = ["set_bit", "clear_bit", "bit", "bits"]; - - let s = self.replace(BLACKLIST_CHARS, ""); - match s.chars().next().unwrap_or('\0') { - '0' | '1' | '2' | '3' | '4' | '5' | '6' | '7' | '8' | '9' => { - format!("_{}", s.to_snake_case()).into() - } - _ => { - let s = Cow::from(s.to_snake_case()); - if INTERNALS.contains(&s.as_ref()) { - s + "_" - } else { - s - } - } - } - } -} - -pub fn sanitize_keyword(sc: Cow) -> Cow { - const KEYWORDS: [&str; 55] = [ - "abstract", "alignof", "as", "async", "await", "become", "box", "break", "const", - "continue", "crate", "do", "dyn", "else", "enum", "extern", "false", "final", "fn", "for", - "if", "impl", "in", "let", "loop", "macro", "match", "mod", "move", "mut", "offsetof", - "override", "priv", "proc", "pub", "pure", "ref", "return", "self", "sizeof", "static", - "struct", "super", "trait", "true", "try", "type", "typeof", "unsafe", "unsized", "use", - "virtual", "where", "while", "yield", - ]; - if KEYWORDS.contains(&sc.as_ref()) { - sc + "_" - } else { - sc - } -} +use self::Target::{CortexM, Mips, Msp430, XtensaLX, RISCV}; // NOTE: All chip names must be unique! pub const TESTS: &[&TestCase] = &[ @@ -4175,7 +4114,7 @@ pub const TESTS: &[&TestCase] = &[ run_when: Always, }, &TestCase { - arch: RiscV, + arch: RISCV, mfgr: SiFive, chip: "E310x", svd_url: Some("https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x.svd"), @@ -4231,7 +4170,7 @@ pub const TESTS: &[&TestCase] = &[ run_when: Always, }, &TestCase { - arch: RiscV, + arch: RISCV, mfgr: Espressif, chip: "esp32c3", svd_url: Some( From deb379e7402340146fd4c6a0fc4dcb4b9e38eb1a Mon Sep 17 00:00:00 2001 From: Seth Pellegrino Date: Thu, 18 May 2023 21:43:34 -0700 Subject: [PATCH 074/319] feat: configurable link section attribute for irqs This change introduces a new config field that allows `svd2rust` to target which linker sections get assigned to the `__INTERRUPTS` static, with reasonable defaults. Previously on RISC-V, the choice was always left up to the compiler, and it seemed to always pick `.rodata`. Unfortunately, in my context, that meant placing the LUT in a memory range that had a lot of highly variable latency, which cost not just time but predictability in servicing interrupts. With this change in place, I'm able to target a particular section (e.g. `.data`, or `.trap.rodata`) for the placement of the static, which grants more granular control over the ultimate loaded memory address. For the full details about the problem, please see: https://github.com/esp-rs/esp-hal/pull/534/commits/e29f3d547dc210e1b73313be6053a2122239a467 --- src/generate/interrupt.rs | 38 ++++++++++++++++++++++++++++++++++++-- src/util.rs | 3 +++ 2 files changed, 39 insertions(+), 2 deletions(-) diff --git a/src/generate/interrupt.rs b/src/generate/interrupt.rs index 0f826f6a..6ea1785f 100644 --- a/src/generate/interrupt.rs +++ b/src/generate/interrupt.rs @@ -118,6 +118,14 @@ pub fn render( writeln!(device_x, "PROVIDE({name} = DefaultHandler);")?; } + let link_section_name = config + .interrupt_link_section + .as_deref() + .unwrap_or(".vector_table.interrupts"); + let link_section_attr = quote! { + #[link_section = #link_section_name] + }; + root.extend(quote! { #[cfg(feature = "rt")] extern "C" { @@ -132,7 +140,7 @@ pub fn render( #[cfg(feature = "rt")] #[doc(hidden)] - #[link_section = ".vector_table.interrupts"] + #link_section_attr #[no_mangle] pub static __INTERRUPTS: [Vector; #n] = [ #elements @@ -144,6 +152,14 @@ pub fn render( writeln!(device_x, "PROVIDE({name} = DefaultHandler);").unwrap(); } + let link_section_name = config + .interrupt_link_section + .as_deref() + .unwrap_or(".vector_table.interrupts"); + let link_section_attr = quote! { + #[link_section = #link_section_name] + }; + root.extend(quote! { #[cfg(feature = "rt")] extern "msp430-interrupt" { @@ -158,7 +174,7 @@ pub fn render( #[cfg(feature = "rt")] #[doc(hidden)] - #[link_section = ".vector_table.interrupts"] + #link_section_attr #[no_mangle] #[used] pub static __INTERRUPTS: @@ -172,6 +188,14 @@ pub fn render( writeln!(device_x, "PROVIDE({name} = DefaultHandler);")?; } + let link_section_attr = if let Some(section) = &config.interrupt_link_section { + quote! { + #[link_section = #section] + } + } else { + quote! {} + }; + root.extend(quote! { #[cfg(feature = "rt")] extern "C" { @@ -186,6 +210,7 @@ pub fn render( #[cfg(feature = "rt")] #[doc(hidden)] + #link_section_attr #[no_mangle] pub static __EXTERNAL_INTERRUPTS: [Vector; #n] = [ #elements @@ -197,6 +222,14 @@ pub fn render( writeln!(device_x, "PROVIDE({name} = DefaultHandler);")?; } + let link_section_attr = if let Some(section) = &config.interrupt_link_section { + quote! { + #[link_section = #section] + } + } else { + quote! {} + }; + root.extend(quote! { #[cfg(feature = "rt")] extern "C" { @@ -210,6 +243,7 @@ pub fn render( } #[cfg(feature = "rt")] + #link_section_attr #[doc(hidden)] pub static __INTERRUPTS: [Vector; #n] = [ #elements diff --git a/src/util.rs b/src/util.rs index 1e295a80..6d06bd2c 100644 --- a/src/util.rs +++ b/src/util.rs @@ -59,6 +59,8 @@ pub struct Config { pub source_type: SourceType, #[cfg_attr(feature = "serde", serde(default))] pub log_level: Option, + #[cfg_attr(feature = "serde", serde(default))] + pub interrupt_link_section: Option, } #[derive(Clone, Debug, PartialEq, Eq)] @@ -120,6 +122,7 @@ impl Default for Config { input: None, source_type: SourceType::default(), log_level: None, + interrupt_link_section: None, } } } From f68084a629f59cde1e1c287c1532e1ce46df040a Mon Sep 17 00:00:00 2001 From: Seth Pellegrino Date: Thu, 18 May 2023 21:53:26 -0700 Subject: [PATCH 075/319] lint: make clippy happy Replaces `get(0)` with `first()` as suggested by https://rust-lang.github.io/rust-clippy/master/index.html#get_first --- src/util.rs | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/util.rs b/src/util.rs index 6d06bd2c..fc58314c 100644 --- a/src/util.rs +++ b/src/util.rs @@ -232,7 +232,7 @@ pub trait ToSanitizedCase { impl ToSanitizedCase for str { fn to_sanitized_pascal_case(&self) -> Cow { let s = Case::Pascal.sanitize(self); - if s.as_bytes().get(0).unwrap_or(&0).is_ascii_digit() { + if s.as_bytes().first().unwrap_or(&0).is_ascii_digit() { Cow::from(format!("_{}", s)) } else { s @@ -240,7 +240,7 @@ impl ToSanitizedCase for str { } fn to_sanitized_constant_case(&self) -> Cow { let s = Case::Constant.sanitize(self); - if s.as_bytes().get(0).unwrap_or(&0).is_ascii_digit() { + if s.as_bytes().first().unwrap_or(&0).is_ascii_digit() { Cow::from(format!("_{}", s)) } else { s @@ -250,7 +250,7 @@ impl ToSanitizedCase for str { const INTERNALS: [&str; 4] = ["set_bit", "clear_bit", "bit", "bits"]; let s = Case::Snake.sanitize(self); - if s.as_bytes().get(0).unwrap_or(&0).is_ascii_digit() { + if s.as_bytes().first().unwrap_or(&0).is_ascii_digit() { format!("_{}", s).into() } else if INTERNALS.contains(&s.as_ref()) { s + "_" From 328d0c37e21379cbcbf4952bad52793ee78be97f Mon Sep 17 00:00:00 2001 From: Seth Pellegrino Date: Thu, 18 May 2023 21:56:42 -0700 Subject: [PATCH 076/319] docs: add changelog entry --- CHANGELOG.md | 1 + 1 file changed, 1 insertion(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 16b1f482..6f2ca0b5 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -11,6 +11,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Optimize case change/sanitize - Fix dangling implicit derives - Fix escaping <> and & characters in doc attributes +- Add `interrupt_link_section` config parameter for controlling the `#[link_section = "..."]` attribute of `__INTERRUPTS` ## [v0.28.0] - 2022-12-25 From 1c773fbf6abca4cf8117de5d4d93d7777937d137 Mon Sep 17 00:00:00 2001 From: Seth Pellegrino Date: Fri, 19 May 2023 08:12:12 -0700 Subject: [PATCH 077/319] refactor: use `Option::map` instead of if-let Thanks to @burrbull for the review! --- src/generate/interrupt.rs | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/src/generate/interrupt.rs b/src/generate/interrupt.rs index 6ea1785f..92439ff7 100644 --- a/src/generate/interrupt.rs +++ b/src/generate/interrupt.rs @@ -188,13 +188,11 @@ pub fn render( writeln!(device_x, "PROVIDE({name} = DefaultHandler);")?; } - let link_section_attr = if let Some(section) = &config.interrupt_link_section { + let link_section_attr = config.interrupt_link_section.as_ref().map(|section| { quote! { #[link_section = #section] } - } else { - quote! {} - }; + }); root.extend(quote! { #[cfg(feature = "rt")] @@ -222,13 +220,11 @@ pub fn render( writeln!(device_x, "PROVIDE({name} = DefaultHandler);")?; } - let link_section_attr = if let Some(section) = &config.interrupt_link_section { + let link_section_attr = config.interrupt_link_section.as_ref().map(|section| { quote! { #[link_section = #section] } - } else { - quote! {} - }; + }); root.extend(quote! { #[cfg(feature = "rt")] From 3467cd817a497a4238dd536b240b6dd22582be12 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 29 May 2023 13:27:52 +0300 Subject: [PATCH 078/319] default Field reader generics --- src/generate/generic.rs | 12 ++++++------ src/generate/register.rs | 8 +++++++- 2 files changed, 13 insertions(+), 7 deletions(-) diff --git a/src/generate/generic.rs b/src/generate/generic.rs index d1f252f4..73da978e 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -301,9 +301,9 @@ impl W { } #[doc(hidden)] -pub struct FieldReaderRaw { +pub struct FieldReaderRaw { pub(crate) bits: U, - _reg: marker::PhantomData, + _reg: marker::PhantomData, } impl FieldReaderRaw @@ -322,9 +322,9 @@ where } #[doc(hidden)] -pub struct BitReaderRaw { +pub struct BitReaderRaw { pub(crate) bits: bool, - _reg: marker::PhantomData, + _reg: marker::PhantomData, } impl BitReaderRaw { @@ -342,10 +342,10 @@ impl BitReaderRaw { /// Field reader. /// /// Result of the `read` methods of fields. -pub type FieldReader = FieldReaderRaw; +pub type FieldReader = FieldReaderRaw; /// Bit-wise field reader -pub type BitReader = BitReaderRaw; +pub type BitReader = BitReaderRaw; impl FieldReader where diff --git a/src/generate/register.rs b/src/generate/register.rs index 801b24e0..62f1d116 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -545,7 +545,13 @@ pub fn fields( // derive the read proxy structure if necessary. if should_derive_reader { let reader = if width == 1 { - quote! { crate::BitReader<#value_read_ty> } + if value_read_ty == "bool" { + quote! { crate::BitReader } + } else { + quote! { crate::BitReader<#value_read_ty> } + } + } else if value_read_ty == "u8" { + quote! { crate::FieldReader<#fty> } } else { quote! { crate::FieldReader<#fty, #value_read_ty> } }; From 53fcbf4399c238ce272d42b2876411ca933c1a14 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 29 May 2023 14:14:54 +0300 Subject: [PATCH 079/319] default Field writer generics --- CHANGELOG.md | 1 + src/generate/generic.rs | 46 ++++++++++++++++++++-------------------- src/generate/register.rs | 14 ++++++++++-- 3 files changed, 36 insertions(+), 25 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 6f2ca0b5..fcb73363 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- `bool` and `u8` as default generics for `BitReader/Writer` and `FieldReader/Writer` - Bump MSRV to 1.65 - Optimize case change/sanitize - Fix dangling implicit derives diff --git a/src/generate/generic.rs b/src/generate/generic.rs index 73da978e..c6c24ab1 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -405,7 +405,7 @@ pub struct Safe; pub struct Unsafe; #[doc(hidden)] -pub struct FieldWriterRaw<'a, U, REG, N, FI, Safety, const WI: u8, const O: u8> +pub struct FieldWriterRaw<'a, U, REG, const WI: u8, const O: u8, N, FI, Safety> where REG: Writable + RegisterSpec, N: From, @@ -414,8 +414,8 @@ where _field: marker::PhantomData<(N, FI, Safety)>, } -impl<'a, U, REG, N, FI, Safety, const WI: u8, const O: u8> - FieldWriterRaw<'a, U, REG, N, FI, Safety, WI, O> +impl<'a, U, REG, const WI: u8, const O: u8, N, FI, Safety> + FieldWriterRaw<'a, U, REG, WI, O, N, FI, Safety> where REG: Writable + RegisterSpec, N: From, @@ -432,7 +432,7 @@ where } #[doc(hidden)] -pub struct BitWriterRaw<'a, U, REG, FI, M, const O: u8> +pub struct BitWriterRaw<'a, U, REG, const O: u8, FI, M> where REG: Writable + RegisterSpec, bool: From, @@ -441,7 +441,7 @@ where _field: marker::PhantomData<(FI, M)>, } -impl<'a, U, REG, FI, M, const O: u8> BitWriterRaw<'a, U, REG, FI, M, O> +impl<'a, U, REG, const O: u8, FI, M> BitWriterRaw<'a, U, REG, O, FI, M> where REG: Writable + RegisterSpec, bool: From, @@ -458,13 +458,13 @@ where } /// Write field Proxy with unsafe `bits` -pub type FieldWriter<'a, U, REG, N, FI, const WI: u8, const O: u8> = - FieldWriterRaw<'a, U, REG, N, FI, Unsafe, WI, O>; +pub type FieldWriter<'a, U, REG, const WI: u8, const O: u8, N = u8, FI = u8> = + FieldWriterRaw<'a, U, REG, WI, O, N, FI, Unsafe>; /// Write field Proxy with safe `bits` -pub type FieldWriterSafe<'a, U, REG, N, FI, const WI: u8, const O: u8> = - FieldWriterRaw<'a, U, REG, N, FI, Safe, WI, O>; +pub type FieldWriterSafe<'a, U, REG, const WI: u8, const O: u8, N = u8, FI = u8> = + FieldWriterRaw<'a, U, REG, WI, O, N, FI, Safe>; -impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriter<'a, U, REG, N, FI, WI, OF> +impl<'a, U, REG, const WI: u8, const OF: u8, N, FI> FieldWriter<'a, U, REG, WI, OF, N, FI> where REG: Writable + RegisterSpec, N: From, @@ -473,7 +473,7 @@ where pub const WIDTH: u8 = WI; } -impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriterSafe<'a, U, REG, N, FI, WI, OF> +impl<'a, U, REG, const WI: u8, const OF: u8, N, FI> FieldWriterSafe<'a, U, REG, WI, OF, N, FI> where REG: Writable + RegisterSpec, N: From, @@ -488,9 +488,9 @@ macro_rules! bit_proxy { pub struct $mwv; /// Bit-wise write field proxy - pub type $writer<'a, U, REG, FI, const O: u8> = BitWriterRaw<'a, U, REG, FI, $mwv, O>; + pub type $writer<'a, U, REG, const O: u8, FI = bool> = BitWriterRaw<'a, U, REG, O, FI, $mwv>; - impl<'a, U, REG, FI, const OF: u8> $writer<'a, U, REG, FI, OF> + impl<'a, U, REG, const OF: u8, FI> $writer<'a, U, REG, OF, FI> where REG: Writable + RegisterSpec, bool: From, @@ -503,7 +503,7 @@ macro_rules! bit_proxy { macro_rules! impl_bit_proxy { ($writer:ident) => { - impl<'a, U, REG, FI, const OF: u8> $writer<'a, U, REG, FI, OF> + impl<'a, U, REG, const OF: u8, FI> $writer<'a, U, REG, OF, FI> where REG: Writable + RegisterSpec, U: RawReg, @@ -533,7 +533,7 @@ bit_proxy!(BitWriter0S, Bit0S); bit_proxy!(BitWriter1T, Bit1T); bit_proxy!(BitWriter0T, Bit0T); -impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriter<'a, U, REG, N, FI, WI, OF> +impl<'a, U, REG, const WI: u8, const OF: u8, N, FI> FieldWriter<'a, U, REG, WI, OF, N, FI> where REG: Writable + RegisterSpec, U: RawReg + From, @@ -556,7 +556,7 @@ where unsafe { self.bits(N::from(variant)) } } } -impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriterSafe<'a, U, REG, N, FI, WI, OF> +impl<'a, U, REG, const WI: u8, const OF: u8, N, FI> FieldWriterSafe<'a, U, REG, WI, OF, N, FI> where REG: Writable + RegisterSpec, U: RawReg + From, @@ -584,7 +584,7 @@ impl_bit_proxy!(BitWriter0S); impl_bit_proxy!(BitWriter1T); impl_bit_proxy!(BitWriter0T); -impl<'a, U, REG, FI, const OF: u8> BitWriter<'a, U, REG, FI, OF> +impl<'a, U, REG, const OF: u8, FI> BitWriter<'a, U, REG, OF, FI> where REG: Writable + RegisterSpec, U: RawReg, @@ -604,7 +604,7 @@ where } } -impl<'a, U, REG, FI, const OF: u8> BitWriter1S<'a, U, REG, FI, OF> +impl<'a, U, REG, const OF: u8, FI> BitWriter1S<'a, U, REG, OF, FI> where REG: Writable + RegisterSpec, U: RawReg, @@ -618,7 +618,7 @@ where } } -impl<'a, U, REG, FI, const OF: u8> BitWriter0C<'a, U, REG, FI, OF> +impl<'a, U, REG, const OF: u8, FI> BitWriter0C<'a, U, REG, OF, FI> where REG: Writable + RegisterSpec, U: RawReg, @@ -632,7 +632,7 @@ where } } -impl<'a, U, REG, FI, const OF: u8> BitWriter1C<'a, U, REG, FI, OF> +impl<'a, U, REG, const OF: u8, FI> BitWriter1C<'a, U, REG, OF, FI> where REG: Writable + RegisterSpec, U: RawReg, @@ -646,7 +646,7 @@ where } } -impl<'a, U, REG, FI, const OF: u8> BitWriter0S<'a, U, REG, FI, OF> +impl<'a, U, REG, const OF: u8, FI> BitWriter0S<'a, U, REG, OF, FI> where REG: Writable + RegisterSpec, U: RawReg, @@ -660,7 +660,7 @@ where } } -impl<'a, U, REG, FI, const OF: u8> BitWriter1T<'a, U, REG, FI, OF> +impl<'a, U, REG, const OF: u8, FI> BitWriter1T<'a, U, REG, OF, FI> where REG: Writable + RegisterSpec, U: RawReg, @@ -674,7 +674,7 @@ where } } -impl<'a, U, REG, FI, const OF: u8> BitWriter0T<'a, U, REG, FI, OF> +impl<'a, U, REG, const OF: u8, FI> BitWriter0T<'a, U, REG, OF, FI> where REG: Writable + RegisterSpec, U: RawReg, diff --git a/src/generate/register.rs b/src/generate/register.rs index 62f1d116..dd8d461e 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -874,7 +874,11 @@ pub fn fields( }, span, ); - quote! { crate::#wproxy<'a, #rty, #regspec_ident, #value_write_ty, O> } + if value_write_ty == "bool" { + quote! { crate::#wproxy<'a, #rty, #regspec_ident, O> } + } else { + quote! { crate::#wproxy<'a, #rty, #regspec_ident, O, #value_write_ty> } + } } else { let wproxy = Ident::new( if unsafety { @@ -885,7 +889,13 @@ pub fn fields( span, ); let width = &util::unsuffixed(width as _); - quote! { crate::#wproxy<'a, #rty, #regspec_ident, #fty, #value_write_ty, #width, O> } + if fty == "u8" && value_write_ty == "u8" { + quote! { crate::#wproxy<'a, #rty, #regspec_ident, #width, O> } + } else if value_write_ty == "u8" { + quote! { crate::#wproxy<'a, #rty, #regspec_ident, #width, O, #fty> } + } else { + quote! { crate::#wproxy<'a, #rty, #regspec_ident, #width, O, #fty, #value_write_ty> } + } }; mod_items.extend(quote! { #[doc = #field_writer_brief] From 317fd0a8986857c9089dd3ecc0bf555ab19784ae Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 29 May 2023 14:30:16 +0300 Subject: [PATCH 080/319] default Field reader generics --- src/generate/generic.rs | 2 +- src/generate/register.rs | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/generate/generic.rs b/src/generate/generic.rs index c6c24ab1..045599b7 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -342,7 +342,7 @@ impl BitReaderRaw { /// Field reader. /// /// Result of the `read` methods of fields. -pub type FieldReader = FieldReaderRaw; +pub type FieldReader = FieldReaderRaw; /// Bit-wise field reader pub type BitReader = BitReaderRaw; diff --git a/src/generate/register.rs b/src/generate/register.rs index dd8d461e..9aa0caa3 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -550,6 +550,8 @@ pub fn fields( } else { quote! { crate::BitReader<#value_read_ty> } } + } else if fty == "u8" && value_read_ty == "u8" { + quote! { crate::FieldReader } } else if value_read_ty == "u8" { quote! { crate::FieldReader<#fty> } } else { From aba845f1fbe6272d67c3d22ff74afc247401fe4f Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 29 May 2023 18:05:34 +0300 Subject: [PATCH 081/319] removed unneeded rty generic in FieldWriter --- CHANGELOG.md | 1 + src/generate/generic.rs | 135 ++++++++++++++++++--------------------- src/generate/register.rs | 12 ++-- 3 files changed, 69 insertions(+), 79 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index fcb73363..1ddd53fd 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- removed `rty` generic in `FieldWriter` - `bool` and `u8` as default generics for `BitReader/Writer` and `FieldReader/Writer` - Bump MSRV to 1.65 - Optimize case change/sanitize diff --git a/src/generate/generic.rs b/src/generate/generic.rs index 045599b7..2b798b98 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -342,31 +342,30 @@ impl BitReaderRaw { /// Field reader. /// /// Result of the `read` methods of fields. -pub type FieldReader = FieldReaderRaw; +pub type FieldReader = FieldReaderRaw; /// Bit-wise field reader pub type BitReader = BitReaderRaw; -impl FieldReader +impl FieldReader where - U: Copy, + N: Copy, { /// Reads raw bits from field. #[inline(always)] - pub fn bits(&self) -> U { + pub fn bits(&self) -> N { self.bits } } -impl PartialEq for FieldReader +impl PartialEq for FieldReader where - U: PartialEq, FI: Copy, - U: From, + N: PartialEq + From, { #[inline(always)] fn eq(&self, other: &FI) -> bool { - self.bits.eq(&U::from(*other)) + self.bits.eq(&N::from(*other)) } } @@ -405,19 +404,19 @@ pub struct Safe; pub struct Unsafe; #[doc(hidden)] -pub struct FieldWriterRaw<'a, U, REG, const WI: u8, const O: u8, N, FI, Safety> +pub struct FieldWriterRaw<'a, REG, const WI: u8, const O: u8, N, FI, Safety> where - REG: Writable + RegisterSpec, + REG: Writable + RegisterSpec, N: From, { pub(crate) w: &'a mut REG::Writer, _field: marker::PhantomData<(N, FI, Safety)>, } -impl<'a, U, REG, const WI: u8, const O: u8, N, FI, Safety> - FieldWriterRaw<'a, U, REG, WI, O, N, FI, Safety> +impl<'a, REG, const WI: u8, const O: u8, N, FI, Safety> + FieldWriterRaw<'a, REG, WI, O, N, FI, Safety> where - REG: Writable + RegisterSpec, + REG: Writable + RegisterSpec, N: From, { /// Creates a new instance of the writer @@ -432,18 +431,18 @@ where } #[doc(hidden)] -pub struct BitWriterRaw<'a, U, REG, const O: u8, FI, M> +pub struct BitWriterRaw<'a, REG, const O: u8, FI, M> where - REG: Writable + RegisterSpec, + REG: Writable + RegisterSpec, bool: From, { pub(crate) w: &'a mut REG::Writer, _field: marker::PhantomData<(FI, M)>, } -impl<'a, U, REG, const O: u8, FI, M> BitWriterRaw<'a, U, REG, O, FI, M> +impl<'a, REG, const O: u8, FI, M> BitWriterRaw<'a, REG, O, FI, M> where - REG: Writable + RegisterSpec, + REG: Writable + RegisterSpec, bool: From, { /// Creates a new instance of the writer @@ -458,24 +457,24 @@ where } /// Write field Proxy with unsafe `bits` -pub type FieldWriter<'a, U, REG, const WI: u8, const O: u8, N = u8, FI = u8> = - FieldWriterRaw<'a, U, REG, WI, O, N, FI, Unsafe>; +pub type FieldWriter<'a, REG, const WI: u8, const O: u8, N = u8, FI = u8> = + FieldWriterRaw<'a, REG, WI, O, N, FI, Unsafe>; /// Write field Proxy with safe `bits` -pub type FieldWriterSafe<'a, U, REG, const WI: u8, const O: u8, N = u8, FI = u8> = - FieldWriterRaw<'a, U, REG, WI, O, N, FI, Safe>; +pub type FieldWriterSafe<'a, REG, const WI: u8, const O: u8, N = u8, FI = u8> = + FieldWriterRaw<'a, REG, WI, O, N, FI, Safe>; -impl<'a, U, REG, const WI: u8, const OF: u8, N, FI> FieldWriter<'a, U, REG, WI, OF, N, FI> +impl<'a, REG, const WI: u8, const OF: u8, N, FI> FieldWriter<'a, REG, WI, OF, N, FI> where - REG: Writable + RegisterSpec, + REG: Writable + RegisterSpec, N: From, { /// Field width pub const WIDTH: u8 = WI; } -impl<'a, U, REG, const WI: u8, const OF: u8, N, FI> FieldWriterSafe<'a, U, REG, WI, OF, N, FI> +impl<'a, REG, const WI: u8, const OF: u8, N, FI> FieldWriterSafe<'a, REG, WI, OF, N, FI> where - REG: Writable + RegisterSpec, + REG: Writable + RegisterSpec, N: From, { /// Field width @@ -488,11 +487,11 @@ macro_rules! bit_proxy { pub struct $mwv; /// Bit-wise write field proxy - pub type $writer<'a, U, REG, const O: u8, FI = bool> = BitWriterRaw<'a, U, REG, O, FI, $mwv>; + pub type $writer<'a, REG, const O: u8, FI = bool> = BitWriterRaw<'a, REG, O, FI, $mwv>; - impl<'a, U, REG, const OF: u8, FI> $writer<'a, U, REG, OF, FI> + impl<'a, REG, const OF: u8, FI> $writer<'a, REG, OF, FI> where - REG: Writable + RegisterSpec, + REG: Writable + RegisterSpec, bool: From, { /// Field width @@ -503,17 +502,16 @@ macro_rules! bit_proxy { macro_rules! impl_bit_proxy { ($writer:ident) => { - impl<'a, U, REG, const OF: u8, FI> $writer<'a, U, REG, OF, FI> + impl<'a, REG, const OF: u8, FI> $writer<'a, REG, OF, FI> where - REG: Writable + RegisterSpec, - U: RawReg, + REG: Writable + RegisterSpec, bool: From, { /// Writes bit to the field #[inline(always)] pub fn bit(self, value: bool) -> &'a mut REG::Writer { - self.w.bits &= !(U::one() << OF); - self.w.bits |= (U::from(value) & U::one()) << OF; + self.w.bits &= !(REG::Ux::one() << OF); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::one()) << OF; self.w } /// Writes `variant` to the field @@ -533,10 +531,10 @@ bit_proxy!(BitWriter0S, Bit0S); bit_proxy!(BitWriter1T, Bit1T); bit_proxy!(BitWriter0T, Bit0T); -impl<'a, U, REG, const WI: u8, const OF: u8, N, FI> FieldWriter<'a, U, REG, WI, OF, N, FI> +impl<'a, REG, const WI: u8, const OF: u8, N, FI> FieldWriter<'a, REG, WI, OF, N, FI> where - REG: Writable + RegisterSpec, - U: RawReg + From, + REG: Writable + RegisterSpec, + REG::Ux: From, N: From, { /// Writes raw bits to the field @@ -546,8 +544,8 @@ where /// Passing incorrect value can cause undefined behaviour. See reference manual #[inline(always)] pub unsafe fn bits(self, value: N) -> &'a mut REG::Writer { - self.w.bits &= !(U::mask::() << OF); - self.w.bits |= (U::from(value) & U::mask::()) << OF; + self.w.bits &= !(REG::Ux::mask::() << OF); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << OF; self.w } /// Writes `variant` to the field @@ -556,17 +554,17 @@ where unsafe { self.bits(N::from(variant)) } } } -impl<'a, U, REG, const WI: u8, const OF: u8, N, FI> FieldWriterSafe<'a, U, REG, WI, OF, N, FI> +impl<'a, REG, const WI: u8, const OF: u8, N, FI> FieldWriterSafe<'a, REG, WI, OF, N, FI> where - REG: Writable + RegisterSpec, - U: RawReg + From, + REG: Writable + RegisterSpec, + REG::Ux: From, N: From, { /// Writes raw bits to the field #[inline(always)] pub fn bits(self, value: N) -> &'a mut REG::Writer { - self.w.bits &= !(U::mask::() << OF); - self.w.bits |= (U::from(value) & U::mask::()) << OF; + self.w.bits &= !(REG::Ux::mask::() << OF); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << OF; self.w } /// Writes `variant` to the field @@ -584,106 +582,99 @@ impl_bit_proxy!(BitWriter0S); impl_bit_proxy!(BitWriter1T); impl_bit_proxy!(BitWriter0T); -impl<'a, U, REG, const OF: u8, FI> BitWriter<'a, U, REG, OF, FI> +impl<'a, REG, const OF: u8, FI> BitWriter<'a, REG, OF, FI> where - REG: Writable + RegisterSpec, - U: RawReg, + REG: Writable + RegisterSpec, bool: From, { /// Sets the field bit #[inline(always)] pub fn set_bit(self) -> &'a mut REG::Writer { - self.w.bits |= U::one() << OF; + self.w.bits |= REG::Ux::one() << OF; self.w } /// Clears the field bit #[inline(always)] pub fn clear_bit(self) -> &'a mut REG::Writer { - self.w.bits &= !(U::one() << OF); + self.w.bits &= !(REG::Ux::one() << OF); self.w } } -impl<'a, U, REG, const OF: u8, FI> BitWriter1S<'a, U, REG, OF, FI> +impl<'a, REG, const OF: u8, FI> BitWriter1S<'a, REG, OF, FI> where - REG: Writable + RegisterSpec, - U: RawReg, + REG: Writable + RegisterSpec, bool: From, { /// Sets the field bit #[inline(always)] pub fn set_bit(self) -> &'a mut REG::Writer { - self.w.bits |= U::one() << OF; + self.w.bits |= REG::Ux::one() << OF; self.w } } -impl<'a, U, REG, const OF: u8, FI> BitWriter0C<'a, U, REG, OF, FI> +impl<'a, REG, const OF: u8, FI> BitWriter0C<'a, REG, OF, FI> where - REG: Writable + RegisterSpec, - U: RawReg, + REG: Writable + RegisterSpec, bool: From, { /// Clears the field bit #[inline(always)] pub fn clear_bit(self) -> &'a mut REG::Writer { - self.w.bits &= !(U::one() << OF); + self.w.bits &= !(REG::Ux::one() << OF); self.w } } -impl<'a, U, REG, const OF: u8, FI> BitWriter1C<'a, U, REG, OF, FI> +impl<'a, REG, const OF: u8, FI> BitWriter1C<'a, REG, OF, FI> where - REG: Writable + RegisterSpec, - U: RawReg, + REG: Writable + RegisterSpec, bool: From, { ///Clears the field bit by passing one #[inline(always)] pub fn clear_bit_by_one(self) -> &'a mut REG::Writer { - self.w.bits |= U::one() << OF; + self.w.bits |= REG::Ux::one() << OF; self.w } } -impl<'a, U, REG, const OF: u8, FI> BitWriter0S<'a, U, REG, OF, FI> +impl<'a, REG, const OF: u8, FI> BitWriter0S<'a, REG, OF, FI> where - REG: Writable + RegisterSpec, - U: RawReg, + REG: Writable + RegisterSpec, bool: From, { ///Sets the field bit by passing zero #[inline(always)] pub fn set_bit_by_zero(self) -> &'a mut REG::Writer { - self.w.bits &= !(U::one() << OF); + self.w.bits &= !(REG::Ux::one() << OF); self.w } } -impl<'a, U, REG, const OF: u8, FI> BitWriter1T<'a, U, REG, OF, FI> +impl<'a, REG, const OF: u8, FI> BitWriter1T<'a, REG, OF, FI> where - REG: Writable + RegisterSpec, - U: RawReg, + REG: Writable + RegisterSpec, bool: From, { ///Toggle the field bit by passing one #[inline(always)] pub fn toggle_bit(self) -> &'a mut REG::Writer { - self.w.bits |= U::one() << OF; + self.w.bits |= REG::Ux::one() << OF; self.w } } -impl<'a, U, REG, const OF: u8, FI> BitWriter0T<'a, U, REG, OF, FI> +impl<'a, REG, const OF: u8, FI> BitWriter0T<'a, REG, OF, FI> where - REG: Writable + RegisterSpec, - U: RawReg, + REG: Writable + RegisterSpec, bool: From, { ///Toggle the field bit by passing zero #[inline(always)] pub fn toggle_bit(self) -> &'a mut REG::Writer { - self.w.bits &= !(U::one() << OF); + self.w.bits &= !(REG::Ux::one() << OF); self.w } } diff --git a/src/generate/register.rs b/src/generate/register.rs index 9aa0caa3..db398de6 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -251,7 +251,6 @@ pub fn render_register_mod( ) = fields( cur_fields, ®spec_ident, - &rty, register.modified_write_values, access, properties, @@ -390,7 +389,6 @@ pub fn render_register_mod( pub fn fields( mut fields: Vec<&Field>, regspec_ident: &Ident, - rty: &Ident, rmwv: Option, access: Access, properties: &RegisterProperties, @@ -877,9 +875,9 @@ pub fn fields( span, ); if value_write_ty == "bool" { - quote! { crate::#wproxy<'a, #rty, #regspec_ident, O> } + quote! { crate::#wproxy<'a, #regspec_ident, O> } } else { - quote! { crate::#wproxy<'a, #rty, #regspec_ident, O, #value_write_ty> } + quote! { crate::#wproxy<'a, #regspec_ident, O, #value_write_ty> } } } else { let wproxy = Ident::new( @@ -892,11 +890,11 @@ pub fn fields( ); let width = &util::unsuffixed(width as _); if fty == "u8" && value_write_ty == "u8" { - quote! { crate::#wproxy<'a, #rty, #regspec_ident, #width, O> } + quote! { crate::#wproxy<'a, #regspec_ident, #width, O> } } else if value_write_ty == "u8" { - quote! { crate::#wproxy<'a, #rty, #regspec_ident, #width, O, #fty> } + quote! { crate::#wproxy<'a, #regspec_ident, #width, O, #fty> } } else { - quote! { crate::#wproxy<'a, #rty, #regspec_ident, #width, O, #fty, #value_write_ty> } + quote! { crate::#wproxy<'a, #regspec_ident, #width, O, #fty, #value_write_ty> } } }; mod_items.extend(quote! { From be920c0581008e4f9a43916f90becd819c6b9781 Mon Sep 17 00:00:00 2001 From: Christopher Liebman Date: Tue, 16 May 2023 14:53:40 -0700 Subject: [PATCH 082/319] implement Debug for readable blocks and registers --- CHANGELOG.md | 1 + src/generate/peripheral.rs | 13 ++++ src/generate/register.rs | 149 ++++++++++++++++++++++++++++++++++++- src/lib.rs | 16 ++++ src/main.rs | 13 ++++ src/util.rs | 6 ++ 6 files changed, 195 insertions(+), 3 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 6f2ca0b5..26d66fe3 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -12,6 +12,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Fix dangling implicit derives - Fix escaping <> and & characters in doc attributes - Add `interrupt_link_section` config parameter for controlling the `#[link_section = "..."]` attribute of `__INTERRUPTS` +- Add option to implement Debug for readable registers (#716) ## [v0.28.0] - 2022-12-25 diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 90cdfece..5c638b59 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -644,6 +644,18 @@ fn register_or_cluster_block( } } + let mut derive_debug = TokenStream::new(); + if config.impl_debug { + if let Some(feature_name) = &config.impl_debug_feature { + derive_debug.extend(quote! { + #[cfg_attr(feature = #feature_name, derive(Debug))] + }); + } else { + derive_debug.extend(quote! { + #[derive(Debug)] + }); + } + } let name = if let Some(name) = name { name.to_constant_case_ident(span) } else { @@ -663,6 +675,7 @@ fn register_or_cluster_block( Ok(quote! { ///Register block #[repr(C)] + #derive_debug pub struct #name { #rbfs } diff --git a/src/generate/register.rs b/src/generate/register.rs index 801b24e0..ac3619b3 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -230,10 +230,14 @@ pub fn render_register_mod( } let mut r_impl_items = TokenStream::new(); + let mut r_debug_impl = TokenStream::new(); let mut w_impl_items = TokenStream::new(); let mut zero_to_modify_fields_bitmap = 0; let mut one_to_modify_fields_bitmap = 0; + let open = Punct::new('{', Spacing::Alone); + let close = Punct::new('}', Spacing::Alone); + if let Some(cur_fields) = register.fields.as_ref() { // filter out all reserved fields, as we should not generate code for // them @@ -243,6 +247,15 @@ pub fn render_register_mod( .collect(); if !cur_fields.is_empty() { + if config.impl_debug { + r_debug_impl.extend(render_register_mod_debug( + register, + &access, + &cur_fields, + config, + )) + } + ( r_impl_items, w_impl_items, @@ -261,16 +274,57 @@ pub fn render_register_mod( config, )?; } + } else if !access.can_read() || register.read_action.is_some() { + if let Some(feature) = &config.impl_debug_feature { + r_debug_impl.extend(quote! { + #[cfg(feature=#feature)] + }); + } + r_debug_impl.extend(quote! { + impl core::fmt::Debug for crate::generic::Reg<#regspec_ident> { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + write!(f, "(not readable)") + } + } + }); + } else { + // no register fields are defined so implement Debug to get entire register value + if let Some(feature) = &config.impl_debug_feature { + r_debug_impl.extend(quote! { + #[cfg(feature=#feature)] + }); + } + r_debug_impl.extend(quote! { + impl core::fmt::Debug for R { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + write!(f, "{}", self.bits()) + } + } + }); + if let Some(feature) = &config.impl_debug_feature { + r_debug_impl.extend(quote! { + #[cfg(feature=#feature)] + }); + } + r_debug_impl.extend(quote! { + impl core::fmt::Debug for crate::generic::Reg<#regspec_ident> { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + self.read().fmt(f) + } + } + }); } - let open = Punct::new('{', Spacing::Alone); - let close = Punct::new('}', Spacing::Alone); - if can_read && !r_impl_items.is_empty() { mod_items.extend(quote! { impl R #open #r_impl_items #close }); } + if !r_debug_impl.is_empty() { + mod_items.extend(quote! { + #r_debug_impl + }); + } if can_write { mod_items.extend(quote! { @@ -386,6 +440,95 @@ pub fn render_register_mod( Ok(mod_items) } +fn render_register_mod_debug( + register: &Register, + access: &Access, + cur_fields: &[&Field], + config: &Config, +) -> Result { + let name = util::name_of(register, config.ignore_groups); + let span = Span::call_site(); + let regspec_ident = format!("{name}_SPEC").to_constant_case_ident(span); + let open = Punct::new('{', Spacing::Alone); + let close = Punct::new('}', Spacing::Alone); + let mut r_debug_impl = TokenStream::new(); + + // implement Debug for register readable fields that have no read side effects + if access.can_read() && register.read_action.is_none() { + if let Some(feature) = &config.impl_debug_feature { + r_debug_impl.extend(quote! { + #[cfg(feature=#feature)] + }); + } + r_debug_impl.extend(quote! { + impl core::fmt::Debug for R #open + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result #open + f.debug_struct(#name) + }); + for &f in cur_fields.iter() { + let field_access = match &f.access { + Some(a) => a, + None => access, + }; + let bit_or_bits = if f.bit_width() > 1 { "bits" } else { "bit" }; + let bit_or_bits = syn::Ident::new(bit_or_bits, span); + log::debug!("register={} field={}", name, f.name); + if field_access.can_read() && f.read_action.is_none() { + if let Field::Array(_, de) = &f { + for (_, suffix) in de.indexes().enumerate() { + let f_name_n = util::replace_suffix(&f.name, &suffix) + .to_snake_case_ident(Span::call_site()); + let f_name_n_s = format!("{f_name_n}"); + r_debug_impl.extend(quote! { + .field(#f_name_n_s, &format_args!("{}", self.#f_name_n().#bit_or_bits())) + }); + } + } else { + let f_name = util::replace_suffix(&f.name, ""); + let f_name = f_name.to_snake_case_ident(span); + let f_name_s = format!("{f_name}"); + r_debug_impl.extend(quote! { + .field(#f_name_s, &format_args!("{}", self.#f_name().#bit_or_bits())) + }); + } + } + } + r_debug_impl.extend(quote! { + .finish() + #close + #close + }); + if let Some(feature) = &config.impl_debug_feature { + r_debug_impl.extend(quote! { + #[cfg(feature=#feature)] + }); + } + r_debug_impl.extend(quote! { + impl core::fmt::Debug for crate::generic::Reg<#regspec_ident> { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + self.read().fmt(f) + } + } + }); + } else if !access.can_read() || register.read_action.is_some() { + if let Some(feature) = &config.impl_debug_feature { + r_debug_impl.extend(quote! { + #[cfg(feature=#feature)] + }); + } + r_debug_impl.extend(quote! { + impl core::fmt::Debug for crate::generic::Reg<#regspec_ident> { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + write!(f, "(not readable)") + } + } + }); + } else { + warn!("not implementing debug for {name}"); + } + Ok(r_debug_impl) +} + #[allow(clippy::too_many_arguments)] pub fn fields( mut fields: Vec<&Field>, diff --git a/src/lib.rs b/src/lib.rs index 54bdbd3d..01bb161b 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -495,6 +495,17 @@ //! `portable-atomic` v0.3.16 must be added to the dependencies, with default features off to //! disable the `fallback` feature. //! +//! ## the `--impl_debug` flag +//! +//! The `--impl_debug` option will cause svd2rust to generate `core::fmt::Debug` implementations for +//! all registers and blocks. If a register is readable and has fields defined then each field value +//! will be printed - if no fields are defined then the value of the register will be printed. Any +//! register that has read actions will not be read and printed as `(not read/has read action!)`. +//! Registers that are not readable will have `(write only register)` printed as the value. +//! +//! The `--impl_debug_feature` flad can also be specified to include debug implementations conditionally +//! behind the supplied feature name. +//! //! Usage examples: //! //! ```ignore @@ -502,6 +513,11 @@ //! P1.p1out.set_bits(|w| unsafe { w.bits(1 << 1) }); //! P1.p1out.clear_bits(|w| unsafe { w.bits(!(1 << 2)) }); //! P1.p1out.toggle_bits(|w| unsafe { w.bits(1 << 4) }); +//! // if impl_debug was used one can print Registers or RegisterBlocks +//! // print single register +//! println!("RTC_CNT {:#?}", unsafe { &*esp32s3::RTC_CNTL::ptr() }.options0); +//! // print all registers for peripheral +//! println!("RTC_CNT {:#?}", unsafe { &*esp32s3::RTC_CNTL::ptr() }); //! ``` #![recursion_limit = "128"] diff --git a/src/main.rs b/src/main.rs index 4ee7129d..0d18ed98 100755 --- a/src/main.rs +++ b/src/main.rs @@ -118,6 +118,19 @@ fn run() -> Result<()> { .action(ArgAction::SetTrue) .help("Use array increment for cluster size"), ) + .arg( + Arg::new("impl_debug") + .long("impl_debug") + .action(ArgAction::SetTrue) + .help("implement Debug for readable blocks and registers"), + ) + .arg( + Arg::new("impl_debug_feature") + .long("impl_debug_feature") + .help("add feature gating for block and register debug implementation") + .action(ArgAction::Set) + .value_name("FEATURE"), + ) .arg( Arg::new("make_mod") .long("make_mod") diff --git a/src/util.rs b/src/util.rs index fc58314c..aba3cab5 100644 --- a/src/util.rs +++ b/src/util.rs @@ -51,6 +51,10 @@ pub struct Config { pub feature_peripheral: bool, #[cfg_attr(feature = "serde", serde(default))] pub max_cluster_size: bool, + #[cfg_attr(feature = "serde", serde(default))] + pub impl_debug: bool, + #[cfg_attr(feature = "serde", serde(default))] + pub impl_debug_feature: Option, #[cfg_attr(feature = "serde", serde(default = "current_dir"))] pub output_dir: PathBuf, #[cfg_attr(feature = "serde", serde(default))] @@ -118,6 +122,8 @@ impl Default for Config { feature_group: false, feature_peripheral: false, max_cluster_size: false, + impl_debug: false, + impl_debug_feature: None, output_dir: current_dir(), input: None, source_type: SourceType::default(), From 98399eb0d242fee945b727d57774895da7eee322 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 4 Jun 2023 17:16:07 +0300 Subject: [PATCH 083/319] print curl error --- CHANGELOG.md | 1 + ci/script.sh | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index d62a8ae4..49717158 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- print error on ci `curl` request fail - removed `rty` generic in `FieldWriter` - `bool` and `u8` as default generics for `BitReader/Writer` and `FieldReader/Writer` - Bump MSRV to 1.65 diff --git a/ci/script.sh b/ci/script.sh index 8d86d40a..b5e446f2 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -9,7 +9,7 @@ test_patched_stm32() { } test_svd_for_target() { - curl -L --output $td/input.svd $2 + curl -fL --output $td/input.svd $2 # NOTE we care about errors in svd2rust, but not about errors / warnings in rustfmt pushd $td From 4b59727c7e77aeaae1f00dbea0f9c08c9e430d05 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Sun, 4 Jun 2023 17:30:10 +0200 Subject: [PATCH 084/319] update ci removes specific clippy-check in favor of running clippy directly --- .github/workflows/changelog.yml | 2 +- .github/workflows/ci.yml | 38 +++++++++++---------------------- .github/workflows/clippy.yml | 22 ------------------- .github/workflows/release.yml | 13 ++++------- 4 files changed, 17 insertions(+), 58 deletions(-) delete mode 100644 .github/workflows/clippy.yml diff --git a/.github/workflows/changelog.yml b/.github/workflows/changelog.yml index c0d72f31..8ee9f5a3 100644 --- a/.github/workflows/changelog.yml +++ b/.github/workflows/changelog.yml @@ -12,7 +12,7 @@ jobs: uses: actions/checkout@v3 - name: Changelog updated - uses: Zomzog/changelog-checker@v1.2.0 + uses: Zomzog/changelog-checker@v1.3.0 with: fileName: CHANGELOG.md env: diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index eeb35eb1..e59193b2 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -10,12 +10,13 @@ jobs: name: CI runs-on: ubuntu-latest needs: [check, ci-linux, ci-clippy, ci-serde] + if: always() steps: - name: Done - run: exit 0 + run: jq --exit-status 'all(.result == "success")' <<< '${{ toJson(needs) }}' check: - name: Cargo check + name: Cargo check / clippy runs-on: ubuntu-latest strategy: matrix: @@ -24,22 +25,18 @@ jobs: steps: - uses: actions/checkout@v3 - - uses: actions-rs/toolchain@v1 + - uses: dtolnay/rust-toolchain@master with: - profile: minimal toolchain: stable - override: true - target: ${{ matrix.TARGET }} + targets: ${{ matrix.TARGET }} + components: clippy - name: Cache Dependencies uses: Swatinem/rust-cache@v2 with: key: ${{ matrix.TARGET }} - - uses: actions-rs/cargo@v1 - with: - command: check - args: --target ${{ matrix.TARGET }} + - run: cargo clippy --target ${{ matrix.TARGET }} ci-linux: runs-on: ubuntu-latest @@ -88,11 +85,9 @@ jobs: steps: - uses: actions/checkout@v3 - - uses: actions-rs/toolchain@v1 + - uses: dtolnay/rust-toolchain@master with: - profile: minimal toolchain: ${{ matrix.rust }} - override: true - name: Cache uses: Swatinem/rust-cache@v2 @@ -114,11 +109,9 @@ jobs: steps: - uses: actions/checkout@v3 - - uses: actions-rs/toolchain@v1 + - uses: dtolnay/rust-toolchain@master with: - profile: minimal toolchain: stable - override: true - name: Cache uses: Swatinem/rust-cache@v2 @@ -139,11 +132,9 @@ jobs: steps: - uses: actions/checkout@v3 - - uses: actions-rs/toolchain@v1 + - uses: dtolnay/rust-toolchain@master with: - profile: minimal toolchain: stable - override: true - name: Cache uses: Swatinem/rust-cache@v2 @@ -166,17 +157,12 @@ jobs: steps: - uses: actions/checkout@v3 - - uses: actions-rs/toolchain@v1 + - uses: dtolnay/rust-toolchain@master with: - profile: minimal toolchain: stable - override: true components: rustfmt - name: Cache Dependencies uses: Swatinem/rust-cache@v2 - - uses: actions-rs/cargo@v1 - with: - command: fmt - args: --all -- --check + - run: cargo fmt --all -- --check diff --git a/.github/workflows/clippy.yml b/.github/workflows/clippy.yml deleted file mode 100644 index 993b8b64..00000000 --- a/.github/workflows/clippy.yml +++ /dev/null @@ -1,22 +0,0 @@ -on: [push, pull_request] - -name: Clippy check -jobs: - clippy_check: - runs-on: ubuntu-latest - steps: - - uses: actions/checkout@v3 - - - uses: actions-rs/toolchain@v1 - with: - profile: minimal - toolchain: stable - override: true - components: clippy - - - name: Cache Dependencies - uses: Swatinem/rust-cache@v2 - - - uses: actions-rs/clippy-check@v1 - with: - token: ${{ secrets.GITHUB_TOKEN }} diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml index 1f0ddbf4..993f4bdd 100644 --- a/.github/workflows/release.yml +++ b/.github/workflows/release.yml @@ -27,20 +27,15 @@ jobs: runs-on: ${{ matrix.os }} steps: - uses: actions/checkout@v3 - - uses: actions-rs/toolchain@v1 + - uses: dtolnay/rust-toolchain@master with: toolchain: stable - profile: minimal - target: ${{ matrix.target }} - override: true + targets: ${{ matrix.target }} - name: Cache Dependencies uses: Swatinem/rust-cache@v2 with: key: ${{ matrix.target }} - - uses: actions-rs/cargo@v1 - with: - command: build - args: --target ${{ matrix.target }} --release + - run: cargo build --target ${{ matrix.target }} --release - name: Compress and rename executable if: ${{ matrix.os != 'windows-latest' }} @@ -69,7 +64,7 @@ jobs: run: echo "CURRENT_DATE=$(date +'%Y-%m-%d')" >> $GITHUB_ENV - id: changelog-reader - uses: mindsers/changelog-reader-action@v2.0.0 + uses: mindsers/changelog-reader-action@v2.2.2 with: version: ${{ (github.ref_type == 'tag' && github.ref_name) || 'Unreleased' }} From a29b9d5d068954aae826a93a66bd5b89e25610b7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Sun, 4 Jun 2023 17:37:28 +0200 Subject: [PATCH 085/319] correctly detect label changes for changelog check --- .github/workflows/changelog.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.github/workflows/changelog.yml b/.github/workflows/changelog.yml index 8ee9f5a3..4317d5de 100644 --- a/.github/workflows/changelog.yml +++ b/.github/workflows/changelog.yml @@ -1,5 +1,6 @@ on: pull_request_target: + types: [labeled, unlabeled, opened, synchronize, reopened] name: Changelog check From ccad92407fb63af57885c9d9552c655f56469310 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 4 Jun 2023 20:21:00 +0300 Subject: [PATCH 086/319] run ci on merging instead of push --- .github/bors.toml | 8 -------- .github/workflows/ci.yml | 3 ++- 2 files changed, 2 insertions(+), 9 deletions(-) delete mode 100644 .github/bors.toml diff --git a/.github/bors.toml b/.github/bors.toml deleted file mode 100644 index 78caad29..00000000 --- a/.github/bors.toml +++ /dev/null @@ -1,8 +0,0 @@ -block_labels = ["needs-decision", "S-waiting-on-team"] -delete_merged_branches = true -required_approvals = 1 -status = [ - "Rustfmt", - "CI", -] -timeout_sec = 14400 diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index e59193b2..b1f2016d 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -1,7 +1,8 @@ on: push: - branches: [ staging, trying, master ] + branches: master pull_request: + merge_group: name: Continuous integration From c276ef3928c5bd8283f402de3370ec0b207c9819 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 4 Jun 2023 21:25:57 +0300 Subject: [PATCH 087/319] check & clippy are different steps --- .github/workflows/ci.yml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index b1f2016d..d47815bc 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -37,6 +37,9 @@ jobs: with: key: ${{ matrix.TARGET }} + - run: cargo check --target ${{ matrix.TARGET }} + env: + RUSTFLAGS: -D warnings - run: cargo clippy --target ${{ matrix.TARGET }} ci-linux: From 0446fd1aad062113d1fb575244d96d0aa501f587 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 29 May 2023 19:16:55 +0300 Subject: [PATCH 088/319] FieldSpec --- CHANGELOG.md | 1 + src/generate/generic.rs | 91 +++++++++++++++++++++------------------- src/generate/register.rs | 26 ++++++++---- 3 files changed, 67 insertions(+), 51 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 49717158..e600f0cd 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- `FieldFpec` instead or `fty` generic - print error on ci `curl` request fail - removed `rty` generic in `FieldWriter` - `bool` and `u8` as default generics for `BitReader/Writer` and `FieldReader/Writer` diff --git a/src/generate/generic.rs b/src/generate/generic.rs index 2b798b98..fd99d5c9 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -33,6 +33,9 @@ macro_rules! raw_reg { const fn $mask() -> $U { <$U>::MAX >> ($size - WI) } + impl FieldSpec for $U { + type Ux = $U; + } }; } @@ -47,6 +50,12 @@ pub trait RegisterSpec { type Ux: RawReg; } +/// Raw field type +pub trait FieldSpec: Sized { + /// Raw field type (`u8`, `u16`, `u32`, ...). + type Ux: Copy + PartialEq + From; +} + /// Trait implemented by readable registers to enable the `read` method. /// /// Registers marked with `Writable` can be also be `modify`'ed. @@ -301,19 +310,19 @@ impl W { } #[doc(hidden)] -pub struct FieldReaderRaw { - pub(crate) bits: U, +pub struct FieldReaderRaw +where + FI: FieldSpec +{ + pub(crate) bits: FI::Ux, _reg: marker::PhantomData, } -impl FieldReaderRaw -where - U: Copy, -{ +impl FieldReaderRaw { /// Creates a new instance of the reader. #[allow(unused)] #[inline(always)] - pub(crate) fn new(bits: U) -> Self { + pub(crate) fn new(bits: FI::Ux) -> Self { Self { bits, _reg: marker::PhantomData, @@ -322,7 +331,7 @@ where } #[doc(hidden)] -pub struct BitReaderRaw { +pub struct BitReaderRaw { pub(crate) bits: bool, _reg: marker::PhantomData, } @@ -342,30 +351,26 @@ impl BitReaderRaw { /// Field reader. /// /// Result of the `read` methods of fields. -pub type FieldReader = FieldReaderRaw; +pub type FieldReader = FieldReaderRaw; /// Bit-wise field reader pub type BitReader = BitReaderRaw; -impl FieldReader -where - N: Copy, -{ +impl FieldReader { /// Reads raw bits from field. #[inline(always)] - pub fn bits(&self) -> N { + pub fn bits(&self) -> FI::Ux { self.bits } } -impl PartialEq for FieldReader +impl PartialEq for FieldReader where - FI: Copy, - N: PartialEq + From, + FI: FieldSpec + Copy, { #[inline(always)] fn eq(&self, other: &FI) -> bool { - self.bits.eq(&N::from(*other)) + self.bits.eq(&FI::Ux::from(*other)) } } @@ -404,20 +409,20 @@ pub struct Safe; pub struct Unsafe; #[doc(hidden)] -pub struct FieldWriterRaw<'a, REG, const WI: u8, const O: u8, N, FI, Safety> +pub struct FieldWriterRaw<'a, REG, const WI: u8, const O: u8, FI = u8, Safety = Unsafe> where REG: Writable + RegisterSpec, - N: From, + FI: FieldSpec, { pub(crate) w: &'a mut REG::Writer, - _field: marker::PhantomData<(N, FI, Safety)>, + _field: marker::PhantomData<(FI, Safety)>, } -impl<'a, REG, const WI: u8, const O: u8, N, FI, Safety> - FieldWriterRaw<'a, REG, WI, O, N, FI, Safety> +impl<'a, REG, const WI: u8, const O: u8, FI, Safety> + FieldWriterRaw<'a, REG, WI, O, FI, Safety> where REG: Writable + RegisterSpec, - N: From, + FI: FieldSpec, { /// Creates a new instance of the writer #[allow(unused)] @@ -431,7 +436,7 @@ where } #[doc(hidden)] -pub struct BitWriterRaw<'a, REG, const O: u8, FI, M> +pub struct BitWriterRaw<'a, REG, const O: u8, FI = bool, M = BitM> where REG: Writable + RegisterSpec, bool: From, @@ -457,25 +462,25 @@ where } /// Write field Proxy with unsafe `bits` -pub type FieldWriter<'a, REG, const WI: u8, const O: u8, N = u8, FI = u8> = - FieldWriterRaw<'a, REG, WI, O, N, FI, Unsafe>; +pub type FieldWriter<'a, REG, const WI: u8, const O: u8, FI = u8> = + FieldWriterRaw<'a, REG, WI, O, FI, Unsafe>; /// Write field Proxy with safe `bits` -pub type FieldWriterSafe<'a, REG, const WI: u8, const O: u8, N = u8, FI = u8> = - FieldWriterRaw<'a, REG, WI, O, N, FI, Safe>; +pub type FieldWriterSafe<'a, REG, const WI: u8, const O: u8, FI = u8> = + FieldWriterRaw<'a, REG, WI, O, FI, Safe>; -impl<'a, REG, const WI: u8, const OF: u8, N, FI> FieldWriter<'a, REG, WI, OF, N, FI> +impl<'a, REG, const WI: u8, const OF: u8, FI> FieldWriter<'a, REG, WI, OF, FI> where REG: Writable + RegisterSpec, - N: From, + FI: FieldSpec, { /// Field width pub const WIDTH: u8 = WI; } -impl<'a, REG, const WI: u8, const OF: u8, N, FI> FieldWriterSafe<'a, REG, WI, OF, N, FI> +impl<'a, REG, const WI: u8, const OF: u8, FI> FieldWriterSafe<'a, REG, WI, OF, FI> where REG: Writable + RegisterSpec, - N: From, + FI: FieldSpec, { /// Field width pub const WIDTH: u8 = WI; @@ -531,11 +536,11 @@ bit_proxy!(BitWriter0S, Bit0S); bit_proxy!(BitWriter1T, Bit1T); bit_proxy!(BitWriter0T, Bit0T); -impl<'a, REG, const WI: u8, const OF: u8, N, FI> FieldWriter<'a, REG, WI, OF, N, FI> +impl<'a, REG, const WI: u8, const OF: u8, FI> FieldWriter<'a, REG, WI, OF, FI> where REG: Writable + RegisterSpec, - REG::Ux: From, - N: From, + FI: FieldSpec, + REG::Ux: From, { /// Writes raw bits to the field /// @@ -543,7 +548,7 @@ where /// /// Passing incorrect value can cause undefined behaviour. See reference manual #[inline(always)] - pub unsafe fn bits(self, value: N) -> &'a mut REG::Writer { + pub unsafe fn bits(self, value: FI::Ux) -> &'a mut REG::Writer { self.w.bits &= !(REG::Ux::mask::() << OF); self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << OF; self.w @@ -551,18 +556,18 @@ where /// Writes `variant` to the field #[inline(always)] pub fn variant(self, variant: FI) -> &'a mut REG::Writer { - unsafe { self.bits(N::from(variant)) } + unsafe { self.bits(FI::Ux::from(variant)) } } } -impl<'a, REG, const WI: u8, const OF: u8, N, FI> FieldWriterSafe<'a, REG, WI, OF, N, FI> +impl<'a, REG, const WI: u8, const OF: u8, FI> FieldWriterSafe<'a, REG, WI, OF, FI> where REG: Writable + RegisterSpec, - REG::Ux: From, - N: From, + FI: FieldSpec, + REG::Ux: From, { /// Writes raw bits to the field #[inline(always)] - pub fn bits(self, value: N) -> &'a mut REG::Writer { + pub fn bits(self, value: FI::Ux) -> &'a mut REG::Writer { self.w.bits &= !(REG::Ux::mask::() << OF); self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << OF; self.w @@ -570,7 +575,7 @@ where /// Writes `variant` to the field #[inline(always)] pub fn variant(self, variant: FI) -> &'a mut REG::Writer { - self.bits(N::from(variant)) + self.bits(FI::Ux::from(variant)) } } diff --git a/src/generate/register.rs b/src/generate/register.rs index 27ba2b9c..f552b469 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -691,12 +691,10 @@ pub fn fields( } else { quote! { crate::BitReader<#value_read_ty> } } - } else if fty == "u8" && value_read_ty == "u8" { - quote! { crate::FieldReader } } else if value_read_ty == "u8" { - quote! { crate::FieldReader<#fty> } + quote! { crate::FieldReader } } else { - quote! { crate::FieldReader<#fty, #value_read_ty> } + quote! { crate::FieldReader<#value_read_ty> } }; let mut readerdoc = field_reader_brief.clone(); if let Some(action) = f.read_action { @@ -1032,12 +1030,10 @@ pub fn fields( span, ); let width = &util::unsuffixed(width as _); - if fty == "u8" && value_write_ty == "u8" { + if value_write_ty == "u8" { quote! { crate::#wproxy<'a, #regspec_ident, #width, O> } - } else if value_write_ty == "u8" { - quote! { crate::#wproxy<'a, #regspec_ident, #width, O, #fty> } } else { - quote! { crate::#wproxy<'a, #regspec_ident, #width, O, #fty, #value_write_ty> } + quote! { crate::#wproxy<'a, #regspec_ident, #width, O, #value_write_ty> } } }; mod_items.extend(quote! { @@ -1246,6 +1242,13 @@ fn add_with_no_variants( } } }); + if fty != "bool" { + mod_items.extend(quote! { + impl crate::FieldSpec for #pc { + type Ux = #fty; + } + }); + } } fn add_from_variants( @@ -1295,6 +1298,13 @@ fn add_from_variants( } } }); + if fty != "bool" { + mod_items.extend(quote! { + impl crate::FieldSpec for #pc { + type Ux = #fty; + } + }); + } } fn calculate_offset( From a1c72a8a6b4dd13f66a16a3c56a271a0df301a8e Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 4 Jun 2023 23:44:20 +0300 Subject: [PATCH 089/319] atomics features in generated code --- CHANGELOG.md | 1 + src/generate/device.rs | 6 ++++++ src/lib.rs | 5 ++++- src/main.rs | 7 +++++++ src/util.rs | 3 +++ 5 files changed, 21 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index e600f0cd..2cff6792 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -17,6 +17,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Fix escaping <> and & characters in doc attributes - Add `interrupt_link_section` config parameter for controlling the `#[link_section = "..."]` attribute of `__INTERRUPTS` - Add option to implement Debug for readable registers (#716) +- Add `atomics-feature` ## [v0.28.0] - 2022-12-25 diff --git a/src/generate/device.rs b/src/generate/device.rs index a7738af0..804fe676 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -153,6 +153,9 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Result Result<()> { .action(ArgAction::SetTrue) .help("Generate atomic register modification API"), ) + .arg( + Arg::new("atomics_feature") + .long("atomics_feature") + .help("add feature gating for atomic register modification API") + .action(ArgAction::Set) + .value_name("FEATURE"), + ) .arg( Arg::new("const_generic") .long("const_generic") diff --git a/src/util.rs b/src/util.rs index aba3cab5..513a6951 100644 --- a/src/util.rs +++ b/src/util.rs @@ -30,6 +30,8 @@ pub struct Config { #[cfg_attr(feature = "serde", serde(default))] pub atomics: bool, #[cfg_attr(feature = "serde", serde(default))] + pub atomics_feature: Option, + #[cfg_attr(feature = "serde", serde(default))] pub generic_mod: bool, #[cfg_attr(feature = "serde", serde(default))] pub make_mod: bool, @@ -111,6 +113,7 @@ impl Default for Config { Self { target: Target::default(), atomics: false, + atomics_feature: None, generic_mod: false, make_mod: false, const_generic: false, From 3cafe19c06d83fe630432ed8d82a502fe42aacd3 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 5 Jun 2023 07:47:21 +0300 Subject: [PATCH 090/319] release 0.29 --- CHANGELOG.md | 25 ++++++++++++++----------- Cargo.toml | 2 +- 2 files changed, 15 insertions(+), 12 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 2cff6792..5326d5de 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,17 +7,19 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] -- `FieldFpec` instead or `fty` generic -- print error on ci `curl` request fail -- removed `rty` generic in `FieldWriter` -- `bool` and `u8` as default generics for `BitReader/Writer` and `FieldReader/Writer` -- Bump MSRV to 1.65 -- Optimize case change/sanitize -- Fix dangling implicit derives -- Fix escaping <> and & characters in doc attributes -- Add `interrupt_link_section` config parameter for controlling the `#[link_section = "..."]` attribute of `__INTERRUPTS` +## [v0.29.0] - 2023-06-05 + +- `FieldFpec` instead or `fty` generic (#722) +- print error on ci `curl` request fail (#725) +- removed `rty` generic in `FieldWriter` (#721) +- `bool` and `u8` as default generics for `BitReader/Writer` and `FieldReader/Writer` (#720) +- Bump MSRV to 1.65 (#711) +- Optimize case change/sanitize (#715) +- Fix dangling implicit derives (#703) +- Fix escaping <> and & characters in doc attributes (#711) +- Add `interrupt_link_section` config parameter for controlling the `#[link_section = "..."]` attribute of `__INTERRUPTS` (#718) - Add option to implement Debug for readable registers (#716) -- Add `atomics-feature` +- Add `atomics-feature` (#729) ## [v0.28.0] - 2022-12-25 @@ -792,7 +794,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.28.0...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.29.0...HEAD +[v0.29.0]: https://github.com/rust-embedded/svd2rust/compare/v0.28.0...v0.29.0 [v0.28.0]: https://github.com/rust-embedded/svd2rust/compare/v0.27.2...v0.28.0 [v0.27.2]: https://github.com/rust-embedded/svd2rust/compare/v0.27.1...v0.27.2 [v0.27.1]: https://github.com/rust-embedded/svd2rust/compare/v0.27.0...v0.27.1 diff --git a/Cargo.toml b/Cargo.toml index c8755bfd..97136fa9 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.28.0" +version = "0.29.0" readme = "README.md" rust-version = "1.60" From 4557f4c741720ba4d049ce70b1f7a3db6fef05e0 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 5 Jun 2023 09:26:38 +0300 Subject: [PATCH 091/319] fix rust version --- Cargo.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Cargo.toml b/Cargo.toml index 97136fa9..4f0487dc 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -25,7 +25,7 @@ name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" version = "0.29.0" readme = "README.md" -rust-version = "1.60" +rust-version = "1.65" [package.metadata.deb] section = "rust" From 4da18375eae77b860cf439fdfa6eb3c56a871ee4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Tue, 6 Jun 2023 09:24:59 +0200 Subject: [PATCH 092/319] update to syn2 Co-authored-by: Zgarbul Andrey --- CHANGELOG.md | 4 +++- Cargo.toml | 2 +- src/generate/peripheral.rs | 17 ++++++----------- src/util.rs | 4 ++-- 4 files changed, 12 insertions(+), 15 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 5326d5de..4f837518 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,12 +7,14 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Updated syn to version 2 (#732) + ## [v0.29.0] - 2023-06-05 - `FieldFpec` instead or `fty` generic (#722) - print error on ci `curl` request fail (#725) - removed `rty` generic in `FieldWriter` (#721) -- `bool` and `u8` as default generics for `BitReader/Writer` and `FieldReader/Writer` (#720) +- `bool` and `u8` as default generics for `BitReader/Writer` and `FieldReader/Writer` (#720) - Bump MSRV to 1.65 (#711) - Optimize case change/sanitize (#715) - Fix dangling implicit derives (#703) diff --git a/Cargo.toml b/Cargo.toml index 4f0487dc..baef3651 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -67,5 +67,5 @@ features = ["serde"] version = "0.14.1" [dependencies.syn] -version = "1.0" +version = "2.0" features = ["full","extra-traits"] diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 5c638b59..b9ba1aca 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -16,8 +16,8 @@ use quote::{quote, ToTokens}; use syn::{punctuated::Punctuated, Token}; use crate::util::{ - self, array_proxy_type, name_to_ty, new_syn_u32, path_segment, type_path, unsuffixed, Config, - FullName, ToSanitizedCase, BITS_PER_BYTE, + self, array_proxy_type, name_to_ty, path_segment, type_path, unsuffixed, Config, FullName, + ToSanitizedCase, BITS_PER_BYTE, }; use anyhow::{anyhow, bail, Context, Result}; @@ -1393,21 +1393,16 @@ fn new_syn_field(ident: Ident, ty: syn::Type) -> syn::Field { let span = Span::call_site(); syn::Field { ident: Some(ident), - vis: syn::Visibility::Public(syn::VisPublic { - pub_token: Token![pub](span), - }), + vis: syn::Visibility::Public(Token![pub](span)), attrs: vec![], colon_token: Some(Token![:](span)), ty, + mutability: syn::FieldMutability::None, } } fn new_syn_array(ty: syn::Type, len: u32) -> syn::Type { let span = Span::call_site(); - syn::Type::Array(syn::TypeArray { - bracket_token: syn::token::Bracket { span }, - elem: ty.into(), - semi_token: Token![;](span), - len: new_syn_u32(len, span), - }) + let len = unsuffixed(len as _); + syn::parse_quote_spanned!( span => [#ty; #len] ) } diff --git a/src/util.rs b/src/util.rs index 513a6951..92333916 100644 --- a/src/util.rs +++ b/src/util.rs @@ -10,7 +10,7 @@ use std::path::{Path, PathBuf}; use svd_rs::{MaybeArray, Peripheral, PeripheralInfo}; use syn::{ - punctuated::Punctuated, token::Colon2, AngleBracketedGenericArguments, GenericArgument, Lit, + punctuated::Punctuated, token::PathSep, AngleBracketedGenericArguments, GenericArgument, Lit, LitInt, PathArguments, PathSegment, Token, Type, TypePath, }; @@ -473,7 +473,7 @@ pub fn ident_to_path(ident: Ident) -> TypePath { type_path(segments) } -pub fn type_path(segments: Punctuated) -> TypePath { +pub fn type_path(segments: Punctuated) -> TypePath { TypePath { qself: None, path: syn::Path { From b3e19c15a10964cca199f19794960f515bd0f403 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 5 Jun 2023 17:14:04 +0300 Subject: [PATCH 093/319] revert #465 --- .github/workflows/ci.yml | 2 +- ci/script.sh | 5 +-- src/generate/generic.rs | 72 ++++++++++++++++------------------ src/generate/generic_atomic.rs | 18 ++++----- src/generate/register.rs | 71 +++------------------------------ src/main.rs | 6 --- src/util.rs | 3 -- 7 files changed, 49 insertions(+), 128 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index d47815bc..9d46001d 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -75,7 +75,7 @@ jobs: - { rust: stable, vendor: Spansion, options: "--atomics" } - { rust: stable, vendor: STMicro, options: "" } - { rust: stable, vendor: STMicro, options: "--atomics" } - - { rust: stable, vendor: STM32-patched, options: "--strict --const_generic --derive_more --pascal_enum_values --max_cluster_size --atomics" } + - { rust: stable, vendor: STM32-patched, options: "--strict --const_generic --pascal_enum_values --max_cluster_size --atomics" } - { rust: stable, vendor: Toshiba, options: all } - { rust: stable, vendor: Toshiba, options: "" } # Test MSRV diff --git a/ci/script.sh b/ci/script.sh index b5e446f2..b09e9fa1 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -31,7 +31,7 @@ main() { case $OPTIONS in all) - options="--const_generic --strict --derive_more --atomics" + options="--const_generic --strict --atomics" ;; *) options=$OPTIONS @@ -43,9 +43,6 @@ main() { echo 'cortex-m = "0.7.4"' >> $td/Cargo.toml echo 'cortex-m-rt = "0.7.1"' >> $td/Cargo.toml echo 'vcell = "0.1.3"' >> $td/Cargo.toml - if [[ "$options" == *"--derive_more"* ]]; then - echo 'derive_more = "0.99"' >> $td/Cargo.toml - fi if [[ "$options" == *"--atomics"* ]]; then echo 'portable-atomic = { version = "0.3.16", default-features = false }' >> $td/Cargo.toml fi diff --git a/src/generate/generic.rs b/src/generate/generic.rs index fd99d5c9..c329da09 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -59,10 +59,7 @@ pub trait FieldSpec: Sized { /// Trait implemented by readable registers to enable the `read` method. /// /// Registers marked with `Writable` can be also be `modify`'ed. -pub trait Readable: RegisterSpec { - /// Result from a call to `read` and argument to `modify`. - type Reader: From> + core::ops::Deref>; -} +pub trait Readable: RegisterSpec {} /// Trait implemented by writeable registers. /// @@ -70,9 +67,6 @@ pub trait Readable: RegisterSpec { /// /// Registers marked with `Readable` can be also be `modify`'ed. pub trait Writable: RegisterSpec { - /// Writer type argument to `write`, et al. - type Writer: From> + core::ops::DerefMut>; - /// Specifies the register bits that are not changed if you pass `1` and are changed if you pass `0` const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux; @@ -130,11 +124,11 @@ impl Reg { /// let flag = reader.field2().bit_is_set(); /// ``` #[inline(always)] - pub fn read(&self) -> REG::Reader { - REG::Reader::from(R { + pub fn read(&self) -> R { + R { bits: self.register.get(), _reg: marker::PhantomData, - }) + } } } @@ -173,14 +167,14 @@ impl Reg { #[inline(always)] pub fn write(&self, f: F) where - F: FnOnce(&mut REG::Writer) -> &mut W, + F: FnOnce(&mut W) -> &mut W, { self.register.set( - f(&mut REG::Writer::from(W { + f(&mut W { bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData, - })) + }) .bits, ); } @@ -197,13 +191,13 @@ impl Reg { #[inline(always)] pub unsafe fn write_with_zero(&self, f: F) where - F: FnOnce(&mut REG::Writer) -> &mut W, + F: FnOnce(&mut W) -> &mut W, { self.register.set( - f(&mut REG::Writer::from(W { + f(&mut W { bits: REG::Ux::default(), _reg: marker::PhantomData, - })) + }) .bits, ); } @@ -238,20 +232,20 @@ impl Reg { #[inline(always)] pub fn modify(&self, f: F) where - for<'w> F: FnOnce(®::Reader, &'w mut REG::Writer) -> &'w mut W, + for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, { let bits = self.register.get(); self.register.set( f( - ®::Reader::from(R { + &R { bits, _reg: marker::PhantomData, - }), - &mut REG::Writer::from(W { + }, + &mut W { bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, _reg: marker::PhantomData, - }), + }, ) .bits, ); @@ -414,7 +408,7 @@ where REG: Writable + RegisterSpec, FI: FieldSpec, { - pub(crate) w: &'a mut REG::Writer, + pub(crate) w: &'a mut W, _field: marker::PhantomData<(FI, Safety)>, } @@ -427,7 +421,7 @@ where /// Creates a new instance of the writer #[allow(unused)] #[inline(always)] - pub(crate) fn new(w: &'a mut REG::Writer) -> Self { + pub(crate) fn new(w: &'a mut W) -> Self { Self { w, _field: marker::PhantomData, @@ -441,7 +435,7 @@ where REG: Writable + RegisterSpec, bool: From, { - pub(crate) w: &'a mut REG::Writer, + pub(crate) w: &'a mut W, _field: marker::PhantomData<(FI, M)>, } @@ -453,7 +447,7 @@ where /// Creates a new instance of the writer #[allow(unused)] #[inline(always)] - pub(crate) fn new(w: &'a mut REG::Writer) -> Self { + pub(crate) fn new(w: &'a mut W) -> Self { Self { w, _field: marker::PhantomData, @@ -514,14 +508,14 @@ macro_rules! impl_bit_proxy { { /// Writes bit to the field #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut REG::Writer { + pub fn bit(self, value: bool) -> &'a mut W { self.w.bits &= !(REG::Ux::one() << OF); self.w.bits |= (REG::Ux::from(value) & REG::Ux::one()) << OF; self.w } /// Writes `variant` to the field #[inline(always)] - pub fn variant(self, variant: FI) -> &'a mut REG::Writer { + pub fn variant(self, variant: FI) -> &'a mut W { self.bit(bool::from(variant)) } } @@ -548,14 +542,14 @@ where /// /// Passing incorrect value can cause undefined behaviour. See reference manual #[inline(always)] - pub unsafe fn bits(self, value: FI::Ux) -> &'a mut REG::Writer { + pub unsafe fn bits(self, value: FI::Ux) -> &'a mut W { self.w.bits &= !(REG::Ux::mask::() << OF); self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << OF; self.w } /// Writes `variant` to the field #[inline(always)] - pub fn variant(self, variant: FI) -> &'a mut REG::Writer { + pub fn variant(self, variant: FI) -> &'a mut W { unsafe { self.bits(FI::Ux::from(variant)) } } } @@ -567,14 +561,14 @@ where { /// Writes raw bits to the field #[inline(always)] - pub fn bits(self, value: FI::Ux) -> &'a mut REG::Writer { + pub fn bits(self, value: FI::Ux) -> &'a mut W { self.w.bits &= !(REG::Ux::mask::() << OF); self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << OF; self.w } /// Writes `variant` to the field #[inline(always)] - pub fn variant(self, variant: FI) -> &'a mut REG::Writer { + pub fn variant(self, variant: FI) -> &'a mut W { self.bits(FI::Ux::from(variant)) } } @@ -594,13 +588,13 @@ where { /// Sets the field bit #[inline(always)] - pub fn set_bit(self) -> &'a mut REG::Writer { + pub fn set_bit(self) -> &'a mut W { self.w.bits |= REG::Ux::one() << OF; self.w } /// Clears the field bit #[inline(always)] - pub fn clear_bit(self) -> &'a mut REG::Writer { + pub fn clear_bit(self) -> &'a mut W { self.w.bits &= !(REG::Ux::one() << OF); self.w } @@ -613,7 +607,7 @@ where { /// Sets the field bit #[inline(always)] - pub fn set_bit(self) -> &'a mut REG::Writer { + pub fn set_bit(self) -> &'a mut W { self.w.bits |= REG::Ux::one() << OF; self.w } @@ -626,7 +620,7 @@ where { /// Clears the field bit #[inline(always)] - pub fn clear_bit(self) -> &'a mut REG::Writer { + pub fn clear_bit(self) -> &'a mut W { self.w.bits &= !(REG::Ux::one() << OF); self.w } @@ -639,7 +633,7 @@ where { ///Clears the field bit by passing one #[inline(always)] - pub fn clear_bit_by_one(self) -> &'a mut REG::Writer { + pub fn clear_bit_by_one(self) -> &'a mut W { self.w.bits |= REG::Ux::one() << OF; self.w } @@ -652,7 +646,7 @@ where { ///Sets the field bit by passing zero #[inline(always)] - pub fn set_bit_by_zero(self) -> &'a mut REG::Writer { + pub fn set_bit_by_zero(self) -> &'a mut W { self.w.bits &= !(REG::Ux::one() << OF); self.w } @@ -665,7 +659,7 @@ where { ///Toggle the field bit by passing one #[inline(always)] - pub fn toggle_bit(self) -> &'a mut REG::Writer { + pub fn toggle_bit(self) -> &'a mut W { self.w.bits |= REG::Ux::one() << OF; self.w } @@ -678,7 +672,7 @@ where { ///Toggle the field bit by passing zero #[inline(always)] - pub fn toggle_bit(self) -> &'a mut REG::Writer { + pub fn toggle_bit(self) -> &'a mut W { self.w.bits &= !(REG::Ux::one() << OF); self.w } diff --git a/src/generate/generic_atomic.rs b/src/generate/generic_atomic.rs index c9f5380a..9df5cfd1 100644 --- a/src/generate/generic_atomic.rs +++ b/src/generate/generic_atomic.rs @@ -51,12 +51,12 @@ where #[inline(always)] pub unsafe fn set_bits(&self, f: F) where - F: FnOnce(&mut REG::Writer) -> &mut W, + F: FnOnce(&mut W) -> &mut W, { - let bits = f(&mut REG::Writer::from(W { + let bits = f(&mut W { bits: Default::default(), _reg: marker::PhantomData, - })) + }) .bits; REG::Ux::atomic_or(self.register.as_ptr(), bits); } @@ -70,12 +70,12 @@ where #[inline(always)] pub unsafe fn clear_bits(&self, f: F) where - F: FnOnce(&mut REG::Writer) -> &mut W, + F: FnOnce(&mut W) -> &mut W, { - let bits = f(&mut REG::Writer::from(W { + let bits = f(&mut W { bits: !REG::Ux::default(), _reg: marker::PhantomData, - })) + }) .bits; REG::Ux::atomic_and(self.register.as_ptr(), bits); } @@ -89,12 +89,12 @@ where #[inline(always)] pub unsafe fn toggle_bits(&self, f: F) where - F: FnOnce(&mut REG::Writer) -> &mut W, + F: FnOnce(&mut W) -> &mut W, { - let bits = f(&mut REG::Writer::from(W { + let bits = f(&mut W { bits: Default::default(), _reg: marker::PhantomData, - })) + }) .bits; REG::Ux::atomic_xor(self.register.as_ptr(), bits); } diff --git a/src/generate/register.rs b/src/generate/register.rs index f552b469..bc718e32 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -146,78 +146,19 @@ pub fn render_register_mod( if can_read { let desc = format!("Register `{}` reader", register.name); - let derive = if config.derive_more { - Some(quote! { #[derive(derive_more::Deref, derive_more::From)] }) - } else { - None - }; mod_items.extend(quote! { #[doc = #desc] - #derive - pub struct R(crate::R<#regspec_ident>); + pub type R = crate::R<#regspec_ident>; }); - - if !config.derive_more { - mod_items.extend(quote! { - impl core::ops::Deref for R { - type Target = crate::R<#regspec_ident>; - - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } - } - - impl From> for R { - #[inline(always)] - fn from(reader: crate::R<#regspec_ident>) -> Self { - R(reader) - } - } - }); - } methods.push("read"); } if can_write { let desc = format!("Register `{}` writer", register.name); - let derive = if config.derive_more { - Some(quote! { #[derive(derive_more::Deref, derive_more::DerefMut, derive_more::From)] }) - } else { - None - }; mod_items.extend(quote! { #[doc = #desc] - #derive - pub struct W(crate::W<#regspec_ident>); + pub type W = crate::W<#regspec_ident>; }); - - if !config.derive_more { - mod_items.extend(quote! { - impl core::ops::Deref for W { - type Target = crate::W<#regspec_ident>; - - #[inline(always)] - fn deref(&self) -> &Self::Target { - &self.0 - } - } - - impl core::ops::DerefMut for W { - #[inline(always)] - fn deref_mut(&mut self) -> &mut Self::Target { - &mut self.0 - } - } - - impl From> for W { - #[inline(always)] - fn from(writer: crate::W<#regspec_ident>) -> Self { - W(writer) - } - } - }); - } methods.push("write_with_zero"); if can_reset { methods.push("reset"); @@ -332,6 +273,7 @@ pub fn render_register_mod( mod_items.extend(w_impl_items); +/* // the writer can be safe if: // * there is a single field that covers the entire register // * that field can represent all values @@ -364,7 +306,7 @@ pub fn render_register_mod( self } }); - } + }*/ close.to_tokens(&mut mod_items); } @@ -406,9 +348,7 @@ pub fn render_register_mod( let doc = format!("`read()` method returns [{name_snake_case}::R](R) reader structure",); mod_items.extend(quote! { #[doc = #doc] - impl crate::Readable for #regspec_ident { - type Reader = R; - } + impl crate::Readable for #regspec_ident {} }); } if can_write { @@ -421,7 +361,6 @@ pub fn render_register_mod( mod_items.extend(quote! { #[doc = #doc] impl crate::Writable for #regspec_ident { - type Writer = W; const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = #zero_to_modify_fields_bitmap; const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = #one_to_modify_fields_bitmap; } diff --git a/src/main.rs b/src/main.rs index d9dc7d5b..c01ea1b6 100755 --- a/src/main.rs +++ b/src/main.rs @@ -158,12 +158,6 @@ fn run() -> Result<()> { .action(ArgAction::SetTrue) .help("Use PascalCase in stead of UPPER_CASE for enumerated values"), ) - .arg( - Arg::new("derive_more") - .long("derive_more") - .action(ArgAction::SetTrue) - .help("Use derive_more procedural macros to implement Deref and From"), - ) .arg( Arg::new("source_type") .long("source_type") diff --git a/src/util.rs b/src/util.rs index 92333916..4bf6ed07 100644 --- a/src/util.rs +++ b/src/util.rs @@ -46,8 +46,6 @@ pub struct Config { #[cfg_attr(feature = "serde", serde(default))] pub pascal_enum_values: bool, #[cfg_attr(feature = "serde", serde(default))] - pub derive_more: bool, - #[cfg_attr(feature = "serde", serde(default))] pub feature_group: bool, #[cfg_attr(feature = "serde", serde(default))] pub feature_peripheral: bool, @@ -121,7 +119,6 @@ impl Default for Config { keep_list: false, strict: false, pascal_enum_values: false, - derive_more: false, feature_group: false, feature_peripheral: false, max_cluster_size: false, From cfb4dcf4955445efe37669cb1ed1bbf097b7a295 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 5 Jun 2023 18:32:20 +0300 Subject: [PATCH 094/319] generic REG --- src/generate/register.rs | 41 +++++++++++++++++++++++++++------------- 1 file changed, 28 insertions(+), 13 deletions(-) diff --git a/src/generate/register.rs b/src/generate/register.rs index bc718e32..3873cb26 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -273,7 +273,7 @@ pub fn render_register_mod( mod_items.extend(w_impl_items); -/* + /* // the writer can be safe if: // * there is a single field that covers the entire register // * that field can represent all values @@ -923,7 +923,7 @@ pub fn fields( proxy_items.extend(quote! { #[doc = #doc] #inline - pub fn #sc(self) -> &'a mut W { + pub fn #sc(self) -> &'a mut crate::W { self.variant(#value_write_ty::#pc) } }); @@ -955,9 +955,9 @@ pub fn fields( span, ); if value_write_ty == "bool" { - quote! { crate::#wproxy<'a, #regspec_ident, O> } + quote! { crate::#wproxy<'a, REG, O> } } else { - quote! { crate::#wproxy<'a, #regspec_ident, O, #value_write_ty> } + quote! { crate::#wproxy<'a, REG, O, #value_write_ty> } } } else { let wproxy = Ident::new( @@ -970,22 +970,37 @@ pub fn fields( ); let width = &util::unsuffixed(width as _); if value_write_ty == "u8" { - quote! { crate::#wproxy<'a, #regspec_ident, #width, O> } + quote! { crate::#wproxy<'a, REG, #width, O> } } else { - quote! { crate::#wproxy<'a, #regspec_ident, #width, O, #value_write_ty> } + quote! { crate::#wproxy<'a, REG, #width, O, #value_write_ty> } } }; mod_items.extend(quote! { #[doc = #field_writer_brief] - pub type #writer_ty<'a, const O: u8> = #proxy; + pub type #writer_ty<'a, REG, const O: u8> = #proxy; }); } // generate proxy items from collected information if !proxy_items.is_empty() { - mod_items.extend(quote! { - impl<'a, const O: u8> #writer_ty<'a, O> { - #proxy_items + mod_items.extend(if width == 1 { + quote! { + impl<'a, REG, const O: u8> #writer_ty<'a, REG, O> + where + REG: crate::Writable + crate::RegisterSpec, + { + #proxy_items + } + } + } else { + quote! { + impl<'a, REG, const O: u8> #writer_ty<'a, REG, O> + where + REG: crate::Writable + crate::RegisterSpec, + REG::Ux: From<#fty> + { + #proxy_items + } } }); } @@ -1032,7 +1047,7 @@ pub fn fields( #[doc = #doc] #inline #[must_use] - pub unsafe fn #name_snake_case(&mut self) -> #writer_ty { + pub unsafe fn #name_snake_case(&mut self) -> #writer_ty<#regspec_ident, O> { #writer_ty::new(self) } }); @@ -1051,7 +1066,7 @@ pub fn fields( #[doc = #doc] #inline #[must_use] - pub fn #name_snake_case_n(&mut self) -> #writer_ty<#sub_offset> { + pub fn #name_snake_case_n(&mut self) -> #writer_ty<#regspec_ident, #sub_offset> { #writer_ty::new(self) } }); @@ -1063,7 +1078,7 @@ pub fn fields( #[doc = #doc] #inline #[must_use] - pub fn #name_snake_case(&mut self) -> #writer_ty<#offset> { + pub fn #name_snake_case(&mut self) -> #writer_ty<#regspec_ident, #offset> { #writer_ty::new(self) } }); From 129a548a22c207e41869c9d87e6458ae85469c03 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 5 Jun 2023 19:33:37 +0300 Subject: [PATCH 095/319] use instead of type alias for writer --- src/generate/register.rs | 51 +++++++++++++++++++--------------------- 1 file changed, 24 insertions(+), 27 deletions(-) diff --git a/src/generate/register.rs b/src/generate/register.rs index 3873cb26..1e65886e 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -616,11 +616,10 @@ pub fn fields( // information in enumeratedValues; // if it's not enumeratedValues, always derive the read proxy as we do not need to re-export // it again from BitReader or FieldReader. - let should_derive_reader = match lookup_filter(&lookup_results, Usage::Read) { - Some((_evs, Some(_base))) => false, - Some((_evs, None)) => true, - None => true, - }; + let should_derive_reader = matches!( + lookup_filter(&lookup_results, Usage::Read), + Some((_, None)) | None + ); // derive the read proxy structure if necessary. if should_derive_reader { @@ -932,11 +931,10 @@ pub fn fields( // derive writer. We derive writer if the write proxy is in current register module, // or writer in different register have different _SPEC structures - let should_derive_writer = match lookup_filter(&lookup_results, Usage::Write) { - Some((_evs, Some(base))) => base.register() != fpath.register(), - Some((_evs, None)) => true, - None => true, - }; + let should_derive_writer = matches!( + lookup_filter(&lookup_results, Usage::Write), + Some((_, None)) | None + ); // derive writer structure by type alias to generic write proxy structure. if should_derive_writer { @@ -1006,6 +1004,22 @@ pub fn fields( } if let Some((evs, Some(base))) = lookup_filter(&lookup_results, Usage::Write) { + // if base.register == None, derive write from the same module. This is allowed because both + // the generated and source write proxy are in the same module. + // we never reuse writer for writer in different module does not have the same _SPEC strcuture, + // thus we cannot write to current register using re-exported write proxy. + + // generate pub use field_1 writer as field_2 writer + let base_field = util::replace_suffix(&base.field.name, ""); + let base_w = (base_field + "_W").to_constant_case_ident(span); + if !writer_derives.contains(&writer_ty) { + let base_path = base_syn_path(base, &fpath, &base_w)?; + mod_items.extend(quote! { + #[doc = #field_writer_brief] + pub use #base_path as #writer_ty; + }); + writer_derives.insert(writer_ty.clone()); + } // if base.register == None, it emits pub use structure from same module. if base.register() != fpath.register() { let writer_reader_different_enum = evs_r != Some(evs); @@ -1020,23 +1034,6 @@ pub fn fields( writer_enum_derives.insert(value_write_ty.clone()); } } - } else { - // if base.register == None, derive write from the same module. This is allowed because both - // the generated and source write proxy are in the same module. - // we never reuse writer for writer in different module does not have the same _SPEC strcuture, - // thus we cannot write to current register using re-exported write proxy. - - // generate pub use field_1 writer as field_2 writer - let base_field = util::replace_suffix(&base.field.name, ""); - let base_w = (base_field + "_W").to_constant_case_ident(span); - if !writer_derives.contains(&writer_ty) { - let base_path = base_syn_path(base, &fpath, &base_w)?; - mod_items.extend(quote! { - #[doc = #field_writer_brief] - pub use #base_path as #writer_ty; - }); - writer_derives.insert(writer_ty.clone()); - } } } From d77344aca8d2fc70771a65cff1aad5533d949bc8 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 5 Jun 2023 20:08:26 +0300 Subject: [PATCH 096/319] hidden WRaw & RRaw for better docs --- CHANGELOG.md | 1 + src/generate/generic.rs | 23 ++++++++--------------- src/generate/register.rs | 7 +++---- 3 files changed, 12 insertions(+), 19 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 4f837518..b386f07f 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- removed register writer & reader wrappers, generic `REG` in field writers (#731) - Updated syn to version 2 (#732) ## [v0.29.0] - 2023-06-05 diff --git a/src/generate/generic.rs b/src/generate/generic.rs index c329da09..c589b149 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -256,7 +256,10 @@ impl Reg { /// /// Result of the `read` methods of registers. Also used as a closure argument in the `modify` /// method. -pub struct R { +pub type R = RRaw; + +#[doc(hidden)] +pub struct RRaw { pub(crate) bits: REG::Ux, _reg: marker::PhantomData, } @@ -284,25 +287,15 @@ where /// Register writer. /// /// Used as an argument to the closures in the `write` and `modify` methods of the register. -pub struct W { +pub type W = WRaw; + +#[doc(hidden)] +pub struct WRaw { ///Writable bits pub(crate) bits: REG::Ux, _reg: marker::PhantomData, } -impl W { - /// Writes raw bits to the register. - /// - /// # Safety - /// - /// Read datasheet or reference manual to find what values are allowed to pass. - #[inline(always)] - pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self { - self.bits = bits; - self - } -} - #[doc(hidden)] pub struct FieldReaderRaw where diff --git a/src/generate/register.rs b/src/generate/register.rs index 1e65886e..663b61c7 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -273,7 +273,6 @@ pub fn render_register_mod( mod_items.extend(w_impl_items); - /* // the writer can be safe if: // * there is a single field that covers the entire register // * that field can represent all values @@ -293,7 +292,7 @@ pub fn render_register_mod( #[doc = "Writes raw bits to the register."] #[inline(always)] pub fn bits(&mut self, bits: #rty) -> &mut Self { - unsafe { self.0.bits(bits) }; + self.bits = bits; self } }); @@ -302,11 +301,11 @@ pub fn render_register_mod( #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: #rty) -> &mut Self { - self.0.bits(bits); + self.bits = bits; self } }); - }*/ + } close.to_tokens(&mut mod_items); } From b6139c36a8e2e7f115da938c02e5902740d6a281 Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Fri, 9 Jun 2023 21:29:41 +0800 Subject: [PATCH 097/319] let readable field fetch doc from svd description --- src/generate/register.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/generate/register.rs b/src/generate/register.rs index f552b469..3b790e25 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -805,7 +805,7 @@ pub fn fields( span, ); - let doc = format!("Checks if the value of the field is `{pc}`"); + let doc = util::escape_special_chars(&util::respace(&v.doc)); enum_items.extend(quote! { #[doc = #doc] #inline From 3d5099bd3bf170f43abfcc9b4c40029166f32247 Mon Sep 17 00:00:00 2001 From: eZio Pan Date: Fri, 9 Jun 2023 22:05:30 +0800 Subject: [PATCH 098/319] Update CHANGELOG.md for readable field doc change --- CHANGELOG.md | 1 + 1 file changed, 1 insertion(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 4f837518..65dc7bbf 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -8,6 +8,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] - Updated syn to version 2 (#732) +- Let readable field fetch doc from svd description (#734) ## [v0.29.0] - 2023-06-05 From 64b10ed26962d979163604b5bbd2477655cbd397 Mon Sep 17 00:00:00 2001 From: Jalon Wong Date: Thu, 18 May 2023 16:46:25 +0800 Subject: [PATCH 099/319] Add `steal()` for each peripheral --- CHANGELOG.md | 1 + src/generate/peripheral.rs | 8 ++++++++ 2 files changed, 9 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 30b43980..e6d1c4ce 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -10,6 +10,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - removed register writer & reader wrappers, generic `REG` in field writers (#731) - Updated syn to version 2 (#732) - Let readable field fetch doc from svd description (#734) +- Add `steal()` for each peripheral ## [v0.29.0] - 2023-06-05 diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index b9ba1aca..816c721e 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -91,6 +91,10 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result pub const fn ptr() -> *const #base::RegisterBlock { Self::PTR } + + pub unsafe fn steal(&self) -> Self { + Self { _marker: PhantomData } + } } #feature_attribute_n @@ -150,6 +154,10 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result pub const fn ptr() -> *const #base::RegisterBlock { Self::PTR } + + pub unsafe fn steal(&self) -> Self { + Self { _marker: PhantomData } + } } #feature_attribute From ccff6eb08d4ebdc2e64a0fe150bbaf2efdcace6b Mon Sep 17 00:00:00 2001 From: Jalon Wong Date: Thu, 1 Jun 2023 15:23:24 +0800 Subject: [PATCH 100/319] Add documentation to the function --- src/generate/peripheral.rs | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 816c721e..a708cba1 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -92,6 +92,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result Self::PTR } + ///Steal an instance of this peripheral pub unsafe fn steal(&self) -> Self { Self { _marker: PhantomData } } @@ -155,6 +156,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result Self::PTR } + ///Steal an instance of this peripheral pub unsafe fn steal(&self) -> Self { Self { _marker: PhantomData } } From a45ffcc5a89fcbe1ce9ae904241f96891e4cb566 Mon Sep 17 00:00:00 2001 From: Jalon Wong Date: Thu, 15 Jun 2023 10:19:26 +0800 Subject: [PATCH 101/319] Change `steal()` to a associated function --- src/generate/peripheral.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index a708cba1..cc16207d 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -93,7 +93,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result } ///Steal an instance of this peripheral - pub unsafe fn steal(&self) -> Self { + pub unsafe fn steal() -> Self { Self { _marker: PhantomData } } } @@ -157,7 +157,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result } ///Steal an instance of this peripheral - pub unsafe fn steal(&self) -> Self { + pub unsafe fn steal() -> Self { Self { _marker: PhantomData } } } From 27c7ec86e51b881beec5d9f5cbdfb2a2a2bff9f5 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 2 Aug 2023 08:44:26 +0300 Subject: [PATCH 102/319] fix atomics feature --- CHANGELOG.md | 1 + src/generate/generic_atomic.rs | 114 ++++++++++++++++----------------- 2 files changed, 58 insertions(+), 57 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 30b43980..bbfd8456 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Fix when `atomics` features is generated but not enabled - removed register writer & reader wrappers, generic `REG` in field writers (#731) - Updated syn to version 2 (#732) - Let readable field fetch doc from svd description (#734) diff --git a/src/generate/generic_atomic.rs b/src/generate/generic_atomic.rs index 9df5cfd1..f0c436f6 100644 --- a/src/generate/generic_atomic.rs +++ b/src/generate/generic_atomic.rs @@ -1,4 +1,5 @@ mod atomic { + use super::*; use portable_atomic::Ordering; pub trait AtomicOperations { @@ -35,67 +36,66 @@ mod atomic { // Enable 64-bit atomics for 64-bit RISCV #[cfg(any(target_pointer_width = "64", target_has_atomic = "64"))] impl_atomics!(u64, portable_atomic::AtomicU64); -} -use atomic::AtomicOperations; -impl Reg -where - REG::Ux: AtomicOperations + Default + core::ops::Not, -{ - /// Set high every bit in the register that was set in the write proxy. Leave other bits - /// untouched. The write is done in a single atomic instruction. - /// - /// # Safety - /// - /// The resultant bit pattern may not be valid for the register. - #[inline(always)] - pub unsafe fn set_bits(&self, f: F) + impl Reg where - F: FnOnce(&mut W) -> &mut W, + REG::Ux: AtomicOperations + Default + core::ops::Not, { - let bits = f(&mut W { - bits: Default::default(), - _reg: marker::PhantomData, - }) - .bits; - REG::Ux::atomic_or(self.register.as_ptr(), bits); - } + /// Set high every bit in the register that was set in the write proxy. Leave other bits + /// untouched. The write is done in a single atomic instruction. + /// + /// # Safety + /// + /// The resultant bit pattern may not be valid for the register. + #[inline(always)] + pub unsafe fn set_bits(&self, f: F) + where + F: FnOnce(&mut W) -> &mut W, + { + let bits = f(&mut W { + bits: Default::default(), + _reg: marker::PhantomData, + }) + .bits; + REG::Ux::atomic_or(self.register.as_ptr(), bits); + } - /// Clear every bit in the register that was cleared in the write proxy. Leave other bits - /// untouched. The write is done in a single atomic instruction. - /// - /// # Safety - /// - /// The resultant bit pattern may not be valid for the register. - #[inline(always)] - pub unsafe fn clear_bits(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let bits = f(&mut W { - bits: !REG::Ux::default(), - _reg: marker::PhantomData, - }) - .bits; - REG::Ux::atomic_and(self.register.as_ptr(), bits); - } + /// Clear every bit in the register that was cleared in the write proxy. Leave other bits + /// untouched. The write is done in a single atomic instruction. + /// + /// # Safety + /// + /// The resultant bit pattern may not be valid for the register. + #[inline(always)] + pub unsafe fn clear_bits(&self, f: F) + where + F: FnOnce(&mut W) -> &mut W, + { + let bits = f(&mut W { + bits: !REG::Ux::default(), + _reg: marker::PhantomData, + }) + .bits; + REG::Ux::atomic_and(self.register.as_ptr(), bits); + } - /// Toggle every bit in the register that was set in the write proxy. Leave other bits - /// untouched. The write is done in a single atomic instruction. - /// - /// # Safety - /// - /// The resultant bit pattern may not be valid for the register. - #[inline(always)] - pub unsafe fn toggle_bits(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - let bits = f(&mut W { - bits: Default::default(), - _reg: marker::PhantomData, - }) - .bits; - REG::Ux::atomic_xor(self.register.as_ptr(), bits); + /// Toggle every bit in the register that was set in the write proxy. Leave other bits + /// untouched. The write is done in a single atomic instruction. + /// + /// # Safety + /// + /// The resultant bit pattern may not be valid for the register. + #[inline(always)] + pub unsafe fn toggle_bits(&self, f: F) + where + F: FnOnce(&mut W) -> &mut W, + { + let bits = f(&mut W { + bits: Default::default(), + _reg: marker::PhantomData, + }) + .bits; + REG::Ux::atomic_xor(self.register.as_ptr(), bits); + } } } From fab173087bc2bf90d978e4341d6bf2dd2e5c1731 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 2 Aug 2023 08:51:01 +0300 Subject: [PATCH 103/319] ci: add stm32c0 --- ci/script.sh | 1 + 1 file changed, 1 insertion(+) diff --git a/ci/script.sh b/ci/script.sh index b09e9fa1..6a945cf0 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -566,6 +566,7 @@ main() { test_patched_stm32 stm32mp157 test_patched_stm32 stm32wb55 test_patched_stm32 stm32wle5 + test_patched_stm32 stm32c011 ;; Toshiba) From 753a39356e591e83e87bea8eb16fdb6026737397 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 2 Aug 2023 09:11:36 +0300 Subject: [PATCH 104/319] ci: bump deps --- .github/workflows/ci.yml | 2 +- ci/script.sh | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 9d46001d..e806791f 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -75,7 +75,7 @@ jobs: - { rust: stable, vendor: Spansion, options: "--atomics" } - { rust: stable, vendor: STMicro, options: "" } - { rust: stable, vendor: STMicro, options: "--atomics" } - - { rust: stable, vendor: STM32-patched, options: "--strict --const_generic --pascal_enum_values --max_cluster_size --atomics" } + - { rust: stable, vendor: STM32-patched, options: "--strict --const_generic --pascal_enum_values --max_cluster_size --atomics --atomics_feature atomics" } - { rust: stable, vendor: Toshiba, options: all } - { rust: stable, vendor: Toshiba, options: "" } # Test MSRV diff --git a/ci/script.sh b/ci/script.sh index 6a945cf0..707a497b 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -40,11 +40,11 @@ main() { # test crate cargo init --name foo $td - echo 'cortex-m = "0.7.4"' >> $td/Cargo.toml - echo 'cortex-m-rt = "0.7.1"' >> $td/Cargo.toml + echo 'cortex-m = "0.7.7"' >> $td/Cargo.toml + echo 'cortex-m-rt = "0.7.3"' >> $td/Cargo.toml echo 'vcell = "0.1.3"' >> $td/Cargo.toml if [[ "$options" == *"--atomics"* ]]; then - echo 'portable-atomic = { version = "0.3.16", default-features = false }' >> $td/Cargo.toml + echo 'portable-atomic = { version = "1.4", default-features = false }' >> $td/Cargo.toml fi echo '[profile.dev]' >> $td/Cargo.toml echo 'incremental = false' >> $td/Cargo.toml From d19c64609ec82c591ce17d19b7d3b2dd18cc92cf Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 9 Jun 2023 10:46:04 +0300 Subject: [PATCH 105/319] move hidden into module --- src/generate/generic.rs | 222 ++++++++++++++++++++-------------------- 1 file changed, 110 insertions(+), 112 deletions(-) diff --git a/src/generate/generic.rs b/src/generate/generic.rs index c589b149..b91fa694 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -252,17 +252,114 @@ impl Reg { } } +#[doc(hidden)] +pub mod raw { + use super::{marker, BitM, FieldSpec, RegisterSpec, Unsafe, Writable}; + + pub struct R { + pub(crate) bits: REG::Ux, + pub(super) _reg: marker::PhantomData, + } + + pub struct W { + ///Writable bits + pub(crate) bits: REG::Ux, + pub(super) _reg: marker::PhantomData, + } + + pub struct FieldReader + where + FI: FieldSpec, + { + pub(crate) bits: FI::Ux, + _reg: marker::PhantomData, + } + + impl FieldReader { + /// Creates a new instance of the reader. + #[allow(unused)] + #[inline(always)] + pub(crate) fn new(bits: FI::Ux) -> Self { + Self { + bits, + _reg: marker::PhantomData, + } + } + } + + pub struct BitReader { + pub(crate) bits: bool, + _reg: marker::PhantomData, + } + + impl BitReader { + /// Creates a new instance of the reader. + #[allow(unused)] + #[inline(always)] + pub(crate) fn new(bits: bool) -> Self { + Self { + bits, + _reg: marker::PhantomData, + } + } + } + + pub struct FieldWriter<'a, REG, const WI: u8, const O: u8, FI = u8, Safety = Unsafe> + where + REG: Writable + RegisterSpec, + FI: FieldSpec, + { + pub(crate) w: &'a mut W, + _field: marker::PhantomData<(FI, Safety)>, + } + + impl<'a, REG, const WI: u8, const O: u8, FI, Safety> FieldWriter<'a, REG, WI, O, FI, Safety> + where + REG: Writable + RegisterSpec, + FI: FieldSpec, + { + /// Creates a new instance of the writer + #[allow(unused)] + #[inline(always)] + pub(crate) fn new(w: &'a mut W) -> Self { + Self { + w, + _field: marker::PhantomData, + } + } + } + + pub struct BitWriter<'a, REG, const O: u8, FI = bool, M = BitM> + where + REG: Writable + RegisterSpec, + bool: From, + { + pub(crate) w: &'a mut W, + _field: marker::PhantomData<(FI, M)>, + } + + impl<'a, REG, const O: u8, FI, M> BitWriter<'a, REG, O, FI, M> + where + REG: Writable + RegisterSpec, + bool: From, + { + /// Creates a new instance of the writer + #[allow(unused)] + #[inline(always)] + pub(crate) fn new(w: &'a mut W) -> Self { + Self { + w, + _field: marker::PhantomData, + } + } + } +} + /// Register reader. /// /// Result of the `read` methods of registers. Also used as a closure argument in the `modify` /// method. -pub type R = RRaw; - -#[doc(hidden)] -pub struct RRaw { - pub(crate) bits: REG::Ux, - _reg: marker::PhantomData, -} +pub type R = raw::R; impl R { /// Reads raw bits from register. @@ -287,61 +384,15 @@ where /// Register writer. /// /// Used as an argument to the closures in the `write` and `modify` methods of the register. -pub type W = WRaw; - -#[doc(hidden)] -pub struct WRaw { - ///Writable bits - pub(crate) bits: REG::Ux, - _reg: marker::PhantomData, -} - -#[doc(hidden)] -pub struct FieldReaderRaw -where - FI: FieldSpec -{ - pub(crate) bits: FI::Ux, - _reg: marker::PhantomData, -} - -impl FieldReaderRaw { - /// Creates a new instance of the reader. - #[allow(unused)] - #[inline(always)] - pub(crate) fn new(bits: FI::Ux) -> Self { - Self { - bits, - _reg: marker::PhantomData, - } - } -} - -#[doc(hidden)] -pub struct BitReaderRaw { - pub(crate) bits: bool, - _reg: marker::PhantomData, -} - -impl BitReaderRaw { - /// Creates a new instance of the reader. - #[allow(unused)] - #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { - Self { - bits, - _reg: marker::PhantomData, - } - } -} +pub type W = raw::W; /// Field reader. /// /// Result of the `read` methods of fields. -pub type FieldReader = FieldReaderRaw; +pub type FieldReader = raw::FieldReader; /// Bit-wise field reader -pub type BitReader = BitReaderRaw; +pub type BitReader = raw::BitReader; impl FieldReader { /// Reads raw bits from field. @@ -395,65 +446,12 @@ pub struct Safe; #[doc(hidden)] pub struct Unsafe; -#[doc(hidden)] -pub struct FieldWriterRaw<'a, REG, const WI: u8, const O: u8, FI = u8, Safety = Unsafe> -where - REG: Writable + RegisterSpec, - FI: FieldSpec, -{ - pub(crate) w: &'a mut W, - _field: marker::PhantomData<(FI, Safety)>, -} - -impl<'a, REG, const WI: u8, const O: u8, FI, Safety> - FieldWriterRaw<'a, REG, WI, O, FI, Safety> -where - REG: Writable + RegisterSpec, - FI: FieldSpec, -{ - /// Creates a new instance of the writer - #[allow(unused)] - #[inline(always)] - pub(crate) fn new(w: &'a mut W) -> Self { - Self { - w, - _field: marker::PhantomData, - } - } -} - -#[doc(hidden)] -pub struct BitWriterRaw<'a, REG, const O: u8, FI = bool, M = BitM> -where - REG: Writable + RegisterSpec, - bool: From, -{ - pub(crate) w: &'a mut W, - _field: marker::PhantomData<(FI, M)>, -} - -impl<'a, REG, const O: u8, FI, M> BitWriterRaw<'a, REG, O, FI, M> -where - REG: Writable + RegisterSpec, - bool: From, -{ - /// Creates a new instance of the writer - #[allow(unused)] - #[inline(always)] - pub(crate) fn new(w: &'a mut W) -> Self { - Self { - w, - _field: marker::PhantomData, - } - } -} - /// Write field Proxy with unsafe `bits` pub type FieldWriter<'a, REG, const WI: u8, const O: u8, FI = u8> = - FieldWriterRaw<'a, REG, WI, O, FI, Unsafe>; + raw::FieldWriter<'a, REG, WI, O, FI, Unsafe>; /// Write field Proxy with safe `bits` pub type FieldWriterSafe<'a, REG, const WI: u8, const O: u8, FI = u8> = - FieldWriterRaw<'a, REG, WI, O, FI, Safe>; + raw::FieldWriter<'a, REG, WI, O, FI, Safe>; impl<'a, REG, const WI: u8, const OF: u8, FI> FieldWriter<'a, REG, WI, OF, FI> where @@ -479,7 +477,7 @@ macro_rules! bit_proxy { pub struct $mwv; /// Bit-wise write field proxy - pub type $writer<'a, REG, const O: u8, FI = bool> = BitWriterRaw<'a, REG, O, FI, $mwv>; + pub type $writer<'a, REG, const O: u8, FI = bool> = raw::BitWriter<'a, REG, O, FI, $mwv>; impl<'a, REG, const OF: u8, FI> $writer<'a, REG, OF, FI> where From 196fe75a19faa4b5e7050c988d571a8b9c54a110 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 16 Jun 2023 05:59:00 +0300 Subject: [PATCH 106/319] add register reader/writer links --- CHANGELOG.md | 1 + src/generate/peripheral.rs | 9 +-- src/generate/register.rs | 132 ++++++++++++++++++++++++++----------- 3 files changed, 97 insertions(+), 45 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index bbfd8456..75eab9a1 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -8,6 +8,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] - Fix when `atomics` features is generated but not enabled +- move hidden structs into module, add register reader/writer links into `SPEC` docs (#736) - removed register writer & reader wrappers, generic `REG` in field writers (#731) - Updated syn to version 2 (#732) - Let readable field fetch doc from svd description (#734) diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index b9ba1aca..5dbfdeb8 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -245,20 +245,15 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result /// An enum describing the derivation status of an erc, which allows for disjoint arrays to be /// implicitly derived from a common type. -#[derive(Debug, PartialEq)] +#[derive(Default, Debug, PartialEq)] enum DeriveInfo { + #[default] Root, Explicit(RegisterPath), Implicit(RegisterPath), Cluster, // don't do anything different for clusters } -impl Default for DeriveInfo { - fn default() -> Self { - DeriveInfo::Root - } -} - impl fmt::Display for DeriveInfo { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { write!(f, "{self:?}") diff --git a/src/generate/register.rs b/src/generate/register.rs index fc56fb25..82be12ec 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -8,6 +8,7 @@ use proc_macro2::{Ident, Punct, Spacing, Span, TokenStream}; use quote::{quote, ToTokens}; use std::borrow::Cow; use std::collections::HashSet; +use std::fmt::Write; use svd_parser::expand::{ derive_enumerated_values, derive_field, BlockPath, EnumPath, FieldPath, Index, RegisterPath, }; @@ -80,8 +81,24 @@ pub fn render( } else { return Err(anyhow!("Incorrect access of register {}", register.name)); }; - let alias_doc = - format!("{name} ({accs}) register accessor: an alias for `Reg<{regspec_ident}>`"); + + let mut alias_doc = format!( + "{name} ({accs}) register accessor: {description}\n\n{}", + api_docs( + access.can_read(), + access.can_write(), + register.properties.reset_value.is_some(), + &name_snake_case, + false, + register.read_action, + )? + ); + if name_snake_case != "cfg" { + alias_doc += format!( + "\n\nFor information about available fields see [`{name_snake_case}`] module" + ) + .as_str(); + } let mut out = TokenStream::new(); out.extend(quote! { #[doc = #alias_doc] @@ -106,6 +123,68 @@ pub fn render( } } +fn api_docs( + can_read: bool, + can_write: bool, + can_reset: bool, + module: &Ident, + inmodule: bool, + read_action: Option, +) -> Result { + fn method(s: &str) -> String { + format!("[`{s}`](crate::generic::Reg::{s})") + } + + let mut doc = String::new(); + + if can_read { + write!( + doc, + "You can {} this register and get [`{module}::R`]{}. ", + method("read"), + if inmodule { "(R)" } else { "" }, + )?; + + if let Some(action) = read_action { + doc.push_str("WARN: "); + doc.push_str(match action { + ReadAction::Clear => "The register is **cleared** (set to zero) following a read operation.", + ReadAction::Set => "The register is **set** (set to ones) following a read operation.", + ReadAction::Modify => "The register is **modified** in some way after a read operation.", + ReadAction::ModifyExternal => "One or more dependent resources other than the current register are immediately affected by a read operation.", + }); + } + doc.push(' '); + } + + if can_write { + let mut methods = Vec::new(); + if can_reset { + methods.push("reset"); + methods.push("write"); + } + methods.push("write_with_zero"); + write!( + doc, + "You can {} this register using [`{module}::W`]{}. ", + methods + .iter() + .map(|m| method(m)) + .collect::>() + .join(", "), + if inmodule { "(W)" } else { "" }, + )?; + } + + if can_read && can_write { + write!(doc, "You can also {} this register. ", method("modify"),)?; + } + + doc.push_str("See [API](https://docs.rs/svd2rust/#read--modify--write-api)."); + + Ok(doc) +} + pub fn render_register_mod( register: &Register, access: Access, @@ -138,7 +217,6 @@ pub fn render_register_mod( ); let mut mod_items = TokenStream::new(); - let mut methods = vec![]; let can_read = access.can_read(); let can_write = access.can_write(); @@ -150,7 +228,6 @@ pub fn render_register_mod( #[doc = #desc] pub type R = crate::R<#regspec_ident>; }); - methods.push("read"); } if can_write { @@ -159,15 +236,6 @@ pub fn render_register_mod( #[doc = #desc] pub type W = crate::W<#regspec_ident>; }); - methods.push("write_with_zero"); - if can_reset { - methods.push("reset"); - methods.push("write"); - } - } - - if can_read && can_write { - methods.push("modify"); } let mut r_impl_items = TokenStream::new(); @@ -310,29 +378,17 @@ pub fn render_register_mod( close.to_tokens(&mut mod_items); } - let methods = methods - .iter() - .map(|s| format!("[`{s}`](crate::generic::Reg::{s})")) - .collect::>(); - let mut doc = format!("{description}\n\nThis register you can {}. See [API](https://docs.rs/svd2rust/#read--modify--write-api).", methods.join(", ")); - - if name_snake_case != "cfg" { - doc += format!( - "\n\nFor information about available fields see [{name_snake_case}](index.html) module" - ) - .as_str(); - } - - if can_read { - if let Some(action) = register.read_action { - doc += match action { - ReadAction::Clear => "\n\nThe register is **cleared** (set to zero) following a read operation.", - ReadAction::Set => "\n\nThe register is **set** (set to ones) following a read operation.", - ReadAction::Modify => "\n\nThe register is **modified** in some way after a read operation.", - ReadAction::ModifyExternal => "\n\nOne or more dependent resources other than the current register are immediately affected by a read operation.", - }; - } - } + let doc = format!( + "{description}\n\n{}", + api_docs( + can_read, + can_write, + can_reset, + &name_snake_case, + true, + register.read_action, + )? + ); mod_items.extend(quote! { #[doc = #doc] @@ -344,7 +400,7 @@ pub fn render_register_mod( }); if can_read { - let doc = format!("`read()` method returns [{name_snake_case}::R](R) reader structure",); + let doc = format!("`read()` method returns [`{name_snake_case}::R`](R) reader structure",); mod_items.extend(quote! { #[doc = #doc] impl crate::Readable for #regspec_ident {} @@ -352,7 +408,7 @@ pub fn render_register_mod( } if can_write { let doc = - format!("`write(|w| ..)` method takes [{name_snake_case}::W](W) writer structure",); + format!("`write(|w| ..)` method takes [`{name_snake_case}::W`](W) writer structure",); let zero_to_modify_fields_bitmap = util::hex(zero_to_modify_fields_bitmap); let one_to_modify_fields_bitmap = util::hex(one_to_modify_fields_bitmap); From be37b647a740d13195dd3b146808a92e783db834 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 9 Aug 2023 14:46:58 +0300 Subject: [PATCH 107/319] safety --- src/generate/peripheral.rs | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index cc16207d..92bb0aa8 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -93,6 +93,10 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result } ///Steal an instance of this peripheral + /// + ///# Safety + /// + ///Make sure that [`Peripherals::steal`] is already called pub unsafe fn steal() -> Self { Self { _marker: PhantomData } } @@ -157,6 +161,10 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result } ///Steal an instance of this peripheral + /// + ///# Safety + /// + ///Make sure that [`Peripherals::steal`] is already called pub unsafe fn steal() -> Self { Self { _marker: PhantomData } } From e240fcc2e79f6d0de11e50604631d596611fbd0b Mon Sep 17 00:00:00 2001 From: Adam Greig Date: Tue, 15 Aug 2023 20:11:15 +0100 Subject: [PATCH 108/319] Update safety text for per-peripheral steal() --- src/generate/peripheral.rs | 26 +++++++++++++++++++++----- src/lib.rs | 6 +++--- 2 files changed, 24 insertions(+), 8 deletions(-) diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 92bb0aa8..a9296d08 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -96,7 +96,15 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result /// ///# Safety /// - ///Make sure that [`Peripherals::steal`] is already called + /// Ensure that the new instance of the peripheral cannot be used in a way + /// that may race with any existing instances, for example by only + /// accessing read-only or write-only registers, or by consuming the + /// original peripheral and using critical sections to coordinate + /// access between multiple new instances. + /// + /// Additionally, other software such as HALs may rely on only one + /// peripheral instance existing to ensure memory safety; ensure + /// no stolen instances are passed to such software. pub unsafe fn steal() -> Self { Self { _marker: PhantomData } } @@ -161,10 +169,18 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result } ///Steal an instance of this peripheral - /// - ///# Safety - /// - ///Make sure that [`Peripherals::steal`] is already called + /// + ///# Safety + /// + /// Ensure that the new instance of the peripheral cannot be used in a way + /// that may race with any existing instances, for example by only + /// accessing read-only or write-only registers, or by consuming the + /// original peripheral and using critical sections to coordinate + /// access between multiple new instances. + /// + /// Additionally, other software such as HALs may rely on only one + /// peripheral instance existing to ensure memory safety; ensure + /// no stolen instances are passed to such software. pub unsafe fn steal() -> Self { Self { _marker: PhantomData } } diff --git a/src/lib.rs b/src/lib.rs index 08d90bf6..2fae4718 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -186,9 +186,9 @@ //! use the implementation provided by the target crate like `cortex-m`, `riscv` and `*-hal` crates. //! See more details in the [`critical-section`](https://crates.io/crates/critical-section) crate documentation. //! -//! The singleton property can be *unsafely* bypassed using the `ptr` static method which is -//! available on all the peripheral types. This method is useful for implementing safe higher -//! level abstractions. +//! The singleton property can be *unsafely* bypassed using the `ptr` or `steal` static methods +//! which are available on all the peripheral types. This method is useful for implementing safe +//! higher level abstractions. //! //! ```ignore //! struct PA0 { _0: () } From cd4ef26dd3a13e7629168815b843ab1684565754 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 15 Aug 2023 22:14:09 +0300 Subject: [PATCH 109/319] quote common steal fn part --- src/generate/peripheral.rs | 53 +++++++++++++++----------------------- 1 file changed, 21 insertions(+), 32 deletions(-) diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index a9296d08..6e9fc23a 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -53,6 +53,25 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result feature_attribute.extend(quote! { #[cfg(feature = #feature_name)] }); }; + let steal_fn = quote! { + /// Steal an instance of this peripheral + /// + /// # Safety + /// + /// Ensure that the new instance of the peripheral cannot be used in a way + /// that may race with any existing instances, for example by only + /// accessing read-only or write-only registers, or by consuming the + /// original peripheral and using critical sections to coordinate + /// access between multiple new instances. + /// + /// Additionally, other software such as HALs may rely on only one + /// peripheral instance existing to ensure memory safety; ensure + /// no stolen instances are passed to such software. + pub unsafe fn steal() -> Self { + Self { _marker: PhantomData } + } + }; + match &p { Peripheral::Array(p, dim) => { let names: Vec> = names(p, dim).map(|n| n.into()).collect(); @@ -92,22 +111,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result Self::PTR } - ///Steal an instance of this peripheral - /// - ///# Safety - /// - /// Ensure that the new instance of the peripheral cannot be used in a way - /// that may race with any existing instances, for example by only - /// accessing read-only or write-only registers, or by consuming the - /// original peripheral and using critical sections to coordinate - /// access between multiple new instances. - /// - /// Additionally, other software such as HALs may rely on only one - /// peripheral instance existing to ensure memory safety; ensure - /// no stolen instances are passed to such software. - pub unsafe fn steal() -> Self { - Self { _marker: PhantomData } - } + #steal_fn } #feature_attribute_n @@ -168,22 +172,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result Self::PTR } - ///Steal an instance of this peripheral - /// - ///# Safety - /// - /// Ensure that the new instance of the peripheral cannot be used in a way - /// that may race with any existing instances, for example by only - /// accessing read-only or write-only registers, or by consuming the - /// original peripheral and using critical sections to coordinate - /// access between multiple new instances. - /// - /// Additionally, other software such as HALs may rely on only one - /// peripheral instance existing to ensure memory safety; ensure - /// no stolen instances are passed to such software. - pub unsafe fn steal() -> Self { - Self { _marker: PhantomData } - } + #steal_fn } #feature_attribute From dea44f52bc84b3c7645d406ef45c3a552dfe2c1a Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 9 Aug 2023 15:51:29 +0300 Subject: [PATCH 110/319] more bagdes --- .github/workflows/release.yml | 3 +++ CHANGELOG.md | 1 + Cargo.toml | 4 ++-- README.md | 10 +++++++--- 4 files changed, 13 insertions(+), 5 deletions(-) diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml index 993f4bdd..566980fb 100644 --- a/.github/workflows/release.yml +++ b/.github/workflows/release.yml @@ -15,6 +15,9 @@ jobs: - os: ubuntu-latest target: x86_64-unknown-linux-gnu suffix: ".gz" + - os: ubuntu-latest + target: aarch64-unknown-linux-gnu + suffix: ".gz" - os: macos-latest target: x86_64-apple-darwin suffix: ".gz" diff --git a/CHANGELOG.md b/CHANGELOG.md index 9c935cd6..fbb7cf9b 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Add `aarch64` target for releases, more readme badges - Fix when `atomics` features is generated but not enabled - move hidden structs into module, add register reader/writer links into `SPEC` docs (#736) - removed register writer & reader wrappers, generic `REG` in field writers (#731) diff --git a/Cargo.toml b/Cargo.toml index baef3651..6af15d33 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -44,7 +44,7 @@ yaml = ["dep:serde_yaml"] [dependencies] clap = { version = "4.0", optional = true } -irx-config = { version = "3.1", features = ["cmd", "toml-parser"], optional = true } +irx-config = { version = "3.3", features = ["cmd", "toml-parser"], optional = true } env_logger = { version = "0.10", optional = true } inflections = "1.1" log = { version = "~0.4", features = ["std"] } @@ -55,7 +55,7 @@ thiserror = "1.0" serde = { version = "1.0", optional = true } serde_json = { version = "1.0.85", optional = true } serde_yaml = { version = "0.9.11", optional = true } -regex = "1.7.0" +regex = "1.9.0" html-escape = "0.2" [dependencies.svd-parser] diff --git a/README.md b/README.md index 2022b4a8..002f9563 100644 --- a/README.md +++ b/README.md @@ -1,5 +1,11 @@ -[![crates.io](https://img.shields.io/crates/d/svd2rust.svg)](https://crates.io/crates/svd2rust) +![GitHub top language](https://img.shields.io/github/languages/top/rust-embedded/svd2rust) +![Minimum Supported Rust Version](https://img.shields.io/badge/rustc-1.65+-blue.svg) [![crates.io](https://img.shields.io/crates/v/svd2rust.svg)](https://crates.io/crates/svd2rust) +[![crates.io](https://img.shields.io/crates/d/svd2rust.svg)](https://crates.io/crates/svd2rust) +[![Released API docs](https://docs.rs/svd2rust/badge.svg)](https://docs.rs/svd2rust) +![Crates.io](https://img.shields.io/crates/l/svd2rust) +[![dependency status](https://deps.rs/repo/github/rust-embedded/svd2rust/status.svg)](https://deps.rs/repo/github/rust-embedded/svd2rust) +[![Continuous integration](https://github.com/rust-embedded/svd2rust/workflows/Continuous%20integration/badge.svg)](https://github.com/rust-embedded/svd2rust) # `svd2rust` @@ -9,8 +15,6 @@ This project is developed and maintained by the [Tools team][team]. # [Documentation](https://docs.rs/svd2rust) -# [API](https://docs.rs/svd2rust) - ## Minimum Supported Rust Version (MSRV) The **generated code** is guaranteed to compile on stable Rust 1.65.0 and up. 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1f116745640dda04187cff072d3b4f8bceb7d02c Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 16 Aug 2023 08:53:47 +0300 Subject: [PATCH 112/319] release 0.30 --- CHANGELOG.md | 5 ++++- Cargo.lock | 10 +++++----- Cargo.toml | 2 +- 3 files changed, 10 insertions(+), 7 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index fbb7cf9b..3f7770f6 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.30.0] - 2023-08-16 + - Add `aarch64` target for releases, more readme badges - Fix when `atomics` features is generated but not enabled - move hidden structs into module, add register reader/writer links into `SPEC` docs (#736) @@ -802,7 +804,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.29.0...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.30.0...HEAD +[v0.30.0]: https://github.com/rust-embedded/svd2rust/compare/v0.29.0...v0.30.0 [v0.29.0]: https://github.com/rust-embedded/svd2rust/compare/v0.28.0...v0.29.0 [v0.28.0]: https://github.com/rust-embedded/svd2rust/compare/v0.27.2...v0.28.0 [v0.27.2]: https://github.com/rust-embedded/svd2rust/compare/v0.27.1...v0.27.2 diff --git a/Cargo.lock b/Cargo.lock index c593e02c..bcd614fe 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -464,9 +464,9 @@ dependencies = [ [[package]] name = "serde_json" -version = "1.0.104" +version = "1.0.105" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "076066c5f1078eac5b722a31827a8832fe108bed65dfa75e233c89f8206e976c" +checksum = "693151e1ac27563d6dbcec9dee9fbd5da8539b20fa14ad3752b2e6d363ace360" dependencies = [ "itoa", "ryu", @@ -527,7 +527,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.29.0" +version = "0.30.0" dependencies = [ "anyhow", "clap", @@ -756,9 +756,9 @@ checksum = "d419259aba16b663966e29e6d7c6ecfa0bb8425818bb96f6f1f3c3eb71a6e7b9" [[package]] name = "winnow" -version = "0.5.10" +version = "0.5.11" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5504cc7644f4b593cbc05c4a55bf9bd4e94b867c3c0bd440934174d50482427d" +checksum = "1e461589e194280efaa97236b73623445efa195aa633fd7004f39805707a9d53" dependencies = [ "memchr", ] diff --git a/Cargo.toml b/Cargo.toml index 6af15d33..621e2e5f 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.29.0" +version = "0.30.0" readme = "README.md" rust-version = "1.65" From 670996353491208d089a61e385baae508478639e Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 16 Aug 2023 09:22:08 +0300 Subject: [PATCH 113/319] fix aarch64 compilation --- .cargo/config.toml | 2 ++ .github/workflows/release.yml | 5 +++++ 2 files changed, 7 insertions(+) create mode 100644 .cargo/config.toml diff --git a/.cargo/config.toml b/.cargo/config.toml new file mode 100644 index 00000000..3c32d251 --- /dev/null +++ b/.cargo/config.toml @@ -0,0 +1,2 @@ +[target.aarch64-unknown-linux-gnu] +linker = "aarch64-linux-gnu-gcc" diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml index 566980fb..2a575c3b 100644 --- a/.github/workflows/release.yml +++ b/.github/workflows/release.yml @@ -38,6 +38,11 @@ jobs: uses: Swatinem/rust-cache@v2 with: key: ${{ matrix.target }} + + - name: Install Dependencies + if: ${{ matrix.target == 'aarch64-unknown-linux-gnu' }} + run: sudo apt install -y gcc-aarch64-linux-gnu + - run: cargo build --target ${{ matrix.target }} --release - name: Compress and rename executable From f95e41bf29b7b6dea433becf527ad992ecbdb15e Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 1 Oct 2023 10:32:18 +0300 Subject: [PATCH 114/319] fix field derive & msrv 1.70 required by clap --- .github/workflows/ci.yml | 2 +- CHANGELOG.md | 3 +++ Cargo.toml | 2 +- README.md | 2 +- src/generate/register.rs | 25 ++++++++++++++++--------- 5 files changed, 22 insertions(+), 12 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index e806791f..23fe17b8 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -79,7 +79,7 @@ jobs: - { rust: stable, vendor: Toshiba, options: all } - { rust: stable, vendor: Toshiba, options: "" } # Test MSRV - - { rust: 1.65.0, vendor: Nordic, options: "" } + - { rust: 1.70.0, vendor: Nordic, options: "" } # Use nightly for architectures which don't support stable - { rust: nightly, vendor: MSP430, options: "--atomics" } - { rust: nightly, vendor: MSP430, options: "" } diff --git a/CHANGELOG.md b/CHANGELOG.md index 3f7770f6..6e78a94f 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,9 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Bump MSRV to 1.70 +- Fix `derivedFrom` on field + ## [v0.30.0] - 2023-08-16 - Add `aarch64` target for releases, more readme badges diff --git a/Cargo.toml b/Cargo.toml index 621e2e5f..8c2867c1 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -25,7 +25,7 @@ name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" version = "0.30.0" readme = "README.md" -rust-version = "1.65" +rust-version = "1.70" [package.metadata.deb] section = "rust" diff --git a/README.md b/README.md index 002f9563..d2f06d4d 100644 --- a/README.md +++ b/README.md @@ -1,5 +1,5 @@ ![GitHub top language](https://img.shields.io/github/languages/top/rust-embedded/svd2rust) -![Minimum Supported Rust Version](https://img.shields.io/badge/rustc-1.65+-blue.svg) +![Minimum Supported Rust Version](https://img.shields.io/badge/rustc-1.70+-blue.svg) [![crates.io](https://img.shields.io/crates/v/svd2rust.svg)](https://crates.io/crates/svd2rust) [![crates.io](https://img.shields.io/crates/d/svd2rust.svg)](https://crates.io/crates/svd2rust) [![Released API docs](https://docs.rs/svd2rust/badge.svg)](https://docs.rs/svd2rust) diff --git a/src/generate/register.rs b/src/generate/register.rs index 82be12ec..58dff5ea 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -554,12 +554,11 @@ pub fn fields( let inline = quote! { #[inline(always)] }; for &f in fields.iter() { let mut f = f.clone(); - let mut fpath = None; - let dpath = f.derived_from.take(); - if let Some(dpath) = dpath { - fpath = derive_field(&mut f, &dpath, rpath, index)?; + let mut fdpath = None; + if let Some(dpath) = f.derived_from.take() { + fdpath = derive_field(&mut f, &dpath, rpath, index)?; } - let fpath = fpath.unwrap_or_else(|| rpath.new_field(&f.name)); + let fpath = rpath.new_field(&f.name); // TODO(AJM) - do we need to do anything with this range type? let BitRange { offset, width, .. } = f.bit_range; @@ -601,10 +600,18 @@ pub fn fields( let dpath = ev.derived_from.take(); if let Some(dpath) = dpath { epath = Some(derive_enumerated_values(&mut ev, &dpath, &fpath, index)?); - } - // TODO: remove this hack - if let Some(epath) = epath.as_ref() { - ev = (*index.evs.get(epath).unwrap()).clone(); + // TODO: remove this hack + if let Some(epath) = epath.as_ref() { + ev = (*index.evs.get(epath).unwrap()).clone(); + } + } else if let Some(path) = fdpath.as_ref() { + epath = Some( + path.new_enum( + ev.name + .clone() + .unwrap_or_else(|| index.fields.get(path).unwrap().name.clone()), + ), + ); } lookup_results.push((ev, epath)); } From ee3afced969ff3091e4b46d3f9bede2dfb30223e Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 1 Oct 2023 12:00:22 +0300 Subject: [PATCH 115/319] simplify --- src/generate/register.rs | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/src/generate/register.rs b/src/generate/register.rs index 58dff5ea..e5623229 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -605,13 +605,7 @@ pub fn fields( ev = (*index.evs.get(epath).unwrap()).clone(); } } else if let Some(path) = fdpath.as_ref() { - epath = Some( - path.new_enum( - ev.name - .clone() - .unwrap_or_else(|| index.fields.get(path).unwrap().name.clone()), - ), - ); + epath = Some(path.new_enum(ev.name.clone().unwrap_or_else(|| path.name.clone()))); } lookup_results.push((ev, epath)); } From f097443c93bc81a2f768e29b575eacbadeb0b832 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 1 Oct 2023 16:46:31 +0300 Subject: [PATCH 116/319] release 0.30.1 --- .github/workflows/changelog.yml | 2 +- .github/workflows/ci.yml | 10 +- .github/workflows/release.yml | 4 +- CHANGELOG.md | 6 +- Cargo.lock | 201 ++++++++++++++++---------------- Cargo.toml | 6 +- src/generate/device.rs | 3 +- src/generate/register.rs | 6 +- 8 files changed, 123 insertions(+), 115 deletions(-) diff --git a/.github/workflows/changelog.yml b/.github/workflows/changelog.yml index 4317d5de..87d77ef4 100644 --- a/.github/workflows/changelog.yml +++ b/.github/workflows/changelog.yml @@ -10,7 +10,7 @@ jobs: runs-on: ubuntu-latest steps: - name: Checkout sources - uses: actions/checkout@v3 + uses: actions/checkout@v4 - name: Changelog updated uses: Zomzog/changelog-checker@v1.3.0 diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 23fe17b8..7aadf889 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -24,7 +24,7 @@ jobs: TARGET: [x86_64-unknown-linux-gnu, x86_64-apple-darwin, x86_64-pc-windows-msvc] steps: - - uses: actions/checkout@v3 + - uses: actions/checkout@v4 - uses: dtolnay/rust-toolchain@master with: @@ -87,7 +87,7 @@ jobs: - { rust: nightly, vendor: Espressif, options: "" } steps: - - uses: actions/checkout@v3 + - uses: actions/checkout@v4 - uses: dtolnay/rust-toolchain@master with: @@ -111,7 +111,7 @@ jobs: runs-on: ubuntu-latest needs: [check] steps: - - uses: actions/checkout@v3 + - uses: actions/checkout@v4 - uses: dtolnay/rust-toolchain@master with: @@ -134,7 +134,7 @@ jobs: ci-serde: runs-on: ubuntu-latest steps: - - uses: actions/checkout@v3 + - uses: actions/checkout@v4 - uses: dtolnay/rust-toolchain@master with: @@ -159,7 +159,7 @@ jobs: name: Rustfmt runs-on: ubuntu-latest steps: - - uses: actions/checkout@v3 + - uses: actions/checkout@v4 - uses: dtolnay/rust-toolchain@master with: diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml index 2a575c3b..77ebdd1b 100644 --- a/.github/workflows/release.yml +++ b/.github/workflows/release.yml @@ -29,7 +29,7 @@ jobs: suffix: ".exe" runs-on: ${{ matrix.os }} steps: - - uses: actions/checkout@v3 + - uses: actions/checkout@v4 - uses: dtolnay/rust-toolchain@master with: toolchain: stable @@ -62,7 +62,7 @@ jobs: runs-on: ubuntu-latest needs: [build] steps: - - uses: actions/checkout@v3 + - uses: actions/checkout@v4 - uses: actions/download-artifact@v3 with: path: artifacts diff --git a/CHANGELOG.md b/CHANGELOG.md index 6e78a94f..64e03c66 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,9 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.30.1] - 2023-10-01 + +- Fix clippy lints on `nightly` - Bump MSRV to 1.70 - Fix `derivedFrom` on field @@ -807,7 +810,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.30.0...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.30.1...HEAD +[v0.30.1]: https://github.com/rust-embedded/svd2rust/compare/v0.30.0...v0.30.1 [v0.30.0]: https://github.com/rust-embedded/svd2rust/compare/v0.29.0...v0.30.0 [v0.29.0]: https://github.com/rust-embedded/svd2rust/compare/v0.28.0...v0.29.0 [v0.28.0]: https://github.com/rust-embedded/svd2rust/compare/v0.27.2...v0.28.0 diff --git a/Cargo.lock b/Cargo.lock index bcd614fe..0a596acd 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -4,39 +4,38 @@ version = 3 [[package]] name = "aho-corasick" -version = "1.0.4" +version = "1.1.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6748e8def348ed4d14996fa801f4122cd763fff530258cdc03f64b25f89d3a5a" +checksum = "ea5d730647d4fadd988536d06fecce94b7b4f2a7efdae548f1cf4b63205518ab" dependencies = [ "memchr", ] [[package]] name = "anstream" -version = "0.3.2" +version = "0.6.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0ca84f3628370c59db74ee214b3263d58f9aadd9b4fe7e711fd87dc452b7f163" +checksum = "2ab91ebe16eb252986481c5b62f6098f3b698a45e34b5b98200cf20dd2484a44" dependencies = [ "anstyle", "anstyle-parse", "anstyle-query", "anstyle-wincon", "colorchoice", - "is-terminal", "utf8parse", ] [[package]] name = "anstyle" -version = "1.0.1" +version = "1.0.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3a30da5c5f2d5e72842e00bcb57657162cdabef0931f40e2deb9b4140440cecd" +checksum = "7079075b41f533b8c61d2a4d073c4676e1f8b249ff94a393b0595db304e0dd87" [[package]] name = "anstyle-parse" -version = "0.2.1" +version = "0.2.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "938874ff5980b03a87c5524b3ae5b59cf99b1d6bc836848df7bc5ada9643c333" +checksum = "317b9a89c1868f5ea6ff1d9539a69f45dffc21ce321ac1fd1160dfa48c8e2140" dependencies = [ "utf8parse", ] @@ -52,9 +51,9 @@ dependencies = [ [[package]] name = "anstyle-wincon" -version = "1.0.2" +version = "3.0.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c677ab05e09154296dd37acecd46420c17b9713e8366facafa8fc0885167cf4c" +checksum = "f0699d10d2f4d628a98ee7b57b289abbc98ff3bad977cb3152709d4bf2330628" dependencies = [ "anstyle", "windows-sys", @@ -62,9 +61,9 @@ dependencies = [ [[package]] name = "anyhow" -version = "1.0.74" +version = "1.0.75" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8c6f84b74db2535ebae81eede2f39b947dcbf01d093ae5f791e5dd414a1bf289" +checksum = "a4668cab20f66d8d020e1fbc0ebe47217433c1b6c8f2040faf858554e394ace6" [[package]] name = "arrayref" @@ -86,9 +85,9 @@ checksum = "b4682ae6287fcf752ecaabbfcc7b6f9b72aa33933dc23a554d853aea8eea8635" [[package]] name = "blake2b_simd" -version = "1.0.1" +version = "1.0.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3c2f0dc9a68c6317d884f97cc36cf5a3d20ba14ce404227df55e1af708ab04bc" +checksum = "23285ad32269793932e830392f2fe2f83e26488fd3ec778883a93c8323735780" dependencies = [ "arrayref", "arrayvec", @@ -97,27 +96,27 @@ dependencies = [ [[package]] name = "cc" -version = "1.0.82" +version = "1.0.83" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "305fe645edc1442a0fa8b6726ba61d422798d37a52e12eaecf4b022ebbb88f01" +checksum = "f1174fb0b6ec23863f8b971027804a42614e347eafb0a95bf0b12cdae21fc4d0" dependencies = [ "libc", ] [[package]] name = "clap" -version = "4.3.21" +version = "4.4.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c27cdf28c0f604ba3f512b0c9a409f8de8513e4816705deb0498b627e7c3a3fd" +checksum = "d04704f56c2cde07f43e8e2c154b43f216dc5c92fc98ada720177362f953b956" dependencies = [ "clap_builder", ] [[package]] name = "clap_builder" -version = "4.3.21" +version = "4.4.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "08a9f1ab5e9f01a9b81f202e8562eb9a10de70abf9eaeac1be465c28b75aa4aa" +checksum = "0e231faeaca65ebd1ea3c737966bf858971cd38c3849107aa3ea7de90a804e45" dependencies = [ "anstream", "anstyle", @@ -127,9 +126,9 @@ dependencies = [ [[package]] name = "clap_lex" -version = "0.5.0" +version = "0.5.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "2da6da31387c7e4ef160ffab6d5e7f00c42626fe39aea70a7b0f1773f7dd6c1b" +checksum = "cd7cc57abe963c6d3b9d8be5b06ba7c8957a930305ca90304f24ef040aa6f961" [[package]] name = "colorchoice" @@ -139,9 +138,9 @@ checksum = "acbf1af155f9b9ef647e42cdc158db4b64a1b61f743629225fde6f3e0be2a7c7" [[package]] name = "constant_time_eq" -version = "0.2.6" +version = "0.3.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "21a53c0a4d288377e7415b53dcfc3c04da5cdc2cc95c8d5ac178b58f0b861ad6" +checksum = "f7144d30dcf0fafbce74250a3963025d8d52177934239851c917d29f1df280c2" [[package]] name = "darling" @@ -230,9 +229,9 @@ checksum = "5443807d6dff69373d433ab9ef5378ad8df50ca6298caf15de6e52e24aaf54d5" [[package]] name = "errno" -version = "0.3.2" +version = "0.3.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6b30f669a7961ef1631673d2766cc92f52d64f7ef354d4fe0ddfd30ed52f0f4f" +checksum = "136526188508e25c6fef639d7927dfb3e0e3084488bf202267829cf7fc23dbdd" dependencies = [ "errno-dragonfly", "libc", @@ -257,15 +256,15 @@ checksum = "3f9eec918d3f24069decb9af1554cad7c880e2da24a9afd88aca000531ab82c1" [[package]] name = "hashbrown" -version = "0.14.0" +version = "0.14.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "2c6201b9ff9fd90a5a3bac2e56a830d0caa509576f0e503818ee82c181b3437a" +checksum = "7dfda62a12f55daeae5015f81b0baea145391cb4520f86c248fc615d72640d12" [[package]] name = "hermit-abi" -version = "0.3.2" +version = "0.3.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "443144c8cdadd93ebf52ddb4056d257f5b52c04d3c804e657d19eb73fc33668b" +checksum = "d77f7ec81a6d05a3abb01ab6eb7590f6083d08449fe5a1c8b1e620283546ccb7" [[package]] name = "html-escape" @@ -290,9 +289,9 @@ checksum = "b9e0384b61958566e926dc50660321d12159025e767c18e043daf26b70104c39" [[package]] name = "indexmap" -version = "2.0.0" +version = "2.0.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d5477fe2230a79769d8dc68e0eabf5437907c0457a5614a9e8dddb67f65eb65d" +checksum = "8adf3ddd720272c6ea8bf59463c04e0f93d0bbf7c5439b691bca2987e0270897" dependencies = [ "equivalent", "hashbrown", @@ -339,15 +338,15 @@ checksum = "af150ab688ff2122fcef229be89cb50dd66af9e01a4ff320cc137eecc9bacc38" [[package]] name = "libc" -version = "0.2.147" +version = "0.2.148" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b4668fb0ea861c1df094127ac5f1da3409a82116a4ba74fca2e58ef927159bb3" +checksum = "9cdc71e17332e86d2e1d38c1f99edcb6288ee11b815fb1a4b049eaa2114d369b" [[package]] name = "linux-raw-sys" -version = "0.4.5" +version = "0.4.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "57bcfdad1b858c2db7c38303a6d2ad4dfaf5eb53dfeb0910128b2c26d6158503" +checksum = "3852614a3bd9ca9804678ba6be5e3b8ce76dfc902cae004e3e0c44051b6e88db" [[package]] name = "log" @@ -357,9 +356,9 @@ checksum = "b5e6163cb8c49088c2c36f57875e58ccd8c87c7427f7fbd50ea6710b2f3f2e8f" [[package]] name = "memchr" -version = "2.5.0" +version = "2.6.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "2dffe52ecf27772e601905b7522cb4ef790d2cc203488bbd0e2fe85fcb74566d" +checksum = "8f232d6ef707e1956a43342693d2a31e72989554d58299d7a88738cc95b0d35c" [[package]] name = "once_cell" @@ -369,27 +368,27 @@ checksum = "dd8b5dd2ae5ed71462c540258bedcb51965123ad7e7ccf4b9a8cafaa4a63576d" [[package]] name = "proc-macro2" -version = "1.0.66" +version = "1.0.67" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "18fb31db3f9bddb2ea821cde30a9f70117e3f119938b5ee630b7403aa6e2ead9" +checksum = "3d433d9f1a3e8c1263d9456598b16fec66f4acc9a74dacffd35c7bb09b3a1328" dependencies = [ "unicode-ident", ] [[package]] name = "quote" -version = "1.0.32" +version = "1.0.33" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "50f3b39ccfb720540debaa0164757101c08ecb8d326b15358ce76a62c7e85965" +checksum = "5267fca4496028628a95160fc423a33e8b2e6af8a5302579e322e4b520293cae" dependencies = [ "proc-macro2", ] [[package]] name = "regex" -version = "1.9.3" +version = "1.9.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "81bc1d4caf89fac26a70747fe603c130093b53c773888797a6329091246d651a" +checksum = "ebee201405406dbf528b8b672104ae6d6d63e6d118cb10e4d51abbc7b58044ff" dependencies = [ "aho-corasick", "memchr", @@ -399,9 +398,9 @@ dependencies = [ [[package]] name = "regex-automata" -version = "0.3.6" +version = "0.3.9" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "fed1ceff11a1dddaee50c9dc8e4938bd106e9d89ae372f192311e7da498e3b69" +checksum = "59b23e92ee4318893fa3fe3e6fb365258efbfe6ac6ab30f090cdcbb7aa37efa9" dependencies = [ "aho-corasick", "memchr", @@ -410,24 +409,24 @@ dependencies = [ [[package]] name = "regex-syntax" -version = "0.7.4" +version = "0.7.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e5ea92a5b6195c6ef2a0295ea818b312502c6fc94dde986c5553242e18fd4ce2" +checksum = "dbb5fb1acd8a1a18b3dd5be62d25485eb770e05afb408a9627d14d451bae12da" [[package]] name = "roxmltree" -version = "0.14.1" +version = "0.18.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "921904a62e410e37e215c40381b7117f830d9d89ba60ab5236170541dd25646b" +checksum = "862340e351ce1b271a378ec53f304a5558f7db87f3769dc655a8f6ecbb68b302" dependencies = [ "xmlparser", ] [[package]] name = "rustix" -version = "0.38.8" +version = "0.38.15" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "19ed4fa021d81c8392ce04db050a3da9a60299050b7ae1cf482d862b54a7218f" +checksum = "d2f9da0cbd88f9f09e7814e388301c8414c51c62aa6ce1e4b5c551d49d96e531" dependencies = [ "bitflags", "errno", @@ -444,29 +443,29 @@ checksum = "1ad4cc8da4ef723ed60bced201181d83791ad433213d8c24efffda1eec85d741" [[package]] name = "serde" -version = "1.0.183" +version = "1.0.188" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "32ac8da02677876d532745a130fc9d8e6edfa81a269b107c5b00829b91d8eb3c" +checksum = "cf9e0fcba69a370eed61bcf2b728575f726b50b55cba78064753d708ddc7549e" dependencies = [ "serde_derive", ] [[package]] name = "serde_derive" -version = "1.0.183" +version = "1.0.188" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "aafe972d60b0b9bee71a91b92fee2d4fb3c9d7e8f6b179aa99f27203d99a4816" +checksum = "4eca7ac642d82aa35b60049a6eccb4be6be75e599bd2e9adb5f875a737654af2" dependencies = [ "proc-macro2", "quote", - "syn 2.0.28", + "syn 2.0.37", ] [[package]] name = "serde_json" -version = "1.0.105" +version = "1.0.107" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "693151e1ac27563d6dbcec9dee9fbd5da8539b20fa14ad3752b2e6d363ace360" +checksum = "6b420ce6e3d8bd882e9b243c6eed35dbc9a6110c9769e74b584e0d68d1f20c65" dependencies = [ "itoa", "ryu", @@ -503,9 +502,9 @@ checksum = "73473c0e59e6d5812c5dfe2a064a6444949f089e20eec9a2e5506596494e4623" [[package]] name = "svd-parser" -version = "0.14.1" +version = "0.14.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3e93e3a9aafae32a19b9c07470b628d2dd71192a34e01147852a54087bf41694" +checksum = "f2081d77e28f5144c3af0774dcbfd0b170b6bce37d238b2e5d7bc3d7a7d6b775" dependencies = [ "anyhow", "roxmltree", @@ -527,7 +526,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.30.0" +version = "0.30.1" dependencies = [ "anyhow", "clap", @@ -544,7 +543,7 @@ dependencies = [ "serde_yaml", "svd-parser", "svd-rs", - "syn 2.0.28", + "syn 2.0.37", "thiserror", ] @@ -561,9 +560,9 @@ dependencies = [ [[package]] name = "syn" -version = "2.0.28" +version = "2.0.37" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "04361975b3f5e348b2189d8dc55bc942f278b2d482a6a0365de5bdd62d351567" +checksum = "7303ef2c05cd654186cb250d29049a24840ca25d2747c25c0381c8d9e2f582e8" dependencies = [ "proc-macro2", "quote", @@ -572,38 +571,38 @@ dependencies = [ [[package]] name = "termcolor" -version = "1.2.0" +version = "1.3.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "be55cf8942feac5c765c2c993422806843c9a9a45d4d5c407ad6dd2ea95eb9b6" +checksum = "6093bad37da69aab9d123a8091e4be0aa4a03e4d601ec641c327398315f62b64" dependencies = [ "winapi-util", ] [[package]] name = "thiserror" -version = "1.0.46" +version = "1.0.49" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d9207952ae1a003f42d3d5e892dac3c6ba42aa6ac0c79a6a91a2b5cb4253e75c" +checksum = "1177e8c6d7ede7afde3585fd2513e611227efd6481bd78d2e82ba1ce16557ed4" dependencies = [ "thiserror-impl", ] [[package]] name = "thiserror-impl" -version = "1.0.46" +version = "1.0.49" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f1728216d3244de4f14f14f8c15c79be1a7c67867d28d69b719690e2a19fb445" +checksum = "10712f02019e9288794769fba95cd6847df9874d49d871d062172f9dd41bc4cc" dependencies = [ "proc-macro2", "quote", - "syn 2.0.28", + "syn 2.0.37", ] [[package]] name = "toml" -version = "0.7.6" +version = "0.7.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c17e963a819c331dcacd7ab957d80bc2b9a9c1e71c804826d2f283dd65306542" +checksum = "dd79e69d3b627db300ff956027cc6c3798cef26d22526befdfcd12feeb6d2257" dependencies = [ "serde", "serde_spanned", @@ -622,9 +621,9 @@ dependencies = [ [[package]] name = "toml_edit" -version = "0.19.14" +version = "0.19.15" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f8123f27e969974a3dfba720fdb560be359f57b44302d280ba72e76a74480e8a" +checksum = "1b5bb770da30e5cbfde35a2d7b9b8a2c4b8ef89548a7a6aeab5c9a576e3e7421" dependencies = [ "indexmap", "serde", @@ -635,9 +634,9 @@ dependencies = [ [[package]] name = "unicode-ident" -version = "1.0.11" +version = "1.0.12" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "301abaae475aa91687eb82514b328ab47a211a533026cb25fc3e519b86adfc3c" +checksum = "3354b9ac3fae1ff6755cb6db53683adb661634f67557942dea4facebec0fee4b" [[package]] name = "unsafe-libyaml" @@ -675,9 +674,9 @@ checksum = "ac3b87c63620426dd9b991e5ce0329eff545bccbbb34f3be09ff6fb6ab51b7b6" [[package]] name = "winapi-util" -version = "0.1.5" +version = "0.1.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "70ec6ce85bb158151cae5e5c87f95a8e97d2c0c4b001223f33a334e3ce5de178" +checksum = "f29e6f9198ba0d26b4c9f07dbe6f9ed633e1f3d5b8b414090084349e46a52596" dependencies = [ "winapi", ] @@ -699,9 +698,9 @@ dependencies = [ [[package]] name = "windows-targets" -version = "0.48.2" +version = "0.48.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d1eeca1c172a285ee6c2c84c341ccea837e7c01b12fbb2d0fe3c9e550ce49ec8" +checksum = "9a2fa6e2155d7247be68c096456083145c183cbbbc2764150dda45a87197940c" dependencies = [ "windows_aarch64_gnullvm", "windows_aarch64_msvc", @@ -714,57 +713,57 @@ dependencies = [ [[package]] name = "windows_aarch64_gnullvm" -version = "0.48.2" +version = "0.48.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b10d0c968ba7f6166195e13d593af609ec2e3d24f916f081690695cf5eaffb2f" +checksum = "2b38e32f0abccf9987a4e3079dfb67dcd799fb61361e53e2882c3cbaf0d905d8" [[package]] name = "windows_aarch64_msvc" -version = "0.48.2" +version = "0.48.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "571d8d4e62f26d4932099a9efe89660e8bd5087775a2ab5cdd8b747b811f1058" +checksum = "dc35310971f3b2dbbf3f0690a219f40e2d9afcf64f9ab7cc1be722937c26b4bc" [[package]] name = "windows_i686_gnu" -version = "0.48.2" +version = "0.48.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "2229ad223e178db5fbbc8bd8d3835e51e566b8474bfca58d2e6150c48bb723cd" +checksum = "a75915e7def60c94dcef72200b9a8e58e5091744960da64ec734a6c6e9b3743e" [[package]] name = "windows_i686_msvc" -version = "0.48.2" +version = "0.48.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "600956e2d840c194eedfc5d18f8242bc2e17c7775b6684488af3a9fff6fe3287" +checksum = "8f55c233f70c4b27f66c523580f78f1004e8b5a8b659e05a4eb49d4166cca406" [[package]] name = "windows_x86_64_gnu" -version = "0.48.2" +version = "0.48.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ea99ff3f8b49fb7a8e0d305e5aec485bd068c2ba691b6e277d29eaeac945868a" +checksum = "53d40abd2583d23e4718fddf1ebec84dbff8381c07cae67ff7768bbf19c6718e" [[package]] name = "windows_x86_64_gnullvm" -version = "0.48.2" +version = "0.48.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8f1a05a1ece9a7a0d5a7ccf30ba2c33e3a61a30e042ffd247567d1de1d94120d" +checksum = "0b7b52767868a23d5bab768e390dc5f5c55825b6d30b86c844ff2dc7414044cc" [[package]] name = "windows_x86_64_msvc" -version = "0.48.2" +version = "0.48.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d419259aba16b663966e29e6d7c6ecfa0bb8425818bb96f6f1f3c3eb71a6e7b9" +checksum = "ed94fce61571a4006852b7389a063ab983c02eb1bb37b47f8272ce92d06d9538" [[package]] name = "winnow" -version = "0.5.11" +version = "0.5.15" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1e461589e194280efaa97236b73623445efa195aa633fd7004f39805707a9d53" +checksum = "7c2e3184b9c4e92ad5167ca73039d0c42476302ab603e2fec4487511f38ccefc" dependencies = [ "memchr", ] [[package]] name = "xmlparser" -version = "0.13.5" +version = "0.13.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4d25c75bf9ea12c4040a97f829154768bbbce366287e2dc044af160cd79a13fd" +checksum = "66fee0b777b0f5ac1c69bb06d361268faafa61cd4682ae064a171c16c433e9e4" diff --git a/Cargo.toml b/Cargo.toml index 8c2867c1..cebb98e9 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.30.0" +version = "0.30.1" readme = "README.md" rust-version = "1.70" @@ -60,11 +60,11 @@ html-escape = "0.2" [dependencies.svd-parser] features = ["expand"] -version = "0.14.1" +version = "0.14.2" [dependencies.svd-rs] features = ["serde"] -version = "0.14.1" +version = "0.14.2" [dependencies.syn] version = "2.0" diff --git a/src/generate/device.rs b/src/generate/device.rs index 804fe676..10daf05e 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -60,7 +60,8 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result &mut Self { self.bits = bits; From c339d85b0390624c9949251dba20738d93967891 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 18 Oct 2023 10:10:53 +0300 Subject: [PATCH 117/319] more const fn --- CHANGELOG.md | 2 ++ src/generate/generic.rs | 10 +++++----- src/generate/register.rs | 4 ++-- 3 files changed, 9 insertions(+), 7 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 64e03c66..f288e976 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Use `const fn` where allowed + ## [v0.30.1] - 2023-10-01 - Fix clippy lints on `nightly` diff --git a/src/generate/generic.rs b/src/generate/generic.rs index b91fa694..cc13f75a 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -279,7 +279,7 @@ pub mod raw { /// Creates a new instance of the reader. #[allow(unused)] #[inline(always)] - pub(crate) fn new(bits: FI::Ux) -> Self { + pub(crate) const fn new(bits: FI::Ux) -> Self { Self { bits, _reg: marker::PhantomData, @@ -296,7 +296,7 @@ pub mod raw { /// Creates a new instance of the reader. #[allow(unused)] #[inline(always)] - pub(crate) fn new(bits: bool) -> Self { + pub(crate) const fn new(bits: bool) -> Self { Self { bits, _reg: marker::PhantomData, @@ -364,7 +364,7 @@ pub type R = raw::R; impl R { /// Reads raw bits from register. #[inline(always)] - pub fn bits(&self) -> REG::Ux { + pub const fn bits(&self) -> REG::Ux { self.bits } } @@ -397,7 +397,7 @@ pub type BitReader = raw::BitReader; impl FieldReader { /// Reads raw bits from field. #[inline(always)] - pub fn bits(&self) -> FI::Ux { + pub const fn bits(&self) -> FI::Ux { self.bits } } @@ -426,7 +426,7 @@ where impl BitReader { /// Value of the field as raw bits. #[inline(always)] - pub fn bit(&self) -> bool { + pub const fn bit(&self) -> bool { self.bits } /// Returns `true` if the bit is clear (0). diff --git a/src/generate/register.rs b/src/generate/register.rs index 335915c0..9c9a54a6 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -772,7 +772,7 @@ pub fn fields( enum_items.extend(quote! { #[doc = "Get enumerated values variant"] #inline - pub fn variant(&self) -> Option<#value_read_ty> { + pub const fn variant(&self) -> Option<#value_read_ty> { match self.bits { #arms } @@ -782,7 +782,7 @@ pub fn fields( enum_items.extend(quote! { #[doc = "Get enumerated values variant"] #inline - pub fn variant(&self) -> #value_read_ty { + pub const fn variant(&self) -> #value_read_ty { match self.bits { #arms } From 2e62581f2edec466308df6e7447dd8ebb4243680 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 18 Oct 2023 10:35:46 +0300 Subject: [PATCH 118/319] use cast for ArrayProxy --- src/generate/array_proxy.rs | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/src/generate/array_proxy.rs b/src/generate/array_proxy.rs index b47074ba..00f7064a 100644 --- a/src/generate/array_proxy.rs +++ b/src/generate/array_proxy.rs @@ -16,14 +16,12 @@ pub struct ArrayProxy { #[allow(clippy::len_without_is_empty)] impl ArrayProxy { /// Get a reference from an [ArrayProxy] with no bounds checking. - pub unsafe fn get_ref(&self, index: usize) -> &T { - let base = self as *const Self as usize; - let address = base + S * index; - &*(address as *const T) + pub const unsafe fn get_ref(&self, index: usize) -> &T { + &*(self as *const Self).cast::().add(S * index).cast::() } /// Get a reference from an [ArrayProxy], or return `None` if the index /// is out of bounds. - pub fn get(&self, index: usize) -> Option<&T> { + pub const fn get(&self, index: usize) -> Option<&T> { if index < C { Some(unsafe { self.get_ref(index) }) } else { @@ -31,7 +29,7 @@ impl ArrayProxy { } } /// Return the number of items. - pub fn len(&self) -> usize { + pub const fn len(&self) -> usize { C } } From 7dfb4fd09298ee6e48b1e60bfba0def79773e68f Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 14 Oct 2023 10:52:58 +0300 Subject: [PATCH 119/319] array-proxy for disjoint arrays --- CHANGELOG.md | 1 + src/generate/array_proxy.rs | 1 + src/generate/generic.rs | 4 ++-- src/generate/peripheral.rs | 46 ++++++++++++++++++++++++++----------- 4 files changed, 37 insertions(+), 15 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index f288e976..2e13e561 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Use `ArrayProxy` for memory disjoined register arrays - Use `const fn` where allowed ## [v0.30.1] - 2023-10-01 diff --git a/src/generate/array_proxy.rs b/src/generate/array_proxy.rs index 00f7064a..5fc0550f 100644 --- a/src/generate/array_proxy.rs +++ b/src/generate/array_proxy.rs @@ -7,6 +7,7 @@ /// ensure that the memory really is backed by appropriate content. /// /// Typically, this is used for accessing hardware registers. +#[derive(Debug)] pub struct ArrayProxy { /// As well as providing a PhantomData, this field is non-public, and /// therefore ensures that code outside of this module can never create diff --git a/src/generate/generic.rs b/src/generate/generic.rs index cc13f75a..74ae3418 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -431,12 +431,12 @@ impl BitReader { } /// Returns `true` if the bit is clear (0). #[inline(always)] - pub fn bit_is_clear(&self) -> bool { + pub const fn bit_is_clear(&self) -> bool { !self.bit() } /// Returns `true` if the bit is set (1). #[inline(always)] - pub fn bit_is_set(&self) -> bool { + pub const fn bit_is_set(&self) -> bool { self.bit() } } diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index b27051bb..3529f7ee 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -329,6 +329,9 @@ struct Region { } impl Region { + fn size(&self) -> u32 { + self.end - self.offset + } fn shortest_ident(&self) -> Option { let mut idents: Vec<_> = self .rbfs @@ -490,12 +493,17 @@ impl FieldRegions { .binary_search_by_key(&new_region.offset, |r| r.offset); match idx { Ok(idx) => { - bail!( - "we shouldn't exist in the vec, but are at idx {} {:#?}\n{:#?}", - idx, - new_region, - self.regions - ); + if new_region.size() == 0 { + // add ArrayProxy + self.regions.insert(idx, new_region); + } else { + bail!( + "we shouldn't exist in the vec, but are at idx {} {:#?}\n{:#?}", + idx, + new_region, + self.regions + ); + } } Err(idx) => self.regions.insert(idx, new_region), }; @@ -1185,6 +1193,8 @@ fn expand_register( Register::Array(info, array_info) => { let sequential_addresses = (array_info.dim == 1) || (register_size == array_info.dim_increment * BITS_PER_BYTE); + let disjoint_sequential_addresses = (array_info.dim == 1) + || (register_size <= array_info.dim_increment * BITS_PER_BYTE); let convert_list = match config.keep_list { true => match &array_info.dim_name { @@ -1208,20 +1218,22 @@ fn expand_register( } else { "".into() }; - let array_convertible = match derive_info { + let ac = match derive_info { DeriveInfo::Implicit(_) => { ty_name = util::replace_suffix(&info_name, &index); - sequential_addresses && convert_list && sequential_indexes_from0 + convert_list && sequential_indexes_from0 } DeriveInfo::Explicit(_) => { ty_name = util::replace_suffix(&info_name, &index); - sequential_addresses && convert_list && sequential_indexes_from0 + convert_list && sequential_indexes_from0 } - _ => sequential_addresses && convert_list, + _ => convert_list, }; + let array_convertible = ac && sequential_addresses; + let array_proxy_convertible = ac && disjoint_sequential_addresses; let ty = name_to_ty(&ty_name); - if array_convertible { + if array_convertible || (array_proxy_convertible && config.const_generic) { let accessors = if sequential_indexes_from0 { Vec::new() } else { @@ -1247,14 +1259,22 @@ fn expand_register( } accessors }; - let array_ty = new_syn_array(ty, array_info.dim); + let array_ty = if array_convertible { + new_syn_array(ty, array_info.dim) + } else { + array_proxy_type(ty, array_info) + }; let syn_field = new_syn_field(ty_name.to_snake_case_ident(Span::call_site()), array_ty); register_expanded.push(RegisterBlockField { syn_field, description, offset: info.address_offset, - size: register_size * array_info.dim, + size: if array_convertible { + register_size * array_info.dim + } else { + 0 + }, accessors, }); } else { From a76b09971822e950dad12211731186482ed5fbe9 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 22 Oct 2023 13:24:22 +0300 Subject: [PATCH 120/319] fix docs --- src/generate/generic.rs | 93 ++++++++++++++-------------------------- src/generate/register.rs | 2 +- src/lib.rs | 2 +- src/util.rs | 2 +- 4 files changed, 35 insertions(+), 64 deletions(-) diff --git a/src/generate/generic.rs b/src/generate/generic.rs index 74ae3418..afc7e2fa 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -457,18 +457,50 @@ impl<'a, REG, const WI: u8, const OF: u8, FI> FieldWriter<'a, REG, WI, OF, FI> where REG: Writable + RegisterSpec, FI: FieldSpec, + REG::Ux: From, { /// Field width pub const WIDTH: u8 = WI; + + /// Writes raw bits to the field + /// + /// # Safety + /// + /// Passing incorrect value can cause undefined behaviour. See reference manual + #[inline(always)] + pub unsafe fn bits(self, value: FI::Ux) -> &'a mut W { + self.w.bits &= !(REG::Ux::mask::() << OF); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << OF; + self.w + } + /// Writes `variant` to the field + #[inline(always)] + pub fn variant(self, variant: FI) -> &'a mut W { + unsafe { self.bits(FI::Ux::from(variant)) } + } } impl<'a, REG, const WI: u8, const OF: u8, FI> FieldWriterSafe<'a, REG, WI, OF, FI> where REG: Writable + RegisterSpec, FI: FieldSpec, + REG::Ux: From, { /// Field width pub const WIDTH: u8 = WI; + + /// Writes raw bits to the field + #[inline(always)] + pub fn bits(self, value: FI::Ux) -> &'a mut W { + self.w.bits &= !(REG::Ux::mask::() << OF); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << OF; + self.w + } + /// Writes `variant` to the field + #[inline(always)] + pub fn variant(self, variant: FI) -> &'a mut W { + self.bits(FI::Ux::from(variant)) + } } macro_rules! bit_proxy { @@ -486,17 +518,7 @@ macro_rules! bit_proxy { { /// Field width pub const WIDTH: u8 = 1; - } - }; -} -macro_rules! impl_bit_proxy { - ($writer:ident) => { - impl<'a, REG, const OF: u8, FI> $writer<'a, REG, OF, FI> - where - REG: Writable + RegisterSpec, - bool: From, - { /// Writes bit to the field #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { @@ -521,57 +543,6 @@ bit_proxy!(BitWriter0S, Bit0S); bit_proxy!(BitWriter1T, Bit1T); bit_proxy!(BitWriter0T, Bit0T); -impl<'a, REG, const WI: u8, const OF: u8, FI> FieldWriter<'a, REG, WI, OF, FI> -where - REG: Writable + RegisterSpec, - FI: FieldSpec, - REG::Ux: From, -{ - /// Writes raw bits to the field - /// - /// # Safety - /// - /// Passing incorrect value can cause undefined behaviour. See reference manual - #[inline(always)] - pub unsafe fn bits(self, value: FI::Ux) -> &'a mut W { - self.w.bits &= !(REG::Ux::mask::() << OF); - self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << OF; - self.w - } - /// Writes `variant` to the field - #[inline(always)] - pub fn variant(self, variant: FI) -> &'a mut W { - unsafe { self.bits(FI::Ux::from(variant)) } - } -} -impl<'a, REG, const WI: u8, const OF: u8, FI> FieldWriterSafe<'a, REG, WI, OF, FI> -where - REG: Writable + RegisterSpec, - FI: FieldSpec, - REG::Ux: From, -{ - /// Writes raw bits to the field - #[inline(always)] - pub fn bits(self, value: FI::Ux) -> &'a mut W { - self.w.bits &= !(REG::Ux::mask::() << OF); - self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << OF; - self.w - } - /// Writes `variant` to the field - #[inline(always)] - pub fn variant(self, variant: FI) -> &'a mut W { - self.bits(FI::Ux::from(variant)) - } -} - -impl_bit_proxy!(BitWriter); -impl_bit_proxy!(BitWriter1S); -impl_bit_proxy!(BitWriter0C); -impl_bit_proxy!(BitWriter1C); -impl_bit_proxy!(BitWriter0S); -impl_bit_proxy!(BitWriter1T); -impl_bit_proxy!(BitWriter0T); - impl<'a, REG, const OF: u8, FI> BitWriter<'a, REG, OF, FI> where REG: Writable + RegisterSpec, diff --git a/src/generate/register.rs b/src/generate/register.rs index 9c9a54a6..8e8aede0 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -95,7 +95,7 @@ pub fn render( ); if name_snake_case != "cfg" { alias_doc += format!( - "\n\nFor information about available fields see [`{name_snake_case}`] module" + "\n\nFor information about available fields see [`mod@{name_snake_case}`] module" ) .as_str(); } diff --git a/src/lib.rs b/src/lib.rs index 2fae4718..62cf1948 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -588,7 +588,7 @@ pub fn generate(input: &str, config: &Config) -> Result { }) } -/// Load a [Device] from a string slice with given [config](crate::util::Config). +/// Load a [Device](svd::Device) from a string slice with given [config](crate::util::Config). pub fn load_from(input: &str, config: &crate::util::Config) -> Result { use self::util::SourceType; use svd_parser::ValidateLevel; diff --git a/src/util.rs b/src/util.rs index 4bf6ed07..23cefdc1 100644 --- a/src/util.rs +++ b/src/util.rs @@ -183,7 +183,7 @@ pub enum SourceType { } impl SourceType { - /// Make a new [`Source`] from a given extension. + /// Make a new [`SourceType`] from a given extension. pub fn from_extension(s: &str) -> Option { match s { "svd" | "xml" => Some(Self::Xml), From 5e9a29c353edb291ece6ee271a6c8bfa75598b29 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 22 Oct 2023 13:27:19 +0300 Subject: [PATCH 121/319] release-0.30.2 --- CHANGELOG.md | 6 +++++- Cargo.lock | 2 +- Cargo.toml | 2 +- 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 2e13e561..03c8720f 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,9 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.30.2] - 2023-10-22 + +- Fix documentation warnings - Use `ArrayProxy` for memory disjoined register arrays - Use `const fn` where allowed @@ -813,7 +816,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.30.1...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.30.2...HEAD +[v0.30.2]: https://github.com/rust-embedded/svd2rust/compare/v0.30.1...v0.30.2 [v0.30.1]: https://github.com/rust-embedded/svd2rust/compare/v0.30.0...v0.30.1 [v0.30.0]: https://github.com/rust-embedded/svd2rust/compare/v0.29.0...v0.30.0 [v0.29.0]: https://github.com/rust-embedded/svd2rust/compare/v0.28.0...v0.29.0 diff --git a/Cargo.lock b/Cargo.lock index 0a596acd..404c15ca 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -526,7 +526,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.30.1" +version = "0.30.2" dependencies = [ "anyhow", "clap", diff --git a/Cargo.toml b/Cargo.toml index cebb98e9..339672b2 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.30.1" +version = "0.30.2" readme = "README.md" rust-version = "1.70" From 2625b3e62dbb965a0018dfa1fd77d8ea5594d6c0 Mon Sep 17 00:00:00 2001 From: Adam Greig Date: Tue, 31 Oct 2023 21:26:55 +0000 Subject: [PATCH 122/319] Mark all Vector unions as repr(C). Fixes #755. --- CHANGELOG.md | 2 ++ src/generate/interrupt.rs | 4 ++++ 2 files changed, 6 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 03c8720f..7dcd1c52 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Mark `Vector` union as `repr(C)` + ## [v0.30.2] - 2023-10-22 - Fix documentation warnings diff --git a/src/generate/interrupt.rs b/src/generate/interrupt.rs index 92439ff7..6629f2d3 100644 --- a/src/generate/interrupt.rs +++ b/src/generate/interrupt.rs @@ -133,6 +133,7 @@ pub fn render( } #[doc(hidden)] + #[repr(C)] pub union Vector { _handler: unsafe extern "C" fn(), _reserved: u32, @@ -167,6 +168,7 @@ pub fn render( } #[doc(hidden)] + #[repr(C)] pub union Vector { _handler: unsafe extern "msp430-interrupt" fn(), _reserved: u16, @@ -201,6 +203,7 @@ pub fn render( } #[doc(hidden)] + #[repr(C)] pub union Vector { pub _handler: unsafe extern "C" fn(), pub _reserved: usize, @@ -233,6 +236,7 @@ pub fn render( } #[doc(hidden)] + #[repr(C)] pub union Vector { pub _handler: unsafe extern "C" fn(), _reserved: u32, From e8942d936cf82b760332206d477a4d64241427ec Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 17 Nov 2023 10:12:08 +0300 Subject: [PATCH 123/319] remove unstable lints --- CHANGELOG.md | 1 + src/generate/device.rs | 2 -- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 7dcd1c52..731e9a81 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Remove unstable lints - Mark `Vector` union as `repr(C)` ## [v0.30.2] - 2023-10-22 diff --git a/src/generate/device.rs b/src/generate/device.rs index 10daf05e..19818066 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -60,8 +60,6 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Date: Mon, 23 Oct 2023 19:09:24 +0300 Subject: [PATCH 124/319] support dimArrayIndex for array names and descripions --- CHANGELOG.md | 1 + Cargo.lock | 8 +-- Cargo.toml | 4 +- src/generate/array_proxy.rs | 2 +- src/generate/peripheral.rs | 126 +++++++++++++++++------------------- src/generate/register.rs | 46 +++++++------ src/util.rs | 12 ++-- 7 files changed, 103 insertions(+), 96 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 7dcd1c52..fe30c1d5 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -8,6 +8,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] - Mark `Vector` union as `repr(C)` +- Support `dimArrayIndex` for array names and descriptions ## [v0.30.2] - 2023-10-22 diff --git a/Cargo.lock b/Cargo.lock index 404c15ca..59c0ed56 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -502,9 +502,9 @@ checksum = "73473c0e59e6d5812c5dfe2a064a6444949f089e20eec9a2e5506596494e4623" [[package]] name = "svd-parser" -version = "0.14.2" +version = "0.14.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f2081d77e28f5144c3af0774dcbfd0b170b6bce37d238b2e5d7bc3d7a7d6b775" +checksum = "d9c0521573455cce71aa930fd500d25d8f8be4f6a857d3dafe1963d9e14fffbb" dependencies = [ "anyhow", "roxmltree", @@ -514,9 +514,9 @@ dependencies = [ [[package]] name = "svd-rs" -version = "0.14.2" +version = "0.14.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d08273bc4ca66b632299903960efa8a306aac61dc6381bcf07450c20b1a5443c" +checksum = "35830f227d0ee528eb674429091ba11781fbf141e72a87a9bc9c732522798b33" dependencies = [ "once_cell", "regex", diff --git a/Cargo.toml b/Cargo.toml index 339672b2..234587e4 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -60,11 +60,11 @@ html-escape = "0.2" [dependencies.svd-parser] features = ["expand"] -version = "0.14.2" +version = "0.14.3" [dependencies.svd-rs] features = ["serde"] -version = "0.14.2" +version = "0.14.4" [dependencies.syn] version = "2.0" diff --git a/src/generate/array_proxy.rs b/src/generate/array_proxy.rs index 5fc0550f..c97adc5e 100644 --- a/src/generate/array_proxy.rs +++ b/src/generate/array_proxy.rs @@ -18,7 +18,7 @@ pub struct ArrayProxy { impl ArrayProxy { /// Get a reference from an [ArrayProxy] with no bounds checking. pub const unsafe fn get_ref(&self, index: usize) -> &T { - &*(self as *const Self).cast::().add(S * index).cast::() + &*(self as *const Self).cast::().add(S * index).cast() } /// Get a reference from an [ArrayProxy], or return `None` if the index /// is out of bounds. diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 3529f7ee..d7bb5885 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -7,8 +7,7 @@ use svd_parser::expand::{ }; use crate::svd::{ - array::names, Cluster, ClusterInfo, MaybeArray, Peripheral, Register, RegisterCluster, - RegisterInfo, + Cluster, ClusterInfo, MaybeArray, Peripheral, Register, RegisterCluster, RegisterInfo, }; use log::{debug, trace, warn}; use proc_macro2::{Ident, Punct, Spacing, Span, TokenStream}; @@ -74,36 +73,32 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result match &p { Peripheral::Array(p, dim) => { - let names: Vec> = names(p, dim).map(|n| n.into()).collect(); - let names_str = names.iter().map(|n| n.to_sanitized_constant_case()); - let names_constant_case = names_str.clone().map(|n| Ident::new(&n, span)); - let addresses = - (0..=dim.dim).map(|i| util::hex(p.base_address + (i * dim.dim_increment) as u64)); - let snake_names = names - .iter() - .map(|p_name| p_name.to_sanitized_snake_case()) - .collect::>(); - let feature_attribute_n = snake_names.iter().map(|p_snake| { - let mut feature_attribute = feature_attribute.clone(); + let mut snake_names = Vec::with_capacity(dim.dim as _); + for pi in crate::svd::peripheral::expand(p, dim) { + let name = &pi.name; + let description = pi.description.as_deref().unwrap_or(&p.name); + let name_str = name.to_sanitized_constant_case(); + let name_constant_case = Ident::new(&name, span); + let address = util::hex(pi.base_address); + let p_snake = name.to_sanitized_snake_case(); + snake_names.push(p_snake.to_string()); + let mut feature_attribute_n = feature_attribute.clone(); if config.feature_peripheral { - feature_attribute.extend(quote! { #[cfg(feature = #p_snake)] }) + feature_attribute_n.extend(quote! { #[cfg(feature = #p_snake)] }) }; - feature_attribute - }); - // Insert the peripherals structure - out.extend(quote! { - #( + // Insert the peripherals structure + out.extend(quote! { #[doc = #description] #feature_attribute_n - pub struct #names_constant_case { _marker: PhantomData<*const ()> } + pub struct #name_constant_case { _marker: PhantomData<*const ()> } #feature_attribute_n - unsafe impl Send for #names_constant_case {} + unsafe impl Send for #name_constant_case {} #feature_attribute_n - impl #names_constant_case { + impl #name_constant_case { ///Pointer to the register block - pub const PTR: *const #base::RegisterBlock = #addresses as *const _; + pub const PTR: *const #base::RegisterBlock = #address as *const _; ///Return the pointer to the register block #[inline(always)] @@ -115,7 +110,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result } #feature_attribute_n - impl Deref for #names_constant_case { + impl Deref for #name_constant_case { type Target = #base::RegisterBlock; #[inline(always)] @@ -125,13 +120,13 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result } #feature_attribute_n - impl core::fmt::Debug for #names_constant_case { + impl core::fmt::Debug for #name_constant_case { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct(#names_str).finish() + f.debug_struct(#name_str).finish() } } - )* - }); + }); + } let feature_any_attribute = quote! {#[cfg(any(#(feature = #snake_names),*))]}; @@ -1075,36 +1070,36 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result match &array_info.dim_name { - Some(dim_name) => dim_name.contains("[%s]"), - None => info.name.contains("[%s]"), - }, + true => info.name.contains("[%s]"), false => true, }; let array_convertible = sequential_addresses && convert_list; if array_convertible { + let span = Span::call_site(); + let nb_name_sc = if let Some(dim_name) = array_info.dim_name.as_ref() { + dim_name.to_snake_case_ident(span) + } else { + ty_name.to_snake_case_ident(span) + }; let accessors = if sequential_indexes_from0 { Vec::new() } else { - let span = Span::call_site(); let mut accessors = Vec::new(); - let nb_name_cs = ty_name.to_snake_case_ident(span); - for (i, idx) in array_info.indexes().enumerate() { - let idx_name = - util::replace_suffix(&info.name, &idx).to_snake_case_ident(span); + for (i, ci) in crate::svd::cluster::expand(info, array_info).enumerate() { + let idx_name = ci.name.to_snake_case_ident(span); let comment = make_comment( cluster_size, - info.address_offset + (i as u32) * cluster_size / 8, - &description, + ci.address_offset, + ci.description.as_deref().unwrap_or(&ci.name), ); let i = unsuffixed(i as _); accessors.push(ArrayAccessor { doc: comment, name: idx_name, ty: ty.clone(), - basename: nb_name_cs.clone(), + basename: nb_name_sc.clone(), i, }); } @@ -1112,10 +1107,7 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result Result match &array_info.dim_name { - Some(dim_name) => dim_name.contains("[%s]"), - None => info.name.contains("[%s]"), - }, + true => info.name.contains("[%s]"), false => true, }; @@ -1234,26 +1222,32 @@ fn expand_register( let ty = name_to_ty(&ty_name); if array_convertible || (array_proxy_convertible && config.const_generic) { + let span = Span::call_site(); + let nb_name_sc = if let Some(dim_name) = array_info.dim_name.as_ref() { + util::fullname(dim_name, &info.alternate_group, config.ignore_groups) + .to_snake_case_ident(span) + } else { + ty_name.to_snake_case_ident(span) + }; let accessors = if sequential_indexes_from0 { Vec::new() } else { - let span = Span::call_site(); let mut accessors = Vec::new(); - let nb_name_cs = ty_name.to_snake_case_ident(span); - for (i, idx) in array_info.indexes().enumerate() { + for (i, ri) in crate::svd::register::expand(info, array_info).enumerate() { let idx_name = - util::replace_suffix(&info_name, &idx).to_snake_case_ident(span); + util::fullname(&ri.name, &info.alternate_group, config.ignore_groups) + .to_snake_case_ident(span); let comment = make_comment( register_size, - info.address_offset + (i as u32) * register_size / 8, - &description, + ri.address_offset, + ri.description.as_deref().unwrap_or(&ri.name), ); let i = unsuffixed(i as _); accessors.push(ArrayAccessor { doc: comment, name: idx_name, ty: ty.clone(), - basename: nb_name_cs.clone(), + basename: nb_name_sc.clone(), i, }); } @@ -1264,8 +1258,7 @@ fn expand_register( } else { array_proxy_type(ty, array_info) }; - let syn_field = - new_syn_field(ty_name.to_snake_case_ident(Span::call_site()), array_ty); + let syn_field = new_syn_field(nb_name_sc, array_ty); register_expanded.push(RegisterBlockField { syn_field, description, @@ -1278,15 +1271,14 @@ fn expand_register( accessors, }); } else { - for (field_num, idx) in array_info.indexes().enumerate() { - let nb_name = util::replace_suffix(&info_name, &idx); + for ri in crate::svd::register::expand(info, array_info) { let syn_field = - new_syn_field(nb_name.to_snake_case_ident(Span::call_site()), ty.clone()); + new_syn_field(ri.name.to_snake_case_ident(Span::call_site()), ty.clone()); register_expanded.push(RegisterBlockField { syn_field, - description: description.clone(), - offset: info.address_offset + field_num as u32 * array_info.dim_increment, + description: ri.description.unwrap_or(ri.name), + offset: ri.address_offset, size: register_size, accessors: Vec::new(), }); diff --git a/src/generate/register.rs b/src/generate/register.rs index 8e8aede0..43431e59 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -1,6 +1,6 @@ use crate::svd::{ - Access, BitRange, EnumeratedValues, Field, MaybeArray, ModifiedWriteValues, ReadAction, - Register, RegisterProperties, Usage, WriteConstraint, + Access, BitRange, DimElement, EnumeratedValues, Field, MaybeArray, ModifiedWriteValues, + ReadAction, Register, RegisterProperties, Usage, WriteConstraint, }; use core::u64; use log::warn; @@ -571,7 +571,18 @@ pub fn fields( } let name = util::replace_suffix(&f.name, ""); - let name_snake_case = name.to_snake_case_ident(span); + let name_snake_case = if let Field::Array( + _, + DimElement { + dim_name: Some(dim_name), + .. + }, + ) = &f + { + dim_name.to_snake_case_ident(span) + } else { + name.to_snake_case_ident(span) + }; let name_constant_case = name.to_sanitized_constant_case(); let description_raw = f.description.as_deref().unwrap_or(""); // raw description, if absent using empty string let description = util::respace(&util::escape_special_chars(description_raw)); @@ -862,8 +873,8 @@ pub fn fields( } }); } - for (i, suffix) in de.indexes().enumerate() { - let sub_offset = offset + (i as u64) * (increment as u64); + for fi in crate::svd::field::expand(&f, de) { + let sub_offset = fi.bit_offset() as u64; let value = if sub_offset != 0 { let sub_offset = &util::unsuffixed(sub_offset); quote! { (self.bits >> #sub_offset) } @@ -877,11 +888,11 @@ pub fn fields( } else { value }; - let name_snake_case_n = util::replace_suffix(&f.name, &suffix) - .to_snake_case_ident(Span::call_site()); - let doc = util::replace_suffix( - &description_with_bits(description_raw, sub_offset, width), - &suffix, + let name_snake_case_n = fi.name.to_snake_case_ident(Span::call_site()); + let doc = description_with_bits( + fi.description.as_deref().unwrap_or(&fi.name), + sub_offset, + width, ); r_impl_items.extend(quote! { #[doc = #doc] @@ -1098,7 +1109,6 @@ pub fn fields( } if let Field::Array(_, de) = &f { - let increment = de.dim_increment; let doc = &util::replace_suffix(&description, &brief_suffix); w_impl_items.extend(quote! { #[doc = #doc] @@ -1109,13 +1119,13 @@ pub fn fields( } }); - for (i, suffix) in de.indexes().enumerate() { - let sub_offset = offset + (i as u64) * (increment as u64); - let name_snake_case_n = &util::replace_suffix(&f.name, &suffix) - .to_snake_case_ident(Span::call_site()); - let doc = util::replace_suffix( - &description_with_bits(description_raw, sub_offset, width), - &suffix, + for fi in crate::svd::field::expand(&f, de) { + let sub_offset = fi.bit_offset() as u64; + let name_snake_case_n = &fi.name.to_snake_case_ident(Span::call_site()); + let doc = description_with_bits( + fi.description.as_deref().unwrap_or(&fi.name), + sub_offset, + width, ); let sub_offset = util::unsuffixed(sub_offset); diff --git a/src/util.rs b/src/util.rs index 23cefdc1..b6e62ccd 100644 --- a/src/util.rs +++ b/src/util.rs @@ -575,10 +575,14 @@ pub trait FullName { impl FullName for RegisterInfo { fn fullname(&self, ignore_group: bool) -> Cow { - match &self.alternate_group { - Some(group) if !ignore_group => format!("{group}_{}", self.name).into(), - _ => self.name.as_str().into(), - } + fullname(&self.name, &self.alternate_group, ignore_group) + } +} + +pub fn fullname<'a>(name: &'a str, group: &Option, ignore_group: bool) -> Cow<'a, str> { + match &group { + Some(group) if !ignore_group => format!("{group}_{}", name).into(), + _ => name.into(), } } From 106aa48d9837ddee8ce4df7ec08d546e3661f8d8 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 19 Nov 2023 19:40:00 +0300 Subject: [PATCH 125/319] release 0.30.3 --- CHANGELOG.md | 5 ++++- Cargo.lock | 2 +- Cargo.toml | 2 +- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index f5635f89..2137235d 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.30.3] - 2023-11-19 + - Remove unstable lints - Mark `Vector` union as `repr(C)` - Support `dimArrayIndex` for array names and descriptions @@ -820,7 +822,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.30.2...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.30.3...HEAD +[v0.30.3]: https://github.com/rust-embedded/svd2rust/compare/v0.30.2...v0.30.3 [v0.30.2]: https://github.com/rust-embedded/svd2rust/compare/v0.30.1...v0.30.2 [v0.30.1]: https://github.com/rust-embedded/svd2rust/compare/v0.30.0...v0.30.1 [v0.30.0]: https://github.com/rust-embedded/svd2rust/compare/v0.29.0...v0.30.0 diff --git a/Cargo.lock b/Cargo.lock index 59c0ed56..fd06b07c 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -526,7 +526,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.30.2" +version = "0.30.3" dependencies = [ "anyhow", "clap", diff --git a/Cargo.toml b/Cargo.toml index 234587e4..c4cac542 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.30.2" +version = "0.30.3" readme = "README.md" rust-version = "1.70" From 6ced433429bdc05691169ae9c200ecc9b31bd688 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 1 Nov 2023 11:45:00 +0300 Subject: [PATCH 126/319] rename const-generic to array_proxy --- .github/workflows/ci.yml | 2 +- CHANGELOG.md | 2 ++ ci/script.sh | 2 +- src/generate/device.rs | 4 ++-- src/generate/peripheral.rs | 4 ++-- src/main.rs | 6 +++--- src/util.rs | 4 ++-- 7 files changed, 13 insertions(+), 11 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 7aadf889..8d0ada18 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -75,7 +75,7 @@ jobs: - { rust: stable, vendor: Spansion, options: "--atomics" } - { rust: stable, vendor: STMicro, options: "" } - { rust: stable, vendor: STMicro, options: "--atomics" } - - { rust: stable, vendor: STM32-patched, options: "--strict --const_generic --pascal_enum_values --max_cluster_size --atomics --atomics_feature atomics" } + - { rust: stable, vendor: STM32-patched, options: "--strict --array_proxy --pascal_enum_values --max_cluster_size --atomics --atomics_feature atomics" } - { rust: stable, vendor: Toshiba, options: all } - { rust: stable, vendor: Toshiba, options: "" } # Test MSRV diff --git a/CHANGELOG.md b/CHANGELOG.md index 2137235d..6f29b9db 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- rename `const-generic` feature to `array_proxy` + ## [v0.30.3] - 2023-11-19 - Remove unstable lints diff --git a/ci/script.sh b/ci/script.sh index 707a497b..3ec8a3ae 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -31,7 +31,7 @@ main() { case $OPTIONS in all) - options="--const_generic --strict --atomics" + options="--array_proxy --strict --atomics" ;; *) options=$OPTIONS diff --git a/src/generate/device.rs b/src/generate/device.rs index 19818066..1c7bd1dd 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -157,7 +157,7 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Result Result Result<()> { .value_name("FEATURE"), ) .arg( - Arg::new("const_generic") - .long("const_generic") + Arg::new("array_proxy") + .long("array_proxy") .action(ArgAction::SetTrue) .help( - "Use const generics to generate writers for same fields with different offsets", + "Use ArrayProxy helper for non-sequential register arrays", ), ) .arg( diff --git a/src/util.rs b/src/util.rs index b6e62ccd..4ccb6f4c 100644 --- a/src/util.rs +++ b/src/util.rs @@ -36,7 +36,7 @@ pub struct Config { #[cfg_attr(feature = "serde", serde(default))] pub make_mod: bool, #[cfg_attr(feature = "serde", serde(default))] - pub const_generic: bool, + pub array_proxy: bool, #[cfg_attr(feature = "serde", serde(default))] pub ignore_groups: bool, #[cfg_attr(feature = "serde", serde(default))] @@ -114,7 +114,7 @@ impl Default for Config { atomics_feature: None, generic_mod: false, make_mod: false, - const_generic: false, + array_proxy: false, ignore_groups: false, keep_list: false, strict: false, From 22e97d341284b0c2262d3dac1575b8b54dd55604 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 1 Nov 2023 10:40:05 +0300 Subject: [PATCH 127/319] reexport features --- CHANGELOG.md | 1 + src/generate/device.rs | 73 ++++++++++++++++++++++-------------------- src/main.rs | 12 +++++++ src/util.rs | 6 ++++ 4 files changed, 58 insertions(+), 34 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 6f29b9db..8b9b52f2 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Add `reexport_core_peripherals` and `reexport_interrupt` features disabled by default - rename `const-generic` feature to `array_proxy` ## [v0.30.3] - 2023-11-19 diff --git a/src/generate/device.rs b/src/generate/device.rs index 1c7bd1dd..b61036f7 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -103,46 +103,51 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result { + if config.reexport_core_peripherals { + let fpu = fpu_present.then(|| quote!(FPU,)); + out.extend(quote! { + pub use cortex_m::peripheral::Peripherals as CorePeripherals; + pub use cortex_m::peripheral::{ + CBP, CPUID, DCB, DWT, FPB, #fpu ITM, MPU, NVIC, SCB, SYST, TPIU, + }; + }); + } - if fpu_present { - out.extend(quote! { - pub use cortex_m::peripheral::{ - CBP, CPUID, DCB, DWT, FPB, FPU, ITM, MPU, NVIC, SCB, SYST, TPIU, - }; - }); - } else { - out.extend(quote! { - pub use cortex_m::peripheral::{ - CBP, CPUID, DCB, DWT, FPB, ITM, MPU, NVIC, SCB, SYST, TPIU, - }; - }); + if config.reexport_interrupt { + out.extend(quote! { + #[cfg(feature = "rt")] + pub use cortex_m_rt::interrupt; + #[cfg(feature = "rt")] + pub use self::Interrupt as interrupt; + }); + } } - } - if config.target == Target::Msp430 { - out.extend(quote! { + Target::Msp430 => { // XXX: Are there any core peripherals, really? Requires bump of msp430 crate. // pub use msp430::peripheral::Peripherals as CorePeripherals; - #[cfg(feature = "rt")] - pub use msp430_rt::interrupt; - #[cfg(feature = "rt")] - pub use self::Interrupt as interrupt; - }); - } + if config.reexport_interrupt { + out.extend(quote! { + #[cfg(feature = "rt")] + pub use msp430_rt::interrupt; + #[cfg(feature = "rt")] + pub use self::Interrupt as interrupt; + }); + } + } - if config.target == Target::Mips { - out.extend(quote! { - #[cfg(feature = "rt")] - pub use mips_rt::interrupt; - }); + Target::Mips => { + if config.reexport_interrupt { + out.extend(quote! { + #[cfg(feature = "rt")] + pub use mips_rt::interrupt; + }); + } + } + + _ => {} } let generic_file = include_str!("generic.rs"); diff --git a/src/main.rs b/src/main.rs index a03a198d..f7e527e9 100755 --- a/src/main.rs +++ b/src/main.rs @@ -163,6 +163,18 @@ fn run() -> Result<()> { .long("source_type") .help("Specify file/stream format"), ) + .arg( + Arg::new("reexport_core_peripherals") + .long("reexport_core_peripherals") + .action(ArgAction::SetTrue) + .help("For Cortex-M target reexport peripherals from cortex-m crate"), + ) + .arg( + Arg::new("reexport_interrupt") + .long("reexport_interrupt") + .action(ArgAction::SetTrue) + .help("Reexport interrupt macro from cortex-m-rt like crates"), + ) .arg( Arg::new("log_level") .long("log") diff --git a/src/util.rs b/src/util.rs index 4ccb6f4c..ddddddca 100644 --- a/src/util.rs +++ b/src/util.rs @@ -65,6 +65,10 @@ pub struct Config { pub log_level: Option, #[cfg_attr(feature = "serde", serde(default))] pub interrupt_link_section: Option, + #[cfg_attr(feature = "serde", serde(default))] + pub reexport_core_peripherals: bool, + #[cfg_attr(feature = "serde", serde(default))] + pub reexport_interrupt: bool, } #[derive(Clone, Debug, PartialEq, Eq)] @@ -129,6 +133,8 @@ impl Default for Config { source_type: SourceType::default(), log_level: None, interrupt_link_section: None, + reexport_core_peripherals: false, + reexport_interrupt: false, } } } From d7a5e5d255b0d821f97fd5e556280eda33f1bb7f Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 18 Oct 2023 07:37:26 +0300 Subject: [PATCH 128/319] writer offset as a struct field --- CHANGELOG.md | 4 ++ src/generate/generic.rs | 108 ++++++++++++++++++++++++++------------- src/generate/register.rs | 82 ++++++++++++++--------------- 3 files changed, 115 insertions(+), 79 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 6f29b9db..45383d31 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -8,6 +8,10 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] - rename `const-generic` feature to `array_proxy` +- `FieldWriter` takes offset as struct field instead of const generic. + Improves SVD field array access + Add `width`, `offset` methods +- *breaking change* Always numerates field arrays from 0 ## [v0.30.3] - 2023-11-19 diff --git a/src/generate/generic.rs b/src/generate/generic.rs index afc7e2fa..c34c2324 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -304,16 +304,17 @@ pub mod raw { } } - pub struct FieldWriter<'a, REG, const WI: u8, const O: u8, FI = u8, Safety = Unsafe> + pub struct FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> where REG: Writable + RegisterSpec, FI: FieldSpec, { pub(crate) w: &'a mut W, + pub(crate) o: u8, _field: marker::PhantomData<(FI, Safety)>, } - impl<'a, REG, const WI: u8, const O: u8, FI, Safety> FieldWriter<'a, REG, WI, O, FI, Safety> + impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety> where REG: Writable + RegisterSpec, FI: FieldSpec, @@ -321,24 +322,26 @@ pub mod raw { /// Creates a new instance of the writer #[allow(unused)] #[inline(always)] - pub(crate) fn new(w: &'a mut W) -> Self { + pub(crate) fn new(w: &'a mut W, o: u8) -> Self { Self { w, + o, _field: marker::PhantomData, } } } - pub struct BitWriter<'a, REG, const O: u8, FI = bool, M = BitM> + pub struct BitWriter<'a, REG, FI = bool, M = BitM> where REG: Writable + RegisterSpec, bool: From, { pub(crate) w: &'a mut W, + pub(crate) o: u8, _field: marker::PhantomData<(FI, M)>, } - impl<'a, REG, const O: u8, FI, M> BitWriter<'a, REG, O, FI, M> + impl<'a, REG, FI, M> BitWriter<'a, REG, FI, M> where REG: Writable + RegisterSpec, bool: From, @@ -346,9 +349,10 @@ pub mod raw { /// Creates a new instance of the writer #[allow(unused)] #[inline(always)] - pub(crate) fn new(w: &'a mut W) -> Self { + pub(crate) fn new(w: &'a mut W, o: u8) -> Self { Self { w, + o, _field: marker::PhantomData, } } @@ -447,13 +451,11 @@ pub struct Safe; pub struct Unsafe; /// Write field Proxy with unsafe `bits` -pub type FieldWriter<'a, REG, const WI: u8, const O: u8, FI = u8> = - raw::FieldWriter<'a, REG, WI, O, FI, Unsafe>; +pub type FieldWriter<'a, REG, const WI: u8, FI = u8> = raw::FieldWriter<'a, REG, WI, FI, Unsafe>; /// Write field Proxy with safe `bits` -pub type FieldWriterSafe<'a, REG, const WI: u8, const O: u8, FI = u8> = - raw::FieldWriter<'a, REG, WI, O, FI, Safe>; +pub type FieldWriterSafe<'a, REG, const WI: u8, FI = u8> = raw::FieldWriter<'a, REG, WI, FI, Safe>; -impl<'a, REG, const WI: u8, const OF: u8, FI> FieldWriter<'a, REG, WI, OF, FI> +impl<'a, REG, const WI: u8, FI> FieldWriter<'a, REG, WI, FI> where REG: Writable + RegisterSpec, FI: FieldSpec, @@ -462,6 +464,18 @@ where /// Field width pub const WIDTH: u8 = WI; + /// Field width + #[inline(always)] + pub const fn width(&self) -> u8 { + WI + } + + /// Field offset + #[inline(always)] + pub const fn offset(&self) -> u8 { + self.o + } + /// Writes raw bits to the field /// /// # Safety @@ -469,8 +483,8 @@ where /// Passing incorrect value can cause undefined behaviour. See reference manual #[inline(always)] pub unsafe fn bits(self, value: FI::Ux) -> &'a mut W { - self.w.bits &= !(REG::Ux::mask::() << OF); - self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << OF; + self.w.bits &= !(REG::Ux::mask::() << self.o); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << self.o; self.w } /// Writes `variant` to the field @@ -480,7 +494,7 @@ where } } -impl<'a, REG, const WI: u8, const OF: u8, FI> FieldWriterSafe<'a, REG, WI, OF, FI> +impl<'a, REG, const WI: u8, FI> FieldWriterSafe<'a, REG, WI, FI> where REG: Writable + RegisterSpec, FI: FieldSpec, @@ -489,11 +503,23 @@ where /// Field width pub const WIDTH: u8 = WI; + /// Field width + #[inline(always)] + pub const fn width(&self) -> u8 { + WI + } + + /// Field offset + #[inline(always)] + pub const fn offset(&self) -> u8 { + self.o + } + /// Writes raw bits to the field #[inline(always)] pub fn bits(self, value: FI::Ux) -> &'a mut W { - self.w.bits &= !(REG::Ux::mask::() << OF); - self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << OF; + self.w.bits &= !(REG::Ux::mask::() << self.o); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << self.o; self.w } /// Writes `variant` to the field @@ -509,9 +535,9 @@ macro_rules! bit_proxy { pub struct $mwv; /// Bit-wise write field proxy - pub type $writer<'a, REG, const O: u8, FI = bool> = raw::BitWriter<'a, REG, O, FI, $mwv>; + pub type $writer<'a, REG, FI = bool> = raw::BitWriter<'a, REG, FI, $mwv>; - impl<'a, REG, const OF: u8, FI> $writer<'a, REG, OF, FI> + impl<'a, REG, FI> $writer<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -519,11 +545,23 @@ macro_rules! bit_proxy { /// Field width pub const WIDTH: u8 = 1; + /// Field width + #[inline(always)] + pub const fn width(&self) -> u8 { + 1 + } + + /// Field offset + #[inline(always)] + pub const fn offset(&self) -> u8 { + self.o + } + /// Writes bit to the field #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); - self.w.bits |= (REG::Ux::from(value) & REG::Ux::one()) << OF; + self.w.bits &= !(REG::Ux::one() << self.o); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::one()) << self.o; self.w } /// Writes `variant` to the field @@ -543,7 +581,7 @@ bit_proxy!(BitWriter0S, Bit0S); bit_proxy!(BitWriter1T, Bit1T); bit_proxy!(BitWriter0T, Bit0T); -impl<'a, REG, const OF: u8, FI> BitWriter<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -551,18 +589,18 @@ where /// Sets the field bit #[inline(always)] pub fn set_bit(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << OF; + self.w.bits |= REG::Ux::one() << self.o; self.w } /// Clears the field bit #[inline(always)] pub fn clear_bit(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter1S<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter1S<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -570,12 +608,12 @@ where /// Sets the field bit #[inline(always)] pub fn set_bit(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << OF; + self.w.bits |= REG::Ux::one() << self.o; self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter0C<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter0C<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -583,12 +621,12 @@ where /// Clears the field bit #[inline(always)] pub fn clear_bit(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter1C<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter1C<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -596,12 +634,12 @@ where ///Clears the field bit by passing one #[inline(always)] pub fn clear_bit_by_one(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << OF; + self.w.bits |= REG::Ux::one() << self.o; self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter0S<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter0S<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -609,12 +647,12 @@ where ///Sets the field bit by passing zero #[inline(always)] pub fn set_bit_by_zero(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter1T<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter1T<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -622,12 +660,12 @@ where ///Toggle the field bit by passing one #[inline(always)] pub fn toggle_bit(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << OF; + self.w.bits |= REG::Ux::one() << self.o; self.w } } -impl<'a, REG, const OF: u8, FI> BitWriter0T<'a, REG, OF, FI> +impl<'a, REG, FI> BitWriter0T<'a, REG, FI> where REG: Writable + RegisterSpec, bool: From, @@ -635,7 +673,7 @@ where ///Toggle the field bit by passing zero #[inline(always)] pub fn toggle_bit(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << OF); + self.w.bits &= !(REG::Ux::one() << self.o); self.w } } diff --git a/src/generate/register.rs b/src/generate/register.rs index 43431e59..7206be50 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -859,20 +859,23 @@ pub fn fields( if let Field::Array(_, de) = &f { let increment = de.dim_increment; - let doc = &util::replace_suffix(&description, &brief_suffix); - if let Some(range) = de.indexes_as_range() { - let first = *range.start(); + let doc = util::replace_suffix(&description, &brief_suffix); + + let array_doc = + format!("{doc}\n\nNOTE: `n` is number of field in register starting from 0"); + let offset_calc = calculate_offset(increment, offset, true); + let value = quote! { ((self.bits >> #offset_calc) & #hexmask) #cast }; + let dim = util::unsuffixed(de.dim as _); + r_impl_items.extend(quote! { + #[doc = #array_doc] + #inline + pub fn #name_snake_case(&self, n: u8) -> #reader_ty { + #[allow(clippy::no_effect)] + [(); #dim][n as usize]; + #reader_ty::new ( #value ) + } + }); - let offset_calc = calculate_offset(first, increment, offset, true); - let value = quote! { ((self.bits >> #offset_calc) & #hexmask) #cast }; - r_impl_items.extend(quote! { - #[doc = #doc] - #inline - pub unsafe fn #name_snake_case(&self, n: u8) -> #reader_ty { - #reader_ty::new ( #value ) - } - }); - } for fi in crate::svd::field::expand(&f, de) { let sub_offset = fi.bit_offset() as u64; let value = if sub_offset != 0 { @@ -1024,9 +1027,9 @@ pub fn fields( span, ); if value_write_ty == "bool" { - quote! { crate::#wproxy<'a, REG, O> } + quote! { crate::#wproxy<'a, REG> } } else { - quote! { crate::#wproxy<'a, REG, O, #value_write_ty> } + quote! { crate::#wproxy<'a, REG, #value_write_ty> } } } else { let wproxy = Ident::new( @@ -1039,14 +1042,14 @@ pub fn fields( ); let width = &util::unsuffixed(width as _); if value_write_ty == "u8" { - quote! { crate::#wproxy<'a, REG, #width, O> } + quote! { crate::#wproxy<'a, REG, #width> } } else { - quote! { crate::#wproxy<'a, REG, #width, O, #value_write_ty> } + quote! { crate::#wproxy<'a, REG, #width, #value_write_ty> } } }; mod_items.extend(quote! { #[doc = #field_writer_brief] - pub type #writer_ty<'a, REG, const O: u8> = #proxy; + pub type #writer_ty<'a, REG> = #proxy; }); } @@ -1054,7 +1057,7 @@ pub fn fields( if !proxy_items.is_empty() { mod_items.extend(if width == 1 { quote! { - impl<'a, REG, const O: u8> #writer_ty<'a, REG, O> + impl<'a, REG> #writer_ty<'a, REG> where REG: crate::Writable + crate::RegisterSpec, { @@ -1063,7 +1066,7 @@ pub fn fields( } } else { quote! { - impl<'a, REG, const O: u8> #writer_ty<'a, REG, O> + impl<'a, REG> #writer_ty<'a, REG> where REG: crate::Writable + crate::RegisterSpec, REG::Ux: From<#fty> @@ -1109,13 +1112,18 @@ pub fn fields( } if let Field::Array(_, de) = &f { + let increment = de.dim_increment; + let offset_calc = calculate_offset(increment, offset, false); let doc = &util::replace_suffix(&description, &brief_suffix); + let dim = util::unsuffixed(de.dim as _); w_impl_items.extend(quote! { #[doc = #doc] #inline #[must_use] - pub unsafe fn #name_snake_case(&mut self) -> #writer_ty<#regspec_ident, O> { - #writer_ty::new(self) + pub fn #name_snake_case(&mut self, n: u8) -> #writer_ty<#regspec_ident> { + #[allow(clippy::no_effect)] + [(); #dim][n as usize]; + #writer_ty::new(self, #offset_calc) } }); @@ -1133,8 +1141,8 @@ pub fn fields( #[doc = #doc] #inline #[must_use] - pub fn #name_snake_case_n(&mut self) -> #writer_ty<#regspec_ident, #sub_offset> { - #writer_ty::new(self) + pub fn #name_snake_case_n(&mut self) -> #writer_ty<#regspec_ident> { + #writer_ty::new(self, #sub_offset) } }); } @@ -1145,8 +1153,8 @@ pub fn fields( #[doc = #doc] #inline #[must_use] - pub fn #name_snake_case(&mut self) -> #writer_ty<#regspec_ident, #offset> { - #writer_ty::new(self) + pub fn #name_snake_case(&mut self) -> #writer_ty<#regspec_ident> { + #writer_ty::new(self, #offset) } }); } @@ -1328,31 +1336,17 @@ fn add_from_variants( } } -fn calculate_offset( - first: u32, - increment: u32, - offset: u64, - with_parentheses: bool, -) -> TokenStream { - let mut res = if first != 0 { - let first = util::unsuffixed(first as u64); - quote! { n - #first } - } else { - quote! { n } - }; +fn calculate_offset(increment: u32, offset: u64, with_parentheses: bool) -> TokenStream { + let mut res = quote! { n }; if increment != 1 { let increment = util::unsuffixed(increment as u64); - res = if first != 0 { - quote! { (#res) * #increment } - } else { - quote! { #res * #increment } - }; + res = quote! { #res * #increment }; } if offset != 0 { let offset = &util::unsuffixed(offset); res = quote! { #res + #offset }; } - let single_ident = (first == 0) && (increment == 1) && (offset == 0); + let single_ident = (increment == 1) && (offset == 0); if with_parentheses && !single_ident { quote! { (#res) } } else { From 7980b265f57a3f8c6d5712508fffb971161aa288 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 19 Nov 2023 21:41:39 +0300 Subject: [PATCH 129/319] more docs --- src/generate/generic.rs | 2 +- src/generate/register.rs | 19 +++++++++++-------- 2 files changed, 12 insertions(+), 9 deletions(-) diff --git a/src/generate/generic.rs b/src/generate/generic.rs index c34c2324..186d3364 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -548,7 +548,7 @@ macro_rules! bit_proxy { /// Field width #[inline(always)] pub const fn width(&self) -> u8 { - 1 + Self::WIDTH } /// Field offset diff --git a/src/generate/register.rs b/src/generate/register.rs index 7206be50..b0c3a247 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -1,5 +1,5 @@ use crate::svd::{ - Access, BitRange, DimElement, EnumeratedValues, Field, MaybeArray, ModifiedWriteValues, + self, Access, BitRange, DimElement, EnumeratedValues, Field, MaybeArray, ModifiedWriteValues, ReadAction, Register, RegisterProperties, Usage, WriteConstraint, }; use core::u64; @@ -857,12 +857,12 @@ pub fn fields( } } - if let Field::Array(_, de) = &f { + if let Field::Array(f, de) = &f { let increment = de.dim_increment; let doc = util::replace_suffix(&description, &brief_suffix); - + let first_name = svd::array::names(f, de).next().unwrap(); let array_doc = - format!("{doc}\n\nNOTE: `n` is number of field in register starting from 0"); + format!("{doc}\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `{first_name}` field"); let offset_calc = calculate_offset(increment, offset, true); let value = quote! { ((self.bits >> #offset_calc) & #hexmask) #cast }; let dim = util::unsuffixed(de.dim as _); @@ -876,7 +876,7 @@ pub fn fields( } }); - for fi in crate::svd::field::expand(&f, de) { + for fi in svd::field::expand(&f, de) { let sub_offset = fi.bit_offset() as u64; let value = if sub_offset != 0 { let sub_offset = &util::unsuffixed(sub_offset); @@ -1111,13 +1111,16 @@ pub fn fields( } } - if let Field::Array(_, de) = &f { + if let Field::Array(f, de) = &f { let increment = de.dim_increment; let offset_calc = calculate_offset(increment, offset, false); let doc = &util::replace_suffix(&description, &brief_suffix); + let first_name = svd::array::names(f, de).next().unwrap(); + let array_doc = + format!("{doc}\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `{first_name}` field"); let dim = util::unsuffixed(de.dim as _); w_impl_items.extend(quote! { - #[doc = #doc] + #[doc = #array_doc] #inline #[must_use] pub fn #name_snake_case(&mut self, n: u8) -> #writer_ty<#regspec_ident> { @@ -1127,7 +1130,7 @@ pub fn fields( } }); - for fi in crate::svd::field::expand(&f, de) { + for fi in svd::field::expand(&f, de) { let sub_offset = fi.bit_offset() as u64; let name_snake_case_n = &fi.name.to_snake_case_ident(Span::call_site()); let doc = description_with_bits( From d1dc966a220a3f2308b479917eb45d8696a2e7da Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 20 Nov 2023 07:52:54 +0300 Subject: [PATCH 130/319] remove deny lints --- .github/workflows/ci.yml | 1 + CHANGELOG.md | 1 + ci/script.sh | 27 +++++++++++++++++++++++---- src/generate/device.rs | 14 -------------- 4 files changed, 25 insertions(+), 18 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 8d0ada18..ceeef43b 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -105,6 +105,7 @@ jobs: VENDOR: ${{ matrix.vendor }} OPTIONS: ${{ matrix.options }} COMMAND: check + RUST_TOOLCHAIN: ${{ matrix.rust }} run: bash ci/script.sh ci-clippy: diff --git a/CHANGELOG.md b/CHANGELOG.md index 752e1565..4fbe5add 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Remove all deny lints from generated crate - Add `reexport_core_peripherals` and `reexport_interrupt` features disabled by default - rename `const-generic` feature to `array_proxy` - `FieldWriter` takes offset as struct field instead of const generic. diff --git a/ci/script.sh b/ci/script.sh index 3ec8a3ae..043e9f70 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -40,14 +40,33 @@ main() { # test crate cargo init --name foo $td - echo 'cortex-m = "0.7.7"' >> $td/Cargo.toml + echo 'cortex-m = "0.7.7"' >> $td/Cargo.toml echo 'cortex-m-rt = "0.7.3"' >> $td/Cargo.toml - echo 'vcell = "0.1.3"' >> $td/Cargo.toml + echo 'vcell = "0.1.3"' >> $td/Cargo.toml if [[ "$options" == *"--atomics"* ]]; then echo 'portable-atomic = { version = "1.4", default-features = false }' >> $td/Cargo.toml fi - echo '[profile.dev]' >> $td/Cargo.toml - echo 'incremental = false' >> $td/Cargo.toml + echo '[profile.dev]' >> $td/Cargo.toml + echo 'incremental = false' >> $td/Cargo.toml + + echo '[lints.rust]' >> $td/Cargo.toml + echo 'dead_code = "deny"' >> $td/Cargo.toml + echo 'improper_ctypes = "deny"' >> $td/Cargo.toml + echo 'missing_docs = "deny"' >> $td/Cargo.toml + echo 'no_mangle_generic_items = "deny"' >> $td/Cargo.toml + echo 'non_shorthand_field_patterns = "deny"' >> $td/Cargo.toml + echo 'overflowing_literals = "deny"' >> $td/Cargo.toml + echo 'path_statements = "deny"' >> $td/Cargo.toml + echo 'patterns_in_fns_without_body = "deny"' >> $td/Cargo.toml + echo 'unconditional_recursion = "deny"' >> $td/Cargo.toml + echo 'unused_allocation = "deny"' >> $td/Cargo.toml + echo 'unused_comparisons = "deny"' >> $td/Cargo.toml + echo 'unused_parens = "deny"' >> $td/Cargo.toml + echo 'while_true = "deny"' >> $td/Cargo.toml + if [[ "$RUST_TOOLCHAIN" == *"nightly"* ]]; then + echo 'private_bounds = "deny"' >> $td/Cargo.toml + echo 'private_interfaces = "deny"' >> $td/Cargo.toml + fi case $VENDOR in Atmel) diff --git a/src/generate/device.rs b/src/generate/device.rs index b61036f7..35e71da9 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -51,20 +51,6 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Date: Mon, 20 Nov 2023 09:53:09 +0300 Subject: [PATCH 131/319] fix -D missing_docs --- Cargo.lock | 138 ++++++++++++++++++++++----------------------------- ci/script.sh | 2 +- src/util.rs | 2 + 3 files changed, 62 insertions(+), 80 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index fd06b07c..19db8b06 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -4,9 +4,9 @@ version = 3 [[package]] name = "aho-corasick" -version = "1.1.1" +version = "1.1.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ea5d730647d4fadd988536d06fecce94b7b4f2a7efdae548f1cf4b63205518ab" +checksum = "b2969dcb958b36655471fc61f7e416fa76033bdd4bfed0678d8fee1e2d07a1f0" dependencies = [ "memchr", ] @@ -79,9 +79,9 @@ checksum = "96d30a06541fbafbc7f82ed10c06164cfbd2c401138f6addd8404629c4b16711" [[package]] name = "bitflags" -version = "2.4.0" +version = "2.4.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b4682ae6287fcf752ecaabbfcc7b6f9b72aa33933dc23a554d853aea8eea8635" +checksum = "327762f6e5a765692301e5bb513e0d9fef63be86bbc14528052b1cd3e6f03e07" [[package]] name = "blake2b_simd" @@ -94,29 +94,20 @@ dependencies = [ "constant_time_eq", ] -[[package]] -name = "cc" -version = "1.0.83" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f1174fb0b6ec23863f8b971027804a42614e347eafb0a95bf0b12cdae21fc4d0" -dependencies = [ - "libc", -] - [[package]] name = "clap" -version = "4.4.6" +version = "4.4.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d04704f56c2cde07f43e8e2c154b43f216dc5c92fc98ada720177362f953b956" +checksum = "2275f18819641850fa26c89acc84d465c1bf91ce57bc2748b28c420473352f64" dependencies = [ "clap_builder", ] [[package]] name = "clap_builder" -version = "4.4.6" +version = "4.4.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0e231faeaca65ebd1ea3c737966bf858971cd38c3849107aa3ea7de90a804e45" +checksum = "07cdf1b148b25c1e1f7a42225e30a0d99a615cd4637eae7365548dd4529b95bc" dependencies = [ "anstream", "anstyle", @@ -126,9 +117,9 @@ dependencies = [ [[package]] name = "clap_lex" -version = "0.5.1" +version = "0.6.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "cd7cc57abe963c6d3b9d8be5b06ba7c8957a930305ca90304f24ef040aa6f961" +checksum = "702fc72eb24e5a1e48ce58027a675bc24edd52096d5397d4aea7c6dd9eca0bd1" [[package]] name = "colorchoice" @@ -210,9 +201,9 @@ dependencies = [ [[package]] name = "env_logger" -version = "0.10.0" +version = "0.10.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "85cdab6a89accf66733ad5a1693a4dcced6aeff64602b634530dd73c1f3ee9f0" +checksum = "95b3f3e67048839cb0d0781f445682a35113da7121f7c949db0e2be96a4fbece" dependencies = [ "humantime", "is-terminal", @@ -229,25 +220,14 @@ checksum = "5443807d6dff69373d433ab9ef5378ad8df50ca6298caf15de6e52e24aaf54d5" [[package]] name = "errno" -version = "0.3.3" +version = "0.3.7" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "136526188508e25c6fef639d7927dfb3e0e3084488bf202267829cf7fc23dbdd" +checksum = "f258a7194e7f7c2a7837a8913aeab7fd8c383457034fa20ce4dd3dcb813e8eb8" dependencies = [ - "errno-dragonfly", "libc", "windows-sys", ] -[[package]] -name = "errno-dragonfly" -version = "0.1.2" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "aa68f1b12764fab894d2755d2518754e71b4fd80ecfb822714a1206c2aab39bf" -dependencies = [ - "cc", - "libc", -] - [[package]] name = "fnv" version = "1.0.7" @@ -256,9 +236,9 @@ checksum = "3f9eec918d3f24069decb9af1554cad7c880e2da24a9afd88aca000531ab82c1" [[package]] name = "hashbrown" -version = "0.14.1" +version = "0.14.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7dfda62a12f55daeae5015f81b0baea145391cb4520f86c248fc615d72640d12" +checksum = "f93e7192158dbcda357bdec5fb5788eebf8bbac027f3f33e719d29135ae84156" [[package]] name = "hermit-abi" @@ -289,9 +269,9 @@ checksum = "b9e0384b61958566e926dc50660321d12159025e767c18e043daf26b70104c39" [[package]] name = "indexmap" -version = "2.0.2" +version = "2.1.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8adf3ddd720272c6ea8bf59463c04e0f93d0bbf7c5439b691bca2987e0270897" +checksum = "d530e1a18b1cb4c484e6e34556a0d948706958449fca0cab753d649f2bce3d1f" dependencies = [ "equivalent", "hashbrown", @@ -338,15 +318,15 @@ checksum = "af150ab688ff2122fcef229be89cb50dd66af9e01a4ff320cc137eecc9bacc38" [[package]] name = "libc" -version = "0.2.148" +version = "0.2.150" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "9cdc71e17332e86d2e1d38c1f99edcb6288ee11b815fb1a4b049eaa2114d369b" +checksum = "89d92a4743f9a61002fae18374ed11e7973f530cb3a3255fb354818118b2203c" [[package]] name = "linux-raw-sys" -version = "0.4.8" +version = "0.4.11" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3852614a3bd9ca9804678ba6be5e3b8ce76dfc902cae004e3e0c44051b6e88db" +checksum = "969488b55f8ac402214f3f5fd243ebb7206cf82de60d3172994707a4bcc2b829" [[package]] name = "log" @@ -356,9 +336,9 @@ checksum = "b5e6163cb8c49088c2c36f57875e58ccd8c87c7427f7fbd50ea6710b2f3f2e8f" [[package]] name = "memchr" -version = "2.6.3" +version = "2.6.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8f232d6ef707e1956a43342693d2a31e72989554d58299d7a88738cc95b0d35c" +checksum = "f665ee40bc4a3c5590afb1e9677db74a508659dfd71e126420da8274909a0167" [[package]] name = "once_cell" @@ -368,9 +348,9 @@ checksum = "dd8b5dd2ae5ed71462c540258bedcb51965123ad7e7ccf4b9a8cafaa4a63576d" [[package]] name = "proc-macro2" -version = "1.0.67" +version = "1.0.69" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3d433d9f1a3e8c1263d9456598b16fec66f4acc9a74dacffd35c7bb09b3a1328" +checksum = "134c189feb4956b20f6f547d2cf727d4c0fe06722b20a0eec87ed445a97f92da" dependencies = [ "unicode-ident", ] @@ -386,9 +366,9 @@ dependencies = [ [[package]] name = "regex" -version = "1.9.6" +version = "1.10.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ebee201405406dbf528b8b672104ae6d6d63e6d118cb10e4d51abbc7b58044ff" +checksum = "380b951a9c5e80ddfd6136919eef32310721aa4aacd4889a8d39124b026ab343" dependencies = [ "aho-corasick", "memchr", @@ -398,9 +378,9 @@ dependencies = [ [[package]] name = "regex-automata" -version = "0.3.9" +version = "0.4.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "59b23e92ee4318893fa3fe3e6fb365258efbfe6ac6ab30f090cdcbb7aa37efa9" +checksum = "5f804c7828047e88b2d32e2d7fe5a105da8ee3264f01902f796c8e067dc2483f" dependencies = [ "aho-corasick", "memchr", @@ -409,9 +389,9 @@ dependencies = [ [[package]] name = "regex-syntax" -version = "0.7.5" +version = "0.8.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "dbb5fb1acd8a1a18b3dd5be62d25485eb770e05afb408a9627d14d451bae12da" +checksum = "c08c74e62047bb2de4ff487b251e4a92e24f48745648451635cec7d591162d9f" [[package]] name = "roxmltree" @@ -424,9 +404,9 @@ dependencies = [ [[package]] name = "rustix" -version = "0.38.15" +version = "0.38.25" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d2f9da0cbd88f9f09e7814e388301c8414c51c62aa6ce1e4b5c551d49d96e531" +checksum = "dc99bc2d4f1fed22595588a013687477aedf3cdcfb26558c559edb67b4d9b22e" dependencies = [ "bitflags", "errno", @@ -443,29 +423,29 @@ checksum = "1ad4cc8da4ef723ed60bced201181d83791ad433213d8c24efffda1eec85d741" [[package]] name = "serde" -version = "1.0.188" +version = "1.0.192" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "cf9e0fcba69a370eed61bcf2b728575f726b50b55cba78064753d708ddc7549e" +checksum = "bca2a08484b285dcb282d0f67b26cadc0df8b19f8c12502c13d966bf9482f001" dependencies = [ "serde_derive", ] [[package]] name = "serde_derive" -version = "1.0.188" +version = "1.0.192" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4eca7ac642d82aa35b60049a6eccb4be6be75e599bd2e9adb5f875a737654af2" +checksum = "d6c7207fbec9faa48073f3e3074cbe553af6ea512d7c21ba46e434e70ea9fbc1" dependencies = [ "proc-macro2", "quote", - "syn 2.0.37", + "syn 2.0.39", ] [[package]] name = "serde_json" -version = "1.0.107" +version = "1.0.108" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6b420ce6e3d8bd882e9b243c6eed35dbc9a6110c9769e74b584e0d68d1f20c65" +checksum = "3d1c7e3eac408d115102c4c24ad393e0821bb3a5df4d506a80f85f7a742a526b" dependencies = [ "itoa", "ryu", @@ -474,18 +454,18 @@ dependencies = [ [[package]] name = "serde_spanned" -version = "0.6.3" +version = "0.6.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "96426c9936fd7a0124915f9185ea1d20aa9445cc9821142f0a73bc9207a2e186" +checksum = "12022b835073e5b11e90a14f86838ceb1c8fb0325b72416845c487ac0fa95e80" dependencies = [ "serde", ] [[package]] name = "serde_yaml" -version = "0.9.25" +version = "0.9.27" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1a49e178e4452f45cb61d0cd8cebc1b0fafd3e41929e996cef79aa3aca91f574" +checksum = "3cc7a1570e38322cfe4154732e5110f887ea57e22b76f4bfd32b5bdd3368666c" dependencies = [ "indexmap", "itoa", @@ -543,7 +523,7 @@ dependencies = [ "serde_yaml", "svd-parser", "svd-rs", - "syn 2.0.37", + "syn 2.0.39", "thiserror", ] @@ -560,9 +540,9 @@ dependencies = [ [[package]] name = "syn" -version = "2.0.37" +version = "2.0.39" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7303ef2c05cd654186cb250d29049a24840ca25d2747c25c0381c8d9e2f582e8" +checksum = "23e78b90f2fcf45d3e842032ce32e3f2d1545ba6636271dcbf24fa306d87be7a" dependencies = [ "proc-macro2", "quote", @@ -571,31 +551,31 @@ dependencies = [ [[package]] name = "termcolor" -version = "1.3.0" +version = "1.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6093bad37da69aab9d123a8091e4be0aa4a03e4d601ec641c327398315f62b64" +checksum = "ff1bc3d3f05aff0403e8ac0d92ced918ec05b666a43f83297ccef5bea8a3d449" dependencies = [ "winapi-util", ] [[package]] name = "thiserror" -version = "1.0.49" +version = "1.0.50" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1177e8c6d7ede7afde3585fd2513e611227efd6481bd78d2e82ba1ce16557ed4" +checksum = "f9a7210f5c9a7156bb50aa36aed4c95afb51df0df00713949448cf9e97d382d2" dependencies = [ "thiserror-impl", ] [[package]] name = "thiserror-impl" -version = "1.0.49" +version = "1.0.50" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "10712f02019e9288794769fba95cd6847df9874d49d871d062172f9dd41bc4cc" +checksum = "266b2e40bc00e5a6c09c3584011e08b06f123c00362c92b975ba9843aaaa14b8" dependencies = [ "proc-macro2", "quote", - "syn 2.0.37", + "syn 2.0.39", ] [[package]] @@ -612,9 +592,9 @@ dependencies = [ [[package]] name = "toml_datetime" -version = "0.6.3" +version = "0.6.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7cda73e2f1397b1262d6dfdcef8aafae14d1de7748d66822d3bfeeb6d03e5e4b" +checksum = "3550f4e9685620ac18a50ed434eb3aec30db8ba93b0287467bca5826ea25baf1" dependencies = [ "serde", ] @@ -755,9 +735,9 @@ checksum = "ed94fce61571a4006852b7389a063ab983c02eb1bb37b47f8272ce92d06d9538" [[package]] name = "winnow" -version = "0.5.15" +version = "0.5.19" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7c2e3184b9c4e92ad5167ca73039d0c42476302ab603e2fec4487511f38ccefc" +checksum = "829846f3e3db426d4cee4510841b71a8e58aa2a76b1132579487ae430ccd9c7b" dependencies = [ "memchr", ] diff --git a/ci/script.sh b/ci/script.sh index 043e9f70..1fa85c73 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -39,7 +39,7 @@ main() { esac # test crate - cargo init --name foo $td + cargo init --lib --name foo $td echo 'cortex-m = "0.7.7"' >> $td/Cargo.toml echo 'cortex-m-rt = "0.7.3"' >> $td/Cargo.toml echo 'vcell = "0.1.3"' >> $td/Cargo.toml diff --git a/src/util.rs b/src/util.rs index ddddddca..221fd64f 100644 --- a/src/util.rs +++ b/src/util.rs @@ -552,6 +552,8 @@ impl U32Ext for u32 { pub fn build_rs() -> TokenStream { quote! { + //! Builder file for Peripheral access crate generated by svd2rust tool + use std::env; use std::fs::File; use std::io::Write; From 41c3914104c3cbbb963fc22d1fb753d41ea6930f Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 20 Nov 2023 14:00:08 +0300 Subject: [PATCH 132/319] fix rust_toolchain --- ci/script.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ci/script.sh b/ci/script.sh index 1fa85c73..84aaafe8 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -63,7 +63,7 @@ main() { echo 'unused_comparisons = "deny"' >> $td/Cargo.toml echo 'unused_parens = "deny"' >> $td/Cargo.toml echo 'while_true = "deny"' >> $td/Cargo.toml - if [[ "$RUST_TOOLCHAIN" == *"nightly"* ]]; then + if [[ "${RUST_TOOLCHAIN:-}" == *"nightly"* ]]; then echo 'private_bounds = "deny"' >> $td/Cargo.toml echo 'private_interfaces = "deny"' >> $td/Cargo.toml fi From e44c8d098a58abae4cf13b1bfce0b185370ee945 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 30 Oct 2022 12:01:47 +0300 Subject: [PATCH 133/319] accessors --- src/generate/peripheral.rs | 43 +++++++++++++++++++++++++------------- 1 file changed, 29 insertions(+), 14 deletions(-) diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index a963f5a1..41241469 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -287,9 +287,8 @@ pub struct ArrayAccessor { pub i: syn::LitInt, } -impl ArrayAccessor { - pub fn to_tokens(&self, method: bool) -> TokenStream { - let parens = method.then(|| quote! {()}); +impl ToTokens for ArrayAccessor { + fn to_tokens(&self, tokens: &mut TokenStream) { let doc = &self.doc; let name = &self.name; let ty = &self.ty; @@ -299,9 +298,10 @@ impl ArrayAccessor { #[doc = #doc] #[inline(always)] pub fn #name(&self) -> &#ty { - &self.#basename #parens[#i] + &self.#basename()[#i] } } + .to_tokens(tokens); } } @@ -592,11 +592,11 @@ fn register_or_cluster_block( reg_block_field.offset, ®_block_field.description, ); + let name = ®_block_field.syn_field.ident; + let ty = ®_block_field.syn_field.ty; + let offset = reg_block_field.offset as usize; if is_region_a_union { - let name = ®_block_field.syn_field.ident; - let ty = ®_block_field.syn_field.ty; - let offset = reg_block_field.offset as usize; accessors.extend(quote! { #[doc = #comment] #[inline(always)] @@ -611,13 +611,17 @@ fn register_or_cluster_block( reg_block_field.syn_field.to_tokens(&mut region_rbfs); Punct::new(',', Spacing::Alone).to_tokens(&mut region_rbfs); + accessors.extend(quote! { + #[doc = #comment] + #[inline(always)] + pub fn #name(&self) -> &#ty { + &self.#name + } + }); + } + for a in ®_block_field.accessors { + a.to_tokens(&mut accessors); } - accessors.extend( - reg_block_field - .accessors - .iter() - .map(|a| a.to_tokens(is_region_a_union)), - ); } if !is_region_a_union { @@ -1421,9 +1425,20 @@ fn cluster_block( fn new_syn_field(ident: Ident, ty: syn::Type) -> syn::Field { let span = Span::call_site(); + let mut segments = Punctuated::new(); + segments.push(path_segment(Ident::new("crate", span))); + let crate_path = syn::Path { + leading_colon: None, + segments, + }; syn::Field { ident: Some(ident), - vis: syn::Visibility::Public(Token![pub](span)), + vis: syn::Visibility::Restricted(syn::VisRestricted { + pub_token: Token![pub](span), + paren_token: Default::default(), + in_token: None, + path: Box::new(crate_path), + }), attrs: vec![], colon_token: Some(Token![:](span)), ty, From bc2e3f800e983b6812f2a6fa1453c712a5cc4181 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 20 Nov 2023 20:36:27 +0300 Subject: [PATCH 134/319] refactor --- src/generate/interrupt.rs | 4 +- src/generate/peripheral.rs | 330 ++++++++++++++++++++++++++++--------- src/generate/register.rs | 22 +-- src/util.rs | 4 +- 4 files changed, 269 insertions(+), 91 deletions(-) diff --git a/src/generate/interrupt.rs b/src/generate/interrupt.rs index 6629f2d3..9f1fa408 100644 --- a/src/generate/interrupt.rs +++ b/src/generate/interrupt.rs @@ -67,7 +67,7 @@ pub fn render( .unwrap_or_else(|| interrupt.0.name.clone()) ); - let value = util::unsuffixed(interrupt.0.value.into()); + let value = util::unsuffixed(interrupt.0.value); let mut feature_attribute_flag = false; let mut feature_attribute = TokenStream::new(); @@ -111,7 +111,7 @@ pub fn render( names_cfg_attr.push(feature_attribute); } - let n = util::unsuffixed(pos.into()); + let n = util::unsuffixed(pos); match target { Target::CortexM => { for name in &names { diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 41241469..51d3d12c 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -7,7 +7,7 @@ use svd_parser::expand::{ }; use crate::svd::{ - Cluster, ClusterInfo, MaybeArray, Peripheral, Register, RegisterCluster, RegisterInfo, + self, Cluster, ClusterInfo, MaybeArray, Peripheral, Register, RegisterCluster, RegisterInfo, }; use log::{debug, trace, warn}; use proc_macro2::{Ident, Punct, Spacing, Span, TokenStream}; @@ -74,7 +74,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result match &p { Peripheral::Array(p, dim) => { let mut snake_names = Vec::with_capacity(dim.dim as _); - for pi in crate::svd::peripheral::expand(p, dim) { + for pi in svd::peripheral::expand(p, dim) { let name = &pi.name; let description = pi.description.as_deref().unwrap_or(&p.name); let name_str = name.to_sanitized_constant_case(); @@ -278,27 +278,166 @@ impl fmt::Display for DeriveInfo { } } +#[derive(Clone, Debug)] +pub enum Accessor { + Array(ArrayAccessor), + RawArray(RawArrayAccessor), + ArrayElem(ArrayElemAccessor), +} + +impl ToTokens for Accessor { + fn to_tokens(&self, tokens: &mut TokenStream) { + match self { + Self::Array(a) => a.to_tokens(tokens), + Self::RawArray(a) => a.to_tokens(tokens), + Self::ArrayElem(a) => a.to_tokens(tokens), + } + } +} + +impl From for Accessor { + fn from(value: ArrayAccessor) -> Self { + Self::Array(value) + } +} + +impl From for Accessor { + fn from(value: RawArrayAccessor) -> Self { + Self::RawArray(value) + } +} + +impl From for Accessor { + fn from(value: ArrayElemAccessor) -> Self { + Self::ArrayElem(value) + } +} + +#[derive(Clone, Debug)] +pub struct RawAccessor { + pub doc: String, + pub name: Ident, + pub ty: syn::Type, + pub offset: syn::LitInt, +} + +impl ToTokens for RawAccessor { + fn to_tokens(&self, tokens: &mut TokenStream) { + let Self { + doc, + name, + ty, + offset, + } = self; + quote! { + #[doc = #doc] + #[inline(always)] + pub const fn #name(&self) -> &#ty { + unsafe { &*(self as *const Self).cast::().add(#offset).cast() } + } + } + .to_tokens(tokens); + } +} + +#[derive(Clone, Debug)] +pub struct FieldAccessor { + pub doc: String, + pub name: Ident, + pub ty: syn::Type, +} + +impl ToTokens for FieldAccessor { + fn to_tokens(&self, tokens: &mut TokenStream) { + let Self { doc, name, ty } = self; + quote! { + #[doc = #doc] + #[inline(always)] + pub const fn #name(&self) -> &#ty { + &self.#name + } + } + .to_tokens(tokens); + } +} + #[derive(Clone, Debug)] pub struct ArrayAccessor { pub doc: String, pub name: Ident, pub ty: syn::Type, +} + +impl ToTokens for ArrayAccessor { + fn to_tokens(&self, tokens: &mut TokenStream) { + let Self { doc, name, ty } = self; + quote! { + #[doc = #doc] + #[inline(always)] + pub const fn #name(&self, n: usize) -> &#ty { + &self.#name[n] + } + } + .to_tokens(tokens); + } +} + +#[derive(Clone, Debug)] +pub struct RawArrayAccessor { + pub doc: String, + pub name: Ident, + pub ty: syn::Type, + pub offset: syn::LitInt, + pub dim: syn::LitInt, + pub increment: syn::LitInt, +} + +impl ToTokens for RawArrayAccessor { + fn to_tokens(&self, tokens: &mut TokenStream) { + let Self { + doc, + name, + ty, + offset, + dim, + increment, + } = self; + quote! { + #[doc = #doc] + #[inline(always)] + pub const fn #name(&self, n: usize) -> &#ty { + #[allow(clippy::no_effect)] + [(); #dim][n]; + unsafe { &*(self as *const Self).cast::().add(#offset).add(#increment * n).cast() } + } + } + .to_tokens(tokens); + } +} + +#[derive(Clone, Debug)] +pub struct ArrayElemAccessor { + pub doc: String, + pub name: Ident, + pub ty: syn::Type, pub basename: Ident, pub i: syn::LitInt, } -impl ToTokens for ArrayAccessor { +impl ToTokens for ArrayElemAccessor { fn to_tokens(&self, tokens: &mut TokenStream) { - let doc = &self.doc; - let name = &self.name; - let ty = &self.ty; - let basename = &self.basename; - let i = &self.i; + let Self { + doc, + name, + ty, + basename, + i, + } = &self; quote! { #[doc = #doc] #[inline(always)] - pub fn #name(&self) -> &#ty { - &self.#basename()[#i] + pub const fn #name(&self) -> &#ty { + &self.#basename(#i) } } .to_tokens(tokens); @@ -311,7 +450,7 @@ struct RegisterBlockField { description: String, offset: u32, size: u32, - accessors: Vec, + accessors: Vec, } #[derive(Clone, Debug)] @@ -587,37 +726,31 @@ fn register_or_cluster_block( let is_region_a_union = region.is_union(); for reg_block_field in ®ion.rbfs { - let comment = make_comment( + let doc = make_comment( reg_block_field.size, reg_block_field.offset, ®_block_field.description, ); - let name = ®_block_field.syn_field.ident; - let ty = ®_block_field.syn_field.ty; - let offset = reg_block_field.offset as usize; + let name = reg_block_field.syn_field.ident.clone().unwrap(); + let ty = reg_block_field.syn_field.ty.clone(); + let offset = unsuffixed(reg_block_field.offset); if is_region_a_union { - accessors.extend(quote! { - #[doc = #comment] - #[inline(always)] - pub const fn #name(&self) -> &#ty { - unsafe { &*(self as *const Self).cast::().add(#offset).cast() } - } - }); + RawAccessor { + doc, + name, + ty, + offset, + } + .to_tokens(&mut accessors); } else { region_rbfs.extend(quote! { - #[doc = #comment] + #[doc = #doc] }); reg_block_field.syn_field.to_tokens(&mut region_rbfs); Punct::new(',', Spacing::Alone).to_tokens(&mut region_rbfs); - accessors.extend(quote! { - #[doc = #comment] - #[inline(always)] - pub fn #name(&self) -> &#ty { - &self.#name - } - }); + FieldAccessor { doc, name, ty }.to_tokens(&mut accessors); } for a in ®_block_field.accessors { a.to_tokens(&mut accessors); @@ -1080,58 +1213,80 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result::with_capacity((array_info.dim + 1) as _); + accessors.push(if array_convertible { + ArrayAccessor { + doc: comment, + name: nb_name_sc.clone(), + ty: ty.clone(), + } + .into() } else { - let mut accessors = Vec::new(); - for (i, ci) in crate::svd::cluster::expand(info, array_info).enumerate() { + RawArrayAccessor { + doc: comment, + name: nb_name_sc.clone(), + ty: ty.clone(), + offset: unsuffixed(info.address_offset), + dim: unsuffixed(array_info.dim), + increment: unsuffixed(array_info.dim_increment), + } + .into() + }); + if !sequential_indexes_from0 { + for (i, ci) in svd::cluster::expand(info, array_info).enumerate() { let idx_name = ci.name.to_snake_case_ident(span); let comment = make_comment( cluster_size, ci.address_offset, ci.description.as_deref().unwrap_or(&ci.name), ); - let i = unsuffixed(i as _); - accessors.push(ArrayAccessor { - doc: comment, - name: idx_name, - ty: ty.clone(), - basename: nb_name_sc.clone(), - i, - }); + let i = unsuffixed(i as u64); + accessors.push( + ArrayElemAccessor { + doc: comment, + name: idx_name, + ty: ty.clone(), + basename: nb_name_sc.clone(), + i, + } + .into(), + ); } - accessors + } + let syn_field = if array_convertible { + let array_ty = new_syn_array(ty, array_info.dim); + new_syn_field(nb_name_sc, array_ty) + } else { + // Include a ZST ArrayProxy giving indexed access to the + // elements. + let ap_path = array_proxy_type(ty, array_info); + new_syn_field(ty_name.to_snake_case_ident(Span::call_site()), ap_path) }; - let array_ty = new_syn_array(ty, array_info.dim); cluster_expanded.push(RegisterBlockField { - syn_field: new_syn_field(nb_name_sc, array_ty), + syn_field, description, offset: info.address_offset, - size: cluster_size * array_info.dim, + size: if array_convertible { + cluster_size * array_info.dim + } else { + 0 + }, accessors, }); - } else if sequential_indexes_from0 && config.array_proxy { - // Include a ZST ArrayProxy giving indexed access to the - // elements. - let ap_path = array_proxy_type(ty, array_info); - let syn_field = - new_syn_field(ty_name.to_snake_case_ident(Span::call_site()), ap_path); - cluster_expanded.push(RegisterBlockField { - syn_field, - description: info.description.as_ref().unwrap_or(&info.name).into(), - offset: info.address_offset, - size: 0, - accessors: Vec::new(), - }); } else { - for ci in crate::svd::cluster::expand(info, array_info) { + for ci in svd::cluster::expand(info, array_info) { let syn_field = new_syn_field(ci.name.to_snake_case_ident(Span::call_site()), ty.clone()); @@ -1233,11 +1388,32 @@ fn expand_register( } else { ty_name.to_snake_case_ident(span) }; - let accessors = if sequential_indexes_from0 { - Vec::new() + let comment = make_comment( + register_size * array_info.dim, + info.address_offset, + &description, + ); + let mut accessors = Vec::::with_capacity((array_info.dim + 1) as _); + accessors.push(if array_convertible { + ArrayAccessor { + doc: comment, + name: nb_name_sc.clone(), + ty: ty.clone(), + } + .into() } else { - let mut accessors = Vec::new(); - for (i, ri) in crate::svd::register::expand(info, array_info).enumerate() { + RawArrayAccessor { + doc: comment, + name: nb_name_sc.clone(), + ty: ty.clone(), + offset: unsuffixed(info.address_offset), + dim: unsuffixed(array_info.dim), + increment: unsuffixed(array_info.dim_increment), + } + .into() + }); + if !sequential_indexes_from0 { + for (i, ri) in svd::register::expand(info, array_info).enumerate() { let idx_name = util::fullname(&ri.name, &info.alternate_group, config.ignore_groups) .to_snake_case_ident(span); @@ -1246,16 +1422,18 @@ fn expand_register( ri.address_offset, ri.description.as_deref().unwrap_or(&ri.name), ); - let i = unsuffixed(i as _); - accessors.push(ArrayAccessor { - doc: comment, - name: idx_name, - ty: ty.clone(), - basename: nb_name_sc.clone(), - i, - }); + let i = unsuffixed(i as u64); + accessors.push( + ArrayElemAccessor { + doc: comment, + name: idx_name, + ty: ty.clone(), + basename: nb_name_sc.clone(), + i, + } + .into(), + ); } - accessors }; let array_ty = if array_convertible { new_syn_array(ty, array_info.dim) @@ -1275,7 +1453,7 @@ fn expand_register( accessors, }); } else { - for ri in crate::svd::register::expand(info, array_info) { + for ri in svd::register::expand(info, array_info) { let syn_field = new_syn_field(ri.name.to_snake_case_ident(Span::call_site()), ty.clone()); @@ -1448,6 +1626,6 @@ fn new_syn_field(ident: Ident, ty: syn::Type) -> syn::Field { fn new_syn_array(ty: syn::Type, len: u32) -> syn::Type { let span = Span::call_site(); - let len = unsuffixed(len as _); + let len = unsuffixed(len); syn::parse_quote_spanned!( span => [#ty; #len] ) } diff --git a/src/generate/register.rs b/src/generate/register.rs index b0c3a247..f863fddd 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -14,7 +14,7 @@ use svd_parser::expand::{ }; use crate::util::{ - self, ident_to_path, path_segment, replace_suffix, type_path, Config, FullName, + self, ident_to_path, path_segment, replace_suffix, type_path, unsuffixed, Config, FullName, ToSanitizedCase, U32Ext, }; use anyhow::{anyhow, Result}; @@ -646,7 +646,7 @@ pub fn fields( quote! { as #fty } }; let value = if offset != 0 { - let offset = &util::unsuffixed(offset); + let offset = &unsuffixed(offset); quote! { (self.bits >> #offset) } } else { quote! { self.bits } @@ -865,7 +865,7 @@ pub fn fields( format!("{doc}\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `{first_name}` field"); let offset_calc = calculate_offset(increment, offset, true); let value = quote! { ((self.bits >> #offset_calc) & #hexmask) #cast }; - let dim = util::unsuffixed(de.dim as _); + let dim = unsuffixed(de.dim); r_impl_items.extend(quote! { #[doc = #array_doc] #inline @@ -879,7 +879,7 @@ pub fn fields( for fi in svd::field::expand(&f, de) { let sub_offset = fi.bit_offset() as u64; let value = if sub_offset != 0 { - let sub_offset = &util::unsuffixed(sub_offset); + let sub_offset = &unsuffixed(sub_offset); quote! { (self.bits >> #sub_offset) } } else { quote! { self.bits } @@ -1040,7 +1040,7 @@ pub fn fields( }, span, ); - let width = &util::unsuffixed(width as _); + let width = &unsuffixed(width); if value_write_ty == "u8" { quote! { crate::#wproxy<'a, REG, #width> } } else { @@ -1118,7 +1118,7 @@ pub fn fields( let first_name = svd::array::names(f, de).next().unwrap(); let array_doc = format!("{doc}\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `{first_name}` field"); - let dim = util::unsuffixed(de.dim as _); + let dim = unsuffixed(de.dim); w_impl_items.extend(quote! { #[doc = #array_doc] #inline @@ -1138,7 +1138,7 @@ pub fn fields( sub_offset, width, ); - let sub_offset = util::unsuffixed(sub_offset); + let sub_offset = unsuffixed(sub_offset); w_impl_items.extend(quote! { #[doc = #doc] @@ -1151,7 +1151,7 @@ pub fn fields( } } else { let doc = description_with_bits(description_raw, offset, width); - let offset = util::unsuffixed(offset); + let offset = unsuffixed(offset); w_impl_items.extend(quote! { #[doc = #doc] #inline @@ -1301,7 +1301,7 @@ fn add_from_variants( for v in variants.iter().map(|v| { let desc = util::escape_special_chars(&util::respace(&format!("{}: {}", v.value, v.doc))); let pcv = &v.pc; - let pcval = &util::unsuffixed(v.value); + let pcval = &unsuffixed(v.value); quote! { #[doc = #desc] #pcv = #pcval, @@ -1342,11 +1342,11 @@ fn add_from_variants( fn calculate_offset(increment: u32, offset: u64, with_parentheses: bool) -> TokenStream { let mut res = quote! { n }; if increment != 1 { - let increment = util::unsuffixed(increment as u64); + let increment = unsuffixed(increment); res = quote! { #res * #increment }; } if offset != 0 { - let offset = &util::unsuffixed(offset); + let offset = &unsuffixed(offset); res = quote! { #res + #offset }; } let single_ident = (increment == 1) && (offset == 0); diff --git a/src/util.rs b/src/util.rs index 221fd64f..c5e85e42 100644 --- a/src/util.rs +++ b/src/util.rs @@ -400,8 +400,8 @@ pub fn hex(n: u64) -> LitInt { } /// Turns `n` into an unsuffixed token -pub fn unsuffixed(n: u64) -> LitInt { - LitInt::new(&n.to_string(), Span::call_site()) +pub fn unsuffixed(n: impl Into) -> LitInt { + LitInt::new(&n.into().to_string(), Span::call_site()) } pub fn unsuffixed_or_bool(n: u64, width: u32) -> Lit { From 035150f3f9e7f707cfea8108d785d02b99ba2a72 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 20 Nov 2023 21:50:25 +0300 Subject: [PATCH 135/319] fix --- src/generate/peripheral.rs | 288 +++++++--------------------- src/generate/peripheral/accessor.rs | 212 ++++++++++++++++++++ 2 files changed, 285 insertions(+), 215 deletions(-) create mode 100644 src/generate/peripheral/accessor.rs diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 51d3d12c..528110f4 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -22,6 +22,9 @@ use anyhow::{anyhow, bail, Context, Result}; use crate::generate::register; +mod accessor; +use accessor::*; + pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result { let mut out = TokenStream::new(); @@ -278,176 +281,9 @@ impl fmt::Display for DeriveInfo { } } -#[derive(Clone, Debug)] -pub enum Accessor { - Array(ArrayAccessor), - RawArray(RawArrayAccessor), - ArrayElem(ArrayElemAccessor), -} - -impl ToTokens for Accessor { - fn to_tokens(&self, tokens: &mut TokenStream) { - match self { - Self::Array(a) => a.to_tokens(tokens), - Self::RawArray(a) => a.to_tokens(tokens), - Self::ArrayElem(a) => a.to_tokens(tokens), - } - } -} - -impl From for Accessor { - fn from(value: ArrayAccessor) -> Self { - Self::Array(value) - } -} - -impl From for Accessor { - fn from(value: RawArrayAccessor) -> Self { - Self::RawArray(value) - } -} - -impl From for Accessor { - fn from(value: ArrayElemAccessor) -> Self { - Self::ArrayElem(value) - } -} - -#[derive(Clone, Debug)] -pub struct RawAccessor { - pub doc: String, - pub name: Ident, - pub ty: syn::Type, - pub offset: syn::LitInt, -} - -impl ToTokens for RawAccessor { - fn to_tokens(&self, tokens: &mut TokenStream) { - let Self { - doc, - name, - ty, - offset, - } = self; - quote! { - #[doc = #doc] - #[inline(always)] - pub const fn #name(&self) -> &#ty { - unsafe { &*(self as *const Self).cast::().add(#offset).cast() } - } - } - .to_tokens(tokens); - } -} - -#[derive(Clone, Debug)] -pub struct FieldAccessor { - pub doc: String, - pub name: Ident, - pub ty: syn::Type, -} - -impl ToTokens for FieldAccessor { - fn to_tokens(&self, tokens: &mut TokenStream) { - let Self { doc, name, ty } = self; - quote! { - #[doc = #doc] - #[inline(always)] - pub const fn #name(&self) -> &#ty { - &self.#name - } - } - .to_tokens(tokens); - } -} - -#[derive(Clone, Debug)] -pub struct ArrayAccessor { - pub doc: String, - pub name: Ident, - pub ty: syn::Type, -} - -impl ToTokens for ArrayAccessor { - fn to_tokens(&self, tokens: &mut TokenStream) { - let Self { doc, name, ty } = self; - quote! { - #[doc = #doc] - #[inline(always)] - pub const fn #name(&self, n: usize) -> &#ty { - &self.#name[n] - } - } - .to_tokens(tokens); - } -} - -#[derive(Clone, Debug)] -pub struct RawArrayAccessor { - pub doc: String, - pub name: Ident, - pub ty: syn::Type, - pub offset: syn::LitInt, - pub dim: syn::LitInt, - pub increment: syn::LitInt, -} - -impl ToTokens for RawArrayAccessor { - fn to_tokens(&self, tokens: &mut TokenStream) { - let Self { - doc, - name, - ty, - offset, - dim, - increment, - } = self; - quote! { - #[doc = #doc] - #[inline(always)] - pub const fn #name(&self, n: usize) -> &#ty { - #[allow(clippy::no_effect)] - [(); #dim][n]; - unsafe { &*(self as *const Self).cast::().add(#offset).add(#increment * n).cast() } - } - } - .to_tokens(tokens); - } -} - -#[derive(Clone, Debug)] -pub struct ArrayElemAccessor { - pub doc: String, - pub name: Ident, - pub ty: syn::Type, - pub basename: Ident, - pub i: syn::LitInt, -} - -impl ToTokens for ArrayElemAccessor { - fn to_tokens(&self, tokens: &mut TokenStream) { - let Self { - doc, - name, - ty, - basename, - i, - } = &self; - quote! { - #[doc = #doc] - #[inline(always)] - pub const fn #name(&self) -> &#ty { - &self.#basename(#i) - } - } - .to_tokens(tokens); - } -} - #[derive(Clone, Debug)] struct RegisterBlockField { syn_field: syn::Field, - description: String, offset: u32, size: u32, accessors: Vec, @@ -726,33 +562,17 @@ fn register_or_cluster_block( let is_region_a_union = region.is_union(); for reg_block_field in ®ion.rbfs { - let doc = make_comment( - reg_block_field.size, - reg_block_field.offset, - ®_block_field.description, - ); - let name = reg_block_field.syn_field.ident.clone().unwrap(); - let ty = reg_block_field.syn_field.ty.clone(); - let offset = unsuffixed(reg_block_field.offset); - if is_region_a_union { - RawAccessor { - doc, - name, - ty, - offset, - } - .to_tokens(&mut accessors); + reg_block_field.accessors[0] + .clone() + .raw() + .to_tokens(&mut accessors); } else { - region_rbfs.extend(quote! { - #[doc = #doc] - }); - reg_block_field.syn_field.to_tokens(&mut region_rbfs); Punct::new(',', Spacing::Alone).to_tokens(&mut region_rbfs); - FieldAccessor { doc, name, ty }.to_tokens(&mut accessors); + reg_block_field.accessors[0].to_tokens(&mut accessors); } - for a in ®_block_field.accessors { + for a in ®_block_field.accessors[1..] { a.to_tokens(&mut accessors); } } @@ -1178,13 +998,20 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result { - let syn_field = new_syn_field(info.name.to_snake_case_ident(Span::call_site()), ty); + let doc = make_comment(cluster_size, info.address_offset, &description); + let name: Ident = info.name.to_snake_case_ident(Span::call_site()); + let syn_field = new_syn_field(name.clone(), ty.clone()); cluster_expanded.push(RegisterBlockField { syn_field, - description, offset: info.address_offset, size: cluster_size, - accessors: Vec::new(), + accessors: vec![RegAccessor { + doc, + name, + ty, + offset: unsuffixed(info.address_offset), + } + .into()], }) } Cluster::Array(info, array_info) => { @@ -1220,7 +1047,7 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result Result::with_capacity((array_info.dim + 1) as _); accessors.push(if array_convertible { ArrayAccessor { - doc: comment, + doc, name: nb_name_sc.clone(), ty: ty.clone(), + offset: unsuffixed(info.address_offset), + dim: unsuffixed(array_info.dim), + increment: unsuffixed(array_info.dim_increment), } .into() } else { RawArrayAccessor { - doc: comment, + doc, name: nb_name_sc.clone(), ty: ty.clone(), offset: unsuffixed(info.address_offset), @@ -1247,7 +1077,7 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result Result Result Result { + let doc = make_comment(register_size, info.address_offset, &description); let ty = name_to_ty(&ty_name); - let syn_field = new_syn_field(ty_name.to_snake_case_ident(Span::call_site()), ty); + let name = ty_name.to_snake_case_ident(Span::call_site()); + let syn_field = new_syn_field(name.clone(), ty.clone()); register_expanded.push(RegisterBlockField { syn_field, - description, offset: info.address_offset, size: register_size, - accessors: Vec::new(), + accessors: vec![RegAccessor { + doc, + name, + ty, + offset: unsuffixed(info.address_offset), + } + .into()], }) } Register::Array(info, array_info) => { @@ -1388,7 +1234,7 @@ fn expand_register( } else { ty_name.to_snake_case_ident(span) }; - let comment = make_comment( + let doc = make_comment( register_size * array_info.dim, info.address_offset, &description, @@ -1396,14 +1242,17 @@ fn expand_register( let mut accessors = Vec::::with_capacity((array_info.dim + 1) as _); accessors.push(if array_convertible { ArrayAccessor { - doc: comment, + doc, name: nb_name_sc.clone(), ty: ty.clone(), + offset: unsuffixed(info.address_offset), + dim: unsuffixed(array_info.dim), + increment: unsuffixed(array_info.dim_increment), } .into() } else { RawArrayAccessor { - doc: comment, + doc, name: nb_name_sc.clone(), ty: ty.clone(), offset: unsuffixed(info.address_offset), @@ -1417,7 +1266,7 @@ fn expand_register( let idx_name = util::fullname(&ri.name, &info.alternate_group, config.ignore_groups) .to_snake_case_ident(span); - let comment = make_comment( + let doc = make_comment( register_size, ri.address_offset, ri.description.as_deref().unwrap_or(&ri.name), @@ -1425,7 +1274,7 @@ fn expand_register( let i = unsuffixed(i as u64); accessors.push( ArrayElemAccessor { - doc: comment, + doc, name: idx_name, ty: ty.clone(), basename: nb_name_sc.clone(), @@ -1443,7 +1292,6 @@ fn expand_register( let syn_field = new_syn_field(nb_name_sc, array_ty); register_expanded.push(RegisterBlockField { syn_field, - description, offset: info.address_offset, size: if array_convertible { register_size * array_info.dim @@ -1454,15 +1302,25 @@ fn expand_register( }); } else { for ri in svd::register::expand(info, array_info) { - let syn_field = - new_syn_field(ri.name.to_snake_case_ident(Span::call_site()), ty.clone()); + let doc = make_comment( + register_size, + info.address_offset, + ri.description.as_deref().unwrap_or(&ri.name), + ); + let name = ri.name.to_snake_case_ident(Span::call_site()); + let syn_field = new_syn_field(name.clone(), ty.clone()); register_expanded.push(RegisterBlockField { syn_field, - description: ri.description.unwrap_or(ri.name), offset: ri.address_offset, size: register_size, - accessors: Vec::new(), + accessors: vec![RegAccessor { + doc, + name, + ty: ty.clone(), + offset: unsuffixed(info.address_offset), + } + .into()], }); } } diff --git a/src/generate/peripheral/accessor.rs b/src/generate/peripheral/accessor.rs new file mode 100644 index 00000000..6acfc041 --- /dev/null +++ b/src/generate/peripheral/accessor.rs @@ -0,0 +1,212 @@ +use proc_macro2::{Ident, TokenStream}; +use quote::{quote, ToTokens}; + +#[derive(Clone, Debug)] +pub enum Accessor { + Reg(RegAccessor), + RawReg(RawRegAccessor), + Array(ArrayAccessor), + RawArray(RawArrayAccessor), + ArrayElem(ArrayElemAccessor), +} + +impl Accessor { + pub fn raw(self) -> Self { + match self { + Self::RawReg(_) | Self::RawArray(_) | Self::ArrayElem(_) => self, + Self::Reg(a) => RawRegAccessor { + doc: a.doc, + name: a.name, + ty: a.ty, + offset: a.offset, + } + .into(), + Self::Array(a) => RawArrayAccessor { + doc: a.doc, + name: a.name, + ty: a.ty, + offset: a.offset, + dim: a.dim, + increment: a.increment, + } + .into(), + } + } +} + +impl ToTokens for Accessor { + fn to_tokens(&self, tokens: &mut TokenStream) { + match self { + Self::Reg(a) => a.to_tokens(tokens), + Self::RawReg(a) => a.to_tokens(tokens), + Self::Array(a) => a.to_tokens(tokens), + Self::RawArray(a) => a.to_tokens(tokens), + Self::ArrayElem(a) => a.to_tokens(tokens), + } + } +} + +impl From for Accessor { + fn from(value: RegAccessor) -> Self { + Self::Reg(value) + } +} + +impl From for Accessor { + fn from(value: RawRegAccessor) -> Self { + Self::RawReg(value) + } +} + +impl From for Accessor { + fn from(value: ArrayAccessor) -> Self { + Self::Array(value) + } +} + +impl From for Accessor { + fn from(value: RawArrayAccessor) -> Self { + Self::RawArray(value) + } +} + +impl From for Accessor { + fn from(value: ArrayElemAccessor) -> Self { + Self::ArrayElem(value) + } +} + +#[derive(Clone, Debug)] +pub struct RegAccessor { + pub doc: String, + pub name: Ident, + pub ty: syn::Type, + pub offset: syn::LitInt, +} + +impl ToTokens for RegAccessor { + fn to_tokens(&self, tokens: &mut TokenStream) { + let Self { doc, name, ty, .. } = self; + quote! { + #[doc = #doc] + #[inline(always)] + pub const fn #name(&self) -> &#ty { + &self.#name + } + } + .to_tokens(tokens); + } +} + +#[derive(Clone, Debug)] +pub struct RawRegAccessor { + pub doc: String, + pub name: Ident, + pub ty: syn::Type, + pub offset: syn::LitInt, +} + +impl ToTokens for RawRegAccessor { + fn to_tokens(&self, tokens: &mut TokenStream) { + let Self { + doc, + name, + ty, + offset, + } = self; + quote! { + #[doc = #doc] + #[inline(always)] + pub const fn #name(&self) -> &#ty { + unsafe { &*(self as *const Self).cast::().add(#offset).cast() } + } + } + .to_tokens(tokens); + } +} + +#[derive(Clone, Debug)] +pub struct ArrayAccessor { + pub doc: String, + pub name: Ident, + pub ty: syn::Type, + pub offset: syn::LitInt, + pub dim: syn::LitInt, + pub increment: syn::LitInt, +} + +impl ToTokens for ArrayAccessor { + fn to_tokens(&self, tokens: &mut TokenStream) { + let Self { doc, name, ty, .. } = self; + quote! { + #[doc = #doc] + #[inline(always)] + pub const fn #name(&self, n: usize) -> &#ty { + &self.#name[n] + } + } + .to_tokens(tokens); + } +} + +#[derive(Clone, Debug)] +pub struct RawArrayAccessor { + pub doc: String, + pub name: Ident, + pub ty: syn::Type, + pub offset: syn::LitInt, + pub dim: syn::LitInt, + pub increment: syn::LitInt, +} + +impl ToTokens for RawArrayAccessor { + fn to_tokens(&self, tokens: &mut TokenStream) { + let Self { + doc, + name, + ty, + offset, + dim, + increment, + } = self; + quote! { + #[doc = #doc] + #[inline(always)] + pub const fn #name(&self, n: usize) -> &#ty { + #[allow(clippy::no_effect)] + [(); #dim][n]; + unsafe { &*(self as *const Self).cast::().add(#offset).add(#increment * n).cast() } + } + } + .to_tokens(tokens); + } +} + +#[derive(Clone, Debug)] +pub struct ArrayElemAccessor { + pub doc: String, + pub name: Ident, + pub ty: syn::Type, + pub basename: Ident, + pub i: syn::LitInt, +} + +impl ToTokens for ArrayElemAccessor { + fn to_tokens(&self, tokens: &mut TokenStream) { + let Self { + doc, + name, + ty, + basename, + i, + } = &self; + quote! { + #[doc = #doc] + #[inline(always)] + pub const fn #name(&self) -> &#ty { + &self.#basename(#i) + } + } + .to_tokens(tokens); + } +} From 213cc359db5dc303d88af90204c4f81bb4623fbb Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 20 Nov 2023 22:24:57 +0300 Subject: [PATCH 136/319] remove ArrayProxy --- .github/workflows/ci.yml | 2 +- CHANGELOG.md | 3 ++- ci/script.sh | 2 +- src/generate/array_proxy.rs | 46 ------------------------------------- src/generate/device.rs | 7 ------ src/generate/peripheral.rs | 19 +++++++-------- src/main.rs | 8 ------- src/util.rs | 37 ++++++----------------------- 8 files changed, 19 insertions(+), 105 deletions(-) delete mode 100644 src/generate/array_proxy.rs diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index ceeef43b..578962ab 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -75,7 +75,7 @@ jobs: - { rust: stable, vendor: Spansion, options: "--atomics" } - { rust: stable, vendor: STMicro, options: "" } - { rust: stable, vendor: STMicro, options: "--atomics" } - - { rust: stable, vendor: STM32-patched, options: "--strict --array_proxy --pascal_enum_values --max_cluster_size --atomics --atomics_feature atomics" } + - { rust: stable, vendor: STM32-patched, options: "--strict --pascal_enum_values --max_cluster_size --atomics --atomics_feature atomics" } - { rust: stable, vendor: Toshiba, options: all } - { rust: stable, vendor: Toshiba, options: "" } # Test MSRV diff --git a/CHANGELOG.md b/CHANGELOG.md index 4fbe5add..32331b34 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,9 +7,10 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Use methods to access any register or cluster - Remove all deny lints from generated crate - Add `reexport_core_peripherals` and `reexport_interrupt` features disabled by default -- rename `const-generic` feature to `array_proxy` +- ~~rename `const-generic` feature to `array_proxy`~~ remove `ArrayProxy` - `FieldWriter` takes offset as struct field instead of const generic. Improves SVD field array access Add `width`, `offset` methods diff --git a/ci/script.sh b/ci/script.sh index 84aaafe8..bba56cee 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -31,7 +31,7 @@ main() { case $OPTIONS in all) - options="--array_proxy --strict --atomics" + options="--strict --atomics" ;; *) options=$OPTIONS diff --git a/src/generate/array_proxy.rs b/src/generate/array_proxy.rs deleted file mode 100644 index c97adc5e..00000000 --- a/src/generate/array_proxy.rs +++ /dev/null @@ -1,46 +0,0 @@ -/// Access an array of `COUNT` items of type `T` with the items `STRIDE` bytes -/// apart. This is a zero-sized-type. No objects of this type are ever -/// actually created, it is only a convenience for wrapping pointer arithmetic. -/// -/// There is no safe way to produce items of this type. Unsafe code can produce -/// references by pointer casting. It is up to the unsafe code doing that, to -/// ensure that the memory really is backed by appropriate content. -/// -/// Typically, this is used for accessing hardware registers. -#[derive(Debug)] -pub struct ArrayProxy { - /// As well as providing a PhantomData, this field is non-public, and - /// therefore ensures that code outside of this module can never create - /// an ArrayProxy. - _array: marker::PhantomData, -} -#[allow(clippy::len_without_is_empty)] -impl ArrayProxy { - /// Get a reference from an [ArrayProxy] with no bounds checking. - pub const unsafe fn get_ref(&self, index: usize) -> &T { - &*(self as *const Self).cast::().add(S * index).cast() - } - /// Get a reference from an [ArrayProxy], or return `None` if the index - /// is out of bounds. - pub const fn get(&self, index: usize) -> Option<&T> { - if index < C { - Some(unsafe { self.get_ref(index) }) - } else { - None - } - } - /// Return the number of items. - pub const fn len(&self) -> usize { - C - } -} - -impl core::ops::Index for ArrayProxy { - type Output = T; - fn index(&self, index: usize) -> &T { - // Do a real array dereference for the bounds check. - #[allow(clippy::no_effect)] - [(); C][index]; - unsafe { self.get_ref(index) } - } -} diff --git a/src/generate/device.rs b/src/generate/device.rs index 35e71da9..713d6719 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -138,7 +138,6 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Result Result Result Result Result<()> { .action(ArgAction::Set) .value_name("FEATURE"), ) - .arg( - Arg::new("array_proxy") - .long("array_proxy") - .action(ArgAction::SetTrue) - .help( - "Use ArrayProxy helper for non-sequential register arrays", - ), - ) .arg( Arg::new("ignore_groups") .long("ignore_groups") diff --git a/src/util.rs b/src/util.rs index c5e85e42..4be04689 100644 --- a/src/util.rs +++ b/src/util.rs @@ -1,6 +1,6 @@ use std::borrow::Cow; -use crate::svd::{Access, Device, DimElement, Field, RegisterInfo, RegisterProperties}; +use crate::svd::{Access, Device, Field, RegisterInfo, RegisterProperties}; use html_escape::encode_text_minimal; use inflections::Inflect; use proc_macro2::{Ident, Span, TokenStream}; @@ -10,8 +10,7 @@ use std::path::{Path, PathBuf}; use svd_rs::{MaybeArray, Peripheral, PeripheralInfo}; use syn::{ - punctuated::Punctuated, token::PathSep, AngleBracketedGenericArguments, GenericArgument, Lit, - LitInt, PathArguments, PathSegment, Token, Type, TypePath, + punctuated::Punctuated, token::PathSep, Lit, LitInt, PathArguments, PathSegment, Type, TypePath, }; use anyhow::{anyhow, bail, Result}; @@ -36,8 +35,6 @@ pub struct Config { #[cfg_attr(feature = "serde", serde(default))] pub make_mod: bool, #[cfg_attr(feature = "serde", serde(default))] - pub array_proxy: bool, - #[cfg_attr(feature = "serde", serde(default))] pub ignore_groups: bool, #[cfg_attr(feature = "serde", serde(default))] pub keep_list: bool, @@ -118,7 +115,6 @@ impl Default for Config { atomics_feature: None, generic_mod: false, make_mod: false, - array_proxy: false, ignore_groups: false, keep_list: false, strict: false, @@ -419,30 +415,11 @@ pub fn new_syn_u32(len: u32, span: Span) -> syn::Expr { }) } -pub fn array_proxy_type(ty: Type, array_info: &DimElement) -> Type { - let span = Span::call_site(); - let inner_path = GenericArgument::Type(ty); - let mut args = Punctuated::new(); - args.push(inner_path); - args.push(GenericArgument::Const(new_syn_u32(array_info.dim, span))); - args.push(GenericArgument::Const(syn::Expr::Lit(syn::ExprLit { - attrs: Vec::new(), - lit: syn::Lit::Int(hex(array_info.dim_increment as u64)), - }))); - let arguments = PathArguments::AngleBracketed(AngleBracketedGenericArguments { - colon2_token: None, - lt_token: Token![<](span), - args, - gt_token: Token![>](span), - }); - - let mut segments = Punctuated::new(); - segments.push(path_segment(Ident::new("crate", span))); - segments.push(PathSegment { - ident: Ident::new("ArrayProxy", span), - arguments, - }); - Type::Path(type_path(segments)) +pub fn zst_type() -> Type { + Type::Tuple(syn::TypeTuple { + paren_token: syn::token::Paren::default(), + elems: Punctuated::new(), + }) } pub fn name_to_ty(name: &str) -> Type { From 8d4c36ecb4be063d4d070af5de5ea0f0f0cf77e3 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 20 Nov 2023 23:42:51 +0300 Subject: [PATCH 137/319] more accessors --- src/generate/peripheral.rs | 6 ++++-- src/lib.rs | 36 ++++++++++++++++++------------------ 2 files changed, 22 insertions(+), 20 deletions(-) diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 1f1a2a63..9b9694df 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -1015,6 +1015,7 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result { + let ends_with_index = info.name.ends_with("[%s]") || info.name.ends_with("%s"); let increment_bits = array_info.dim_increment * BITS_PER_BYTE; if cluster_size > increment_bits { let cname = &cluster.name; @@ -1074,7 +1075,7 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result { + let ends_with_index = info.name.ends_with("[%s]") || info.name.ends_with("%s"); let sequential_addresses = (array_info.dim == 1) || (register_size == array_info.dim_increment * BITS_PER_BYTE); let disjoint_sequential_addresses = (array_info.dim == 1) @@ -1258,7 +1260,7 @@ fn expand_register( } .into() }); - if !sequential_indexes_from0 { + if !sequential_indexes_from0 || !ends_with_index { for (i, ri) in svd::register::expand(info, array_info).enumerate() { let idx_name = util::fullname(&ri.name, &info.alternate_group, config.ignore_groups) diff --git a/src/lib.rs b/src/lib.rs index 62cf1948..56c3791c 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -171,7 +171,7 @@ //! //! ```ignore //! let mut peripherals = stm32f30x::Peripherals::take().unwrap(); -//! peripherals.GPIOA.odr.write(|w| w.bits(1)); +//! peripherals.GPIOA.odr().write(|w| w.bits(1)); //! ``` //! //! This method can only be successfully called *once* -- that's why the method returns an `Option`. @@ -195,7 +195,7 @@ //! impl PA0 { //! fn is_high(&self) -> bool { //! // NOTE(unsafe) actually safe because this is an atomic read with no side effects -//! unsafe { (*GPIOA::ptr()).idr.read().bits() & 1 != 0 } +//! unsafe { (*GPIOA::ptr()).idr().read().bits() & 1 != 0 } //! } //! //! fn is_low(&self) -> bool { @@ -315,7 +315,7 @@ //! //! ```ignore //! // is the SADD0 bit of the CR2 register set? -//! if i2c1.c2r.read().sadd0().bit() { +//! if i2c1.c2r().read().sadd0().bit() { //! // yes //! } else { //! // no @@ -330,7 +330,7 @@ //! Usage looks like this: //! //! ```ignore -//! if i2c1.c2r.write().reset() +//! if i2c1.c2r().write().reset() //! ``` //! //! ## `write` @@ -360,7 +360,7 @@ //! // Starting from the reset value, `0x0000_0000`, change the bitfields SADD0 //! // and SADD1 to `1` and `0b0011110` respectively and write that to the //! // register CR2. -//! i2c1.cr2.write(|w| unsafe { w.sadd0().bit(true).sadd1().bits(0b0011110) }); +//! i2c1.cr2().write(|w| unsafe { w.sadd0().bit(true).sadd1().bits(0b0011110) }); //! // NOTE ^ unsafe because you could be writing a reserved bit pattern into //! // the register. In this case, the SVD doesn't provide enough information to //! // check whether that's the case. @@ -383,10 +383,10 @@ //! //! ```ignore //! // Set the START bit to 1 while KEEPING the state of the other bits intact -//! i2c1.cr2.modify(|_, w| unsafe { w.start().bit(true) }); +//! i2c1.cr2().modify(|_, w| unsafe { w.start().bit(true) }); //! //! // TOGGLE the STOP bit, all the other bits will remain untouched -//! i2c1.cr2.modify(|r, w| w.stop().bit(!r.stop().bit())); +//! i2c1.cr2().modify(|r, w| w.stop().bit(!r.stop().bit())); //! ``` //! //! # enumeratedValues @@ -399,7 +399,7 @@ //! The new `read` API returns an enum that you can match: //! //! ```ignore -//! match gpioa.dir.read().pin0().variant() { +//! match gpioa.dir().read().pin0().variant() { //! gpioa::dir::PIN0_A::Input => { .. }, //! gpioa::dir::PIN0_A::Output => { .. }, //! } @@ -408,7 +408,7 @@ //! or test for equality //! //! ```ignore -//! if gpioa.dir.read().pin0().variant() == gpio::dir::PIN0_A::Input { +//! if gpioa.dir().read().pin0().variant() == gpio::dir::PIN0_A::Input { //! .. //! } //! ``` @@ -417,11 +417,11 @@ //! having to import the enum: //! //! ```ignore -//! if gpioa.dir.read().pin0().is_input() { +//! if gpioa.dir().read().pin0().is_input() { //! .. //! } //! -//! if gpioa.dir.read().pin0().is_output() { +//! if gpioa.dir().read().pin0().is_output() { //! .. //! } //! ``` @@ -429,7 +429,7 @@ //! The original `bits` method is available as well: //! //! ```ignore -//! if gpioa.dir.read().pin0().bits() == 0 { +//! if gpioa.dir().read().pin0().bits() == 0 { //! .. //! } //! ``` @@ -439,14 +439,14 @@ //! //! ```ignore //! // enum PIN0_A { Input, Output } -//! gpioa.dir.write(|w| w.pin0().variant(gpio::dir::PIN0_A::Output)); +//! gpioa.dir().write(|w| w.pin0().variant(gpio::dir::PIN0_A::Output)); //! ``` //! //! There are convenience methods to pick one of the variants without having to //! import the enum: //! //! ```ignore -//! gpioa.dir.write(|w| w.pin0().output()); +//! gpioa.dir().write(|w| w.pin0().output()); //! ``` //! //! The `bits` (or `bit`) method is still available but will become safe if it's @@ -454,7 +454,7 @@ //! //! ```ignore //! // safe because there are only two options: `0` or `1` -//! gpioa.dir.write(|w| w.pin0().bit(true)); +//! gpioa.dir().write(|w| w.pin0().bit(true)); //! ``` //! //! # Interrupt API @@ -513,9 +513,9 @@ //! //! ```ignore //! // These can be called from different contexts even though they are modifying the same register -//! P1.p1out.set_bits(|w| unsafe { w.bits(1 << 1) }); -//! P1.p1out.clear_bits(|w| unsafe { w.bits(!(1 << 2)) }); -//! P1.p1out.toggle_bits(|w| unsafe { w.bits(1 << 4) }); +//! P1.p1out().set_bits(|w| unsafe { w.bits(1 << 1) }); +//! P1.p1out().clear_bits(|w| unsafe { w.bits(!(1 << 2)) }); +//! P1.p1out().toggle_bits(|w| unsafe { w.bits(1 << 4) }); //! // if impl_debug was used one can print Registers or RegisterBlocks //! // print single register //! println!("RTC_CNT {:#?}", unsafe { &*esp32s3::RTC_CNTL::ptr() }.options0); From e4a4b05278a2571b698029cf9306f29d6f554897 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 21 Nov 2023 09:49:43 +0300 Subject: [PATCH 138/319] try make all fields private --- src/generate/peripheral.rs | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 9b9694df..e1e186e4 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -1460,20 +1460,9 @@ fn cluster_block( fn new_syn_field(ident: Ident, ty: syn::Type) -> syn::Field { let span = Span::call_site(); - let mut segments = Punctuated::new(); - segments.push(path_segment(Ident::new("crate", span))); - let crate_path = syn::Path { - leading_colon: None, - segments, - }; syn::Field { ident: Some(ident), - vis: syn::Visibility::Restricted(syn::VisRestricted { - pub_token: Token![pub](span), - paren_token: Default::default(), - in_token: None, - path: Box::new(crate_path), - }), + vis: syn::Visibility::Inherited, attrs: vec![], colon_token: Some(Token![:](span)), ty, From cfc5ab014bf613d6560c3f79cd20bda638144cd9 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 21 Nov 2023 10:04:34 +0300 Subject: [PATCH 139/319] docs example --- src/lib.rs | 49 ++++++++++++++++++++++++++++++------------------- 1 file changed, 30 insertions(+), 19 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index 56c3791c..a801d78d 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -223,29 +223,40 @@ //! /// Inter-integrated circuit //! pub mod i2c1 { //! /// Register block +//! #[repr(C)] //! pub struct RegisterBlock { +//! cr1: CR1, +//! cr2: CR2, +//! oar1: OAR1, +//! oar2: OAR2, +//! dr: DR, +//! } +//! impl RegisterBlock { //! /// 0x00 - Control register 1 -//! pub cr1: CR1, +//! #[inline(always)] +//! pub const fn cr1(&self) -> &CR1 { +//! &self.cr1 +//! } //! /// 0x04 - Control register 2 -//! pub cr2: CR2, +//! #[inline(always)] +//! pub const fn cr2(&self) -> &CR2 { +//! &self.cr2 +//! } //! /// 0x08 - Own address register 1 -//! pub oar1: OAR1, -//! /// 0x0c - Own address register 2 -//! pub oar2: OAR2, -//! /// 0x10 - Timing register -//! pub timingr: TIMINGR, -//! /// Status register 1 -//! pub timeoutr: TIMEOUTR, -//! /// Interrupt and Status register -//! pub isr: ISR, -//! /// 0x1c - Interrupt clear register -//! pub icr: ICR, -//! /// 0x20 - PEC register -//! pub pecr: PECR, -//! /// 0x24 - Receive data register -//! pub rxdr: RXDR, -//! /// 0x28 - Transmit data register -//! pub txdr: TXDR, +//! #[inline(always)] +//! pub const fn oar1(&self) -> &OAR1 { +//! &self.oar1 +//! } +//! #[doc = "0x0c - Own address register 2"] +//! #[inline(always)] +//! pub const fn oar2(&self) -> &OAR2 { +//! &self.oar2 +//! } +//! #[doc = "0x10 - Data register"] +//! #[inline(always)] +//! pub const fn dr(&self) -> &DR { +//! &self.dr +//! } //! } //! } //! ``` From 46721795dc5f1cbc64cb2e7e44f631391d3a1b81 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 21 Nov 2023 11:28:07 +0300 Subject: [PATCH 140/319] support of default enum value --- CHANGELOG.md | 3 +- Cargo.lock | 16 +-- Cargo.toml | 2 +- src/generate/peripheral.rs | 2 +- src/generate/register.rs | 246 ++++++++++++++++++++++++++++++------- 5 files changed, 212 insertions(+), 57 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 32331b34..2bde91f5 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -14,7 +14,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - `FieldWriter` takes offset as struct field instead of const generic. Improves SVD field array access Add `width`, `offset` methods -- *breaking change* Always numerates field arrays from 0 +- *breaking change* Always numerates field arrays from 0 +- Support of default value for `EnumeratedValues` ## [v0.30.3] - 2023-11-19 diff --git a/Cargo.lock b/Cargo.lock index 19db8b06..e5d7408b 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -423,18 +423,18 @@ checksum = "1ad4cc8da4ef723ed60bced201181d83791ad433213d8c24efffda1eec85d741" [[package]] name = "serde" -version = "1.0.192" +version = "1.0.193" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "bca2a08484b285dcb282d0f67b26cadc0df8b19f8c12502c13d966bf9482f001" +checksum = "25dd9975e68d0cb5aa1120c288333fc98731bd1dd12f561e468ea4728c042b89" dependencies = [ "serde_derive", ] [[package]] name = "serde_derive" -version = "1.0.192" +version = "1.0.193" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d6c7207fbec9faa48073f3e3074cbe553af6ea512d7c21ba46e434e70ea9fbc1" +checksum = "43576ca501357b9b071ac53cdc7da8ef0cbd9493d8df094cd821777ea6e894d3" dependencies = [ "proc-macro2", "quote", @@ -494,9 +494,9 @@ dependencies = [ [[package]] name = "svd-rs" -version = "0.14.4" +version = "0.14.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "35830f227d0ee528eb674429091ba11781fbf141e72a87a9bc9c732522798b33" +checksum = "dc56f34e2a3669bf718f48138273d66f98ab863ae5db5e3e3b291977f53025f4" dependencies = [ "once_cell", "regex", @@ -626,9 +626,9 @@ checksum = "f28467d3e1d3c6586d8f25fa243f544f5800fec42d97032474e17222c2b75cfa" [[package]] name = "utf8-width" -version = "0.1.6" +version = "0.1.7" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5190c9442dcdaf0ddd50f37420417d219ae5261bbf5db120d0f9bab996c9cba1" +checksum = "86bd8d4e895da8537e5315b8254664e6b769c4ff3db18321b297a1e7004392e3" [[package]] name = "utf8parse" diff --git a/Cargo.toml b/Cargo.toml index c4cac542..ab3e208d 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -64,7 +64,7 @@ version = "0.14.3" [dependencies.svd-rs] features = ["serde"] -version = "0.14.4" +version = "0.14.5" [dependencies.syn] version = "2.0" diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index e1e186e4..b03cd95e 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -81,7 +81,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result let name = &pi.name; let description = pi.description.as_deref().unwrap_or(&p.name); let name_str = name.to_sanitized_constant_case(); - let name_constant_case = Ident::new(&name, span); + let name_constant_case = Ident::new(name, span); let address = util::hex(pi.base_address); let p_snake = name.to_sanitized_snake_case(); snake_names.push(p_snake.to_string()); diff --git a/src/generate/register.rs b/src/generate/register.rs index f863fddd..c7933655 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -1,14 +1,14 @@ use crate::svd::{ - self, Access, BitRange, DimElement, EnumeratedValues, Field, MaybeArray, ModifiedWriteValues, - ReadAction, Register, RegisterProperties, Usage, WriteConstraint, + self, Access, BitRange, DimElement, EnumeratedValue, EnumeratedValues, Field, MaybeArray, + ModifiedWriteValues, ReadAction, Register, RegisterProperties, Usage, WriteConstraint, }; use core::u64; use log::warn; use proc_macro2::{Ident, Punct, Spacing, Span, TokenStream}; use quote::{quote, ToTokens}; -use std::borrow::Cow; use std::collections::HashSet; use std::fmt::Write; +use std::{borrow::Cow, collections::BTreeMap}; use svd_parser::expand::{ derive_enumerated_values, derive_field, BlockPath, EnumPath, FieldPath, Index, RegisterPath, }; @@ -472,7 +472,7 @@ fn render_register_mod_debug( log::debug!("register={} field={}", name, f.name); if field_access.can_read() && f.read_action.is_none() { if let Field::Array(_, de) = &f { - for (_, suffix) in de.indexes().enumerate() { + for suffix in de.indexes() { let f_name_n = util::replace_suffix(&f.name, &suffix) .to_snake_case_ident(Span::call_site()); let f_name_n_s = format!("{f_name_n}"); @@ -730,11 +730,24 @@ pub fn fields( // later on is the same as the read enumeration, we reuse and do not generate again. evs_r = Some(evs); - // do we have finite definition of this enumeration in svd? If not, the later code would - // return an Option when the value read from field does not match any defined values. - let has_reserved_variant = evs.values.len() != (1 << width); // parse enum variants from enumeratedValues svd record - let variants = Variant::from_enumerated_values(evs, config.pascal_enum_values)?; + let mut variants = Variant::from_enumerated_values(evs, config.pascal_enum_values)?; + + let map = enums_to_map(evs); + let mut def = evs + .default_value() + .and_then(|def| { + minimal_hole(&map, width) + .map(|v| Variant::from_value(v, def, config.pascal_enum_values)) + }) + .transpose()?; + if variants.len() == 1 << width { + def = None; + } else if variants.len() == (1 << width) - 1 { + if let Some(def) = def.take() { + variants.push(def); + } + } // if there's no variant defined in enumeratedValues, generate enumeratedValues with new-type // wrapper struct, and generate From conversation only. @@ -743,8 +756,33 @@ pub fn fields( // generate struct VALUE_READ_TY_A(fty) and From for VALUE_READ_TY_A. add_with_no_variants(mod_items, &value_read_ty, &fty, &description, rv); } else { + // do we have finite definition of this enumeration in svd? If not, the later code would + // return an Option when the value read from field does not match any defined values. + let has_reserved_variant; + // generate enum VALUE_READ_TY_A { ... each variants ... } and and From for VALUE_READ_TY_A. - add_from_variants(mod_items, &variants, &value_read_ty, &fty, &description, rv); + if let Some(def) = def.as_ref() { + add_from_variants_with_default( + mod_items, + &variants, + def, + &value_read_ty, + &fty, + &description, + rv, + ); + has_reserved_variant = false; + } else { + add_from_variants( + mod_items, + &variants, + &value_read_ty, + &fty, + &description, + rv, + ); + has_reserved_variant = evs.values.len() != (1 << width); + } // prepare code for each match arm. If we have reserved variant, the match operation would // return an Option, thus we wrap the return value with Some. @@ -771,6 +809,11 @@ pub fn fields( arms.extend(quote! { _ => None, }); + } else if let Some(v) = def.as_ref() { + let pc = &v.pc; + arms.extend(quote! { + _ => #value_read_ty::#pc, + }); } else if 1 << width.to_ty_width()? != variants.len() { arms.extend(quote! { _ => unreachable!(), @@ -779,26 +822,20 @@ pub fn fields( // prepare the `variant` function. This function would return field value in // Rust structure; if we have reserved variant we return by Option. - if has_reserved_variant { - enum_items.extend(quote! { - #[doc = "Get enumerated values variant"] - #inline - pub const fn variant(&self) -> Option<#value_read_ty> { - match self.bits { - #arms - } - } - }); + let ret_ty = if has_reserved_variant { + quote!(Option<#value_read_ty>) } else { - enum_items.extend(quote! { + quote!(#value_read_ty) + }; + enum_items.extend(quote! { #[doc = "Get enumerated values variant"] #inline - pub const fn variant(&self) -> #value_read_ty { + pub const fn variant(&self) -> #ret_ty { match self.bits { #arms } - }}); - } + } + }); // for each variant defined, we generate an `is_variant` function. for v in &variants { @@ -823,6 +860,28 @@ pub fn fields( } }); } + if let Some(v) = def.as_ref() { + let pc = &v.pc; + let sc = &v.nksc; + + let is_variant = Ident::new( + &if sc.to_string().starts_with('_') { + format!("is{sc}") + } else { + format!("is_{sc}") + }, + span, + ); + + let doc = util::escape_special_chars(&util::respace(&v.doc)); + enum_items.extend(quote! { + #[doc = #doc] + #inline + pub fn #is_variant(&self) -> bool { + matches!(self.variant(), #value_read_ty::#pc) + } + }); + } } } @@ -876,7 +935,7 @@ pub fn fields( } }); - for fi in svd::field::expand(&f, de) { + for fi in svd::field::expand(f, de) { let sub_offset = fi.bit_offset() as u64; let value = if sub_offset != 0 { let sub_offset = &unsuffixed(sub_offset); @@ -961,7 +1020,20 @@ pub fn fields( // if we writes to enumeratedValues, generate its structure if it differs from read structure. if let Some((evs, None)) = lookup_filter(&lookup_results, Usage::Write) { // parse variants from enumeratedValues svd record - let variants = Variant::from_enumerated_values(evs, config.pascal_enum_values)?; + let mut variants = Variant::from_enumerated_values(evs, config.pascal_enum_values)?; + let map = enums_to_map(evs); + let mut def = evs + .default_value() + .and_then(|def| { + minimal_hole(&map, width) + .map(|v| Variant::from_value(v, def, config.pascal_enum_values)) + }) + .transpose()?; + if variants.len() == 1 << width { + } else if let Some(def) = def.take() { + variants.push(def); + unsafety = false; + } // if the write structure is finite, it can be safely written. if variants.len() == 1 << width { @@ -1130,7 +1202,7 @@ pub fn fields( } }); - for fi in svd::field::expand(&f, de) { + for fi in svd::field::expand(f, de) { let sub_offset = fi.bit_offset() as u64; let name_snake_case_n = &fi.name.to_snake_case_ident(Span::call_site()); let doc = description_with_bits( @@ -1212,36 +1284,38 @@ struct Variant { impl Variant { fn from_enumerated_values(evs: &EnumeratedValues, pc: bool) -> Result> { - let span = Span::call_site(); evs.values .iter() // filter out all reserved variants, as we should not // generate code for them - .filter(|field| field.name.to_lowercase() != "reserved" && field.is_default.is_none()) + .filter(|ev| ev.name.to_lowercase() != "reserved" && !ev.is_default()) .map(|ev| { let value = ev .value - .ok_or_else(|| anyhow!("EnumeratedValue {} has no `` field", ev.name))?; - - let nksc = ev.name.to_sanitized_not_keyword_snake_case(); - let sc = util::sanitize_keyword(nksc.clone()); - Ok(Variant { - doc: ev - .description - .clone() - .unwrap_or_else(|| format!("`{value:b}`")), - pc: if pc { - ev.name.to_pascal_case_ident(span) - } else { - ev.name.to_constant_case_ident(span) - }, - nksc: Ident::new(&nksc, span), - sc: Ident::new(&sc, span), - value, - }) + .ok_or_else(|| anyhow!("EnumeratedValue {} has no `` entry", ev.name))?; + Self::from_value(value, ev, pc) }) .collect::>>() } + fn from_value(value: u64, ev: &EnumeratedValue, pc: bool) -> Result { + let span = Span::call_site(); + let nksc = ev.name.to_sanitized_not_keyword_snake_case(); + let sc = util::sanitize_keyword(nksc.clone()); + Ok(Variant { + doc: ev + .description + .clone() + .unwrap_or_else(|| format!("`{value:b}`")), + pc: if pc { + ev.name.to_pascal_case_ident(span) + } else { + ev.name.to_constant_case_ident(span) + }, + nksc: Ident::new(&nksc, span), + sc: Ident::new(&sc, span), + value, + }) + } } fn add_with_no_variants( @@ -1400,3 +1474,83 @@ fn lookup_filter( .find(|evsbase| evsbase.0.usage == Some(usage)) .or_else(|| evs.first()) } + +fn enums_to_map(evs: &EnumeratedValues) -> BTreeMap { + let mut map = BTreeMap::new(); + for ev in &evs.values { + if let Some(v) = ev.value { + map.insert(v, ev); + } + } + map +} + +fn minimal_hole(map: &BTreeMap, width: u32) -> Option { + (0..(1u64 << width)).find(|&v| !map.contains_key(&v)) +} + +fn add_from_variants_with_default( + mod_items: &mut TokenStream, + variants: &[Variant], + default: &Variant, + pc: &Ident, + fty: &Ident, + desc: &str, + reset_value: Option, +) { + let repr = if fty == "bool" { + quote!() + } else { + quote! { #[repr(#fty)] } + }; + + let mut vars = TokenStream::new(); + let mut casts = TokenStream::new(); + for (v, c) in variants.iter().chain(std::iter::once(default)).map(|v| { + let desc = util::escape_special_chars(&util::respace(&format!("{}: {}", v.value, v.doc))); + let pcv = &v.pc; + let pcval = &util::unsuffixed(v.value); + ( + quote! { + #[doc = #desc] + #pcv, + }, + quote! { + #pc::#pcv => #pcval, + }, + ) + }) { + vars.extend(v); + casts.extend(c); + } + + let desc = if let Some(rv) = reset_value { + format!("{desc}\n\nValue on reset: {rv}") + } else { + desc.to_string() + }; + + mod_items.extend(quote! { + #[doc = #desc] + #[derive(Clone, Copy, Debug, PartialEq)] + #repr + pub enum #pc { + #vars + } + impl From<#pc> for #fty { + #[inline(always)] + fn from(variant: #pc) -> Self { + match variant { + #casts + } + } + } + }); + if fty != "bool" { + mod_items.extend(quote! { + impl crate::FieldSpec for #pc { + type Ux = #fty; + } + }); + } +} From 7952349a161d4261a0cf87a1da1a573672e1f6a0 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 22 Nov 2023 23:43:34 +0300 Subject: [PATCH 141/319] review suggestion --- src/generate/register.rs | 15 ++++----------- 1 file changed, 4 insertions(+), 11 deletions(-) diff --git a/src/generate/register.rs b/src/generate/register.rs index c7933655..0741713f 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -1498,14 +1498,8 @@ fn add_from_variants_with_default( desc: &str, reset_value: Option, ) { - let repr = if fty == "bool" { - quote!() - } else { - quote! { #[repr(#fty)] } - }; - let mut vars = TokenStream::new(); - let mut casts = TokenStream::new(); + let mut arms = TokenStream::new(); for (v, c) in variants.iter().chain(std::iter::once(default)).map(|v| { let desc = util::escape_special_chars(&util::respace(&format!("{}: {}", v.value, v.doc))); let pcv = &v.pc; @@ -1513,7 +1507,7 @@ fn add_from_variants_with_default( ( quote! { #[doc = #desc] - #pcv, + #pcv = #pcval, }, quote! { #pc::#pcv => #pcval, @@ -1521,7 +1515,7 @@ fn add_from_variants_with_default( ) }) { vars.extend(v); - casts.extend(c); + arms.extend(c); } let desc = if let Some(rv) = reset_value { @@ -1533,7 +1527,6 @@ fn add_from_variants_with_default( mod_items.extend(quote! { #[doc = #desc] #[derive(Clone, Copy, Debug, PartialEq)] - #repr pub enum #pc { #vars } @@ -1541,7 +1534,7 @@ fn add_from_variants_with_default( #[inline(always)] fn from(variant: #pc) -> Self { match variant { - #casts + #arms } } } From e17488c0bb3ee42e55c6cca8b28e524024f24df9 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Thu, 23 Nov 2023 07:23:46 +0300 Subject: [PATCH 142/319] simplify --- src/generate/register.rs | 74 ++++------------------------------------ 1 file changed, 7 insertions(+), 67 deletions(-) diff --git a/src/generate/register.rs b/src/generate/register.rs index 0741713f..68637499 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -762,10 +762,9 @@ pub fn fields( // generate enum VALUE_READ_TY_A { ... each variants ... } and and From for VALUE_READ_TY_A. if let Some(def) = def.as_ref() { - add_from_variants_with_default( + add_from_variants( mod_items, - &variants, - def, + variants.iter().chain(std::iter::once(def)), &value_read_ty, &fty, &description, @@ -775,7 +774,7 @@ pub fn fields( } else { add_from_variants( mod_items, - &variants, + variants.iter(), &value_read_ty, &fty, &description, @@ -1051,7 +1050,7 @@ pub fn fields( } else { add_from_variants( mod_items, - &variants, + variants.iter(), &value_write_ty, &fty, &description, @@ -1357,9 +1356,9 @@ fn add_with_no_variants( } } -fn add_from_variants( +fn add_from_variants<'a>( mod_items: &mut TokenStream, - variants: &[Variant], + variants: impl Iterator, pc: &Ident, fty: &Ident, desc: &str, @@ -1372,7 +1371,7 @@ fn add_from_variants( }; let mut vars = TokenStream::new(); - for v in variants.iter().map(|v| { + for v in variants.map(|v| { let desc = util::escape_special_chars(&util::respace(&format!("{}: {}", v.value, v.doc))); let pcv = &v.pc; let pcval = &unsuffixed(v.value); @@ -1488,62 +1487,3 @@ fn enums_to_map(evs: &EnumeratedValues) -> BTreeMap { fn minimal_hole(map: &BTreeMap, width: u32) -> Option { (0..(1u64 << width)).find(|&v| !map.contains_key(&v)) } - -fn add_from_variants_with_default( - mod_items: &mut TokenStream, - variants: &[Variant], - default: &Variant, - pc: &Ident, - fty: &Ident, - desc: &str, - reset_value: Option, -) { - let mut vars = TokenStream::new(); - let mut arms = TokenStream::new(); - for (v, c) in variants.iter().chain(std::iter::once(default)).map(|v| { - let desc = util::escape_special_chars(&util::respace(&format!("{}: {}", v.value, v.doc))); - let pcv = &v.pc; - let pcval = &util::unsuffixed(v.value); - ( - quote! { - #[doc = #desc] - #pcv = #pcval, - }, - quote! { - #pc::#pcv => #pcval, - }, - ) - }) { - vars.extend(v); - arms.extend(c); - } - - let desc = if let Some(rv) = reset_value { - format!("{desc}\n\nValue on reset: {rv}") - } else { - desc.to_string() - }; - - mod_items.extend(quote! { - #[doc = #desc] - #[derive(Clone, Copy, Debug, PartialEq)] - pub enum #pc { - #vars - } - impl From<#pc> for #fty { - #[inline(always)] - fn from(variant: #pc) -> Self { - match variant { - #arms - } - } - } - }); - if fty != "bool" { - mod_items.extend(quote! { - impl crate::FieldSpec for #pc { - type Ux = #fty; - } - }); - } -} From 93eb06bd6a900deb722b3b177bac52512b75c993 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Thu, 23 Nov 2023 16:57:47 +0300 Subject: [PATCH 143/319] mode Config to config module --- CHANGELOG.md | 1 + src/config.rs | 150 ++++++++++++++++++++++++++++++++++++ src/generate/device.rs | 4 +- src/generate/peripheral.rs | 5 +- src/generate/register.rs | 3 +- src/lib.rs | 9 ++- src/main.rs | 3 +- src/util.rs | 151 +------------------------------------ 8 files changed, 166 insertions(+), 160 deletions(-) create mode 100644 src/config.rs diff --git a/CHANGELOG.md b/CHANGELOG.md index 2bde91f5..217eaa0c 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -16,6 +16,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). Add `width`, `offset` methods - *breaking change* Always numerates field arrays from 0 - Support of default value for `EnumeratedValues` +- move `Config` to `config` module ## [v0.30.3] - 2023-11-19 diff --git a/src/config.rs b/src/config.rs new file mode 100644 index 00000000..a083f006 --- /dev/null +++ b/src/config.rs @@ -0,0 +1,150 @@ +use anyhow::{bail, Result}; +use std::path::{Path, PathBuf}; + +#[cfg_attr(feature = "serde", derive(serde::Deserialize))] +#[derive(Clone, PartialEq, Eq, Debug)] +pub struct Config { + #[cfg_attr(feature = "serde", serde(default))] + pub target: Target, + #[cfg_attr(feature = "serde", serde(default))] + pub atomics: bool, + #[cfg_attr(feature = "serde", serde(default))] + pub atomics_feature: Option, + #[cfg_attr(feature = "serde", serde(default))] + pub generic_mod: bool, + #[cfg_attr(feature = "serde", serde(default))] + pub make_mod: bool, + #[cfg_attr(feature = "serde", serde(default))] + pub ignore_groups: bool, + #[cfg_attr(feature = "serde", serde(default))] + pub keep_list: bool, + #[cfg_attr(feature = "serde", serde(default))] + pub strict: bool, + #[cfg_attr(feature = "serde", serde(default))] + pub pascal_enum_values: bool, + #[cfg_attr(feature = "serde", serde(default))] + pub feature_group: bool, + #[cfg_attr(feature = "serde", serde(default))] + pub feature_peripheral: bool, + #[cfg_attr(feature = "serde", serde(default))] + pub max_cluster_size: bool, + #[cfg_attr(feature = "serde", serde(default))] + pub impl_debug: bool, + #[cfg_attr(feature = "serde", serde(default))] + pub impl_debug_feature: Option, + #[cfg_attr(feature = "serde", serde(default = "current_dir"))] + pub output_dir: PathBuf, + #[cfg_attr(feature = "serde", serde(default))] + pub input: Option, + #[cfg_attr(feature = "serde", serde(default))] + pub source_type: SourceType, + #[cfg_attr(feature = "serde", serde(default))] + pub log_level: Option, + #[cfg_attr(feature = "serde", serde(default))] + pub interrupt_link_section: Option, + #[cfg_attr(feature = "serde", serde(default))] + pub reexport_core_peripherals: bool, + #[cfg_attr(feature = "serde", serde(default))] + pub reexport_interrupt: bool, +} + +fn current_dir() -> PathBuf { + PathBuf::from(".") +} + +impl Default for Config { + fn default() -> Self { + Self { + target: Target::default(), + atomics: false, + atomics_feature: None, + generic_mod: false, + make_mod: false, + ignore_groups: false, + keep_list: false, + strict: false, + pascal_enum_values: false, + feature_group: false, + feature_peripheral: false, + max_cluster_size: false, + impl_debug: false, + impl_debug_feature: None, + output_dir: current_dir(), + input: None, + source_type: SourceType::default(), + log_level: None, + interrupt_link_section: None, + reexport_core_peripherals: false, + reexport_interrupt: false, + } + } +} + +#[allow(clippy::upper_case_acronyms)] +#[allow(non_camel_case_types)] +#[cfg_attr(feature = "serde", derive(serde::Deserialize))] +#[derive(Clone, Copy, PartialEq, Eq, Debug, Default)] +pub enum Target { + #[cfg_attr(feature = "serde", serde(rename = "cortex-m"))] + #[default] + CortexM, + #[cfg_attr(feature = "serde", serde(rename = "msp430"))] + Msp430, + #[cfg_attr(feature = "serde", serde(rename = "riscv"))] + RISCV, + #[cfg_attr(feature = "serde", serde(rename = "xtensa-lx"))] + XtensaLX, + #[cfg_attr(feature = "serde", serde(rename = "mips"))] + Mips, + #[cfg_attr(feature = "serde", serde(rename = "none"))] + None, +} + +impl Target { + pub fn parse(s: &str) -> Result { + Ok(match s { + "cortex-m" => Target::CortexM, + "msp430" => Target::Msp430, + "riscv" => Target::RISCV, + "xtensa-lx" => Target::XtensaLX, + "mips" => Target::Mips, + "none" => Target::None, + _ => bail!("unknown target {}", s), + }) + } +} + +#[cfg_attr( + feature = "serde", + derive(serde::Deserialize), + serde(rename_all = "lowercase") +)] +#[derive(Clone, Copy, PartialEq, Eq, Debug, Default)] +pub enum SourceType { + #[default] + Xml, + #[cfg(feature = "yaml")] + Yaml, + #[cfg(feature = "json")] + Json, +} + +impl SourceType { + /// Make a new [`SourceType`] from a given extension. + pub fn from_extension(s: &str) -> Option { + match s { + "svd" | "xml" => Some(Self::Xml), + #[cfg(feature = "yaml")] + "yml" | "yaml" => Some(Self::Yaml), + #[cfg(feature = "json")] + "json" => Some(Self::Json), + _ => None, + } + } + pub fn from_path(path: &Path) -> Self { + path.extension() + .and_then(|e| e.to_str()) + .and_then(Self::from_extension) + .unwrap_or_default() + } +} diff --git a/src/generate/device.rs b/src/generate/device.rs index 713d6719..51cd3f42 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -7,8 +7,8 @@ use std::borrow::Cow; use std::fs::File; use std::io::Write; -use crate::util::{self, Config, ToSanitizedCase}; -use crate::Target; +use crate::config::{Config, Target}; +use crate::util::{self, ToSanitizedCase}; use anyhow::{Context, Result}; use crate::generate::{interrupt, peripheral}; diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index b03cd95e..df4a3120 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -6,6 +6,7 @@ use svd_parser::expand::{ derive_cluster, derive_peripheral, derive_register, BlockPath, Index, RegisterPath, }; +use crate::config::Config; use crate::svd::{ self, Cluster, ClusterInfo, MaybeArray, Peripheral, Register, RegisterCluster, RegisterInfo, }; @@ -15,8 +16,8 @@ use quote::{quote, ToTokens}; use syn::{punctuated::Punctuated, Token}; use crate::util::{ - self, name_to_ty, path_segment, type_path, unsuffixed, zst_type, Config, FullName, - ToSanitizedCase, BITS_PER_BYTE, + self, name_to_ty, path_segment, type_path, unsuffixed, zst_type, FullName, ToSanitizedCase, + BITS_PER_BYTE, }; use anyhow::{anyhow, bail, Context, Result}; diff --git a/src/generate/register.rs b/src/generate/register.rs index 68637499..267f7138 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -13,8 +13,9 @@ use svd_parser::expand::{ derive_enumerated_values, derive_field, BlockPath, EnumPath, FieldPath, Index, RegisterPath, }; +use crate::config::Config; use crate::util::{ - self, ident_to_path, path_segment, replace_suffix, type_path, unsuffixed, Config, FullName, + self, ident_to_path, path_segment, replace_suffix, type_path, unsuffixed, FullName, ToSanitizedCase, U32Ext, }; use anyhow::{anyhow, Result}; diff --git a/src/lib.rs b/src/lib.rs index a801d78d..285247a7 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -538,10 +538,11 @@ use quote::quote; use svd_parser::svd; +pub mod config; pub mod generate; pub mod util; -pub use crate::util::{Config, Target}; +pub use config::{Config, Target}; #[non_exhaustive] pub struct Generation { @@ -599,9 +600,9 @@ pub fn generate(input: &str, config: &Config) -> Result { }) } -/// Load a [Device](svd::Device) from a string slice with given [config](crate::util::Config). -pub fn load_from(input: &str, config: &crate::util::Config) -> Result { - use self::util::SourceType; +/// Load a [Device](svd::Device) from a string slice with given [config](crate::config::Config). +pub fn load_from(input: &str, config: &Config) -> Result { + use config::SourceType; use svd_parser::ValidateLevel; let mut device = match config.source_type { diff --git a/src/main.rs b/src/main.rs index fc989fb2..cd3a00df 100755 --- a/src/main.rs +++ b/src/main.rs @@ -10,8 +10,9 @@ use anyhow::{Context, Result}; use clap::{Arg, ArgAction, Command}; use svd2rust::{ + config::{Config, SourceType, Target}, generate, load_from, - util::{self, build_rs, Config, SourceType, Target}, + util::{self, build_rs}, }; fn parse_configs(app: Command) -> Result { diff --git a/src/util.rs b/src/util.rs index 4be04689..722a24cb 100644 --- a/src/util.rs +++ b/src/util.rs @@ -6,14 +6,13 @@ use inflections::Inflect; use proc_macro2::{Ident, Span, TokenStream}; use quote::quote; use std::collections::HashSet; -use std::path::{Path, PathBuf}; use svd_rs::{MaybeArray, Peripheral, PeripheralInfo}; use syn::{ punctuated::Punctuated, token::PathSep, Lit, LitInt, PathArguments, PathSegment, Type, TypePath, }; -use anyhow::{anyhow, bail, Result}; +use anyhow::{anyhow, Result}; pub const BITS_PER_BYTE: u32 = 8; @@ -21,53 +20,6 @@ pub const BITS_PER_BYTE: u32 = 8; /// that are not valid in Rust ident const BLACKLIST_CHARS: &[char] = &['(', ')', '[', ']', '/', ' ', '-']; -#[cfg_attr(feature = "serde", derive(serde::Deserialize))] -#[derive(Clone, PartialEq, Eq, Debug)] -pub struct Config { - #[cfg_attr(feature = "serde", serde(default))] - pub target: Target, - #[cfg_attr(feature = "serde", serde(default))] - pub atomics: bool, - #[cfg_attr(feature = "serde", serde(default))] - pub atomics_feature: Option, - #[cfg_attr(feature = "serde", serde(default))] - pub generic_mod: bool, - #[cfg_attr(feature = "serde", serde(default))] - pub make_mod: bool, - #[cfg_attr(feature = "serde", serde(default))] - pub ignore_groups: bool, - #[cfg_attr(feature = "serde", serde(default))] - pub keep_list: bool, - #[cfg_attr(feature = "serde", serde(default))] - pub strict: bool, - #[cfg_attr(feature = "serde", serde(default))] - pub pascal_enum_values: bool, - #[cfg_attr(feature = "serde", serde(default))] - pub feature_group: bool, - #[cfg_attr(feature = "serde", serde(default))] - pub feature_peripheral: bool, - #[cfg_attr(feature = "serde", serde(default))] - pub max_cluster_size: bool, - #[cfg_attr(feature = "serde", serde(default))] - pub impl_debug: bool, - #[cfg_attr(feature = "serde", serde(default))] - pub impl_debug_feature: Option, - #[cfg_attr(feature = "serde", serde(default = "current_dir"))] - pub output_dir: PathBuf, - #[cfg_attr(feature = "serde", serde(default))] - pub input: Option, - #[cfg_attr(feature = "serde", serde(default))] - pub source_type: SourceType, - #[cfg_attr(feature = "serde", serde(default))] - pub log_level: Option, - #[cfg_attr(feature = "serde", serde(default))] - pub interrupt_link_section: Option, - #[cfg_attr(feature = "serde", serde(default))] - pub reexport_core_peripherals: bool, - #[cfg_attr(feature = "serde", serde(default))] - pub reexport_interrupt: bool, -} - #[derive(Clone, Debug, PartialEq, Eq)] pub enum Case { Constant, @@ -103,107 +55,6 @@ impl Case { } } -fn current_dir() -> PathBuf { - PathBuf::from(".") -} - -impl Default for Config { - fn default() -> Self { - Self { - target: Target::default(), - atomics: false, - atomics_feature: None, - generic_mod: false, - make_mod: false, - ignore_groups: false, - keep_list: false, - strict: false, - pascal_enum_values: false, - feature_group: false, - feature_peripheral: false, - max_cluster_size: false, - impl_debug: false, - impl_debug_feature: None, - output_dir: current_dir(), - input: None, - source_type: SourceType::default(), - log_level: None, - interrupt_link_section: None, - reexport_core_peripherals: false, - reexport_interrupt: false, - } - } -} - -#[allow(clippy::upper_case_acronyms)] -#[allow(non_camel_case_types)] -#[cfg_attr(feature = "serde", derive(serde::Deserialize))] -#[derive(Clone, Copy, PartialEq, Eq, Debug, Default)] -pub enum Target { - #[cfg_attr(feature = "serde", serde(rename = "cortex-m"))] - #[default] - CortexM, - #[cfg_attr(feature = "serde", serde(rename = "msp430"))] - Msp430, - #[cfg_attr(feature = "serde", serde(rename = "riscv"))] - RISCV, - #[cfg_attr(feature = "serde", serde(rename = "xtensa-lx"))] - XtensaLX, - #[cfg_attr(feature = "serde", serde(rename = "mips"))] - Mips, - #[cfg_attr(feature = "serde", serde(rename = "none"))] - None, -} - -impl Target { - pub fn parse(s: &str) -> Result { - Ok(match s { - "cortex-m" => Target::CortexM, - "msp430" => Target::Msp430, - "riscv" => Target::RISCV, - "xtensa-lx" => Target::XtensaLX, - "mips" => Target::Mips, - "none" => Target::None, - _ => bail!("unknown target {}", s), - }) - } -} - -#[cfg_attr( - feature = "serde", - derive(serde::Deserialize), - serde(rename_all = "lowercase") -)] -#[derive(Clone, Copy, PartialEq, Eq, Debug, Default)] -pub enum SourceType { - #[default] - Xml, - #[cfg(feature = "yaml")] - Yaml, - #[cfg(feature = "json")] - Json, -} - -impl SourceType { - /// Make a new [`SourceType`] from a given extension. - pub fn from_extension(s: &str) -> Option { - match s { - "svd" | "xml" => Some(Self::Xml), - #[cfg(feature = "yaml")] - "yml" | "yaml" => Some(Self::Yaml), - #[cfg(feature = "json")] - "json" => Some(Self::Json), - _ => None, - } - } - pub fn from_path(path: &Path) -> Self { - path.extension() - .and_then(|e| e.to_str()) - .and_then(Self::from_extension) - .unwrap_or_default() - } -} - /// Convert self string into specific case without overlapping to svd2rust internal names pub trait ToSanitizedCase { /// Convert self into PascalCase. From 8e2d1b9c31657e2ce22ac079a562cd4f66ca6fd7 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Thu, 23 Nov 2023 22:00:24 +0300 Subject: [PATCH 144/319] serde-default, option output_dir --- src/config.rs | 58 +++--------------------------------------- src/generate/device.rs | 9 ++++++- src/main.rs | 4 +-- 3 files changed, 13 insertions(+), 58 deletions(-) diff --git a/src/config.rs b/src/config.rs index a083f006..e1c07c7e 100644 --- a/src/config.rs +++ b/src/config.rs @@ -2,84 +2,32 @@ use anyhow::{bail, Result}; use std::path::{Path, PathBuf}; #[cfg_attr(feature = "serde", derive(serde::Deserialize))] -#[derive(Clone, PartialEq, Eq, Debug)] +#[derive(Clone, PartialEq, Eq, Debug, Default)] +#[cfg_attr(feature = "serde", serde(default))] pub struct Config { - #[cfg_attr(feature = "serde", serde(default))] pub target: Target, - #[cfg_attr(feature = "serde", serde(default))] pub atomics: bool, - #[cfg_attr(feature = "serde", serde(default))] pub atomics_feature: Option, - #[cfg_attr(feature = "serde", serde(default))] pub generic_mod: bool, - #[cfg_attr(feature = "serde", serde(default))] pub make_mod: bool, - #[cfg_attr(feature = "serde", serde(default))] pub ignore_groups: bool, - #[cfg_attr(feature = "serde", serde(default))] pub keep_list: bool, - #[cfg_attr(feature = "serde", serde(default))] pub strict: bool, - #[cfg_attr(feature = "serde", serde(default))] pub pascal_enum_values: bool, - #[cfg_attr(feature = "serde", serde(default))] pub feature_group: bool, - #[cfg_attr(feature = "serde", serde(default))] pub feature_peripheral: bool, - #[cfg_attr(feature = "serde", serde(default))] pub max_cluster_size: bool, - #[cfg_attr(feature = "serde", serde(default))] pub impl_debug: bool, - #[cfg_attr(feature = "serde", serde(default))] pub impl_debug_feature: Option, - #[cfg_attr(feature = "serde", serde(default = "current_dir"))] - pub output_dir: PathBuf, - #[cfg_attr(feature = "serde", serde(default))] + pub output_dir: Option, pub input: Option, - #[cfg_attr(feature = "serde", serde(default))] pub source_type: SourceType, - #[cfg_attr(feature = "serde", serde(default))] pub log_level: Option, - #[cfg_attr(feature = "serde", serde(default))] pub interrupt_link_section: Option, - #[cfg_attr(feature = "serde", serde(default))] pub reexport_core_peripherals: bool, - #[cfg_attr(feature = "serde", serde(default))] pub reexport_interrupt: bool, } -fn current_dir() -> PathBuf { - PathBuf::from(".") -} - -impl Default for Config { - fn default() -> Self { - Self { - target: Target::default(), - atomics: false, - atomics_feature: None, - generic_mod: false, - make_mod: false, - ignore_groups: false, - keep_list: false, - strict: false, - pascal_enum_values: false, - feature_group: false, - feature_peripheral: false, - max_cluster_size: false, - impl_debug: false, - impl_debug_feature: None, - output_dir: current_dir(), - input: None, - source_type: SourceType::default(), - log_level: None, - interrupt_link_section: None, - reexport_core_peripherals: false, - reexport_interrupt: false, - } - } -} - #[allow(clippy::upper_case_acronyms)] #[allow(non_camel_case_types)] #[cfg_attr(feature = "serde", derive(serde::Deserialize))] diff --git a/src/generate/device.rs b/src/generate/device.rs index 51cd3f42..36413f63 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -6,6 +6,7 @@ use log::debug; use std::borrow::Cow; use std::fs::File; use std::io::Write; +use std::path::Path; use crate::config::{Config, Target}; use crate::util::{self, ToSanitizedCase}; @@ -139,7 +140,13 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Result<()> { if let Some(file) = config.input.as_ref() { config.source_type = SourceType::from_path(file) } - let path = &config.output_dir; + let path = config.output_dir.as_deref().unwrap_or(Path::new(".")); info!("Parsing device from SVD file"); let device = load_from(input, &config)?; From fd9be3679ebd032dbd7a7f9e1fba01dcd1abf1d4 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Thu, 23 Nov 2023 19:07:53 +0300 Subject: [PATCH 145/319] generate defmt::Format for enums --- .github/workflows/ci.yml | 2 +- CHANGELOG.md | 1 + ci/script.sh | 3 ++ src/config.rs | 1 + src/generate/peripheral.rs | 21 ++++------- src/generate/register.rs | 75 +++++++++++++++++++++----------------- src/main.rs | 9 ++++- 7 files changed, 62 insertions(+), 50 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 578962ab..76186bcb 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -75,7 +75,7 @@ jobs: - { rust: stable, vendor: Spansion, options: "--atomics" } - { rust: stable, vendor: STMicro, options: "" } - { rust: stable, vendor: STMicro, options: "--atomics" } - - { rust: stable, vendor: STM32-patched, options: "--strict --pascal_enum_values --max_cluster_size --atomics --atomics_feature atomics" } + - { rust: stable, vendor: STM32-patched, options: "--strict --pascal_enum_values --max_cluster_size --atomics --atomics_feature atomics --impl_debug --impl_defmt defmt" } - { rust: stable, vendor: Toshiba, options: all } - { rust: stable, vendor: Toshiba, options: "" } # Test MSRV diff --git a/CHANGELOG.md b/CHANGELOG.md index 217eaa0c..c3b256d6 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -17,6 +17,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - *breaking change* Always numerates field arrays from 0 - Support of default value for `EnumeratedValues` - move `Config` to `config` module +- add `impl_defmt` config flag ## [v0.30.3] - 2023-11-19 diff --git a/ci/script.sh b/ci/script.sh index bba56cee..7ad86088 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -46,6 +46,9 @@ main() { if [[ "$options" == *"--atomics"* ]]; then echo 'portable-atomic = { version = "1.4", default-features = false }' >> $td/Cargo.toml fi + if [[ "$options" == *"--impl_defmt"* ]]; then + echo 'defmt = "0.3.5"' >> $td/Cargo.toml + fi echo '[profile.dev]' >> $td/Cargo.toml echo 'incremental = false' >> $td/Cargo.toml diff --git a/src/config.rs b/src/config.rs index e1c07c7e..29a95475 100644 --- a/src/config.rs +++ b/src/config.rs @@ -19,6 +19,7 @@ pub struct Config { pub max_cluster_size: bool, pub impl_debug: bool, pub impl_debug_feature: Option, + pub impl_defmt: Option, pub output_dir: Option, pub input: Option, pub source_type: SourceType, diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index df4a3120..69b636c1 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -622,34 +622,27 @@ fn register_or_cluster_block( }); } } - - let mut derive_debug = TokenStream::new(); - if config.impl_debug { + let derive_debug = config.impl_debug.then(|| { if let Some(feature_name) = &config.impl_debug_feature { - derive_debug.extend(quote! { - #[cfg_attr(feature = #feature_name, derive(Debug))] - }); + quote!(#[cfg_attr(feature = #feature_name, derive(Debug))]) } else { - derive_debug.extend(quote! { - #[derive(Debug)] - }); + quote!(#[derive(Debug)]) } - } + }); + let name = if let Some(name) = name { name.to_constant_case_ident(span) } else { Ident::new("RegisterBlock", span) }; - let accessors = if !accessors.is_empty() { + let accessors = (!accessors.is_empty()).then(|| { quote! { impl #name { #accessors } } - } else { - quote! {} - }; + }); Ok(quote! { ///Register block diff --git a/src/generate/register.rs b/src/generate/register.rs index 267f7138..a5e152fc 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -248,6 +248,11 @@ pub fn render_register_mod( let open = Punct::new('{', Spacing::Alone); let close = Punct::new('}', Spacing::Alone); + let debug_feature = config + .impl_debug_feature + .as_ref() + .map(|feature| quote!(#[cfg(feature=#feature)])); + if let Some(cur_fields) = register.fields.as_ref() { // filter out all reserved fields, as we should not generate code for // them @@ -284,12 +289,8 @@ pub fn render_register_mod( )?; } } else if !access.can_read() || register.read_action.is_some() { - if let Some(feature) = &config.impl_debug_feature { - r_debug_impl.extend(quote! { - #[cfg(feature=#feature)] - }); - } r_debug_impl.extend(quote! { + #debug_feature impl core::fmt::Debug for crate::generic::Reg<#regspec_ident> { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -298,24 +299,14 @@ pub fn render_register_mod( }); } else { // no register fields are defined so implement Debug to get entire register value - if let Some(feature) = &config.impl_debug_feature { - r_debug_impl.extend(quote! { - #[cfg(feature=#feature)] - }); - } r_debug_impl.extend(quote! { + #debug_feature impl core::fmt::Debug for R { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { write!(f, "{}", self.bits()) } } - }); - if let Some(feature) = &config.impl_debug_feature { - r_debug_impl.extend(quote! { - #[cfg(feature=#feature)] - }); - } - r_debug_impl.extend(quote! { + #debug_feature impl core::fmt::Debug for crate::generic::Reg<#regspec_ident> { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { self.read().fmt(f) @@ -450,15 +441,15 @@ fn render_register_mod_debug( let open = Punct::new('{', Spacing::Alone); let close = Punct::new('}', Spacing::Alone); let mut r_debug_impl = TokenStream::new(); + let debug_feature = config + .impl_debug_feature + .as_ref() + .map(|feature| quote!(#[cfg(feature=#feature)])); // implement Debug for register readable fields that have no read side effects if access.can_read() && register.read_action.is_none() { - if let Some(feature) = &config.impl_debug_feature { - r_debug_impl.extend(quote! { - #[cfg(feature=#feature)] - }); - } r_debug_impl.extend(quote! { + #debug_feature impl core::fmt::Debug for R #open fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result #open f.debug_struct(#name) @@ -496,12 +487,8 @@ fn render_register_mod_debug( #close #close }); - if let Some(feature) = &config.impl_debug_feature { - r_debug_impl.extend(quote! { - #[cfg(feature=#feature)] - }); - } r_debug_impl.extend(quote! { + #debug_feature impl core::fmt::Debug for crate::generic::Reg<#regspec_ident> { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { self.read().fmt(f) @@ -509,12 +496,8 @@ fn render_register_mod_debug( } }); } else if !access.can_read() || register.read_action.is_some() { - if let Some(feature) = &config.impl_debug_feature { - r_debug_impl.extend(quote! { - #[cfg(feature=#feature)] - }); - } r_debug_impl.extend(quote! { + #debug_feature impl core::fmt::Debug for crate::generic::Reg<#regspec_ident> { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") @@ -755,7 +738,7 @@ pub fn fields( // else, generate enumeratedValues into a Rust enum with functions for each variant. if variants.is_empty() { // generate struct VALUE_READ_TY_A(fty) and From for VALUE_READ_TY_A. - add_with_no_variants(mod_items, &value_read_ty, &fty, &description, rv); + add_with_no_variants(mod_items, &value_read_ty, &fty, &description, rv, config); } else { // do we have finite definition of this enumeration in svd? If not, the later code would // return an Option when the value read from field does not match any defined values. @@ -770,6 +753,7 @@ pub fn fields( &fty, &description, rv, + config, ); has_reserved_variant = false; } else { @@ -780,6 +764,7 @@ pub fn fields( &fty, &description, rv, + config, ); has_reserved_variant = evs.values.len() != (1 << width); } @@ -1047,7 +1032,14 @@ pub fn fields( // generate write value structure and From conversation if we can't reuse read value structure. if writer_reader_different_enum { if variants.is_empty() { - add_with_no_variants(mod_items, &value_write_ty, &fty, &description, rv); + add_with_no_variants( + mod_items, + &value_write_ty, + &fty, + &description, + rv, + config, + ); } else { add_from_variants( mod_items, @@ -1056,6 +1048,7 @@ pub fn fields( &fty, &description, rv, + config, ); } } @@ -1324,7 +1317,13 @@ fn add_with_no_variants( fty: &Ident, desc: &str, reset_value: Option, + config: &Config, ) { + let defmt = config + .impl_defmt + .as_ref() + .map(|feature| quote!(#[cfg_attr(feature = #feature, derive(defmt::Format))])); + let cast = if fty == "bool" { quote! { val.0 as u8 != 0 } } else { @@ -1339,6 +1338,7 @@ fn add_with_no_variants( mod_items.extend(quote! { #[doc = #desc] + #defmt #[derive(Clone, Copy, Debug, PartialEq, Eq)] pub struct #pc(#fty); impl From<#pc> for #fty { @@ -1364,7 +1364,13 @@ fn add_from_variants<'a>( fty: &Ident, desc: &str, reset_value: Option, + config: &Config, ) { + let defmt = config + .impl_defmt + .as_ref() + .map(|feature| quote!(#[cfg_attr(feature = #feature, derive(defmt::Format))])); + let (repr, cast) = if fty == "bool" { (quote! {}, quote! { variant as u8 != 0 }) } else { @@ -1392,6 +1398,7 @@ fn add_from_variants<'a>( mod_items.extend(quote! { #[doc = #desc] + #defmt #[derive(Clone, Copy, Debug, PartialEq, Eq)] #repr pub enum #pc { diff --git a/src/main.rs b/src/main.rs index 8151f20f..a95b2220 100755 --- a/src/main.rs +++ b/src/main.rs @@ -127,7 +127,14 @@ fn run() -> Result<()> { .arg( Arg::new("impl_debug_feature") .long("impl_debug_feature") - .help("add feature gating for block and register debug implementation") + .help("Add feature gating for block and register debug implementation") + .action(ArgAction::Set) + .value_name("FEATURE"), + ) + .arg( + Arg::new("impl_defmt") + .long("impl_defmt") + .help("Add automatic defmt implementation for enumerated values") .action(ArgAction::Set) .value_name("FEATURE"), ) From 9350bfc7eb34b6f74955e6005bf15b22d2d4afc9 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Thu, 23 Nov 2023 19:21:50 +0300 Subject: [PATCH 146/319] fix Debug::fmt for FMT register --- ci/script.sh | 2 +- src/generate/register.rs | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/ci/script.sh b/ci/script.sh index 7ad86088..12a11a85 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -47,7 +47,7 @@ main() { echo 'portable-atomic = { version = "1.4", default-features = false }' >> $td/Cargo.toml fi if [[ "$options" == *"--impl_defmt"* ]]; then - echo 'defmt = "0.3.5"' >> $td/Cargo.toml + echo 'defmt = { version = "0.3.5", optional = true }' >> $td/Cargo.toml fi echo '[profile.dev]' >> $td/Cargo.toml echo 'incremental = false' >> $td/Cargo.toml diff --git a/src/generate/register.rs b/src/generate/register.rs index a5e152fc..a4cf056e 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -309,7 +309,7 @@ pub fn render_register_mod( #debug_feature impl core::fmt::Debug for crate::generic::Reg<#regspec_ident> { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } }); @@ -491,7 +491,7 @@ fn render_register_mod_debug( #debug_feature impl core::fmt::Debug for crate::generic::Reg<#regspec_ident> { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - self.read().fmt(f) + core::fmt::Debug::fmt(&self.read(), f) } } }); From 0a8cdba35e01f138052fe2782805e947d08080cd Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Thu, 23 Nov 2023 22:22:39 +0300 Subject: [PATCH 147/319] impl-defmt --- .github/workflows/ci.yml | 2 +- CHANGELOG.md | 2 +- ci/script.sh | 2 +- src/main.rs | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 76186bcb..567a1e15 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -75,7 +75,7 @@ jobs: - { rust: stable, vendor: Spansion, options: "--atomics" } - { rust: stable, vendor: STMicro, options: "" } - { rust: stable, vendor: STMicro, options: "--atomics" } - - { rust: stable, vendor: STM32-patched, options: "--strict --pascal_enum_values --max_cluster_size --atomics --atomics_feature atomics --impl_debug --impl_defmt defmt" } + - { rust: stable, vendor: STM32-patched, options: "--strict --pascal_enum_values --max_cluster_size --atomics --atomics_feature atomics --impl_debug --impl-defmt defmt" } - { rust: stable, vendor: Toshiba, options: all } - { rust: stable, vendor: Toshiba, options: "" } # Test MSRV diff --git a/CHANGELOG.md b/CHANGELOG.md index c3b256d6..3a6cd6f5 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -17,7 +17,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - *breaking change* Always numerates field arrays from 0 - Support of default value for `EnumeratedValues` - move `Config` to `config` module -- add `impl_defmt` config flag +- add `impl-defmt` config flag ## [v0.30.3] - 2023-11-19 diff --git a/ci/script.sh b/ci/script.sh index 12a11a85..55f5e11b 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -46,7 +46,7 @@ main() { if [[ "$options" == *"--atomics"* ]]; then echo 'portable-atomic = { version = "1.4", default-features = false }' >> $td/Cargo.toml fi - if [[ "$options" == *"--impl_defmt"* ]]; then + if [[ "$options" == *"--impl-defmt"* ]]; then echo 'defmt = { version = "0.3.5", optional = true }' >> $td/Cargo.toml fi echo '[profile.dev]' >> $td/Cargo.toml diff --git a/src/main.rs b/src/main.rs index a95b2220..99095259 100755 --- a/src/main.rs +++ b/src/main.rs @@ -133,7 +133,7 @@ fn run() -> Result<()> { ) .arg( Arg::new("impl_defmt") - .long("impl_defmt") + .long("impl-defmt") .help("Add automatic defmt implementation for enumerated values") .action(ArgAction::Set) .value_name("FEATURE"), From d93f9fce32badb3b0e46dfd863c34f9a6862174c Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Thu, 23 Nov 2023 22:38:12 +0300 Subject: [PATCH 148/319] alias --- src/main.rs | 1 + 1 file changed, 1 insertion(+) diff --git a/src/main.rs b/src/main.rs index 99095259..d492a86a 100755 --- a/src/main.rs +++ b/src/main.rs @@ -134,6 +134,7 @@ fn run() -> Result<()> { .arg( Arg::new("impl_defmt") .long("impl-defmt") + .alias("impl_defmt") .help("Add automatic defmt implementation for enumerated values") .action(ArgAction::Set) .value_name("FEATURE"), From 09bbb4375ae8f81a0c5ed1c8efee6d5e3ed468f5 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Thu, 23 Nov 2023 19:07:53 +0300 Subject: [PATCH 149/319] generate defmt::Format for enums --- .github/workflows/ci.yml | 2 +- CHANGELOG.md | 1 + ci/script.sh | 2 +- src/lib.rs | 23 +++++++++++++++++---- src/main.rs | 43 +++++++++++++++++++++++++++------------- 5 files changed, 51 insertions(+), 20 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 567a1e15..ca0b9cf1 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -75,7 +75,7 @@ jobs: - { rust: stable, vendor: Spansion, options: "--atomics" } - { rust: stable, vendor: STMicro, options: "" } - { rust: stable, vendor: STMicro, options: "--atomics" } - - { rust: stable, vendor: STM32-patched, options: "--strict --pascal_enum_values --max_cluster_size --atomics --atomics_feature atomics --impl_debug --impl-defmt defmt" } + - { rust: stable, vendor: STM32-patched, options: "--strict --pascal-enum-values --max-cluster-size --atomics --atomics-feature atomics --impl-debug --impl-defmt defmt" } - { rust: stable, vendor: Toshiba, options: all } - { rust: stable, vendor: Toshiba, options: "" } # Test MSRV diff --git a/CHANGELOG.md b/CHANGELOG.md index 3a6cd6f5..92fe5e07 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -18,6 +18,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Support of default value for `EnumeratedValues` - move `Config` to `config` module - add `impl-defmt` config flag +- Use dash instead of underscore in flag names ## [v0.30.3] - 2023-11-19 diff --git a/ci/script.sh b/ci/script.sh index 55f5e11b..756d958e 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -13,7 +13,7 @@ test_svd_for_target() { # NOTE we care about errors in svd2rust, but not about errors / warnings in rustfmt pushd $td - RUST_BACKTRACE=1 svd2rust $options --target $1 --source_type xml -i input.svd + RUST_BACKTRACE=1 svd2rust $options --target $1 --source-type xml -i input.svd mv lib.rs src/lib.rs diff --git a/src/lib.rs b/src/lib.rs index 285247a7..1ed0cb0a 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -77,6 +77,11 @@ //! rt = ["cortex-m-rt/device"] //! ``` //! +//! ## the `--reexport-core-peripherals` flag +//! +//! With `--reexport-core-peripherals` flag enabled peripherals from `cortex-m` crate +//! be reexported by peripheral access crate. +//! //! ## target = msp430 //! //! MSP430 does not natively use the SVD format. However, SVD files can be generated using the @@ -341,7 +346,7 @@ //! Usage looks like this: //! //! ```ignore -//! if i2c1.c2r().write().reset() +//! if i2c1.c2r().reset() //! ``` //! //! ## `write` @@ -495,6 +500,11 @@ //! //! [`interrupt`]: https://docs.rs/cortex-m-rt-macros/0.1/cortex_m_rt_macros/attr.interrupt.html //! +//! ## the `--reexport-interrupt` flag (deprecated) +//! +//! With `--reexport-interrupt` flag passed `interrupt` macro from `cortex-m-rt` or `riscv-rt` +//! be reexported by peripheral access crate. +//! //! ## the `--atomics` flag //! //! The `--atomics` flag can be passed to `svd2rust` to extends the register API with operations to @@ -503,13 +513,13 @@ //! concurrently called on different bits in the same register without data races. This flag won't //! work for RISCV chips without the atomic extension. //! -//! The `--atomics_feature` flag can also be specified to include atomics implementations conditionally +//! The `--atomics-feature` flag can also be specified to include atomics implementations conditionally //! behind the supplied feature name. //! //! `portable-atomic` v0.3.16 must be added to the dependencies, with default features off to //! disable the `fallback` feature. //! -//! ## the `--impl_debug` flag +//! ## the `--impl-debug` flag //! //! The `--impl_debug` option will cause svd2rust to generate `core::fmt::Debug` implementations for //! all registers and blocks. If a register is readable and has fields defined then each field value @@ -517,7 +527,7 @@ //! register that has read actions will not be read and printed as `(not read/has read action!)`. //! Registers that are not readable will have `(write only register)` printed as the value. //! -//! The `--impl_debug_feature` flag can also be specified to include debug implementations conditionally +//! The `--impl-debug-feature` flag can also be specified to include debug implementations conditionally //! behind the supplied feature name. //! //! Usage examples: @@ -533,6 +543,11 @@ //! // print all registers for peripheral //! println!("RTC_CNT {:#?}", unsafe { &*esp32s3::RTC_CNTL::ptr() }); //! ``` +//! +//! ## the `--impl-defmt` flag +//! +//! The `--impl-defmt` flag can also be specified to include `defmt::Format` implementations conditionally +//! behind the supplied feature name. #![recursion_limit = "128"] use quote::quote; diff --git a/src/main.rs b/src/main.rs index d492a86a..e890936d 100755 --- a/src/main.rs +++ b/src/main.rs @@ -47,6 +47,7 @@ fn run() -> Result<()> { .arg( Arg::new("output_dir") .long("output-dir") + .alias("output_dir") .help("Directory to place generated files") .short('o') .action(ArgAction::Set) @@ -75,58 +76,67 @@ fn run() -> Result<()> { ) .arg( Arg::new("atomics_feature") - .long("atomics_feature") + .long("atomics-feature") + .alias("atomics_feature") .help("add feature gating for atomic register modification API") .action(ArgAction::Set) .value_name("FEATURE"), ) .arg( Arg::new("ignore_groups") - .long("ignore_groups") + .long("ignore-groups") + .alias("ignore_groups") .action(ArgAction::SetTrue) .help("Don't add alternateGroup name as prefix to register name"), ) .arg( Arg::new("keep_list") - .long("keep_list") + .long("keep-list") + .alias("keep_list") .action(ArgAction::SetTrue) .help( "Keep lists when generating code of dimElement, instead of trying to generate arrays", )) .arg( Arg::new("generic_mod") - .long("generic_mod") + .long("generic-mod") + .alias("generic_mod") .short('g') .action(ArgAction::SetTrue) .help("Push generic mod in separate file"), ) .arg( Arg::new("feature_group") - .long("feature_group") + .long("feature-group") + .alias("feature_group") .action(ArgAction::SetTrue) .help("Use group_name of peripherals as feature"), ) .arg( Arg::new("feature_peripheral") - .long("feature_peripheral") + .long("feature-peripheral") + .alias("feature_peripheral") .action(ArgAction::SetTrue) .help("Use independent cfg feature flags for each peripheral"), ) .arg( Arg::new("max_cluster_size") - .long("max_cluster_size") + .long("max-cluster-size") + .alias("max_cluster_size") .action(ArgAction::SetTrue) .help("Use array increment for cluster size"), ) .arg( Arg::new("impl_debug") - .long("impl_debug") + .long("impl-debug") + .alias("impl_debug") .action(ArgAction::SetTrue) .help("implement Debug for readable blocks and registers"), ) .arg( Arg::new("impl_debug_feature") - .long("impl_debug_feature") + .long("impl-debug-feature") + .alias("impl_debug_feature") .help("Add feature gating for block and register debug implementation") .action(ArgAction::Set) .value_name("FEATURE"), @@ -141,7 +151,8 @@ fn run() -> Result<()> { ) .arg( Arg::new("make_mod") - .long("make_mod") + .long("make-mod") + .alias("make_mod") .short('m') .action(ArgAction::SetTrue) .help("Create mod.rs instead of lib.rs, without inner attributes"), @@ -155,24 +166,28 @@ fn run() -> Result<()> { ) .arg( Arg::new("pascal_enum_values") - .long("pascal_enum_values") + .long("pascal-enum-values") + .alias("pascal_enum_values") .action(ArgAction::SetTrue) .help("Use PascalCase in stead of UPPER_CASE for enumerated values"), ) .arg( Arg::new("source_type") - .long("source_type") + .long("source-type") + .alias("source_type") .help("Specify file/stream format"), ) .arg( Arg::new("reexport_core_peripherals") - .long("reexport_core_peripherals") + .long("reexport-core-peripherals") + .alias("reexport_core_peripherals") .action(ArgAction::SetTrue) .help("For Cortex-M target reexport peripherals from cortex-m crate"), ) .arg( Arg::new("reexport_interrupt") - .long("reexport_interrupt") + .long("reexport-interrupt") + .alias("reexport_interrupt") .action(ArgAction::SetTrue) .help("Reexport interrupt macro from cortex-m-rt like crates"), ) From 5aafd7043db1f2d085549d47e410e2e3dcce1384 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 24 Nov 2023 00:15:20 +0300 Subject: [PATCH 150/319] changelog fix --- CHANGELOG.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 92fe5e07..dc6ae2f3 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -9,7 +9,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Use methods to access any register or cluster - Remove all deny lints from generated crate -- Add `reexport_core_peripherals` and `reexport_interrupt` features disabled by default +- Add `reexport-core-peripherals` and `reexport-interrupt` features disabled by default - ~~rename `const-generic` feature to `array_proxy`~~ remove `ArrayProxy` - `FieldWriter` takes offset as struct field instead of const generic. Improves SVD field array access From 667764b2eba16a91359422a978bad9c37a8cfb62 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Thu, 23 Nov 2023 11:03:51 +0300 Subject: [PATCH 151/319] release 0.31.0 --- CHANGELOG.md | 7 +++++-- Cargo.lock | 2 +- Cargo.toml | 2 +- src/generate/interrupt.rs | 7 +++++++ 4 files changed, 14 insertions(+), 4 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index dc6ae2f3..d10838d9 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,10 +7,12 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.31.0] - 2023-11-24 + - Use methods to access any register or cluster - Remove all deny lints from generated crate - Add `reexport-core-peripherals` and `reexport-interrupt` features disabled by default -- ~~rename `const-generic` feature to `array_proxy`~~ remove `ArrayProxy` +- remove `ArrayProxy` and `const_generic` feature - `FieldWriter` takes offset as struct field instead of const generic. Improves SVD field array access Add `width`, `offset` methods @@ -835,7 +837,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.30.3...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.31.0...HEAD +[v0.31.0]: https://github.com/rust-embedded/svd2rust/compare/v0.30.3...v0.31.0 [v0.30.3]: https://github.com/rust-embedded/svd2rust/compare/v0.30.2...v0.30.3 [v0.30.2]: https://github.com/rust-embedded/svd2rust/compare/v0.30.1...v0.30.2 [v0.30.1]: https://github.com/rust-embedded/svd2rust/compare/v0.30.0...v0.30.1 diff --git a/Cargo.lock b/Cargo.lock index e5d7408b..14f5fef6 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -506,7 +506,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.30.3" +version = "0.31.0" dependencies = [ "anyhow", "clap", diff --git a/Cargo.toml b/Cargo.toml index ab3e208d..d8dc3ba7 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.30.3" +version = "0.31.0" readme = "README.md" rust-version = "1.70" diff --git a/src/generate/interrupt.rs b/src/generate/interrupt.rs index 9f1fa408..c54e1d6b 100644 --- a/src/generate/interrupt.rs +++ b/src/generate/interrupt.rs @@ -261,9 +261,15 @@ pub fn render( (quote!(#[repr(u16)]), quote!(#self_token as u16)) }; + let defmt = config + .impl_defmt + .as_ref() + .map(|feature| quote!(#[cfg_attr(feature = #feature, derive(defmt::Format))])); + if target == Target::Msp430 { let interrupt_enum = quote! { ///Enumeration of all the interrupts. This enum is seldom used in application or library crates. It is present primarily for documenting the device's implemented interrupts. + #defmt #[derive(Copy, Clone, Debug, PartialEq, Eq)] #enum_repr pub enum Interrupt { @@ -275,6 +281,7 @@ pub fn render( } else { let interrupt_enum = quote! { ///Enumeration of all the interrupts. + #defmt #[derive(Copy, Clone, Debug, PartialEq, Eq)] #enum_repr pub enum Interrupt { From b5b1d5688a0204a2fed74b8789ecec4628aeb449 Mon Sep 17 00:00:00 2001 From: Campbell He Date: Mon, 27 Nov 2023 11:28:17 +0800 Subject: [PATCH 152/319] remove ref in ArrayElemAccessor The ref cause clippy warning: this expression creates a reference which is immediately dereferenced by the compiler --- CHANGELOG.md | 2 ++ src/generate/peripheral/accessor.rs | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index d10838d9..eb4440ac 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Remove needless reference in `ArrayElemAccessor` + ## [v0.31.0] - 2023-11-24 - Use methods to access any register or cluster diff --git a/src/generate/peripheral/accessor.rs b/src/generate/peripheral/accessor.rs index 6acfc041..5feae7ef 100644 --- a/src/generate/peripheral/accessor.rs +++ b/src/generate/peripheral/accessor.rs @@ -204,7 +204,7 @@ impl ToTokens for ArrayElemAccessor { #[doc = #doc] #[inline(always)] pub const fn #name(&self) -> &#ty { - &self.#basename(#i) + self.#basename(#i) } } .to_tokens(tokens); From 423ccb347d0356ed72fe8cda51022425c03f7069 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 27 Nov 2023 20:49:44 +0300 Subject: [PATCH 153/319] Fix cluster arrays --- CHANGELOG.md | 1 + src/generate/peripheral.rs | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index eb4440ac..2546650a 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Fix cluster arrays - Remove needless reference in `ArrayElemAccessor` ## [v0.31.0] - 2023-11-24 diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 69b636c1..51d1eb49 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -1035,7 +1035,7 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result Date: Mon, 27 Nov 2023 22:28:36 +0300 Subject: [PATCH 154/319] release 0.31.1 --- CHANGELOG.md | 5 ++++- Cargo.lock | 2 +- Cargo.toml | 2 +- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 2546650a..9f9fc26b 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.31.1] - 2023-11-27 + - Fix cluster arrays - Remove needless reference in `ArrayElemAccessor` @@ -840,7 +842,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.31.0...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.31.1...HEAD +[v0.31.1]: https://github.com/rust-embedded/svd2rust/compare/v0.31.0...v0.31.1 [v0.31.0]: https://github.com/rust-embedded/svd2rust/compare/v0.30.3...v0.31.0 [v0.30.3]: https://github.com/rust-embedded/svd2rust/compare/v0.30.2...v0.30.3 [v0.30.2]: https://github.com/rust-embedded/svd2rust/compare/v0.30.1...v0.30.2 diff --git a/Cargo.lock b/Cargo.lock index 14f5fef6..928cf29d 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -506,7 +506,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.31.0" +version = "0.31.1" dependencies = [ "anyhow", "clap", diff --git a/Cargo.toml b/Cargo.toml index d8dc3ba7..15a7bc16 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.31.0" +version = "0.31.1" readme = "README.md" rust-version = "1.70" From bbe77da9beb7795e9173623c6167a976c29846f1 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 28 Nov 2023 18:31:19 +0300 Subject: [PATCH 155/319] simple register array iterator --- src/generate/peripheral/accessor.rs | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/src/generate/peripheral/accessor.rs b/src/generate/peripheral/accessor.rs index 5feae7ef..6cb45ba2 100644 --- a/src/generate/peripheral/accessor.rs +++ b/src/generate/peripheral/accessor.rs @@ -1,4 +1,4 @@ -use proc_macro2::{Ident, TokenStream}; +use proc_macro2::{Ident, TokenStream, Span}; use quote::{quote, ToTokens}; #[derive(Clone, Debug)] @@ -138,12 +138,19 @@ pub struct ArrayAccessor { impl ToTokens for ArrayAccessor { fn to_tokens(&self, tokens: &mut TokenStream) { let Self { doc, name, ty, .. } = self; + let name_iter = Ident::new(&format!("{name}_iter"), Span::call_site()); quote! { #[doc = #doc] #[inline(always)] pub const fn #name(&self, n: usize) -> &#ty { &self.#name[n] } + #[doc = "Iterator for array of:"] + #[doc = #doc] + #[inline(always)] + pub fn #name_iter(&self) -> impl Iterator { + self.#name.iter() + } } .to_tokens(tokens); } From 10d4ae5922962215f8e5b0001140bf4f3f267877 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 29 Nov 2023 09:53:02 +0300 Subject: [PATCH 156/319] field array iter --- src/generate/register.rs | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/src/generate/register.rs b/src/generate/register.rs index a4cf056e..7a4eeb3b 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -910,6 +910,7 @@ pub fn fields( let offset_calc = calculate_offset(increment, offset, true); let value = quote! { ((self.bits >> #offset_calc) & #hexmask) #cast }; let dim = unsuffixed(de.dim); + let name_snake_case_iter = Ident::new(&format!("{name_snake_case}_iter"), span); r_impl_items.extend(quote! { #[doc = #array_doc] #inline @@ -918,6 +919,12 @@ pub fn fields( [(); #dim][n as usize]; #reader_ty::new ( #value ) } + #[doc = "Iterator for array of:"] + #[doc = #array_doc] + #inline + pub fn #name_snake_case_iter(&self) -> impl Iterator + '_ { + (0..#dim).map(|n| #reader_ty::new ( #value )) + } }); for fi in svd::field::expand(f, de) { From 0cfcc5838fb64e83253f695c74eb93e7b7de2375 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 29 Nov 2023 10:03:36 +0300 Subject: [PATCH 157/319] raw reg array iterator --- src/generate/peripheral/accessor.rs | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/src/generate/peripheral/accessor.rs b/src/generate/peripheral/accessor.rs index 6cb45ba2..76a17b55 100644 --- a/src/generate/peripheral/accessor.rs +++ b/src/generate/peripheral/accessor.rs @@ -1,4 +1,4 @@ -use proc_macro2::{Ident, TokenStream, Span}; +use proc_macro2::{Ident, Span, TokenStream}; use quote::{quote, ToTokens}; #[derive(Clone, Debug)] @@ -176,13 +176,21 @@ impl ToTokens for RawArrayAccessor { dim, increment, } = self; + let name_iter = Ident::new(&format!("{name}_iter"), Span::call_site()); + let cast = quote! { unsafe { &*(self as *const Self).cast::().add(#offset).add(#increment * n).cast() } }; quote! { #[doc = #doc] #[inline(always)] pub const fn #name(&self, n: usize) -> &#ty { #[allow(clippy::no_effect)] [(); #dim][n]; - unsafe { &*(self as *const Self).cast::().add(#offset).add(#increment * n).cast() } + #cast + } + #[doc = "Iterator for array of:"] + #[doc = #doc] + #[inline(always)] + pub fn #name_iter(&self) -> impl Iterator { + (0..#dim).map(|n| #cast) } } .to_tokens(tokens); From f291a3953db29d42d89c1df9df27909f5ee8c649 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 29 Nov 2023 10:05:23 +0300 Subject: [PATCH 158/319] changelog --- CHANGELOG.md | 2 ++ src/generate/register.rs | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 9f9fc26b..a4b88acb 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Add iterators for register/cluster/field arrays + ## [v0.31.1] - 2023-11-27 - Fix cluster arrays diff --git a/src/generate/register.rs b/src/generate/register.rs index 7a4eeb3b..13ae85c5 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -920,7 +920,7 @@ pub fn fields( #reader_ty::new ( #value ) } #[doc = "Iterator for array of:"] - #[doc = #array_doc] + #[doc = #doc] #inline pub fn #name_snake_case_iter(&self) -> impl Iterator + '_ { (0..#dim).map(|n| #reader_ty::new ( #value )) From 24cd473fdb55435d9bd0a21e757cde1c9efa64b0 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 29 Nov 2023 10:17:22 +0300 Subject: [PATCH 159/319] docs --- src/generate/register.rs | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/src/generate/register.rs b/src/generate/register.rs index 13ae85c5..9009c394 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -905,14 +905,15 @@ pub fn fields( let increment = de.dim_increment; let doc = util::replace_suffix(&description, &brief_suffix); let first_name = svd::array::names(f, de).next().unwrap(); - let array_doc = - format!("{doc}\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `{first_name}` field"); + let note = format!("NOTE: `n` is number of field in register. `n == 0` corresponds to `{first_name}` field"); let offset_calc = calculate_offset(increment, offset, true); let value = quote! { ((self.bits >> #offset_calc) & #hexmask) #cast }; let dim = unsuffixed(de.dim); let name_snake_case_iter = Ident::new(&format!("{name_snake_case}_iter"), span); r_impl_items.extend(quote! { - #[doc = #array_doc] + #[doc = #doc] + #[doc = ""] + #[doc = #note] #inline pub fn #name_snake_case(&self, n: u8) -> #reader_ty { #[allow(clippy::no_effect)] @@ -1188,11 +1189,12 @@ pub fn fields( let offset_calc = calculate_offset(increment, offset, false); let doc = &util::replace_suffix(&description, &brief_suffix); let first_name = svd::array::names(f, de).next().unwrap(); - let array_doc = - format!("{doc}\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `{first_name}` field"); + let note = format!("NOTE: `n` is number of field in register. `n == 0` corresponds to `{first_name}` field"); let dim = unsuffixed(de.dim); w_impl_items.extend(quote! { - #[doc = #array_doc] + #[doc = #doc] + #[doc = ""] + #[doc = #note] #inline #[must_use] pub fn #name_snake_case(&mut self, n: u8) -> #writer_ty<#regspec_ident> { From c133a7bd18781d4eff1d4bb1018863a10418cd96 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 29 Nov 2023 10:34:44 +0300 Subject: [PATCH 160/319] h743->h753 --- ci/script.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ci/script.sh b/ci/script.sh index 756d958e..afcaebf9 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -580,7 +580,7 @@ main() { test_patched_stm32 stm32f7x3 test_patched_stm32 stm32g070 test_patched_stm32 stm32g473 - test_patched_stm32 stm32h743 + test_patched_stm32 stm32h753 test_patched_stm32 stm32l0x3 test_patched_stm32 stm32l162 test_patched_stm32 stm32l4x6 From 378083acaf7c4b781ae824480e6949000fb3717a Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 29 Nov 2023 11:15:49 +0300 Subject: [PATCH 161/319] parentheses instead of square brackets in brief_suffix --- src/generate/register.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/generate/register.rs b/src/generate/register.rs index 9009c394..5942c193 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -613,10 +613,10 @@ pub fn fields( let brief_suffix = if let Field::Array(_, de) = &f { if let Some(range) = de.indexes_as_range() { - format!("[{}-{}]", *range.start(), *range.end()) + format!("({}-{})", *range.start(), *range.end()) } else { let suffixes: Vec<_> = de.indexes().collect(); - format!("[{}]", suffixes.join(",")) + format!("({})", suffixes.join(",")) } } else { String::new() From 8c1b9aff6eb662d1de99f9d4f4728deebe997bae Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 29 Nov 2023 16:34:55 +0300 Subject: [PATCH 162/319] release 0.31.2 --- CHANGELOG.md | 6 +++++- Cargo.lock | 2 +- Cargo.toml | 2 +- 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index a4b88acb..650f537f 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,7 +7,10 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.31.2] - 2023-11-29 + - Add iterators for register/cluster/field arrays +- Use parentheses instead of square brackets in docs for field arrays ## [v0.31.1] - 2023-11-27 @@ -844,7 +847,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.31.1...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.31.2...HEAD +[v0.31.2]: https://github.com/rust-embedded/svd2rust/compare/v0.31.1...v0.31.2 [v0.31.1]: https://github.com/rust-embedded/svd2rust/compare/v0.31.0...v0.31.1 [v0.31.0]: https://github.com/rust-embedded/svd2rust/compare/v0.30.3...v0.31.0 [v0.30.3]: https://github.com/rust-embedded/svd2rust/compare/v0.30.2...v0.30.3 diff --git a/Cargo.lock b/Cargo.lock index 928cf29d..e4a837ed 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -506,7 +506,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.31.1" +version = "0.31.2" dependencies = [ "anyhow", "clap", diff --git a/Cargo.toml b/Cargo.toml index 15a7bc16..21523c76 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.31.1" +version = "0.31.2" readme = "README.md" rust-version = "1.70" From 2d9da30312828922be9ba92134af25f6eac8031a Mon Sep 17 00:00:00 2001 From: Hennadii Chernyshchyk Date: Wed, 29 Nov 2023 16:21:33 +0200 Subject: [PATCH 163/319] Beautify error messages I had a problem in my SVD file, but I got quite non-specific error: 'Cannot render SVD device'. In order to debug I rewrote error messages to understand the problem. Now it looks like this: ``` called `Result::unwrap()` on an `Err` value: Cannot render SVD device Caused by: 0: can't render peripheral 'FortiMac', group 'No group name' 1: can't render register 'HASH' 2: can't convert 512 bits into a Rust integral type ``` --- CHANGELOG.md | 1 + src/generate/device.rs | 26 ++++++++++---------------- src/generate/peripheral.rs | 24 ++++++------------------ src/lib.rs | 4 ++-- 4 files changed, 19 insertions(+), 36 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 650f537f..f426e0b7 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -11,6 +11,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Add iterators for register/cluster/field arrays - Use parentheses instead of square brackets in docs for field arrays +- Better display parsing errors ## [v0.31.1] - 2023-11-27 diff --git a/src/generate/device.rs b/src/generate/device.rs index 36413f63..23f9b04a 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -199,23 +199,17 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result out.extend(periph), - Err(e) => { - let descrip = p.description.as_deref().unwrap_or("No description"); - let group_name = p.group_name.as_deref().unwrap_or("No group name"); - let mut context_string = format!( - "Rendering error at peripheral\nName: {}\nDescription: {descrip}\nGroup: {group_name}", - p.name - ); - if let Some(dname) = p.derived_from.as_ref() { - context_string = format!("{context_string}\nDerived from: {dname}"); - } - let mut e = Err(e); - e = e.with_context(|| context_string); - return e; + let periph = peripheral::render(p, &index, config).with_context(|| { + let group_name = p.group_name.as_deref().unwrap_or("No group name"); + let mut context_string = + format!("can't render peripheral '{}', group '{group_name}'", p.name); + if let Some(dname) = p.derived_from.as_ref() { + context_string += &format!(", derived from: '{dname}'"); } - }; + context_string + })?; + + out.extend(periph); if p.registers .as_ref() diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 51d1eb49..64b884f2 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -671,22 +671,15 @@ fn expand( match &erc { RegisterCluster::Register(register) => { let reg_name = ®ister.name; - let expanded_reg = - expand_register(register, derive_info, config).with_context(|| { - let descrip = register.description.as_deref().unwrap_or("No description"); - format!( - "Error expanding register\nName: {reg_name}\nDescription: {descrip}" - ) - })?; + let expanded_reg = expand_register(register, derive_info, config) + .with_context(|| format!("can't expand register '{reg_name}'"))?; trace!("Register: {reg_name}"); ercs_expanded.extend(expanded_reg); } RegisterCluster::Cluster(cluster) => { let cluster_name = &cluster.name; - let expanded_cluster = expand_cluster(cluster, config).with_context(|| { - let descrip = cluster.description.as_deref().unwrap_or("No description"); - format!("Error expanding cluster\nName: {cluster_name}\nDescription: {descrip}") - })?; + let expanded_cluster = expand_cluster(cluster, config) + .with_context(|| format!("can't expand cluster '{cluster_name}'"))?; trace!("Cluster: {cluster_name}"); ercs_expanded.extend(expanded_cluster); } @@ -1359,13 +1352,8 @@ fn render_ercs( } } let reg_name = ®.name; - let rendered_reg = - register::render(reg, path, rpath, index, config).with_context(|| { - let descrip = reg.description.as_deref().unwrap_or("No description"); - format!( - "Error rendering register\nName: {reg_name}\nDescription: {descrip}" - ) - })?; + let rendered_reg = register::render(reg, path, rpath, index, config) + .with_context(|| format!("can't render register '{reg_name}'"))?; mod_items.extend(rendered_reg) } } diff --git a/src/lib.rs b/src/lib.rs index 1ed0cb0a..85941278 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -578,7 +578,7 @@ pub enum SvdError { #[error("Cannot format crate")] Fmt, #[error("Cannot render SVD device")] - Render, + Render(#[from] anyhow::Error), } /// Generates rust code for the specified svd content. @@ -588,7 +588,7 @@ pub fn generate(input: &str, config: &Config) -> Result { let device = load_from(input, config)?; let mut device_x = String::new(); let items = - generate::device::render(&device, config, &mut device_x).map_err(|_| SvdError::Render)?; + generate::device::render(&device, config, &mut device_x).map_err(SvdError::Render)?; let mut lib_rs = String::new(); writeln!( From db9824713b9496c1767b9b7d52beeb74c04e449d Mon Sep 17 00:00:00 2001 From: Hennadii Chernyshchyk Date: Wed, 29 Nov 2023 16:59:10 +0200 Subject: [PATCH 164/319] Add `include-compatible` config flag When developing FPGA, code needs to be generated dynamically. Idiomatic way of doing it is using `include!` macro: https://doc.rust-lang.org/cargo/reference/build-script-examples.html#code-generation But top-level attributes can't be used with it: https://github.com/rust-lang/rfcs/issues/752 So I added a config flag that disables generation of all top-level attributes. --- CHANGELOG.md | 1 + src/config.rs | 1 + src/generate/device.rs | 35 +++++++++++++++++++---------------- src/main.rs | 7 +++++++ 4 files changed, 28 insertions(+), 16 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 650f537f..c5b27894 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [v0.31.2] - 2023-11-29 +- Add `include-compatible` config flag - Add iterators for register/cluster/field arrays - Use parentheses instead of square brackets in docs for field arrays diff --git a/src/config.rs b/src/config.rs index 29a95475..e64e47f2 100644 --- a/src/config.rs +++ b/src/config.rs @@ -10,6 +10,7 @@ pub struct Config { pub atomics_feature: Option, pub generic_mod: bool, pub make_mod: bool, + pub include_compatible: bool, pub ignore_groups: bool, pub keep_list: bool, pub strict: bool, diff --git a/src/generate/device.rs b/src/generate/device.rs index 36413f63..d3f47e42 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -29,28 +29,31 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Result<()> { .action(ArgAction::SetTrue) .help("Create mod.rs instead of lib.rs, without inner attributes"), ) + .arg( + Arg::new("include_compatible") + .long("include-compatible") + .alias("include_compatible") + .action(ArgAction::SetTrue) + .help("Do not generate top-level attributes to make it compatible with include! macro"), + ) .arg( Arg::new("strict") .long("strict") From cf16e8d4fc009eb5599d3211266398c6f8dc2056 Mon Sep 17 00:00:00 2001 From: Hennadii Chernyshchyk Date: Wed, 29 Nov 2023 21:13:31 +0200 Subject: [PATCH 165/319] Rename to skip-crate-attributes --- CHANGELOG.md | 2 +- src/config.rs | 2 +- src/generate/device.rs | 4 ++-- src/main.rs | 8 ++++---- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index c5b27894..cfdffd28 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -9,7 +9,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [v0.31.2] - 2023-11-29 -- Add `include-compatible` config flag +- Add `skip-crate-attributes` config flag - Add iterators for register/cluster/field arrays - Use parentheses instead of square brackets in docs for field arrays diff --git a/src/config.rs b/src/config.rs index e64e47f2..c80dc561 100644 --- a/src/config.rs +++ b/src/config.rs @@ -10,7 +10,7 @@ pub struct Config { pub atomics_feature: Option, pub generic_mod: bool, pub make_mod: bool, - pub include_compatible: bool, + pub skip_crate_attributes: bool, pub ignore_groups: bool, pub keep_list: bool, pub strict: bool, diff --git a/src/generate/device.rs b/src/generate/device.rs index d3f47e42..b799b648 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -35,7 +35,7 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Result Result<()> { .help("Create mod.rs instead of lib.rs, without inner attributes"), ) .arg( - Arg::new("include_compatible") - .long("include-compatible") - .alias("include_compatible") + Arg::new("skip_crate_attributes") + .long("skip-crate-attributes") + .alias("skip_crate_attributes") .action(ArgAction::SetTrue) - .help("Do not generate top-level attributes to make it compatible with include! macro"), + .help("Do not generate crate attributes"), ) .arg( Arg::new("strict") From 6f8e9551e8efb506caada01163766113067d2f98 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Thu, 30 Nov 2023 08:56:41 +0300 Subject: [PATCH 166/319] post-serde validation --- CHANGELOG.md | 6 ++- Cargo.lock | 120 +++++++++++++++++++++++++++++++++++++++------------ Cargo.toml | 4 +- src/lib.rs | 28 ++++++++---- 4 files changed, 118 insertions(+), 40 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 2c2d28b9..a145fbd5 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,12 +7,14 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Add `svd::Device` validation after parsing by `serde` +- Add `skip-crate-attributes` config flag +- Better display parsing errors + ## [v0.31.2] - 2023-11-29 -- Add `skip-crate-attributes` config flag - Add iterators for register/cluster/field arrays - Use parentheses instead of square brackets in docs for field arrays -- Better display parsing errors ## [v0.31.1] - 2023-11-27 diff --git a/Cargo.lock b/Cargo.lock index e4a837ed..16ba7348 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -46,7 +46,7 @@ version = "1.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "5ca11d4be1bab0c8bc8734a9aa7bf4ee8316d462a08c6ac5052f888fef5b494b" dependencies = [ - "windows-sys", + "windows-sys 0.48.0", ] [[package]] @@ -56,7 +56,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "f0699d10d2f4d628a98ee7b57b289abbc98ff3bad977cb3152709d4bf2330628" dependencies = [ "anstyle", - "windows-sys", + "windows-sys 0.48.0", ] [[package]] @@ -96,18 +96,18 @@ dependencies = [ [[package]] name = "clap" -version = "4.4.8" +version = "4.4.10" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "2275f18819641850fa26c89acc84d465c1bf91ce57bc2748b28c420473352f64" +checksum = "41fffed7514f420abec6d183b1d3acfd9099c79c3a10a06ade4f8203f1411272" dependencies = [ "clap_builder", ] [[package]] name = "clap_builder" -version = "4.4.8" +version = "4.4.9" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "07cdf1b148b25c1e1f7a42225e30a0d99a615cd4637eae7365548dd4529b95bc" +checksum = "63361bae7eef3771745f02d8d892bec2fee5f6e34af316ba556e7f97a7069ff1" dependencies = [ "anstream", "anstyle", @@ -220,12 +220,12 @@ checksum = "5443807d6dff69373d433ab9ef5378ad8df50ca6298caf15de6e52e24aaf54d5" [[package]] name = "errno" -version = "0.3.7" +version = "0.3.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f258a7194e7f7c2a7837a8913aeab7fd8c383457034fa20ce4dd3dcb813e8eb8" +checksum = "a258e46cdc063eb8519c00b9fc845fc47bcfca4130e2f08e88665ceda8474245" dependencies = [ "libc", - "windows-sys", + "windows-sys 0.52.0", ] [[package]] @@ -236,9 +236,9 @@ checksum = "3f9eec918d3f24069decb9af1554cad7c880e2da24a9afd88aca000531ab82c1" [[package]] name = "hashbrown" -version = "0.14.2" +version = "0.14.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f93e7192158dbcda357bdec5fb5788eebf8bbac027f3f33e719d29135ae84156" +checksum = "290f1a1d9242c78d09ce40a5e87e7554ee637af1351968159f4952f028f75604" [[package]] name = "hermit-abi" @@ -307,7 +307,7 @@ checksum = "cb0889898416213fab133e1d33a0e5858a48177452750691bde3666d0fdbaf8b" dependencies = [ "hermit-abi", "rustix", - "windows-sys", + "windows-sys 0.48.0", ] [[package]] @@ -348,9 +348,9 @@ checksum = "dd8b5dd2ae5ed71462c540258bedcb51965123ad7e7ccf4b9a8cafaa4a63576d" [[package]] name = "proc-macro2" -version = "1.0.69" +version = "1.0.70" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "134c189feb4956b20f6f547d2cf727d4c0fe06722b20a0eec87ed445a97f92da" +checksum = "39278fbbf5fb4f646ce651690877f89d1c5811a3d4acb27700c1cb3cdb78fd3b" dependencies = [ "unicode-ident", ] @@ -412,7 +412,7 @@ dependencies = [ "errno", "libc", "linux-raw-sys", - "windows-sys", + "windows-sys 0.48.0", ] [[package]] @@ -482,9 +482,9 @@ checksum = "73473c0e59e6d5812c5dfe2a064a6444949f089e20eec9a2e5506596494e4623" [[package]] name = "svd-parser" -version = "0.14.3" +version = "0.14.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d9c0521573455cce71aa930fd500d25d8f8be4f6a857d3dafe1963d9e14fffbb" +checksum = "b49637951d99ea9f89b2bfb269ff0a21b8d647d01b0bb9949987b98871548fef" dependencies = [ "anyhow", "roxmltree", @@ -494,9 +494,9 @@ dependencies = [ [[package]] name = "svd-rs" -version = "0.14.5" +version = "0.14.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "dc56f34e2a3669bf718f48138273d66f98ab863ae5db5e3e3b291977f53025f4" +checksum = "88d664449a290ecd6253d977d350cdf4026781223a72473fc55ea1e456e2b5d9" dependencies = [ "once_cell", "regex", @@ -673,7 +673,16 @@ version = "0.48.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "677d2418bec65e3338edb076e806bc1ec15693c5d0104683f2efe857f61056a9" dependencies = [ - "windows-targets", + "windows-targets 0.48.5", +] + +[[package]] +name = "windows-sys" +version = "0.52.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "282be5f36a8ce781fad8c8ae18fa3f9beff57ec1b52cb3de0789201425d9a33d" +dependencies = [ + "windows-targets 0.52.0", ] [[package]] @@ -682,13 +691,28 @@ version = "0.48.5" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "9a2fa6e2155d7247be68c096456083145c183cbbbc2764150dda45a87197940c" dependencies = [ - "windows_aarch64_gnullvm", - "windows_aarch64_msvc", - "windows_i686_gnu", - "windows_i686_msvc", - "windows_x86_64_gnu", - "windows_x86_64_gnullvm", - "windows_x86_64_msvc", + "windows_aarch64_gnullvm 0.48.5", + "windows_aarch64_msvc 0.48.5", + "windows_i686_gnu 0.48.5", + "windows_i686_msvc 0.48.5", + "windows_x86_64_gnu 0.48.5", + "windows_x86_64_gnullvm 0.48.5", + "windows_x86_64_msvc 0.48.5", +] + +[[package]] +name = "windows-targets" +version = "0.52.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8a18201040b24831fbb9e4eb208f8892e1f50a37feb53cc7ff887feb8f50e7cd" +dependencies = [ + "windows_aarch64_gnullvm 0.52.0", + "windows_aarch64_msvc 0.52.0", + "windows_i686_gnu 0.52.0", + "windows_i686_msvc 0.52.0", + "windows_x86_64_gnu 0.52.0", + "windows_x86_64_gnullvm 0.52.0", + "windows_x86_64_msvc 0.52.0", ] [[package]] @@ -697,42 +721,84 @@ version = "0.48.5" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "2b38e32f0abccf9987a4e3079dfb67dcd799fb61361e53e2882c3cbaf0d905d8" +[[package]] +name = "windows_aarch64_gnullvm" +version = "0.52.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "cb7764e35d4db8a7921e09562a0304bf2f93e0a51bfccee0bd0bb0b666b015ea" + [[package]] name = "windows_aarch64_msvc" version = "0.48.5" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "dc35310971f3b2dbbf3f0690a219f40e2d9afcf64f9ab7cc1be722937c26b4bc" +[[package]] +name = "windows_aarch64_msvc" +version = "0.52.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "bbaa0368d4f1d2aaefc55b6fcfee13f41544ddf36801e793edbbfd7d7df075ef" + [[package]] name = "windows_i686_gnu" version = "0.48.5" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "a75915e7def60c94dcef72200b9a8e58e5091744960da64ec734a6c6e9b3743e" +[[package]] +name = "windows_i686_gnu" +version = "0.52.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a28637cb1fa3560a16915793afb20081aba2c92ee8af57b4d5f28e4b3e7df313" + [[package]] name = "windows_i686_msvc" version = "0.48.5" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "8f55c233f70c4b27f66c523580f78f1004e8b5a8b659e05a4eb49d4166cca406" +[[package]] +name = "windows_i686_msvc" +version = "0.52.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ffe5e8e31046ce6230cc7215707b816e339ff4d4d67c65dffa206fd0f7aa7b9a" + [[package]] name = "windows_x86_64_gnu" version = "0.48.5" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "53d40abd2583d23e4718fddf1ebec84dbff8381c07cae67ff7768bbf19c6718e" +[[package]] +name = "windows_x86_64_gnu" +version = "0.52.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "3d6fa32db2bc4a2f5abeacf2b69f7992cd09dca97498da74a151a3132c26befd" + [[package]] name = "windows_x86_64_gnullvm" version = "0.48.5" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "0b7b52767868a23d5bab768e390dc5f5c55825b6d30b86c844ff2dc7414044cc" +[[package]] +name = "windows_x86_64_gnullvm" +version = "0.52.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1a657e1e9d3f514745a572a6846d3c7aa7dbe1658c056ed9c3344c4109a6949e" + [[package]] name = "windows_x86_64_msvc" version = "0.48.5" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "ed94fce61571a4006852b7389a063ab983c02eb1bb37b47f8272ce92d06d9538" +[[package]] +name = "windows_x86_64_msvc" +version = "0.52.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "dff9641d1cd4be8d1a070daf9e3773c5f67e78b4d9d42263020c057706765c04" + [[package]] name = "winnow" version = "0.5.19" diff --git a/Cargo.toml b/Cargo.toml index 21523c76..d861cdc2 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -60,11 +60,11 @@ html-escape = "0.2" [dependencies.svd-parser] features = ["expand"] -version = "0.14.3" +version = "0.14.4" [dependencies.svd-rs] features = ["serde"] -version = "0.14.5" +version = "0.14.6" [dependencies.syn] version = "2.0" diff --git a/src/lib.rs b/src/lib.rs index 85941278..251d7e8e 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -620,24 +620,34 @@ pub fn load_from(input: &str, config: &Config) -> Result { use config::SourceType; use svd_parser::ValidateLevel; + let validate_level = if config.strict { + ValidateLevel::Strict + } else { + ValidateLevel::Weak + }; + let mut device = match config.source_type { SourceType::Xml => { let mut parser_config = svd_parser::Config::default(); - parser_config.validate_level = if config.strict { - ValidateLevel::Strict - } else { - ValidateLevel::Weak - }; + parser_config.validate_level = validate_level; svd_parser::parse_with_config(input, &parser_config) .with_context(|| "Error parsing SVD XML file".to_string())? } #[cfg(feature = "yaml")] - SourceType::Yaml => serde_yaml::from_str(input) - .with_context(|| "Error parsing SVD YAML file".to_string())?, + SourceType::Yaml => { + let device: svd::Device = serde_yaml::from_str(input) + .with_context(|| "Error parsing SVD YAML file".to_string())?; + device.validate_all(validate_level)?; + device + } #[cfg(feature = "json")] - SourceType::Json => serde_json::from_str(input) - .with_context(|| "Error parsing SVD JSON file".to_string())?, + SourceType::Json => { + let device: svd::Device = serde_json::from_str(input) + .with_context(|| "Error parsing SVD JSON file".to_string())?; + device.validate_all(validate_level)?; + device + } }; svd_parser::expand_properties(&mut device); Ok(device) From 90b406aae49f00357277f09bb25c9b7cf0d57f6d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Sun, 4 Jun 2023 21:27:13 +0200 Subject: [PATCH 167/319] add output to gitignore --- .gitignore | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.gitignore b/.gitignore index f6537508..33b07514 100644 --- a/.gitignore +++ b/.gitignore @@ -3,4 +3,4 @@ *.rs.bk *.svd target -ci/svd2rust-regress/Cargo.lock +output From 4ea35e5bdf7acc9eaada7483d5bd6cd7d151c561 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Sun, 4 Jun 2023 21:27:26 +0200 Subject: [PATCH 168/319] Improve svd2rust-regress --- .github/workflows/ci.yml | 26 + Cargo.toml | 5 + ci/svd2rust-regress/Cargo.toml | 9 +- ci/svd2rust-regress/src/errors.rs | 9 - ci/svd2rust-regress/src/github.rs | 169 ++ ci/svd2rust-regress/src/main.rs | 416 +-- ci/svd2rust-regress/src/svd_test.rs | 378 +-- ci/svd2rust-regress/src/tests.rs | 4168 +-------------------------- ci/svd2rust-regress/tests.json | 4098 ++++++++++++++++++++++++++ 9 files changed, 4766 insertions(+), 4512 deletions(-) delete mode 100644 ci/svd2rust-regress/src/errors.rs create mode 100644 ci/svd2rust-regress/src/github.rs create mode 100644 ci/svd2rust-regress/tests.json diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index ca0b9cf1..281705c2 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -171,3 +171,29 @@ jobs: uses: Swatinem/rust-cache@v2 - run: cargo fmt --all -- --check + + artifact: + name: Build svd2rust artifact + if: github.event_name == 'pull_request' + needs: [check] + runs-on: ubuntu-latest + steps: + - uses: actions/checkout@v3 + + - uses: dtolnay/rust-toolchain@master + with: + toolchain: stable + + - name: Cache Dependencies + uses: Swatinem/rust-cache@v2 + + - name: Build svd2rust artifact + run: cargo build --release + + - run: mv target/release/svd2rust svd2rust-x86_64-unknown-linux-gnu-$(git rev-parse --short HEAD) + + - name: Upload artifact + uses: actions/upload-artifact@v3 + with: + name: artifact-svd2rust-x86_64-unknown-linux-gnu + path: svd2rust-x86_64-unknown-linux-gnu* diff --git a/Cargo.toml b/Cargo.toml index d861cdc2..de83adaf 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -69,3 +69,8 @@ version = "0.14.6" [dependencies.syn] version = "2.0" features = ["full","extra-traits"] + +[workspace] +members = ["ci/svd2rust-regress"] +default-members = ["."] +exclude = ["output"] \ No newline at end of file diff --git a/ci/svd2rust-regress/Cargo.toml b/ci/svd2rust-regress/Cargo.toml index 641368f9..3d36943c 100644 --- a/ci/svd2rust-regress/Cargo.toml +++ b/ci/svd2rust-regress/Cargo.toml @@ -5,8 +5,13 @@ version = "0.1.0" authors = ["James Munns ", "The svd2rust developers"] [dependencies] -clap = { version = "4.1", features = ["color", "derive"] } +clap = { version = "4.1", features = ["color", "derive", "string"] } svd2rust = { path = "../../" } reqwest = { version = "0.11", features= ["blocking"] } rayon = "1.4" -error-chain = "0.12" +anyhow = "1" +thiserror = "1" +serde = "1" +serde_json = "1" +prettyplease = "0.2" +syn = "2" diff --git a/ci/svd2rust-regress/src/errors.rs b/ci/svd2rust-regress/src/errors.rs deleted file mode 100644 index cf598bf5..00000000 --- a/ci/svd2rust-regress/src/errors.rs +++ /dev/null @@ -1,9 +0,0 @@ -use std::path::PathBuf; -error_chain! { - errors { - ProcessFailed(command: String, stderr: Option, stdout: Option, previous_processes_stderr: Vec) { - description("Process Failed") - display("Process Failed - {}", command) - } - } -} diff --git a/ci/svd2rust-regress/src/github.rs b/ci/svd2rust-regress/src/github.rs new file mode 100644 index 00000000..2f0bf222 --- /dev/null +++ b/ci/svd2rust-regress/src/github.rs @@ -0,0 +1,169 @@ +use std::process::{Command, Output}; +use std::{ffi::OsStr, path::Path}; +use std::{iter::IntoIterator, path::PathBuf}; + +use anyhow::Context; + +pub fn run_gh(args: I) -> Command +where + I: IntoIterator, + S: AsRef, +{ + let mut command = Command::new("gh"); + command.args(args); + command +} + +pub fn get_current_pr() -> Result { + let pr = run_gh([ + "pr", + "view", + "--json", + "number", + "--template", + "{{.number}}", + ]) + .output()?; + String::from_utf8(pr.stdout)? + .trim() + .parse() + .map_err(Into::into) +} + +pub fn get_pr_run_id(pr: usize) -> Result { + let run_id = run_gh([ + "api", + &format!("repos/:owner/:repo/actions/runs?event=pull_request&pr={pr}"), + "--jq", + r#"[.workflow_runs[] | select(.name == "Continuous integration")][0] | .id"#, + ]) + .output()?; + String::from_utf8(run_id.stdout)? + .trim() + .parse() + .map_err(Into::into) +} + +pub fn get_release_run_id(event: &str) -> Result { + let query = match event { + "master" => "branch=master".to_owned(), + _ => anyhow::bail!("unknown event"), + }; + let run_id = dbg!(run_gh([ + "api", + &format!("repos/:owner/:repo/actions/runs?{query}"), + "--jq", + r#"[.workflow_runs[] | select(.name == "release")][0] | .id"#, + ]) + .output()) + .with_context(|| "couldn't run gh")?; + String::from_utf8(run_id.stdout)? + .trim() + .parse() + .map_err(Into::into) +} + +fn find(dir: &Path, begins: &str) -> Result, anyhow::Error> { + let find = |entry, begins: &str| -> Result, std::io::Error> { + let entry: std::fs::DirEntry = entry?; + let filename = entry.file_name(); + let filename = filename.to_string_lossy(); + if entry.metadata()?.is_file() && filename.starts_with(begins) { + Ok(Some(entry.path())) + } else { + Ok(None) + } + }; + let mut read_dir = std::fs::read_dir(dir)?; + read_dir + .find_map(|entry| find(entry, begins).transpose()) + .transpose() + .map_err(Into::into) +} + +pub fn get_release_binary_artifact( + reference: &str, + output_dir: &Path, +) -> Result { + let output_dir = output_dir.join(reference); + if let Some(binary) = find(&output_dir, "svd2rust")? { + return Ok(binary); + } + + match reference { + reference if reference.starts_with('v') || matches!(reference, "master" | "latest") => { + let tag = if reference == "master" { + Some("Unreleased") + } else if reference == "latest" { + None + } else { + Some(reference) + }; + run_gh([ + "release", + "download", + "--pattern", + "svd2rust-x86_64-unknown-linux-gnu.gz", + "--dir", + ]) + .arg(&output_dir) + .args(tag) + .status()?; + + Command::new("tar") + .arg("-xzf") + .arg(output_dir.join("svd2rust-x86_64-unknown-linux-gnu.gz")) + .arg("-C") + .arg(&output_dir) + .output() + .expect("Failed to execute command"); + } + _ => { + let run_id = get_release_run_id(reference)?; + run_gh([ + "run", + "download", + &run_id.to_string(), + "-n", + "svd2rust-x86_64-unknown-linux-gnu", + "--dir", + ]) + .arg(&output_dir) + .output()?; + } + } + let binary = find(&output_dir, "svd2rust")?; + binary.ok_or_else(|| anyhow::anyhow!("no binary found")) +} + +pub fn get_pr_binary_artifact(pr: usize, output_dir: &Path) -> Result { + let output_dir = output_dir.join(format!("{pr}")); + let run_id = get_pr_run_id(pr)?; + run_gh([ + "run", + "download", + &run_id.to_string(), + "-n", + "artifact-svd2rust-x86_64-unknown-linux-gnu", + "--dir", + ]) + .arg(&output_dir) + .output()?; + let mut read_dir = std::fs::read_dir(output_dir)?; + let binary = read_dir + .find_map(|entry| { + let find = |entry| -> Result, std::io::Error> { + let entry: std::fs::DirEntry = entry?; + let filename = entry.file_name(); + let filename = filename.to_string_lossy(); + if entry.metadata()?.is_file() && filename.starts_with("svd2rust-regress") { + Ok(Some(entry.path())) + } else { + Ok(None) + } + }; + find(entry).transpose() + }) + .transpose()?; + binary.ok_or_else(|| anyhow::anyhow!("no binary found")) +} diff --git a/ci/svd2rust-regress/src/main.rs b/ci/svd2rust-regress/src/main.rs index 3ee39955..b53718dc 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/ci/svd2rust-regress/src/main.rs @@ -1,12 +1,7 @@ -#[macro_use] -extern crate error_chain; - -mod errors; mod svd_test; mod tests; use clap::Parser; -use error_chain::ChainedError; use rayon::prelude::*; use std::fs::File; use std::io::Read; @@ -15,99 +10,272 @@ use std::process::{exit, Command}; use std::sync::atomic::{AtomicBool, Ordering}; use std::time::Instant; -#[derive(Parser, Debug)] +/// Returns the cargo workspace for the manifest +pub fn get_cargo_workspace() -> &'static std::path::Path { + static WORKSPACE: std::sync::OnceLock = std::sync::OnceLock::new(); + #[derive(Debug, serde::Deserialize)] + pub struct CargoMetadata { + pub workspace_root: PathBuf, + } + WORKSPACE.get_or_init(|| { + std::process::Command::new("cargo") + .args(["metadata", "--format-version", "1"]) + .output() + .map(|v| String::from_utf8(v.stdout)) + .unwrap() + .map_err(anyhow::Error::from) + .and_then(|s: String| serde_json::from_str::(&s).map_err(Into::into)) + .unwrap() + .workspace_root + }) +} + +#[derive(clap::Parser, Debug)] #[command(name = "svd2rust-regress")] -struct Opt { +pub struct Tests { /// Run a long test (it's very long) #[clap(short = 'l', long)] - long_test: bool, - - /// Path to an `svd2rust` binary, relative or absolute. - /// Defaults to `target/release/svd2rust[.exe]` of this repository - /// (which must be already built) - #[clap(short = 'p', long = "svd2rust-path")] - bin_path: Option, + pub long_test: bool, // TODO: Consider using the same strategy cargo uses for passing args to rustc via `--` /// Run svd2rust with `--atomics` #[clap(long)] - atomics: bool, + pub atomics: bool, /// Filter by chip name, case sensitive, may be combined with other filters - #[clap(short = 'c', long, value_parser = validate_chips)] - chip: Vec, + #[clap(short = 'c', long)] + pub chip: Vec, /// Filter by manufacturer, case sensitive, may be combined with other filters #[clap( - short = 'm', - long = "manufacturer", - value_parser = validate_manufacturer, - )] - mfgr: Option, + short = 'm', + long = "manufacturer", + value_parser = validate_manufacturer, +)] + pub mfgr: Option, /// Filter by architecture, case sensitive, may be combined with other filters /// Options are: "CortexM", "RiscV", "Msp430", "Mips" and "XtensaLX" #[clap( - short = 'a', - long = "architecture", - value_parser = validate_architecture, - )] - arch: Option, + short = 'a', + long = "architecture", + value_parser = validate_architecture, +)] + pub arch: Option, /// Include tests expected to fail (will cause a non-zero return code) #[clap(short = 'b', long)] - bad_tests: bool, + pub bad_tests: bool, /// Enable formatting with `rustfmt` #[clap(short = 'f', long)] - format: bool, + pub format: bool, /// Print all available test using the specified filters #[clap(long)] - list: bool, + pub list: bool, + // TODO: Specify smaller subset of tests? Maybe with tags? + // TODO: Compile svd2rust? +} + +impl Tests { + fn run( + &self, + opt: &Opts, + bin_path: &PathBuf, + rustfmt_bin_path: Option<&PathBuf>, + ) -> Result, anyhow::Error> { + let tests = tests::tests(None)? + .iter() + // Short test? + .filter(|t| t.should_run(!self.long_test)) + // selected architecture? + .filter(|t| { + if let Some(ref arch) = self.arch { + arch == &format!("{:?}", t.arch) + } else { + true + } + }) + // selected manufacturer? + .filter(|t| { + if let Some(ref mfgr) = self.mfgr { + mfgr == &format!("{:?}", t.mfgr) + } else { + true + } + }) + // Specify chip - note: may match multiple + .filter(|t| { + if !self.chip.is_empty() { + self.chip.iter().any(|c| c == &t.chip) + } else { + true + } + }) + // Run failable tests? + .filter(|t| self.bad_tests || t.should_pass) + .collect::>(); + if self.list { + // FIXME: Prettier output + eprintln!("{:?}", tests.iter().map(|t| t.name()).collect::>()); + exit(0); + } + if tests.is_empty() { + eprintln!("No tests run, you might want to use `--bad-tests` and/or `--long-test`"); + } + let any_fails = AtomicBool::new(false); + tests.par_iter().for_each(|t| { + let start = Instant::now(); + + match t.test(bin_path, rustfmt_bin_path, self.atomics, opt.verbose) { + Ok(s) => { + if let Some(stderrs) = s { + let mut buf = String::new(); + for stderr in stderrs { + read_file(&stderr, &mut buf); + } + eprintln!( + "Passed: {} - {} seconds\n{}", + t.name(), + start.elapsed().as_secs(), + buf + ); + } else { + eprintln!( + "Passed: {} - {} seconds", + t.name(), + start.elapsed().as_secs() + ); + } + } + Err(e) => { + any_fails.store(true, Ordering::Release); + let additional_info = if opt.verbose > 0 { + match &e { + svd_test::TestError::Process(svd_test::ProcessFailed { + stderr: Some(ref stderr), + previous_processes_stderr, + .. + }) => { + let mut buf = String::new(); + if opt.verbose > 1 { + for stderr in previous_processes_stderr { + read_file(stderr, &mut buf); + } + } + read_file(stderr, &mut buf); + buf + } + _ => "".into(), + } + } else { + "".into() + }; + eprintln!( + "Failed: {} - {} seconds. {:?}{}", + t.name(), + start.elapsed().as_secs(), + anyhow::Error::new(e), + additional_info, + ); + } + } + }); + if any_fails.load(Ordering::Acquire) { + exit(1); + } else { + exit(0); + } + } +} + +#[derive(clap::Subcommand, Debug)] +pub enum Subcommand { + Tests(Tests), +} + +#[derive(Parser, Debug)] +#[command(name = "svd2rust-regress")] +pub struct Opts { + /// Use verbose output + #[clap(global = true, long, short = 'v', action = clap::ArgAction::Count)] + pub verbose: u8, + + /// Path to an `svd2rust` binary, relative or absolute. + /// Defaults to `target/release/svd2rust[.exe]` of this repository + /// (which must be already built) + #[clap(global = true, short = 'p', long = "svd2rust-path", default_value = default_svd2rust())] + pub bin_path: PathBuf, /// Path to an `rustfmt` binary, relative or absolute. /// Defaults to `$(rustup which rustfmt)` - #[clap(long)] - rustfmt_bin_path: Option, + #[clap(global = true, long)] + pub rustfmt_bin_path: Option, /// Specify what rustup toolchain to use when compiling chip(s) - #[clap(long = "toolchain")] // , env = "RUSTUP_TOOLCHAIN" - rustup_toolchain: Option, + #[clap(global = true, long = "toolchain")] // , env = "RUSTUP_TOOLCHAIN" + pub rustup_toolchain: Option, - /// Use verbose output - #[clap(long, short = 'v', action = clap::ArgAction::Count)] - verbose: u8, - // TODO: Specify smaller subset of tests? Maybe with tags? - // TODO: Compile svd2rust? -} + /// Test cases to run, defaults to `tests.json` + #[clap(global = true, long, default_value = default_test_cases())] + pub test_cases: std::path::PathBuf, -fn validate_chips(s: &str) -> Result<(), String> { - if tests::TESTS.iter().any(|t| t.chip == s) { - Ok(()) - } else { - Err(format!("Chip `{}` is not a valid value", s)) + #[clap(subcommand)] + subcommand: Subcommand, +} +impl Opts { + fn use_rustfmt(&self) -> bool { + match self.subcommand { + Subcommand::Tests(Tests { format, .. }) => format, + } } } -fn validate_architecture(s: &str) -> Result<(), String> { - if tests::TESTS.iter().any(|t| format!("{:?}", t.arch) == s) { +/// Hack to use ci/tests.json as default value when running as `cargo run` +fn default_test_cases() -> std::ffi::OsString { + std::env::var_os("CARGO_MANIFEST_DIR") + .map(|mut e| { + e.extend([std::ffi::OsStr::new("/tests.json")]); + std::path::PathBuf::from(e) + .strip_prefix(std::env::current_dir().unwrap()) + .unwrap() + .to_owned() + .into_os_string() + }) + .unwrap_or_else(|| std::ffi::OsString::from("tests.json".to_owned())) +} + +fn default_svd2rust() -> std::ffi::OsString { + get_cargo_workspace() + .join("target/release/svd2rust") + .into_os_string() +} + +fn validate_architecture(s: &str) -> Result<(), anyhow::Error> { + if tests::tests(None)? + .iter() + .any(|t| format!("{:?}", t.arch) == s) + { Ok(()) } else { - Err(format!("Architecture `{s}` is not a valid value")) + anyhow::bail!("Architecture `{s}` is not a valid value") } } -fn validate_manufacturer(s: &str) -> Result<(), String> { - if tests::TESTS.iter().any(|t| format!("{:?}", t.mfgr) == s) { +fn validate_manufacturer(s: &str) -> Result<(), anyhow::Error> { + if tests::tests(None)? + .iter() + .any(|t| format!("{:?}", t.mfgr) == s) + { Ok(()) } else { - Err(format!("Manufacturer `{s}` is not a valid value")) + anyhow::bail!("Manufacturer `{s}` is not a valid value") } } /// Validate any assumptions made by this program -fn validate_tests(tests: &[&tests::TestCase]) { +fn validate_tests(tests: &[tests::TestCase]) { use std::collections::HashSet; let mut fail = false; @@ -139,47 +307,32 @@ fn read_file(path: &PathBuf, buf: &mut String) { .expect("Couldn't read file to string"); } -fn main() { - let opt = Opt::parse(); +fn main() -> Result<(), anyhow::Error> { + let opt = Opts::parse(); // Validate all test pre-conditions - validate_tests(tests::TESTS); + validate_tests(tests::tests(Some(&opt))?); - // Determine default svd2rust path - let default_svd2rust_iter = ["..", "..", "..", "..", "target", "release"]; - - let default_svd2rust = if cfg!(windows) { - default_svd2rust_iter.iter().chain(["svd2rust.exe"].iter()) - } else { - default_svd2rust_iter.iter().chain(["svd2rust"].iter()) - } - .collect(); - - let bin_path = match opt.bin_path { - Some(ref bp) => bp, - None => &default_svd2rust, - }; + let bin_path = &opt.bin_path; + anyhow::ensure!(bin_path.exists(), "svd2rust binary does not exist"); let default_rustfmt: Option = if let Some((v, true)) = Command::new("rustup") - .args(&["which", "rustfmt"]) + .args(["which", "rustfmt"]) .output() .ok() .map(|o| (o.stdout, o.status.success())) { Some(String::from_utf8_lossy(&v).into_owned().trim().into()) } else { - if opt.format && opt.rustfmt_bin_path.is_none() { - panic!("rustfmt binary not found, is rustup and rustfmt-preview installed?"); - } None }; - let rustfmt_bin_path = match (&opt.rustfmt_bin_path, opt.format) { + let rustfmt_bin_path = match (&opt.rustfmt_bin_path, opt.use_rustfmt()) { (_, false) => None, - (&Some(ref path), true) => Some(path), + (Some(path), true) => Some(path), (&None, true) => { // FIXME: Use Option::filter instead when stable, rust-lang/rust#45860 - if default_rustfmt.iter().find(|p| p.is_file()).is_none() { + if !default_rustfmt.iter().any(|p| p.is_file()) { panic!("No rustfmt found"); } default_rustfmt.as_ref() @@ -191,114 +344,7 @@ fn main() { std::env::set_var("RUSTUP_TOOLCHAIN", toolchain); } - // collect enabled tests - let tests = tests::TESTS - .iter() - // Short test? - .filter(|t| t.should_run(!opt.long_test)) - // selected architecture? - .filter(|t| { - if let Some(ref arch) = opt.arch { - arch == &format!("{:?}", t.arch) - } else { - true - } - }) - // selected manufacturer? - .filter(|t| { - if let Some(ref mfgr) = opt.mfgr { - mfgr == &format!("{:?}", t.mfgr) - } else { - true - } - }) - // Specify chip - note: may match multiple - .filter(|t| { - if !opt.chip.is_empty() { - opt.chip.iter().any(|c| c == t.chip) - } else { - true - } - }) - // Run failable tests? - .filter(|t| opt.bad_tests || t.should_pass) - .collect::>(); - - if opt.list { - // FIXME: Prettier output - eprintln!("{:?}", tests.iter().map(|t| t.name()).collect::>()); - exit(0); - } - if tests.is_empty() { - eprintln!("No tests run, you might want to use `--bad-tests` and/or `--long-test`"); - } - - let any_fails = AtomicBool::new(false); - - // TODO: It would be more efficient to reuse directories, so we don't - // have to rebuild all the deps crates - tests.par_iter().for_each(|t| { - let start = Instant::now(); - - match svd_test::test(t, &bin_path, rustfmt_bin_path, opt.atomics, opt.verbose) { - Ok(s) => { - if let Some(stderrs) = s { - let mut buf = String::new(); - for stderr in stderrs { - read_file(&stderr, &mut buf); - } - eprintln!( - "Passed: {} - {} seconds\n{}", - t.name(), - start.elapsed().as_secs(), - buf - ); - } else { - eprintln!( - "Passed: {} - {} seconds", - t.name(), - start.elapsed().as_secs() - ); - } - } - Err(e) => { - any_fails.store(true, Ordering::Release); - let additional_info = if opt.verbose > 0 { - match *e.kind() { - errors::ErrorKind::ProcessFailed( - _, - _, - Some(ref stderr), - ref previous_processes_stderr, - ) => { - let mut buf = String::new(); - if opt.verbose > 1 { - for stderr in previous_processes_stderr { - read_file(&stderr, &mut buf); - } - } - read_file(&stderr, &mut buf); - buf - } - _ => "".into(), - } - } else { - "".into() - }; - eprintln!( - "Failed: {} - {} seconds. {}{}", - t.name(), - start.elapsed().as_secs(), - e.display_chain().to_string().trim_end(), - additional_info, - ); - } - } - }); - - if any_fails.load(Ordering::Acquire) { - exit(1); - } else { - exit(0); + match &opt.subcommand { + Subcommand::Tests(tests_opts) => tests_opts.run(&opt, bin_path, rustfmt_bin_path)?, } } diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index a1404660..ea7c6b57 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -1,9 +1,14 @@ -use crate::errors::*; +use anyhow::{Context, Result}; +use svd2rust::Target; + use crate::tests::TestCase; -use std::fs::{self, File, OpenOptions}; use std::io::prelude::*; use std::path::PathBuf; use std::process::{Command, Output}; +use std::{ + fs::{self, File, OpenOptions}, + path::Path, +}; const CRATES_ALL: &[&str] = &["critical-section = \"1.0\"", "vcell = \"0.1.2\""]; const CRATES_MSP430: &[&str] = &["msp430 = \"0.4.0\"", "msp430-rt = \"0.4.0\""]; @@ -21,22 +26,45 @@ fn path_helper(input: &[&str]) -> PathBuf { input.iter().collect() } -fn path_helper_base(base: &PathBuf, input: &[&str]) -> PathBuf { - let mut path = base.clone(); - input.iter().for_each(|p| path.push(p)); - path +fn path_helper_base(base: &Path, input: &[&str]) -> PathBuf { + input + .iter() + .fold(base.to_owned(), |b: PathBuf, p| b.join(p)) } /// Create and write to file -fn file_helper(payload: &str, path: &PathBuf) -> Result<()> { - let mut f = File::create(path).chain_err(|| format!("Failed to create {path:?}"))?; +fn file_helper(payload: &str, path: &Path) -> Result<()> { + let mut f = File::create(path).with_context(|| format!("Failed to create {path:?}"))?; f.write_all(payload.as_bytes()) - .chain_err(|| format!("Failed to write to {path:?}"))?; + .with_context(|| format!("Failed to write to {path:?}"))?; Ok(()) } +#[derive(thiserror::Error)] +#[error("Process failed - {command}")] +pub struct ProcessFailed { + pub command: String, + pub stderr: Option, + pub stdout: Option, + pub previous_processes_stderr: Vec, +} + +#[derive(Debug, thiserror::Error)] +pub enum TestError { + #[error(transparent)] + Process(#[from] ProcessFailed), + #[error("Failed to run test")] + Other(#[from] anyhow::Error), +} + +impl std::fmt::Debug for ProcessFailed { + fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result { + f.write_str("Process failed") + } +} + trait CommandHelper { fn capture_outputs( &self, @@ -45,7 +73,7 @@ trait CommandHelper { stdout: Option<&PathBuf>, stderr: Option<&PathBuf>, previous_processes_stderr: &[PathBuf], - ) -> Result<()>; + ) -> Result<(), TestError>; } impl CommandHelper for Output { @@ -56,7 +84,7 @@ impl CommandHelper for Output { stdout: Option<&PathBuf>, stderr: Option<&PathBuf>, previous_processes_stderr: &[PathBuf], - ) -> Result<()> { + ) -> Result<(), TestError> { if let Some(out) = stdout { let out_payload = String::from_utf8_lossy(&self.stdout); file_helper(&out_payload, out)?; @@ -68,12 +96,12 @@ impl CommandHelper for Output { }; if cant_fail && !self.status.success() { - return Err(ErrorKind::ProcessFailed( - name.into(), - stdout.cloned(), - stderr.cloned(), - previous_processes_stderr.to_vec(), - ) + return Err(ProcessFailed { + command: name.into(), + stdout: stdout.cloned(), + stderr: stderr.cloned(), + previous_processes_stderr: previous_processes_stderr.to_vec(), + } .into()); } @@ -81,171 +109,171 @@ impl CommandHelper for Output { } } -pub fn test( - t: &TestCase, - bin_path: &PathBuf, - rustfmt_bin_path: Option<&PathBuf>, - atomics: bool, - verbosity: u8, -) -> Result>> { - let user = match std::env::var("USER") { - Ok(val) => val, - Err(_) => "rusttester".into(), - }; - - // Remove the existing chip directory, if it exists - let chip_dir = path_helper(&["output", &t.name()]); - if let Err(err) = fs::remove_dir_all(&chip_dir) { - match err.kind() { - std::io::ErrorKind::NotFound => (), - _ => Err(err).chain_err(|| "While removing chip directory")?, - } - } - - // Used to build the output from stderr for -v and -vv* - let mut process_stderr_paths: Vec = vec![]; - - // Create a new cargo project. It is necesary to set the user, otherwise - // cargo init will not work (when running in a container with no user set) - Command::new("cargo") - .env("USER", user) - .arg("init") - .arg("--name") - .arg(&t.name()) - .arg("--vcs") - .arg("none") - .arg(&chip_dir) - .output() - .chain_err(|| "Failed to cargo init")? - .capture_outputs(true, "cargo init", None, None, &[])?; - - // Add some crates to the Cargo.toml of our new project - let svd_toml = path_helper_base(&chip_dir, &["Cargo.toml"]); - let mut file = OpenOptions::new() - .write(true) - .append(true) - .open(svd_toml) - .chain_err(|| "Failed to open Cargo.toml for appending")?; - - use crate::tests::Target; - let crates = CRATES_ALL - .iter() - .chain(match &t.arch { - Target::CortexM => CRATES_CORTEX_M.iter(), - Target::RISCV => CRATES_RISCV.iter(), - Target::Mips => CRATES_MIPS.iter(), - Target::Msp430 => CRATES_MSP430.iter(), - Target::XtensaLX => CRATES_XTENSALX.iter(), - Target::None => unreachable!(), - }) - .chain(if atomics { - CRATES_ATOMICS.iter() +impl TestCase { + pub fn test( + &self, + bin_path: &PathBuf, + rustfmt_bin_path: Option<&PathBuf>, + atomics: bool, + verbosity: u8, + ) -> Result>, TestError> { + let (chip_dir, mut process_stderr_paths) = + self.setup_case(atomics, bin_path, rustfmt_bin_path)?; + // Run `cargo check`, capturing stderr to a log file + let cargo_check_err_file = path_helper_base(&chip_dir, &["cargo-check.err.log"]); + let output = Command::new("cargo") + .arg("check") + .current_dir(&chip_dir) + .output() + .with_context(|| "failed to check")?; + output.capture_outputs( + true, + "cargo check", + None, + Some(&cargo_check_err_file), + &process_stderr_paths, + )?; + process_stderr_paths.push(cargo_check_err_file); + Ok(if verbosity > 1 { + Some(process_stderr_paths) } else { - [].iter() + None }) - .chain(PROFILE_ALL.iter()) - .chain(FEATURES_ALL.iter()) - .chain(match &t.arch { - Target::XtensaLX => FEATURES_XTENSALX.iter(), - _ => [].iter(), - }); - - for c in crates { - writeln!(file, "{}", c).chain_err(|| "Failed to append to file!")?; } - // Download the SVD as specified in the URL - // TODO: Check for existing svd files? `--no-cache` flag? - let svd = reqwest::blocking::get(&t.svd_url()) - .chain_err(|| "Failed to get svd URL")? - .text() - .chain_err(|| "SVD is bad text")?; - - // Write SVD contents to file - let chip_svd = format!("{}.svd", &t.chip); - let svd_file = path_helper_base(&chip_dir, &[&chip_svd]); - file_helper(&svd, &svd_file)?; - - // Generate the lib.rs from the SVD file using the specified `svd2rust` binary - // If the architecture is cortex-m or msp430 we move the generated lib.rs file to src/ - let lib_rs_file = path_helper_base(&chip_dir, &["src", "lib.rs"]); - let svd2rust_err_file = path_helper_base(&chip_dir, &["svd2rust.err.log"]); - let target = match t.arch { - Target::CortexM => "cortex-m", - Target::Msp430 => "msp430", - Target::Mips => "mips", - Target::RISCV => "riscv", - Target::XtensaLX => "xtensa-lx", - Target::None => unreachable!(), - }; - let mut svd2rust_bin = Command::new(bin_path); - if atomics { - svd2rust_bin.arg("--atomics"); - } - - let output = svd2rust_bin - .args(&["-i", &chip_svd]) - .args(&["--target", &target]) - .current_dir(&chip_dir) - .output() - .chain_err(|| "failed to execute process")?; - output.capture_outputs( - true, - "svd2rust", - Some(&lib_rs_file).filter(|_| { - (t.arch != Target::CortexM) - && (t.arch != Target::Msp430) - && (t.arch != Target::XtensaLX) - }), - Some(&svd2rust_err_file), - &[], - )?; - process_stderr_paths.push(svd2rust_err_file); - - match t.arch { - Target::CortexM | Target::Mips | Target::Msp430 | Target::XtensaLX => { - // TODO: Give error the path to stderr - fs::rename(path_helper_base(&chip_dir, &["lib.rs"]), &lib_rs_file) - .chain_err(|| "While moving lib.rs file")? + pub fn setup_case( + &self, + atomics: bool, + bin_path: &PathBuf, + rustfmt_bin_path: Option<&PathBuf>, + ) -> Result<(PathBuf, Vec), TestError> { + let user = match std::env::var("USER") { + Ok(val) => val, + Err(_) => "rusttester".into(), + }; + let chip_dir = path_helper(&["output", &self.name()]); + if let Err(err) = fs::remove_dir_all(&chip_dir) { + match err.kind() { + std::io::ErrorKind::NotFound => (), + _ => Err(err).with_context(|| "While removing chip directory")?, + } } - _ => {} - } - - let rustfmt_err_file = path_helper_base(&chip_dir, &["rustfmt.err.log"]); - if let Some(rustfmt_bin_path) = rustfmt_bin_path { - // Run `cargo fmt`, capturing stderr to a log file - - let output = Command::new(rustfmt_bin_path) - .arg(lib_rs_file) + let mut process_stderr_paths: Vec = vec![]; + Command::new("cargo") + .env("USER", user) + .arg("init") + .arg("--name") + .arg(&self.name()) + .arg("--vcs") + .arg("none") + .arg(&chip_dir) .output() - .chain_err(|| "failed to format")?; + .with_context(|| "Failed to cargo init")? + .capture_outputs(true, "cargo init", None, None, &[])?; + let svd_toml = path_helper_base(&chip_dir, &["Cargo.toml"]); + let mut file = OpenOptions::new() + .write(true) + .append(true) + .open(svd_toml) + .with_context(|| "Failed to open Cargo.toml for appending")?; + let crates = CRATES_ALL + .iter() + .chain(match &self.arch { + Target::CortexM => CRATES_CORTEX_M.iter(), + Target::RISCV => CRATES_RISCV.iter(), + Target::Mips => CRATES_MIPS.iter(), + Target::Msp430 => CRATES_MSP430.iter(), + Target::XtensaLX => CRATES_XTENSALX.iter(), + Target::None => unreachable!(), + }) + .chain(if atomics { + CRATES_ATOMICS.iter() + } else { + [].iter() + }) + .chain(PROFILE_ALL.iter()) + .chain(FEATURES_ALL.iter()) + .chain(match &self.arch { + Target::XtensaLX => FEATURES_XTENSALX.iter(), + _ => [].iter(), + }); + for c in crates { + writeln!(file, "{}", c).with_context(|| "Failed to append to file!")?; + } + let svd = reqwest::blocking::get(self.svd_url()) + .with_context(|| "Failed to get svd URL")? + .text() + .with_context(|| "SVD is bad text")?; + let chip_svd = format!("{}.svd", &self.chip); + let svd_file = path_helper_base(&chip_dir, &[&chip_svd]); + file_helper(&svd, &svd_file)?; + let lib_rs_file = path_helper_base(&chip_dir, &["src", "lib.rs"]); + let svd2rust_err_file = path_helper_base(&chip_dir, &["svd2rust.err.log"]); + let target = match self.arch { + Target::CortexM => "cortex-m", + Target::Msp430 => "msp430", + Target::Mips => "mips", + Target::RISCV => "riscv", + Target::XtensaLX => "xtensa-lx", + Target::None => unreachable!(), + }; + let mut svd2rust_bin = Command::new(bin_path); + if atomics { + svd2rust_bin.arg("--atomics"); + } + let output = svd2rust_bin + .args(["-i", &chip_svd]) + .args(["--target", target]) + .current_dir(&chip_dir) + .output() + .with_context(|| "failed to execute process")?; output.capture_outputs( - false, - "rustfmt", - None, - Some(&rustfmt_err_file), - &process_stderr_paths, + true, + "svd2rust", + Some(&lib_rs_file).filter(|_| { + (self.arch != Target::CortexM) + && (self.arch != Target::Msp430) + && (self.arch != Target::XtensaLX) + }), + Some(&svd2rust_err_file), + &[], )?; - process_stderr_paths.push(rustfmt_err_file); + process_stderr_paths.push(svd2rust_err_file); + match self.arch { + Target::CortexM | Target::Mips | Target::Msp430 | Target::XtensaLX => { + // TODO: Give error the path to stderr + fs::rename(path_helper_base(&chip_dir, &["lib.rs"]), &lib_rs_file) + .with_context(|| "While moving lib.rs file")? + } + _ => {} + } + let lib_rs = + fs::read_to_string(&lib_rs_file).with_context(|| "Failed to read lib.rs file")?; + let file = syn::parse_file(&lib_rs) + .with_context(|| format!("couldn't parse {}", lib_rs_file.display()))?; + File::options() + .write(true) + .open(&lib_rs_file) + .with_context(|| format!("couldn't open {}", lib_rs_file.display()))? + .write(prettyplease::unparse(&file).as_bytes()) + .with_context(|| format!("couldn't write {}", lib_rs_file.display()))?; + let rustfmt_err_file = path_helper_base(&chip_dir, &["rustfmt.err.log"]); + if let Some(rustfmt_bin_path) = rustfmt_bin_path { + // Run `cargo fmt`, capturing stderr to a log file + + let output = Command::new(rustfmt_bin_path) + .arg(lib_rs_file) + .output() + .with_context(|| "failed to format")?; + output.capture_outputs( + false, + "rustfmt", + None, + Some(&rustfmt_err_file), + &process_stderr_paths, + )?; + process_stderr_paths.push(rustfmt_err_file); + } + Ok((chip_dir, process_stderr_paths)) } - // Run `cargo check`, capturing stderr to a log file - let cargo_check_err_file = path_helper_base(&chip_dir, &["cargo-check.err.log"]); - let output = Command::new("cargo") - .arg("check") - .current_dir(&chip_dir) - .output() - .chain_err(|| "failed to check")?; - output.capture_outputs( - true, - "cargo check", - None, - Some(&cargo_check_err_file), - &process_stderr_paths, - )?; - process_stderr_paths.push(cargo_check_err_file); - Ok(if verbosity > 1 { - Some(process_stderr_paths) - } else { - None - }) } diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index 9020924f..ac86f737 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -1,7 +1,10 @@ +use self::RunWhen::*; +use anyhow::Context; pub use svd2rust::util::Target; use svd2rust::util::ToSanitizedCase; -#[derive(Debug)] +#[allow(clippy::upper_case_acronyms)] +#[derive(Debug, serde::Serialize, serde::Deserialize)] pub enum Manufacturer { Atmel, Freescale, @@ -20,7 +23,7 @@ pub enum Manufacturer { Espressif, } -#[derive(Debug)] +#[derive(Debug, serde::Serialize, serde::Deserialize)] pub enum RunWhen { Always, NotShort, @@ -29,18 +32,19 @@ pub enum RunWhen { Never, } +#[derive(serde::Serialize, serde::Deserialize)] pub struct TestCase { pub arch: Target, pub mfgr: Manufacturer, - pub chip: &'static str, - svd_url: Option<&'static str>, + pub chip: String, + svd_url: Option, pub should_pass: bool, run_when: RunWhen, } impl TestCase { pub fn svd_url(&self) -> String { - match self.svd_url { + match &self.svd_url { Some(u) => u.to_owned(), None => format!("https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/{vendor:?}/{chip}.svd", vendor = self.mfgr, @@ -58,4145 +62,27 @@ impl TestCase { } pub fn name(&self) -> String { - format!("{:?}-{}", self.mfgr, self.chip.replace(".", "_")) + format!("{:?}-{}", self.mfgr, self.chip.replace('.', "_")) .to_sanitized_snake_case() .into() } } -use self::Manufacturer::*; -use self::RunWhen::*; -use self::Target::{CortexM, Mips, Msp430, XtensaLX, RISCV}; +pub fn tests(opts: Option<&crate::Opts>) -> Result<&'static [TestCase], anyhow::Error> { + pub static TESTS: std::sync::OnceLock> = std::sync::OnceLock::new(); -// NOTE: All chip names must be unique! -pub const TESTS: &[&TestCase] = &[ - // BAD-SVD missing resetValue - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9CN11", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9CN12", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9G10", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9G15", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9G20", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9G25", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9G35", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9M10", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9M11", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9N12", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9X25", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "AT91SAM9X35", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3A4C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3A8C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N00A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N00B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N0A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N0B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N0C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N1A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N1B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N1C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N2A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N2B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N2C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N4A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N4B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3N4C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S1A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S1B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S1C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S2A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S2B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S2C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S4A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S4B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S4C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S8B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3S8C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3SD8B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3SD8C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3U1C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3U1E", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3U2C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3U2E", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3U4C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3U4E", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3X4C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3X4E", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3X8C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM3X8E", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM4S16B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM4S16C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM4S8B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM4S8C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM4SD32B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAM4SD32C", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMA5D31", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMA5D33", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMA5D34", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMA5D35", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // FIXME(#107) "failed to resolve. Use of undeclared type or module `sercom0`" - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21E15A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21E16A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21E17A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21E18A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21G16A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21G17A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21G18A", - svd_url: Some( - "https://raw.githubusercontent.com/wez/atsamd21-rs/master/svd/ATSAMD21G18A.svd", - ), - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21J16A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21J17A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMD21J18A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMR21E16A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMR21E17A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMR21E18A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMR21G16A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMR21G17A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Atmel, - chip: "ATSAMR21G18A", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // BAD-SVD bad enumeratedValue value - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV56F20", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV56F22", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV56F24", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV58F20", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV58F22", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV58F24", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // BAD-SVD field names are equivalent when case is ignored - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK61F15", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK61F15WS", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK70F12", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK70F15", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK70F15WS", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // Test 1/3 of these to save time - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK02F12810", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK10D10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK10D5", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK10D7", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK10DZ10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK10F12", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK11D5", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK11D5WS", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK11DA5", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK12D5", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK20D10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK20D5", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK20D7", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK20DZ10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK20F12", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK21D5", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK21D5WS", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK21DA5", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK21F12", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK21FA12", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK22D5", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK22F12", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK22F12810", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK22F25612", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK22F51212", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK22FA12", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK24F12", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK24F25612", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK26F18", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK30D10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK30D7", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK30DZ10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK40D10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK40D7", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK40DZ10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK50D10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK50D7", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK50DZ10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK51D10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK51D7", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK51DZ10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK52D10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK52DZ10", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK53D10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK53DZ10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK60D10", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK60DZ10", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK60F15", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK63F12", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK64F12", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK65F18", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK66F18", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK80F25615", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK81F25615", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MK82F25615", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE14F16", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE14Z7", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE15Z7", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE16F16", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE18F16", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL28T7_CORE0", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL28T7_CORE1", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL28Z7", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL81Z7", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL82Z7", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKS22F12", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV10Z1287", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV10Z7", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV11Z7", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV30F12810", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV31F12810", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV31F25612", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV31F51212", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV40F15", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV42F16", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV43F15", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV44F15", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV44F16", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV45F15", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV46F15", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKV46F16", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW20Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW21D5", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW21Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW22D5", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW24D5", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW30Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW31Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW40Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW41Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE02Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE04Z1284", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE04Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE06Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE14D7", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKE15D7", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL02Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL03Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL04Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL05Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL13Z644", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL14Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL15Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL16Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL17Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL17Z644", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL24Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL25Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL26Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL27Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL27Z644", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL33Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL33Z644", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL34Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL36Z4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL43Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKL46Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKM14ZA5", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKM33ZA5", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKM34Z7", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKM34ZA5", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "MKW01Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "SKEAZ1284", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "SKEAZN642", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Freescale, - chip: "SKEAZN84", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF10xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF10xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF11xK", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF11xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF11xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF11xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF12xK", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF12xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF13xK", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF13xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF13xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF13xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF14xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF14xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF14xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF15xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF15xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF15xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF1AxL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF1AxM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF1AxN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF31xK", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF31xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF31xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF31xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF34xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF34xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF34xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF42xK", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AF42xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFA3xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFA3xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFA3xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFA4xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFA4xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFA4xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFAAxL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFAAxM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFAAxN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFB4xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFB4xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9AFB4xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9B160L", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9B160R", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9B360L", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9B360R", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9B460L", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9B460R", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9B560L", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9B560R", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF10xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF10xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF11xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF11xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF11xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF11xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF12xJ", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF12xK", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF12xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF12xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF12xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF12xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF21xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF21xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF30xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF30xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF31xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF31xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF31xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF31xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF32xK", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF32xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF32xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF32xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF32xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF40xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF40xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF41xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF41xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF41xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF41xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF42xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF42xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF50xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF50xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF51xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF51xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF51xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF51xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF52xK", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF52xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF52xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF52xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF52xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF61xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BF61xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BFD1xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "MB9BFD1xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "S6E1A1", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Fujitsu, - chip: "S6E2CC", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Holtek, - chip: "ht32f125x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Holtek, - chip: "ht32f175x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Holtek, - chip: "ht32f275x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Nordic, - chip: "nrf51", - svd_url: None, - should_pass: true, - run_when: Always, - }, - // BAD-SVD two enumeratedValues have the same value - &TestCase { - arch: CortexM, - mfgr: Nordic, - chip: "nrf52", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Nuvoton, - chip: "M051_Series", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Nuvoton, - chip: "NUC100_Series", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // BAD-SVD two enumeratedValues have the same name - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC11Exx_v5", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC11Uxx_v7", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC11xx_v6a", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC11xx_v6", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC13Uxx_v1", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC15xx_v0.7", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC800_v0.3", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC11E6x_v0.8", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC176x5x_v0.2", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC11Cxx_v9", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // BAD-SVD missing resetValue - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC178x_7x", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC178x_7x_v0.8", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC408x_7x_v0.7", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC11Axxv0.6", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // BAD-SVD bad identifier: contains a '.' - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC11D14_svd_v4", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC13xx_svd_v1", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // BAD-SVD bad identifier: contains a '/' - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC18xx_svd_v18", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC43xx_43Sxx", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // BAD-SVD uses the identifier '_' to name a reserved bitfield value - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC1102_4_v4", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // FIXME(???) "duplicate definitions for `write`" - // #99 regression test - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "LPC5410x_v0.4", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "MK22F25612", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "MK22F51212", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: NXP, - chip: "MKW41Z4", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3C1x4_SVD", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3C1x6_SVD", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3C1x7_SVD", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3L1x4_SVD", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3L1x6_SVD", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3L1x7_SVD", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3U1x4_SVD", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3U1x6_SVD", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3U1x7_SVD", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - // FIXME(???) panicked at "c.text.clone()" - &TestCase { - arch: CortexM, - mfgr: SiliconLabs, - chip: "SIM3L1x8_SVD", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF12xK", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF12xL", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF42xK", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF42xL", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF12xJ", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF12xS", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF12xT", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF16xx", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF32xS", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF32xT", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF36xx", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF42xS", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF42xT", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF46xx", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF52xS", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF52xT", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF56xx", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - // Test half of these for the sake of time - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF10xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF10xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF11xK", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF11xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF11xM", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF11xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF13xK", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF13xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF13xM", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF13xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF14xL", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF14xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF14xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF15xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF15xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF15xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF31xK", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF31xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF31xM", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF31xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF34xL", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF34xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AF34xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AFA3xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AFA3xM", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AFA3xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AFA4xL", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AFA4xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AFA4xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AFB4xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AFB4xM", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9AFB4xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF10xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF10xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF11xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF11xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF11xS", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF11xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF12xK", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF12xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF12xM", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF21xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF21xT", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF30xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF30xR", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF31xN", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF31xR", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF31xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF31xT", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF32xK", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF32xL", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF32xM", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF40xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF40xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF41xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF41xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF41xS", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF41xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF50xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF50xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF51xN", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF51xR", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF51xS", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF51xT", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF52xK", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF52xL", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF52xM", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF61xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BF61xT", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BFD1xS", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: Spansion, - chip: "MB9BFD1xT", - svd_url: None, - should_pass: true, - run_when: NotShort, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F030", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F031x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F042x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F072x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F091x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F0xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F100xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F101xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F102xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F103xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F105xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F107xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F20x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F21x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F301", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F302", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F303", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F3x4", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F373", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F401", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F405", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F407", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F410", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F411", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F412", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F413", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F427", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F429", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F446", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F469", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F7x", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F7x2", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F7x3", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F7x5", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F7x6", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F7x7", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32F7x9", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32G07x", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32G431xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32G441xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32G471xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32G474xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32G483xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32G484xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L100", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L15xC", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L15xxE", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L15xxxA", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L1xx", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L4x6", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32W108", - svd_url: None, - should_pass: true, - run_when: Always, - }, - // FIXME(#91) "field is never used: `register`" - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L051x", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L052x", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L053x", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L062x", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: STMicro, - chip: "STM32L063x", - svd_url: None, - should_pass: false, - run_when: Never, - }, - // BAD-SVD resetValue is bigger than the register size - &TestCase { - arch: CortexM, - mfgr: Toshiba, - chip: "M365", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Toshiba, - chip: "M367", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Toshiba, - chip: "M368", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Toshiba, - chip: "M369", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Toshiba, - chip: "M36B", - svd_url: None, - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: CortexM, - mfgr: Toshiba, - chip: "M061", - svd_url: None, - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: RISCV, - mfgr: SiFive, - chip: "E310x", - svd_url: Some("https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x.svd"), - should_pass: false, - run_when: Never, - }, - &TestCase { - arch: Msp430, - mfgr: TexasInstruments, - chip: "msp430g2553", - svd_url: Some("https://github.com/pftbest/msp430g2553/raw/v0.1.3-svd/msp430g2553.svd"), - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: Msp430, - mfgr: TexasInstruments, - chip: "msp430fr2355", - svd_url: Some( - "https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/master/msp430fr2355.svd", - ), - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: XtensaLX, - mfgr: Espressif, - chip: "esp32", - svd_url: Some( - "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32.svd", - ), - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: XtensaLX, - mfgr: Espressif, - chip: "esp32s2", - svd_url: Some( - "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s2.svd", - ), - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: XtensaLX, - mfgr: Espressif, - chip: "esp32s3", - svd_url: Some( - "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s3.svd", - ), - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: RISCV, - mfgr: Espressif, - chip: "esp32c3", - svd_url: Some( - "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32c3.svd", - ), - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: Mips, - mfgr: Microchip, - chip: "pic32mx170f256b", - svd_url: Some( - "https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx1xxfxxxb/PIC32MX170F256B.svd.patched", - ), - should_pass: true, - run_when: Always, - }, - &TestCase { - arch: Mips, - mfgr: Microchip, - chip: "pic32mx270f256b", - svd_url: Some( - "https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx2xxfxxxb/PIC32MX270F256B.svd.patched", - ), - should_pass: true, - run_when: Always, - }, -]; + if let Some(cases) = TESTS.get() { + Ok(cases) + } else { + let path = opts + .map(|o| o.test_cases.clone()) + .ok_or_else(|| anyhow::format_err!("no test cases specified"))?; + let cases: Vec = serde_json::from_reader( + std::fs::OpenOptions::new() + .read(true) + .open(&path) + .with_context(|| format!("couldn't open file {}", path.display()))?, + )?; + Ok(TESTS.get_or_init(|| cases)) + } +} diff --git a/ci/svd2rust-regress/tests.json b/ci/svd2rust-regress/tests.json new file mode 100644 index 00000000..6a968e25 --- /dev/null +++ b/ci/svd2rust-regress/tests.json @@ -0,0 +1,4098 @@ +[ + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9CN11", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9CN12", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9G10", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9G15", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9G20", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9G25", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9G35", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9M10", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9M11", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9N12", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9X25", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "AT91SAM9X35", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3A4C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3A8C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N00A", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N00B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N0A", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N0B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N0C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N1A", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N1B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N1C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N2A", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N2B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N2C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N4A", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N4B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3N4C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3S1A", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3S1B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3S1C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3S2A", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3S2B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3S2C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3S4A", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3S4B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3S4C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3S8B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3S8C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3SD8B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3SD8C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3U1C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3U1E", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3U2C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3U2E", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3U4C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3U4E", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3X4C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3X4E", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3X8C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM3X8E", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM4S16B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM4S16C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM4S8B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM4S8C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM4SD32B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAM4SD32C", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAMA5D31", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Atmel", + "chip": "ATSAMA5D33", + "svd_url": null, + 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"STM32L15xxxA", + "svd_url": null, + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32L1xx", + "svd_url": null, + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32L4x6", + "svd_url": null, + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32W108", + "svd_url": null, + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32L051x", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32L052x", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32L053x", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32L062x", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "STMicro", + "chip": "STM32L063x", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Toshiba", + "chip": "M365", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Toshiba", + "chip": "M367", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Toshiba", + "chip": "M368", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Toshiba", + "chip": "M369", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Toshiba", + "chip": "M36B", + "svd_url": null, + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "cortex-m", + "mfgr": "Toshiba", + "chip": "M061", + "svd_url": null, + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "riscv", + "mfgr": "SiFive", + "chip": "E310x", + "svd_url": "https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x.svd", + "should_pass": false, + "run_when": "Never" + }, + { + "arch": "msp430", + "mfgr": "TexasInstruments", + "chip": "msp430g2553", + "svd_url": "https://github.com/pftbest/msp430g2553/raw/v0.1.3-svd/msp430g2553.svd", + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "msp430", + "mfgr": "TexasInstruments", + "chip": "msp430fr2355", + "svd_url": "https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/master/msp430fr2355.svd", + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "xtensa-lx", + "mfgr": "Espressif", + "chip": "esp32", + "svd_url": "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32.svd", + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "xtensa-lx", + "mfgr": "Espressif", + "chip": "esp32s2", + "svd_url": "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s2.svd", + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "xtensa-lx", + "mfgr": "Espressif", + "chip": "esp32s3", + "svd_url": "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s3.svd", + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "riscv", + "mfgr": "Espressif", + "chip": "esp32c3", + "svd_url": "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32c3.svd", + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "mips", + "mfgr": "Microchip", + "chip": "pic32mx170f256b", + "svd_url": "https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx1xxfxxxb/PIC32MX170F256B.svd.patched", + "should_pass": true, + "run_when": "Always" + }, + { + "arch": "mips", + "mfgr": "Microchip", + "chip": "pic32mx270f256b", + "svd_url": "https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx2xxfxxxb/PIC32MX270F256B.svd.patched", + "should_pass": true, + "run_when": "Always" + } +] \ No newline at end of file From 1831ff40cf490ac9cade9468eefc3d9495f897f7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Tue, 6 Jun 2023 00:22:39 +0200 Subject: [PATCH 169/319] Implement diff and ci command --- .cargo/config.toml | 3 + .github/workflows/ci.yml | 28 +- .github/workflows/diff.yml | 73 ++ Cargo.lock | 1093 ++++++++++++++++++++++++++- ci/svd2rust-regress/Cargo.toml | 6 +- ci/svd2rust-regress/src/ci.rs | 43 ++ ci/svd2rust-regress/src/command.rs | 73 ++ ci/svd2rust-regress/src/diff.rs | 294 +++++++ ci/svd2rust-regress/src/github.rs | 211 ++++-- ci/svd2rust-regress/src/main.rs | 247 ++++-- ci/svd2rust-regress/src/svd_test.rs | 138 +++- ci/svd2rust-regress/src/tests.rs | 47 +- src/config.rs | 20 +- 13 files changed, 2070 insertions(+), 206 deletions(-) create mode 100644 .github/workflows/diff.yml create mode 100644 ci/svd2rust-regress/src/ci.rs create mode 100644 ci/svd2rust-regress/src/command.rs create mode 100644 ci/svd2rust-regress/src/diff.rs diff --git a/.cargo/config.toml b/.cargo/config.toml index 3c32d251..f897ca7b 100644 --- a/.cargo/config.toml +++ b/.cargo/config.toml @@ -1,2 +1,5 @@ [target.aarch64-unknown-linux-gnu] linker = "aarch64-linux-gnu-gcc" + +[alias] +regress = "run -p svd2rust-regress --" \ No newline at end of file diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 281705c2..5d239663 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -21,7 +21,12 @@ jobs: runs-on: ubuntu-latest strategy: matrix: - TARGET: [x86_64-unknown-linux-gnu, x86_64-apple-darwin, x86_64-pc-windows-msvc] + TARGET: + [ + x86_64-unknown-linux-gnu, + x86_64-apple-darwin, + x86_64-pc-windows-msvc, + ] steps: - uses: actions/checkout@v4 @@ -176,24 +181,35 @@ jobs: name: Build svd2rust artifact if: github.event_name == 'pull_request' needs: [check] - runs-on: ubuntu-latest + runs-on: ${{ matrix.runs-on }} + strategy: + matrix: + include: + - target: x86_64-unknown-linux-gnu + runs-on: ubuntu-latest + - target: aarch64-apple-darwin + runs-on: macos-latest + - target: x86_64-pc-windows-msvc + runs-on: windows-latest + suffix: .exe steps: - uses: actions/checkout@v3 - uses: dtolnay/rust-toolchain@master with: toolchain: stable + targets: ${{ matrix.target }} - name: Cache Dependencies uses: Swatinem/rust-cache@v2 - name: Build svd2rust artifact - run: cargo build --release + run: cargo build --release --target ${{ matrix.target }} - - run: mv target/release/svd2rust svd2rust-x86_64-unknown-linux-gnu-$(git rev-parse --short HEAD) + - run: mv target/${{ matrix.target }}/release/svd2rust${{ matrix.suffix || '' }} svd2rust-${{ matrix.target }}-$(git rev-parse --short HEAD)${{ matrix.suffix || '' }} - name: Upload artifact uses: actions/upload-artifact@v3 with: - name: artifact-svd2rust-x86_64-unknown-linux-gnu - path: svd2rust-x86_64-unknown-linux-gnu* + name: artifact-svd2rust-${{ matrix.target }} + path: svd2rust-${{ matrix.target }}* diff --git a/.github/workflows/diff.yml b/.github/workflows/diff.yml new file mode 100644 index 00000000..50f8424f --- /dev/null +++ b/.github/workflows/diff.yml @@ -0,0 +1,73 @@ +name: Diff +on: + issue_comment: + types: [created] + +jobs: + generate: + runs-on: ubuntu-latest + outputs: + diffs: ${{ steps.regress-ci.outputs.diffs }} + if: ${{ github.event.issue.pull_request }} + steps: + - uses: actions/checkout@v4 + + - uses: dtolnay/rust-toolchain@master + with: + toolchain: stable + + - name: Cache + uses: Swatinem/rust-cache@v2 + + - run: cargo regress ci + id: regress-ci + env: + GITHUB_COMMENT: ${{ github.event.comment.body }} + GITHUB_COMMENT_PR: ${{ github.event.comment.issue_url }} + diff: + runs-on: ubuntu-latest + needs: [generate] + if: needs.generate.outputs.diffs != '{}' && needs.generate.outputs.diffs != '[]' && needs.generate.outputs.diffs != '' + strategy: + matrix: + include: ${{ fromJson(needs.generate.outputs.diffs) }} + steps: + - uses: actions/checkout@v4 + + - uses: dtolnay/rust-toolchain@master + with: + toolchain: stable + + - name: Cache + uses: Swatinem/rust-cache@v2 + with: + cache-on-failure: true + + - uses: taiki-e/install-action@v2 + if: matrix.needs_semver_checks + with: + tool: cargo-semver-checks + + - uses: taiki-e/install-action@v2 + with: + tool: git-delta + + - run: cargo regress diff ${{ matrix.command }} --use-pager-directly + env: + GH_TOKEN: ${{ github.token }} + GITHUB_PR: ${{ matrix.pr }} + GIT_PAGER: delta --hunk-header-style omit + summary: + runs-on: ubuntu-latest + needs: [diff] + if: always() + steps: + - uses: actions/checkout@v4 + + - run: | + PR_ID=$(echo "${{ github.event.comment.issue_url }}" | grep -o '[0-9]\+$') + gh run view ${{ github.run_id }} --json jobs | \ + jq -r '"Diff for [comment]("+$comment+")\n\n" + ([.jobs[] | select(.name | startswith("diff")) | "- [" + (.name | capture("\\((?[^,]+),.*") | .name) + "](" + .url + "?pr=" + $pr_id + "#step:7:45)"] | join("\n"))' --arg pr_id "$PR_ID" --arg comment "${{ github.event.comment.url }}"| \ + gh pr comment "$PR_ID" --body "$(< /dev/stdin)" + env: + GH_TOKEN: ${{ github.token }} diff --git a/Cargo.lock b/Cargo.lock index 16ba7348..74b0237e 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -2,6 +2,21 @@ # It is not intended for manual editing. version = 3 +[[package]] +name = "addr2line" +version = "0.21.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8a30b2e23b9e17a9f90641c7ab1549cd9b44f296d3ccbf309d2863cfe398a0cb" +dependencies = [ + "gimli", +] + +[[package]] +name = "adler" +version = "1.0.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f26201604c87b1e01bd3d98f8d5d9a8fcbb815e8cedb41ffccbeb4bf593a35fe" + [[package]] name = "aho-corasick" version = "1.1.2" @@ -77,6 +92,39 @@ version = "0.7.4" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "96d30a06541fbafbc7f82ed10c06164cfbd2c401138f6addd8404629c4b16711" +[[package]] +name = "autocfg" +version = "1.1.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d468802bab17cbc0cc575e9b053f41e72aa36bfa6b7f55e3529ffa43161b97fa" + +[[package]] +name = "backtrace" +version = "0.3.69" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "2089b7e3f35b9dd2d0ed921ead4f6d318c27680d4a5bd167b3ee120edb105837" +dependencies = [ + "addr2line", + "cc", + "cfg-if", + "libc", + "miniz_oxide", + "object", + "rustc-demangle", +] + +[[package]] +name = "base64" +version = "0.21.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "35636a1494ede3b646cc98f74f8e62c773a38a659ebc777a2cf26b9b74171df9" + +[[package]] +name = "bitflags" +version = "1.3.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "bef38d45163c2f1dde094a7dfd33ccf595c92905c8f8f4fdc18d06fb1037718a" + [[package]] name = "bitflags" version = "2.4.1" @@ -94,6 +142,33 @@ dependencies = [ "constant_time_eq", ] +[[package]] +name = "bumpalo" +version = "3.14.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "7f30e7476521f6f8af1a1c4c0b8cc94f0bee37d91763d0ca2665f299b6cd8aec" + +[[package]] +name = "bytes" +version = "1.5.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a2bd12c1caf447e69cd4528f47f94d203fd2582878ecb9e9465484c4148a8223" + +[[package]] +name = "cc" +version = "1.0.83" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f1174fb0b6ec23863f8b971027804a42614e347eafb0a95bf0b12cdae21fc4d0" +dependencies = [ + "libc", +] + +[[package]] +name = "cfg-if" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd" + [[package]] name = "clap" version = "4.4.10" @@ -101,6 +176,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "41fffed7514f420abec6d183b1d3acfd9099c79c3a10a06ade4f8203f1411272" dependencies = [ "clap_builder", + "clap_derive", ] [[package]] @@ -115,6 +191,18 @@ dependencies = [ "strsim", ] +[[package]] +name = "clap_derive" +version = "4.4.7" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "cf9804afaaf59a91e75b022a30fb7229a7901f60c755489cc61c9b423b836442" +dependencies = [ + "heck", + "proc-macro2", + "quote", + "syn 2.0.39", +] + [[package]] name = "clap_lex" version = "0.6.0" @@ -133,6 +221,55 @@ version = "0.3.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "f7144d30dcf0fafbce74250a3963025d8d52177934239851c917d29f1df280c2" +[[package]] +name = "core-foundation" +version = "0.9.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "194a7a9e6de53fa55116934067c844d9d749312f75c6f6d0980e8c252f8c2146" +dependencies = [ + "core-foundation-sys", + "libc", +] + +[[package]] +name = "core-foundation-sys" +version = "0.8.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e496a50fda8aacccc86d7529e2c1e0892dbd0f898a6b5645b5561b89c3210efa" + +[[package]] +name = "crossbeam-deque" +version = "0.8.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ce6fd6f855243022dcecf8702fef0c297d4338e226845fe067f6341ad9fa0cef" +dependencies = [ + "cfg-if", + "crossbeam-epoch", + "crossbeam-utils", +] + +[[package]] +name = "crossbeam-epoch" +version = "0.9.15" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ae211234986c545741a7dc064309f67ee1e5ad243d0e48335adc0484d960bcc7" +dependencies = [ + "autocfg", + "cfg-if", + "crossbeam-utils", + "memoffset", + "scopeguard", +] + +[[package]] +name = "crossbeam-utils" +version = "0.8.16" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "5a22b2d63d4d1dc0b7f1b6b2747dd0088008a9be28b6ddf0b1e7d335e3037294" +dependencies = [ + "cfg-if", +] + [[package]] name = "darling" version = "0.14.4" @@ -199,6 +336,21 @@ dependencies = [ "syn 1.0.109", ] +[[package]] +name = "either" +version = "1.9.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a26ae43d7bcc3b814de94796a5e736d4029efb0ee900c12e2d54c993ad1a1e07" + +[[package]] +name = "encoding_rs" +version = "0.8.33" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "7268b386296a025e474d5140678f75d6de9493ae55a5d709eeb9dd08149945e1" +dependencies = [ + "cfg-if", +] + [[package]] name = "env_logger" version = "0.10.1" @@ -228,24 +380,142 @@ dependencies = [ "windows-sys 0.52.0", ] +[[package]] +name = "fastrand" +version = "2.0.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "25cbce373ec4653f1a01a31e8a5e5ec0c622dc27ff9c4e6606eefef5cbbed4a5" + [[package]] name = "fnv" version = "1.0.7" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "3f9eec918d3f24069decb9af1554cad7c880e2da24a9afd88aca000531ab82c1" +[[package]] +name = "foreign-types" +version = "0.3.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f6f339eb8adc052cd2ca78910fda869aefa38d22d5cb648e6485e4d3fc06f3b1" +dependencies = [ + "foreign-types-shared", +] + +[[package]] +name = "foreign-types-shared" +version = "0.1.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "00b0228411908ca8685dba7fc2cdd70ec9990a6e753e89b6ac91a84c40fbaf4b" + +[[package]] +name = "form_urlencoded" +version = "1.2.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e13624c2627564efccf4934284bdd98cbaa14e79b0b5a141218e507b3a823456" +dependencies = [ + "percent-encoding", +] + +[[package]] +name = "futures-channel" +version = "0.3.29" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ff4dd66668b557604244583e3e1e1eada8c5c2e96a6d0d6653ede395b78bbacb" +dependencies = [ + "futures-core", +] + +[[package]] +name = "futures-core" +version = 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+ "futures-io", + "futures-task", + "memchr", + "pin-project-lite", + "pin-utils", + "slab", +] + +[[package]] +name = "gimli" +version = "0.28.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "4271d37baee1b8c7e4b708028c57d816cf9d2434acb33a549475f78c181f6253" + +[[package]] +name = "h2" +version = "0.3.22" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "4d6250322ef6e60f93f9a2162799302cd6f68f79f6e5d85c8c16f14d1d958178" +dependencies = [ + "bytes", + "fnv", + "futures-core", + "futures-sink", + "futures-util", + "http", + "indexmap", + "slab", + "tokio", + "tokio-util", + "tracing", +] + [[package]] name = "hashbrown" version = "0.14.3" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "290f1a1d9242c78d09ce40a5e87e7554ee637af1351968159f4952f028f75604" +[[package]] +name = "heck" +version = "0.4.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "95505c38b4572b2d910cecb0281560f54b440a19336cbbcb27bf6ce6adc6f5a8" + [[package]] name = "hermit-abi" version = "0.3.3" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "d77f7ec81a6d05a3abb01ab6eb7590f6083d08449fe5a1c8b1e620283546ccb7" +[[package]] +name = "home" +version = "0.5.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "5444c27eef6923071f7ebcc33e3444508466a76f7a2b93da00ed6e19f30c1ddb" +dependencies = [ + "windows-sys", +] + [[package]] name = "html-escape" version = "0.2.13" @@ -255,18 +525,99 @@ dependencies = [ "utf8-width", ] +[[package]] +name = "http" +version = "0.2.11" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8947b1a6fad4393052c7ba1f4cd97bed3e953a95c79c92ad9b051a04611d9fbb" +dependencies = [ + "bytes", + "fnv", + "itoa", +] + +[[package]] +name = "http-body" +version = "0.4.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = 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"futures-util", + "h2", + "http", + "http-body", + "httparse", + "httpdate", + "itoa", + "pin-project-lite", + "socket2 0.4.10", + "tokio", + "tower-service", + "tracing", + "want", +] + +[[package]] +name = "hyper-tls" +version = "0.5.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d6183ddfa99b85da61a140bea0efc93fdf56ceaa041b37d553518030827f9905" +dependencies = [ + "bytes", + "hyper", + "native-tls", + "tokio", + "tokio-native-tls", +] + [[package]] name = "ident_case" version = "1.0.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "b9e0384b61958566e926dc50660321d12159025e767c18e043daf26b70104c39" +[[package]] +name = "idna" +version = "0.5.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "634d9b1461af396cad843f47fdba5597a4f9e6ddd4bfb6ff5d85028c25cb12f6" +dependencies = [ + "unicode-bidi", + "unicode-normalization", +] + [[package]] name = "indexmap" version = "2.1.0" @@ -283,6 +634,12 @@ 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checksum = "711b9620af191e0cdc7468a8d14e709c3dcdb115b36f838e601583af800a370a" +[[package]] +name = "valuable" +version = "0.1.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "830b7e5d4d90034032940e4ace0d9a9a057e7a45cd94e6c007832e39edb82f6d" + +[[package]] +name = "vcpkg" +version = "0.2.15" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "accd4ea62f7bb7a82fe23066fb0957d48ef677f6eeb8215f372f52e48bb32426" + +[[package]] +name = "want" +version = "0.3.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "bfa7760aed19e106de2c7c0b581b509f2f25d3dacaf737cb82ac61bc6d760b0e" +dependencies = [ + "try-lock", +] + +[[package]] +name = "wasi" +version = "0.11.0+wasi-snapshot-preview1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "9c8d87e72b64a3b4db28d11ce29237c246188f4f51057d65a7eab63b7987e423" + +[[package]] +name = "wasm-bindgen" +version = "0.2.89" +source = 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"0162dbf37223cd2afce98f3d0785506dcb8d266223983e4b5b525859e6e182b2" +dependencies = [ + "quote", + "wasm-bindgen-macro-support", +] + +[[package]] +name = "wasm-bindgen-macro-support" +version = "0.2.89" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f0eb82fcb7930ae6219a7ecfd55b217f5f0893484b7a13022ebb2b2bf20b5283" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.39", + "wasm-bindgen-backend", + "wasm-bindgen-shared", +] + +[[package]] +name = "wasm-bindgen-shared" +version = "0.2.89" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "7ab9b36309365056cd639da3134bf87fa8f3d86008abf99e612384a6eecd459f" + +[[package]] +name = "web-sys" +version = "0.3.66" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "50c24a44ec86bb68fbecd1b3efed7e85ea5621b39b35ef2766b66cd984f8010f" +dependencies = [ + "js-sys", + "wasm-bindgen", +] + +[[package]] +name = "which" +version = "5.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "9bf3ea8596f3a0dd5980b46430f2058dfe2c36a27ccfbb1845d6fbfcd9ba6e14" +dependencies = [ + "either", + "home", + "once_cell", + "rustix", + "windows-sys", +] + +[[package]] +name = "wildmatch" +version = "2.1.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ee583bdc5ff1cf9db20e9db5bb3ff4c3089a8f6b8b31aff265c9aba85812db86" + [[package]] name = "winapi" version = "0.3.9" @@ -808,6 +1877,16 @@ dependencies = [ "memchr", ] +[[package]] +name = "winreg" +version = "0.50.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "524e57b2c537c0f9b1e69f1965311ec12182b4122e45035b1508cd24d2adadb1" +dependencies = [ + "cfg-if", + "windows-sys", +] + [[package]] name = "xmlparser" version = "0.13.6" diff --git a/ci/svd2rust-regress/Cargo.toml b/ci/svd2rust-regress/Cargo.toml index 3d36943c..7f7ea214 100644 --- a/ci/svd2rust-regress/Cargo.toml +++ b/ci/svd2rust-regress/Cargo.toml @@ -5,7 +5,7 @@ version = "0.1.0" authors = ["James Munns ", "The svd2rust developers"] [dependencies] -clap = { version = "4.1", features = ["color", "derive", "string"] } +clap = { version = "4.1", features = ["color", "derive", "string", "env"] } svd2rust = { path = "../../" } reqwest = { version = "0.11", features= ["blocking"] } rayon = "1.4" @@ -15,3 +15,7 @@ serde = "1" serde_json = "1" prettyplease = "0.2" syn = "2" +wildmatch = "2.1.1" +which = "5.0.0" +tracing = "0.1.40" +tracing-subscriber = { version = "0.3.18", features = ["env-filter", "fmt"] } diff --git a/ci/svd2rust-regress/src/ci.rs b/ci/svd2rust-regress/src/ci.rs new file mode 100644 index 00000000..e8c4d2b1 --- /dev/null +++ b/ci/svd2rust-regress/src/ci.rs @@ -0,0 +1,43 @@ +use crate::Opts; + +#[derive(clap::Parser, Debug)] +#[clap(name = "continuous-integration")] +pub struct Ci { + #[clap(long)] + pub format: bool, + /// Enable splitting `lib.rs` with `form` + #[clap(long)] + pub form_lib: bool, + #[clap(env = "GITHUB_COMMENT")] + pub comment: String, + #[clap(env = "GITHUB_COMMENT_PR")] + pub comment_pr: String, +} + +#[derive(serde::Serialize)] +struct Diff { + command: String, + needs_semver_checks: bool, + pr: usize, +} + +impl Ci { + pub fn run(&self, _opts: &Opts) -> Result<(), anyhow::Error> { + let mut diffs = vec![]; + for line in self.comment.lines() { + let Some(command) = line.strip_prefix("/ci diff ") else { + continue; + }; + + diffs.push(Diff { + needs_semver_checks: command.contains("semver"), + command: command.to_owned(), + pr: self.comment_pr.split('/').last().unwrap().parse()?, + }); + } + let json = serde_json::to_string(&diffs)?; + crate::gha_print(&json); + crate::gha_output("diffs", &json)?; + Ok(()) + } +} diff --git a/ci/svd2rust-regress/src/command.rs b/ci/svd2rust-regress/src/command.rs new file mode 100644 index 00000000..77291bd0 --- /dev/null +++ b/ci/svd2rust-regress/src/command.rs @@ -0,0 +1,73 @@ +use std::process::Command; + +use anyhow::Context; + +pub trait CommandExt { + #[track_caller] + fn run(&mut self, hide: bool) -> Result<(), anyhow::Error>; + + #[track_caller] + fn get_output(&mut self) -> Result; + + #[track_caller] + fn get_output_string(&mut self) -> Result; + + fn display(&self) -> String; +} + +impl CommandExt for Command { + #[track_caller] + fn run(&mut self, hide: bool) -> Result<(), anyhow::Error> { + if hide { + self.stdout(std::process::Stdio::null()) + .stdin(std::process::Stdio::null()); + } + let status = self + .status() + .with_context(|| format!("fail! {}", self.display()))?; + if status.success() { + Ok(()) + } else { + anyhow::bail!("command `{}` failed", self.display()) + } + } + + #[track_caller] + fn get_output(&mut self) -> Result { + let output = self.output().with_context(|| { + format!( + "command `{}{}` couldn't be run", + self.get_current_dir() + .map(|d| format!("{} ", d.display())) + .unwrap_or_default(), + self.display() + ) + })?; + if output.status.success() { + Ok(output) + } else { + anyhow::bail!( + "command `{}` failed: stdout: {}\nstderr: {}", + self.display(), + String::from_utf8_lossy(&output.stdout), + String::from_utf8_lossy(&output.stderr), + ) + } + } + + #[track_caller] + fn get_output_string(&mut self) -> Result { + String::from_utf8(self.get_output()?.stdout).map_err(Into::into) + } + + fn display(&self) -> String { + format!( + "{} {}", + self.get_program().to_string_lossy(), + self.get_args() + .map(|s| s.to_string_lossy()) + .collect::>() + .join(" ") + ) + } +} diff --git a/ci/svd2rust-regress/src/diff.rs b/ci/svd2rust-regress/src/diff.rs new file mode 100644 index 00000000..0a79f1a5 --- /dev/null +++ b/ci/svd2rust-regress/src/diff.rs @@ -0,0 +1,294 @@ +use std::path::PathBuf; + +use anyhow::Context; + +use crate::github; +use crate::Opts; + +#[derive(clap::Parser, Debug)] +#[clap(name = "diff")] +pub struct Diffing { + /// The base version of svd2rust to use and the command input, defaults to latest master build + /// + /// Change the base version by starting with `@` followed by the source. + /// + /// supports `@pr` for current pr, `@master` for latest master build, or a version tag like `@v0.30.0` + #[clap(global = true, long, alias = "base")] + pub baseline: Option, + + #[clap(global = true, long, alias = "head")] + pub current: Option, + + /// Enable formatting with `rustfmt` + #[clap(global = true, short = 'f', long)] + pub format: bool, + + /// Enable splitting `lib.rs` with `form` + #[clap(global = true, long)] + pub form_split: bool, + + #[clap(subcommand)] + pub sub: Option, + + #[clap(long, short = 'c')] + pub chip: Vec, + + /// Filter by manufacturer, case sensitive, may be combined with other filters + #[clap( + short = 'm', + long = "manufacturer", + ignore_case = true, + value_parser = crate::manufacturers(), + )] + pub mfgr: Option, + + /// Filter by architecture, case sensitive, may be combined with other filters + #[clap( + short = 'a', + long = "architecture", + ignore_case = true, + value_parser = crate::architectures(), + )] + pub arch: Option, + + #[clap(global = true, long)] + pub diff_folder: Option, + + #[clap(hide = true, env = "GITHUB_PR")] + pub pr: Option, + + #[clap(env = "GIT_PAGER", long)] + pub pager: Option, + + /// if set, will use pager directly instead of `git -c core.pager` + #[clap(long, short = 'P')] + pub use_pager_directly: bool, + + #[clap(last = true)] + pub args: Option, +} + +#[derive(clap::Parser, Debug, Clone, Copy)] +pub enum DiffingMode { + Semver, + Diff, +} + +type Source<'s> = Option<&'s str>; +type Command<'s> = Option<&'s str>; + +impl Diffing { + pub fn run(&self, opts: &Opts) -> Result<(), anyhow::Error> { + let [baseline, current] = self + .make_case(opts) + .with_context(|| "couldn't setup test case")?; + match self.sub.unwrap_or(DiffingMode::Diff) { + DiffingMode::Diff => { + let mut command; + if let Some(pager) = &self.pager { + if self.use_pager_directly { + let mut pager = pager.split_whitespace(); + command = std::process::Command::new(pager.next().unwrap()); + command.args(pager); + } else { + command = std::process::Command::new("git"); + command.env("GIT_PAGER", pager); + } + } else { + command = std::process::Command::new("git"); + command.arg("--no-pager"); + } + if !self.use_pager_directly { + command.args(["diff", "--no-index", "--minimal"]); + } + command + .args([&*baseline.0, &*current.0]) + .status() + .with_context(|| "couldn't run diff") + .map(|_| ()) + } + DiffingMode::Semver => std::process::Command::new("cargo") + .args(["semver-checks", "check-release"]) + .arg("--baseline-root") + .arg(baseline.0) + .arg("--manifest-path") + .arg(current.0.join("Cargo.toml")) + .status() + .with_context(|| "couldn't run semver-checks") + .map(|_| ()), + } + } + + pub fn make_case(&self, opts: &Opts) -> Result<[(PathBuf, Vec); 2], anyhow::Error> { + let [(baseline_bin, baseline_cmd), (current_bin, current_cmd)] = self + .svd2rust_setup(opts) + .with_context(|| "couldn't setup svd2rust")?; + let tests = crate::tests::tests(Some(opts.test_cases.as_ref())) + .with_context(|| "no tests found")?; + + let tests = tests + .iter() + .filter(|t| { + if let Some(ref arch) = self.arch { + arch.to_ascii_lowercase() + .eq_ignore_ascii_case(&t.arch.to_string()) + } else { + true + } + }) + // selected manufacturer? + .filter(|t| { + if let Some(ref mfgr) = self.mfgr { + mfgr.to_ascii_lowercase() + .eq_ignore_ascii_case(&t.mfgr.to_string().to_ascii_lowercase()) + } else { + true + } + }) + .filter(|t| { + if !self.chip.is_empty() { + self.chip.iter().any(|c| { + wildmatch::WildMatch::new(&c.to_ascii_lowercase()) + .matches(&t.chip.to_ascii_lowercase()) + }) + } else { + false + } + }) + .collect::>(); + if tests.len() != 1 { + let error = anyhow::anyhow!("diff requires exactly one test case"); + if tests.is_empty() { + return Err(error.context("matched no tests")); + } else if tests.len() > 10 { + return Err(error.context(format!("matched multiple ({}) tests", tests.len()))); + } + return Err(error.context(format!( + "matched multiple ({}) tests\n{:?}", + tests.len(), + tests.iter().map(|t| t.name()).collect::>() + ))); + } + + let baseline = tests[0] + .setup_case( + &opts.output_dir.join("baseline"), + &baseline_bin, + baseline_cmd, + ) + .with_context(|| "couldn't create head")?; + let current = tests[0] + .setup_case(&opts.output_dir.join("current"), ¤t_bin, current_cmd) + .with_context(|| "couldn't create base")?; + + Ok([baseline, current]) + } + + fn get_source_and_command<'s>(&'s self) -> [Option<(Source, Command)>; 2] { + let split = |s: &'s str| -> (Source, Command) { + if let Some(s) = s.strip_prefix('@') { + if let Some((source, cmd)) = s.split_once(' ') { + (Some(source), Some(cmd.trim())) + } else { + (Some(s), None) + } + } else { + (None, Some(s.trim())) + } + }; + + let baseline = self.baseline.as_deref().map(split); + + let current = self.current.as_deref().map(split); + [baseline, current] + } + + pub fn svd2rust_setup(&self, opts: &Opts) -> Result<[(PathBuf, Command); 2], anyhow::Error> { + // FIXME: refactor this to be less ugly + let [baseline_sc, current_sc] = self.get_source_and_command(); + let baseline = match baseline_sc.and_then(|(source, _)| source) { + reference @ None | reference @ Some("" | "master") => { + github::get_release_binary_artifact(reference.unwrap_or("master"), &opts.output_dir) + .with_context(|| "couldn't get svd2rust latest unreleased artifact")? + } + Some("pr") if self.pr.is_none() => { + let (number, sha) = + github::get_current_pr().with_context(|| "couldn't get current pr")?; + github::get_pr_binary_artifact(number, &sha, &opts.output_dir) + .with_context(|| "couldn't get pr artifact")? + } + Some("pr") => { + let (number, sha) = + github::get_pr(self.pr.unwrap()).with_context(|| "couldn't get current pr")?; + github::get_pr_binary_artifact(number, &sha, &opts.output_dir) + .with_context(|| "couldn't get pr artifact")? + } + Some("debug") => crate::get_cargo_metadata() + .target_directory + .join(format!("debug/svd2rust{}", std::env::consts::EXE_SUFFIX)), + Some("release") => crate::get_cargo_metadata() + .target_directory + .join(format!("release/svd2rust{}", std::env::consts::EXE_SUFFIX)), + Some(reference) => github::get_release_binary_artifact(reference, &opts.output_dir) + .with_context(|| format!("could not get svd2rust for {reference}"))?, + }; + + let current = match current_sc.and_then(|(source, _)| source) { + None | Some("" | "pr") if self.pr.is_none() => { + let (number, sha) = + github::get_current_pr().with_context(|| "couldn't get current pr")?; + github::get_pr_binary_artifact(number, &sha, &opts.output_dir) + .with_context(|| "couldn't get pr artifact")? + } + None | Some("" | "pr") => { + let (number, sha) = + github::get_pr(self.pr.unwrap()).with_context(|| "couldn't get current pr")?; + github::get_pr_binary_artifact(number, &sha, &opts.output_dir) + .with_context(|| "couldn't get pr artifact")? + } + Some("debug") => crate::get_cargo_metadata() + .target_directory + .join(format!("debug/svd2rust{}", std::env::consts::EXE_SUFFIX)), + Some("release") => crate::get_cargo_metadata() + .target_directory + .join(format!("release/svd2rust{}", std::env::consts::EXE_SUFFIX)), + Some(reference) => github::get_release_binary_artifact(reference, &opts.output_dir) + .with_context(|| format!("could not get svd2rust for {reference}"))?, + }; + + Ok([ + ( + baseline.canonicalize()?, + baseline_sc.and_then(|(_, cmd)| cmd), + ), + (current.canonicalize()?, current_sc.and_then(|(_, cmd)| cmd)), + ]) + } +} + +#[cfg(test)] +#[test] +pub fn diffing_cli_works() { + use clap::Parser; + + Diffing::parse_from(["diff", "pr"]); + Diffing::parse_from(["diff", "--base", "", "--head", "\"--atomics\""]); + Diffing::parse_from(["diff", "--base", "\"@master\"", "--head", "\"@pr\""]); + Diffing::parse_from([ + "diff", + "--base", + "\"@master\"", + "--head", + "\"@pr\"", + "--chip", + "STM32F401", + ]); + Diffing::parse_from([ + "diff", + "--base", + "\"@master\"", + "--head", + "\"@pr --atomics\"", + ]); + Diffing::parse_from(["diff", "--head", "\"--atomics\""]); +} diff --git a/ci/svd2rust-regress/src/github.rs b/ci/svd2rust-regress/src/github.rs index 2f0bf222..996d6e87 100644 --- a/ci/svd2rust-regress/src/github.rs +++ b/ci/svd2rust-regress/src/github.rs @@ -1,9 +1,11 @@ -use std::process::{Command, Output}; +use std::process::Command; use std::{ffi::OsStr, path::Path}; use std::{iter::IntoIterator, path::PathBuf}; use anyhow::Context; +use crate::command::CommandExt; + pub fn run_gh(args: I) -> Command where I: IntoIterator, @@ -14,34 +16,54 @@ where command } -pub fn get_current_pr() -> Result { - let pr = run_gh([ - "pr", - "view", - "--json", - "number", - "--template", - "{{.number}}", - ]) - .output()?; - String::from_utf8(pr.stdout)? - .trim() - .parse() - .map_err(Into::into) +pub fn get_current_pr() -> Result<(usize, String), anyhow::Error> { + #[derive(serde::Deserialize)] + struct Pr { + number: usize, + #[serde(rename = "headRefOid")] + head_ref_oid: String, + } + let pr = run_gh(["pr", "view", "--json", "headRefOid,number"]).get_output_string()?; + let Pr { + number, + head_ref_oid, + } = serde_json::from_str(&pr)?; + + Ok((number, head_ref_oid)) +} + +pub fn get_pr(pr: usize) -> Result<(usize, String), anyhow::Error> { + #[derive(serde::Deserialize)] + struct Pr { + number: usize, + #[serde(rename = "headRefOid")] + head_ref_oid: String, + } + let pr = run_gh(["pr", "view", &pr.to_string(), "--json", "headRefOid,number"]) + .get_output_string()?; + let Pr { + number, + head_ref_oid, + } = serde_json::from_str(&pr)?; + + Ok((number, head_ref_oid)) } -pub fn get_pr_run_id(pr: usize) -> Result { +pub fn get_sha_run_id(sha: &str) -> Result { let run_id = run_gh([ "api", - &format!("repos/:owner/:repo/actions/runs?event=pull_request&pr={pr}"), + &format!("repos/:owner/:repo/actions/runs?event=pull_request&head_sha={sha}"), "--jq", r#"[.workflow_runs[] | select(.name == "Continuous integration")][0] | .id"#, ]) - .output()?; - String::from_utf8(run_id.stdout)? + .get_output_string()?; + if run_id.trim().is_empty() { + anyhow::bail!("no run id found for sha `{}`", sha); + } + run_id .trim() .parse() - .map_err(Into::into) + .with_context(|| anyhow::anyhow!("couldn't parse api output: {run_id}")) } pub fn get_release_run_id(event: &str) -> Result { @@ -49,26 +71,30 @@ pub fn get_release_run_id(event: &str) -> Result { "master" => "branch=master".to_owned(), _ => anyhow::bail!("unknown event"), }; - let run_id = dbg!(run_gh([ + let run_id = run_gh([ "api", &format!("repos/:owner/:repo/actions/runs?{query}"), "--jq", r#"[.workflow_runs[] | select(.name == "release")][0] | .id"#, ]) - .output()) - .with_context(|| "couldn't run gh")?; - String::from_utf8(run_id.stdout)? - .trim() - .parse() - .map_err(Into::into) + .get_output_string()?; + run_id.trim().parse().map_err(Into::into) } -fn find(dir: &Path, begins: &str) -> Result, anyhow::Error> { +fn find_executable(dir: &Path, begins: &str) -> Result, anyhow::Error> { let find = |entry, begins: &str| -> Result, std::io::Error> { let entry: std::fs::DirEntry = entry?; let filename = entry.file_name(); let filename = filename.to_string_lossy(); - if entry.metadata()?.is_file() && filename.starts_with(begins) { + if entry.metadata()?.is_file() + && filename.starts_with(begins) + && (entry.path().extension().is_none() + || entry + .path() + .extension() + .is_some_and(|s| s == std::env::consts::EXE_EXTENSION)) + && !entry.path().extension().is_some_and(|s| s == "gz") + { Ok(Some(entry.path())) } else { Ok(None) @@ -85,10 +111,7 @@ pub fn get_release_binary_artifact( reference: &str, output_dir: &Path, ) -> Result { - let output_dir = output_dir.join(reference); - if let Some(binary) = find(&output_dir, "svd2rust")? { - return Ok(binary); - } + let output_dir = output_dir.join(".binary").join(reference); match reference { reference if reference.starts_with('v') || matches!(reference, "master" | "latest") => { @@ -99,27 +122,38 @@ pub fn get_release_binary_artifact( } else { Some(reference) }; - run_gh([ - "release", - "download", - "--pattern", - "svd2rust-x86_64-unknown-linux-gnu.gz", - "--dir", - ]) - .arg(&output_dir) - .args(tag) - .status()?; - Command::new("tar") - .arg("-xzf") - .arg(output_dir.join("svd2rust-x86_64-unknown-linux-gnu.gz")) - .arg("-C") + let artifact = if cfg!(target_os = "linux") && cfg!(target_arch = "x86_64") { + "svd2rust-x86_64-unknown-linux-gnu.gz" + } else if cfg!(target_os = "linux") && cfg!(target_arch = "aarch64") { + "svd2rust-aarch64-unknown-linux-gnu.gz" + } else if cfg!(windows) { + "svd2rust-x86_64-pc-windows-msvc.exe" + } else if cfg!(target_os = "macos") && cfg!(target_arch = "x86_64") { + "svd2rust-x86_64-apple-darwin.gz" + } else if cfg!(target_os = "macos") && cfg!(target_arch = "aarch64") { + "svd2rust-aarch64-apple-darwin.gz" + } else { + anyhow::bail!("regress with release artifact doesn't support current platform") + }; + + std::fs::remove_dir_all(&output_dir).ok(); + + run_gh(["release", "download", "--pattern", artifact, "--dir"]) .arg(&output_dir) - .output() - .expect("Failed to execute command"); + .args(tag) + .run(true)?; + + if cfg!(target_os = "linux") || cfg!(target_os = "macos") { + Command::new("gzip") + .arg("-d") + .arg(output_dir.join(artifact)) + .get_output()?; + } } _ => { - let run_id = get_release_run_id(reference)?; + let run_id = + get_release_run_id(reference).with_context(|| "couldn't get release run id")?; run_gh([ "run", "download", @@ -129,41 +163,68 @@ pub fn get_release_binary_artifact( "--dir", ]) .arg(&output_dir) - .output()?; + .run(true)?; } } - let binary = find(&output_dir, "svd2rust")?; - binary.ok_or_else(|| anyhow::anyhow!("no binary found")) + let binary = + find_executable(&output_dir, "svd2rust").with_context(|| "couldn't find svd2rust")?; + let binary = binary.ok_or_else(|| anyhow::anyhow!("no binary found"))?; + + #[cfg(unix)] + { + use std::os::unix::fs::PermissionsExt; + std::fs::set_permissions(&binary, std::fs::Permissions::from_mode(0o755))?; + } + + Ok(binary) } -pub fn get_pr_binary_artifact(pr: usize, output_dir: &Path) -> Result { - let output_dir = output_dir.join(format!("{pr}")); - let run_id = get_pr_run_id(pr)?; +pub fn get_pr_binary_artifact( + pr: usize, + sha: &str, + output_dir: &Path, +) -> Result { + let output_dir = output_dir.join(".binary").join(pr.to_string()).join(sha); + + if let Some(binary) = find_executable(&output_dir, "svd2rust").unwrap_or_default() { + return Ok(binary); + } + + let target = if cfg!(target_os = "linux") && cfg!(target_arch = "x86_64") { + "x86_64-unknown-linux-gnu" + } else if cfg!(target_os = "linux") && cfg!(target_arch = "aarch64") { + "aarch64-unknown-linux-gnu" + } else if cfg!(windows) { + "x86_64-pc-windows-msvc" + } else if cfg!(target_os = "macos") && cfg!(target_arch = "x86_64") { + "x86_64-apple-darwin" + } else if cfg!(target_os = "macos") && cfg!(target_arch = "aarch64") { + "aarch64-apple-darwin" + } else { + anyhow::bail!("regress with pr artifact doesn't support current platform"); + }; + + let run_id = get_sha_run_id(sha).context("when getting run id")?; run_gh([ "run", "download", &run_id.to_string(), "-n", - "artifact-svd2rust-x86_64-unknown-linux-gnu", + &format!("artifact-svd2rust-{}", target), "--dir", ]) .arg(&output_dir) - .output()?; - let mut read_dir = std::fs::read_dir(output_dir)?; - let binary = read_dir - .find_map(|entry| { - let find = |entry| -> Result, std::io::Error> { - let entry: std::fs::DirEntry = entry?; - let filename = entry.file_name(); - let filename = filename.to_string_lossy(); - if entry.metadata()?.is_file() && filename.starts_with("svd2rust-regress") { - Ok(Some(entry.path())) - } else { - Ok(None) - } - }; - find(entry).transpose() - }) - .transpose()?; - binary.ok_or_else(|| anyhow::anyhow!("no binary found")) + .run(true)?; + + let binary = + find_executable(&output_dir, "svd2rust").with_context(|| "couldn't find svd2rust")?; + let binary = binary.ok_or_else(|| anyhow::anyhow!("no binary found"))?; + + #[cfg(unix)] + { + use std::os::unix::fs::PermissionsExt; + std::fs::set_permissions(&binary, std::fs::Permissions::from_mode(0o755))?; + } + + Ok(binary) } diff --git a/ci/svd2rust-regress/src/main.rs b/ci/svd2rust-regress/src/main.rs index b53718dc..0c820965 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/ci/svd2rust-regress/src/main.rs @@ -1,6 +1,14 @@ +pub mod ci; +pub mod command; +pub mod diff; +pub mod github; mod svd_test; mod tests; +use anyhow::Context; +use ci::Ci; +use diff::Diffing; + use clap::Parser; use rayon::prelude::*; use std::fs::File; @@ -9,14 +17,20 @@ use std::path::PathBuf; use std::process::{exit, Command}; use std::sync::atomic::{AtomicBool, Ordering}; use std::time::Instant; +use wildmatch::WildMatch; -/// Returns the cargo workspace for the manifest -pub fn get_cargo_workspace() -> &'static std::path::Path { - static WORKSPACE: std::sync::OnceLock = std::sync::OnceLock::new(); - #[derive(Debug, serde::Deserialize)] - pub struct CargoMetadata { - pub workspace_root: PathBuf, - } +#[derive(Debug, serde::Deserialize)] +pub struct CargoMetadata { + workspace_root: PathBuf, + target_directory: PathBuf, +} + +static RUSTFMT: std::sync::OnceLock = std::sync::OnceLock::new(); +static FORM: std::sync::OnceLock = std::sync::OnceLock::new(); + +/// Returns the cargo metadata +pub fn get_cargo_metadata() -> &'static CargoMetadata { + static WORKSPACE: std::sync::OnceLock = std::sync::OnceLock::new(); WORKSPACE.get_or_init(|| { std::process::Command::new("cargo") .args(["metadata", "--format-version", "1"]) @@ -26,22 +40,20 @@ pub fn get_cargo_workspace() -> &'static std::path::Path { .map_err(anyhow::Error::from) .and_then(|s: String| serde_json::from_str::(&s).map_err(Into::into)) .unwrap() - .workspace_root }) } +/// Returns the cargo workspace for the manifest +pub fn get_cargo_workspace() -> &'static std::path::Path { + &get_cargo_metadata().workspace_root +} + #[derive(clap::Parser, Debug)] -#[command(name = "svd2rust-regress")] -pub struct Tests { +pub struct TestOpts { /// Run a long test (it's very long) #[clap(short = 'l', long)] pub long_test: bool, - // TODO: Consider using the same strategy cargo uses for passing args to rustc via `--` - /// Run svd2rust with `--atomics` - #[clap(long)] - pub atomics: bool, - /// Filter by chip name, case sensitive, may be combined with other filters #[clap(short = 'c', long)] pub chip: Vec, @@ -50,16 +62,17 @@ pub struct Tests { #[clap( short = 'm', long = "manufacturer", - value_parser = validate_manufacturer, + ignore_case = true, + value_parser = manufacturers(), )] pub mfgr: Option, /// Filter by architecture, case sensitive, may be combined with other filters - /// Options are: "CortexM", "RiscV", "Msp430", "Mips" and "XtensaLX" #[clap( short = 'a', long = "architecture", - value_parser = validate_architecture, + ignore_case = true, + value_parser = architectures(), )] pub arch: Option, @@ -71,20 +84,27 @@ pub struct Tests { #[clap(short = 'f', long)] pub format: bool, + #[clap(long)] + /// Enable splitting `lib.rs` with `form` + pub form_lib: bool, + /// Print all available test using the specified filters #[clap(long)] pub list: bool, + + /// Path to an `svd2rust` binary, relative or absolute. + /// Defaults to `target/release/svd2rust[.exe]` of this repository + /// (which must be already built) + #[clap(short = 'p', long = "svd2rust-path", default_value = default_svd2rust())] + pub current_bin_path: PathBuf, + #[clap(last = true)] + pub command: Option, // TODO: Specify smaller subset of tests? Maybe with tags? // TODO: Compile svd2rust? } -impl Tests { - fn run( - &self, - opt: &Opts, - bin_path: &PathBuf, - rustfmt_bin_path: Option<&PathBuf>, - ) -> Result, anyhow::Error> { +impl TestOpts { + fn run(&self, opt: &Opts) -> Result<(), anyhow::Error> { let tests = tests::tests(None)? .iter() // Short test? @@ -92,7 +112,8 @@ impl Tests { // selected architecture? .filter(|t| { if let Some(ref arch) = self.arch { - arch == &format!("{:?}", t.arch) + arch.to_ascii_lowercase() + .eq_ignore_ascii_case(&t.arch.to_string()) } else { true } @@ -100,7 +121,8 @@ impl Tests { // selected manufacturer? .filter(|t| { if let Some(ref mfgr) = self.mfgr { - mfgr == &format!("{:?}", t.mfgr) + mfgr.to_ascii_lowercase() + .eq_ignore_ascii_case(&t.mfgr.to_string().to_ascii_lowercase()) } else { true } @@ -108,41 +130,42 @@ impl Tests { // Specify chip - note: may match multiple .filter(|t| { if !self.chip.is_empty() { - self.chip.iter().any(|c| c == &t.chip) + self.chip.iter().any(|c| WildMatch::new(c).matches(&t.chip)) } else { - true + // Don't run failable tests unless wanted + self.bad_tests || t.should_pass } }) - // Run failable tests? - .filter(|t| self.bad_tests || t.should_pass) .collect::>(); if self.list { // FIXME: Prettier output - eprintln!("{:?}", tests.iter().map(|t| t.name()).collect::>()); + println!("{:?}", tests.iter().map(|t| t.name()).collect::>()); exit(0); } if tests.is_empty() { - eprintln!("No tests run, you might want to use `--bad-tests` and/or `--long-test`"); + tracing::error!( + "No tests run, you might want to use `--bad-tests` and/or `--long-test`" + ); } let any_fails = AtomicBool::new(false); tests.par_iter().for_each(|t| { let start = Instant::now(); - match t.test(bin_path, rustfmt_bin_path, self.atomics, opt.verbose) { + match t.test(opt, self) { Ok(s) => { if let Some(stderrs) = s { let mut buf = String::new(); for stderr in stderrs { read_file(&stderr, &mut buf); } - eprintln!( + tracing::info!( "Passed: {} - {} seconds\n{}", t.name(), start.elapsed().as_secs(), buf ); } else { - eprintln!( + tracing::info!( "Passed: {} - {} seconds", t.name(), start.elapsed().as_secs() @@ -172,7 +195,7 @@ impl Tests { } else { "".into() }; - eprintln!( + tracing::error!( "Failed: {} - {} seconds. {:?}{}", t.name(), start.elapsed().as_secs(), @@ -192,7 +215,9 @@ impl Tests { #[derive(clap::Subcommand, Debug)] pub enum Subcommand { - Tests(Tests), + Diff(Diffing), + Tests(TestOpts), + Ci(Ci), } #[derive(Parser, Debug)] @@ -202,17 +227,16 @@ pub struct Opts { #[clap(global = true, long, short = 'v', action = clap::ArgAction::Count)] pub verbose: u8, - /// Path to an `svd2rust` binary, relative or absolute. - /// Defaults to `target/release/svd2rust[.exe]` of this repository - /// (which must be already built) - #[clap(global = true, short = 'p', long = "svd2rust-path", default_value = default_svd2rust())] - pub bin_path: PathBuf, - /// Path to an `rustfmt` binary, relative or absolute. /// Defaults to `$(rustup which rustfmt)` #[clap(global = true, long)] pub rustfmt_bin_path: Option, + /// Path to a `form` binary, relative or absolute. + /// Defaults to `form` + #[clap(global = true, long)] + pub form_bin_path: Option, + /// Specify what rustup toolchain to use when compiling chip(s) #[clap(global = true, long = "toolchain")] // , env = "RUSTUP_TOOLCHAIN" pub rustup_toolchain: Option, @@ -221,13 +245,30 @@ pub struct Opts { #[clap(global = true, long, default_value = default_test_cases())] pub test_cases: std::path::PathBuf, + #[clap(global = true, long, short, default_value = "output")] + pub output_dir: std::path::PathBuf, + #[clap(subcommand)] subcommand: Subcommand, } + impl Opts { fn use_rustfmt(&self) -> bool { match self.subcommand { - Subcommand::Tests(Tests { format, .. }) => format, + Subcommand::Tests(TestOpts { format, .. }) => format, + Subcommand::Diff(Diffing { format, .. }) => format, + Subcommand::Ci(Ci { format, .. }) => format, + } + } + + fn use_form(&self) -> bool { + match self.subcommand { + Subcommand::Tests(TestOpts { form_lib, .. }) => form_lib, + Subcommand::Diff(Diffing { + form_split: form_lib, + .. + }) => form_lib, + Subcommand::Ci(Ci { form_lib, .. }) => form_lib, } } } @@ -248,30 +289,25 @@ fn default_test_cases() -> std::ffi::OsString { fn default_svd2rust() -> std::ffi::OsString { get_cargo_workspace() - .join("target/release/svd2rust") + .join(format!( + "target/release/svd2rust{}", + std::env::consts::EXE_SUFFIX, + )) .into_os_string() } -fn validate_architecture(s: &str) -> Result<(), anyhow::Error> { - if tests::tests(None)? +fn architectures() -> Vec { + svd2rust::Target::all() .iter() - .any(|t| format!("{:?}", t.arch) == s) - { - Ok(()) - } else { - anyhow::bail!("Architecture `{s}` is not a valid value") - } + .map(|arch| clap::builder::PossibleValue::new(arch.to_string())) + .collect() } -fn validate_manufacturer(s: &str) -> Result<(), anyhow::Error> { - if tests::tests(None)? +fn manufacturers() -> Vec { + tests::Manufacturer::all() .iter() - .any(|t| format!("{:?}", t.mfgr) == s) - { - Ok(()) - } else { - anyhow::bail!("Manufacturer `{s}` is not a valid value") - } + .map(|mfgr| clap::builder::PossibleValue::new(mfgr.to_string())) + .collect() } /// Validate any assumptions made by this program @@ -286,7 +322,7 @@ fn validate_tests(tests: &[tests::TestCase]) { let name = t.name(); if !uniq.insert(name.clone()) { fail = true; - eprintln!("{} is not unique!", name); + tracing::info!("{} is not unique!", name); } } @@ -309,12 +345,18 @@ fn read_file(path: &PathBuf, buf: &mut String) { fn main() -> Result<(), anyhow::Error> { let opt = Opts::parse(); + tracing_subscriber::fmt() + .pretty() + .with_target(false) + .with_env_filter( + tracing_subscriber::EnvFilter::builder() + .with_default_directive(tracing::level_filters::LevelFilter::INFO.into()) + .from_env_lossy(), + ) + .init(); // Validate all test pre-conditions - validate_tests(tests::tests(Some(&opt))?); - - let bin_path = &opt.bin_path; - anyhow::ensure!(bin_path.exists(), "svd2rust binary does not exist"); + validate_tests(tests::tests(Some(&opt.test_cases))?); let default_rustfmt: Option = if let Some((v, true)) = Command::new("rustup") .args(["which", "rustfmt"]) @@ -327,17 +369,32 @@ fn main() -> Result<(), anyhow::Error> { None }; - let rustfmt_bin_path = match (&opt.rustfmt_bin_path, opt.use_rustfmt()) { - (_, false) => None, - (Some(path), true) => Some(path), + match (&opt.rustfmt_bin_path, opt.use_rustfmt()) { + (_, false) => {} + (Some(path), true) => { + RUSTFMT.get_or_init(|| path.clone()); + } (&None, true) => { // FIXME: Use Option::filter instead when stable, rust-lang/rust#45860 if !default_rustfmt.iter().any(|p| p.is_file()) { panic!("No rustfmt found"); } - default_rustfmt.as_ref() + if let Some(default_rustfmt) = default_rustfmt { + RUSTFMT.get_or_init(|| default_rustfmt); + } } }; + match (&opt.form_bin_path, opt.use_form()) { + (_, false) => {} + (Some(path), true) => { + FORM.get_or_init(|| path.clone()); + } + (&None, true) => { + if let Ok(form) = which::which("form") { + FORM.get_or_init(|| form); + } + } + } // Set RUSTUP_TOOLCHAIN if needed if let Some(toolchain) = &opt.rustup_toolchain { @@ -345,6 +402,52 @@ fn main() -> Result<(), anyhow::Error> { } match &opt.subcommand { - Subcommand::Tests(tests_opts) => tests_opts.run(&opt, bin_path, rustfmt_bin_path)?, + Subcommand::Tests(test_opts) => { + anyhow::ensure!( + test_opts.current_bin_path.exists(), + "svd2rust binary does not exist" + ); + + test_opts.run(&opt).with_context(|| "failed to run tests") + } + Subcommand::Diff(diff) => diff.run(&opt).with_context(|| "failed to run diff"), + Subcommand::Ci(ci) => ci.run(&opt).with_context(|| "failed to run ci"), } } + +macro_rules! gha_output { + ($fmt:literal$(, $args:expr)* $(,)?) => { + #[cfg(not(test))] + println!($fmt $(, $args)*); + #[cfg(test)] + eprintln!($fmt $(,$args)*); + }; +} + +pub fn gha_print(content: &str) { + gha_output!("{}", content); +} + +pub fn gha_error(content: &str) { + gha_output!("::error {}", content); +} + +#[track_caller] +pub fn gha_output(tag: &str, content: &str) -> anyhow::Result<()> { + if content.contains('\n') { + // https://github.com/actions/toolkit/issues/403 + anyhow::bail!("output `{tag}` contains newlines, consider serializing with json and deserializing in gha with fromJSON()"); + } + write_to_gha_env_file("GITHUB_OUTPUT", &format!("{tag}={content}"))?; + Ok(()) +} + +// https://docs.github.com/en/actions/using-workflows/workflow-commands-for-github-actions#environment-files +pub fn write_to_gha_env_file(env_name: &str, contents: &str) -> anyhow::Result<()> { + use std::io::Write; + let path = std::env::var(env_name)?; + let path = std::path::Path::new(&path); + let mut file = std::fs::OpenOptions::new().append(true).open(path)?; + writeln!(file, "{}", contents)?; + Ok(()) +} diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index ea7c6b57..1f5d2916 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -1,7 +1,7 @@ use anyhow::{Context, Result}; -use svd2rust::Target; +use svd2rust::{util::ToSanitizedCase, Target}; -use crate::tests::TestCase; +use crate::{command::CommandExt, tests::TestCase, Opts, TestOpts}; use std::io::prelude::*; use std::path::PathBuf; use std::process::{Command, Output}; @@ -22,10 +22,6 @@ const PROFILE_ALL: &[&str] = &["[profile.dev]", "incremental = false"]; const FEATURES_ALL: &[&str] = &["[features]"]; const FEATURES_XTENSALX: &[&str] = &["default = [\"xtensa-lx/esp32\", \"xtensa-lx-rt/esp32\"]"]; -fn path_helper(input: &[&str]) -> PathBuf { - input.iter().collect() -} - fn path_helper_base(base: &Path, input: &[&str]) -> PathBuf { input .iter() @@ -34,7 +30,11 @@ fn path_helper_base(base: &Path, input: &[&str]) -> PathBuf { /// Create and write to file fn file_helper(payload: &str, path: &Path) -> Result<()> { - let mut f = File::create(path).with_context(|| format!("Failed to create {path:?}"))?; + let mut f = OpenOptions::new() + .create(true) + .append(true) + .open(path) + .with_context(|| format!("Failed to create {path:?}"))?; f.write_all(payload.as_bytes()) .with_context(|| format!("Failed to write to {path:?}"))?; @@ -53,7 +53,7 @@ pub struct ProcessFailed { #[derive(Debug, thiserror::Error)] pub enum TestError { - #[error(transparent)] + #[error("test case failed")] Process(#[from] ProcessFailed), #[error("Failed to run test")] Other(#[from] anyhow::Error), @@ -110,15 +110,17 @@ impl CommandHelper for Output { } impl TestCase { + #[tracing::instrument(skip(self, opts, test_opts), fields(name = %self.name()))] pub fn test( &self, - bin_path: &PathBuf, - rustfmt_bin_path: Option<&PathBuf>, - atomics: bool, - verbosity: u8, + opts: &Opts, + test_opts: &TestOpts, ) -> Result>, TestError> { - let (chip_dir, mut process_stderr_paths) = - self.setup_case(atomics, bin_path, rustfmt_bin_path)?; + let (chip_dir, mut process_stderr_paths) = self.setup_case( + &opts.output_dir, + &test_opts.current_bin_path, + test_opts.command.as_deref(), + )?; // Run `cargo check`, capturing stderr to a log file let cargo_check_err_file = path_helper_base(&chip_dir, &["cargo-check.err.log"]); let output = Command::new("cargo") @@ -134,24 +136,28 @@ impl TestCase { &process_stderr_paths, )?; process_stderr_paths.push(cargo_check_err_file); - Ok(if verbosity > 1 { + Ok(if opts.verbose > 1 { Some(process_stderr_paths) } else { None }) } + #[tracing::instrument(skip(self, output_dir, command), fields(name = %self.name(), chip_dir = tracing::field::Empty))] + pub fn setup_case( &self, - atomics: bool, - bin_path: &PathBuf, - rustfmt_bin_path: Option<&PathBuf>, + output_dir: &Path, + svd2rust_bin_path: &Path, + command: Option<&str>, ) -> Result<(PathBuf, Vec), TestError> { let user = match std::env::var("USER") { Ok(val) => val, Err(_) => "rusttester".into(), }; - let chip_dir = path_helper(&["output", &self.name()]); + let chip_dir = output_dir.join(self.name().to_sanitized_snake_case().as_ref()); + tracing::span::Span::current() + .record("chip_dir", tracing::field::display(chip_dir.display())); if let Err(err) = fs::remove_dir_all(&chip_dir) { match err.kind() { std::io::ErrorKind::NotFound => (), @@ -159,11 +165,16 @@ impl TestCase { } } let mut process_stderr_paths: Vec = vec![]; + tracing::info!( + "Initializing cargo package for `{}` in {}", + self.name(), + chip_dir.display() + ); Command::new("cargo") .env("USER", user) .arg("init") .arg("--name") - .arg(&self.name()) + .arg(self.name().to_sanitized_snake_case().as_ref()) .arg("--vcs") .arg("none") .arg(&chip_dir) @@ -186,7 +197,7 @@ impl TestCase { Target::XtensaLX => CRATES_XTENSALX.iter(), Target::None => unreachable!(), }) - .chain(if atomics { + .chain(if command.unwrap_or_default().contains("--atomics") { CRATES_ATOMICS.iter() } else { [].iter() @@ -200,6 +211,8 @@ impl TestCase { for c in crates { writeln!(file, "{}", c).with_context(|| "Failed to append to file!")?; } + tracing::info!("Downloading SVD"); + // FIXME: Avoid downloading multiple times, especially if we're using the diff command let svd = reqwest::blocking::get(self.svd_url()) .with_context(|| "Failed to get svd URL")? .text() @@ -208,6 +221,7 @@ impl TestCase { let svd_file = path_helper_base(&chip_dir, &[&chip_svd]); file_helper(&svd, &svd_file)?; let lib_rs_file = path_helper_base(&chip_dir, &["src", "lib.rs"]); + let src_dir = path_helper_base(&chip_dir, &["src"]); let svd2rust_err_file = path_helper_base(&chip_dir, &["svd2rust.err.log"]); let target = match self.arch { Target::CortexM => "cortex-m", @@ -217,16 +231,16 @@ impl TestCase { Target::XtensaLX => "xtensa-lx", Target::None => unreachable!(), }; - let mut svd2rust_bin = Command::new(bin_path); - if atomics { - svd2rust_bin.arg("--atomics"); + tracing::info!("Running svd2rust"); + let mut svd2rust_bin = Command::new(svd2rust_bin_path); + if let Some(command) = command { + svd2rust_bin.arg(command); } let output = svd2rust_bin .args(["-i", &chip_svd]) .args(["--target", target]) .current_dir(&chip_dir) - .output() - .with_context(|| "failed to execute process")?; + .get_output()?; output.capture_outputs( true, "svd2rust", @@ -258,22 +272,78 @@ impl TestCase { .write(prettyplease::unparse(&file).as_bytes()) .with_context(|| format!("couldn't write {}", lib_rs_file.display()))?; let rustfmt_err_file = path_helper_base(&chip_dir, &["rustfmt.err.log"]); - if let Some(rustfmt_bin_path) = rustfmt_bin_path { - // Run `cargo fmt`, capturing stderr to a log file + let form_err_file = path_helper_base(&chip_dir, &["form.err.log"]); + if let Some(form_bin_path) = crate::FORM.get() { + tracing::info!("Running form"); - let output = Command::new(rustfmt_bin_path) - .arg(lib_rs_file) + // move the lib.rs file to src, then split with form. + let new_lib_rs_file = path_helper_base(&chip_dir, &["lib.rs"]); + std::fs::rename(lib_rs_file, &new_lib_rs_file) + .with_context(|| "While moving lib.rs file")?; + let output = Command::new(form_bin_path) + .arg("--input") + .arg(&new_lib_rs_file) + .arg("--outdir") + .arg(&src_dir) .output() - .with_context(|| "failed to format")?; + .with_context(|| "failed to form")?; output.capture_outputs( - false, - "rustfmt", + true, + "form", None, - Some(&rustfmt_err_file), + Some(&form_err_file), &process_stderr_paths, )?; + std::fs::remove_file(&new_lib_rs_file) + .with_context(|| "While removing lib.rs file after form")?; + } + if let Some(rustfmt_bin_path) = crate::RUSTFMT.get() { + tracing::info!("Running rustfmt"); + // Run `rusfmt`, capturing stderr to a log file + + // find all .rs files in src_dir and it's subdirectories + let mut src_files = vec![]; + visit_dirs(&src_dir, &mut |e: &fs::DirEntry| { + if e.path().extension().unwrap_or_default() == "rs" { + src_files.push(e.path()); + } + }) + .context("couldn't visit")?; + src_files.sort(); + + for entry in src_files { + let output = Command::new(rustfmt_bin_path) + .arg(entry) + .args(["--edition", "2021"]) + .output() + .with_context(|| "failed to format")?; + output.capture_outputs( + false, + "rustfmt", + None, + Some(&rustfmt_err_file), + &process_stderr_paths, + )?; + } + process_stderr_paths.push(rustfmt_err_file); } + tracing::info!("Done processing"); Ok((chip_dir, process_stderr_paths)) } } + +fn visit_dirs(dir: &Path, cb: &mut dyn FnMut(&fs::DirEntry)) -> std::io::Result<()> { + if dir.is_dir() { + for entry in fs::read_dir(dir)? { + let entry = entry?; + let path = entry.path(); + if path.is_dir() { + visit_dirs(&path, cb)?; + } else { + cb(&entry); + } + } + } + Ok(()) +} diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index ac86f737..3e3d348e 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -1,10 +1,12 @@ use self::RunWhen::*; use anyhow::Context; -pub use svd2rust::util::Target; -use svd2rust::util::ToSanitizedCase; +use serde::Serialize as _; +pub use svd2rust::Target; #[allow(clippy::upper_case_acronyms)] -#[derive(Debug, serde::Serialize, serde::Deserialize)] +#[derive( + Debug, serde::Serialize, serde::Deserialize, PartialOrd, Ord, PartialEq, Eq, Clone, Copy, +)] pub enum Manufacturer { Atmel, Freescale, @@ -23,6 +25,35 @@ pub enum Manufacturer { Espressif, } +impl Manufacturer { + pub const fn all() -> &'static [Self] { + use self::Manufacturer::*; + &[ + Atmel, + Freescale, + Fujitsu, + Holtek, + Microchip, + Nordic, + Nuvoton, + NXP, + SiliconLabs, + Spansion, + STMicro, + Toshiba, + SiFive, + TexasInstruments, + Espressif, + ] + } +} + +impl std::fmt::Display for Manufacturer { + fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result { + self.serialize(f) + } +} + #[derive(Debug, serde::Serialize, serde::Deserialize)] pub enum RunWhen { Always, @@ -63,24 +94,20 @@ impl TestCase { pub fn name(&self) -> String { format!("{:?}-{}", self.mfgr, self.chip.replace('.', "_")) - .to_sanitized_snake_case() - .into() } } -pub fn tests(opts: Option<&crate::Opts>) -> Result<&'static [TestCase], anyhow::Error> { +pub fn tests(test_cases: Option<&std::path::Path>) -> Result<&'static [TestCase], anyhow::Error> { pub static TESTS: std::sync::OnceLock> = std::sync::OnceLock::new(); if let Some(cases) = TESTS.get() { Ok(cases) } else { - let path = opts - .map(|o| o.test_cases.clone()) - .ok_or_else(|| anyhow::format_err!("no test cases specified"))?; + let path = test_cases.ok_or_else(|| anyhow::format_err!("no test cases specified"))?; let cases: Vec = serde_json::from_reader( std::fs::OpenOptions::new() .read(true) - .open(&path) + .open(path) .with_context(|| format!("couldn't open file {}", path.display()))?, )?; Ok(TESTS.get_or_init(|| cases)) diff --git a/src/config.rs b/src/config.rs index c80dc561..02771e87 100644 --- a/src/config.rs +++ b/src/config.rs @@ -32,7 +32,7 @@ pub struct Config { #[allow(clippy::upper_case_acronyms)] #[allow(non_camel_case_types)] -#[cfg_attr(feature = "serde", derive(serde::Deserialize))] +#[cfg_attr(feature = "serde", derive(serde::Deserialize, serde::Serialize))] #[derive(Clone, Copy, PartialEq, Eq, Debug, Default)] pub enum Target { #[cfg_attr(feature = "serde", serde(rename = "cortex-m"))] @@ -50,6 +50,19 @@ pub enum Target { None, } +impl std::fmt::Display for Target { + fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result { + match self { + Target::CortexM => f.write_str("cortex-m"), + Target::Msp430 => f.write_str("msp430"), + Target::RISCV => f.write_str("riscv"), + Target::XtensaLX => f.write_str("xtensa-lx"), + Target::Mips => f.write_str("mips"), + Target::None => f.write_str("none"), + } + } +} + impl Target { pub fn parse(s: &str) -> Result { Ok(match s { @@ -62,6 +75,11 @@ impl Target { _ => bail!("unknown target {}", s), }) } + + pub const fn all() -> &'static [Target] { + use self::Target::*; + &[CortexM, Msp430, RISCV, XtensaLX, Mips] + } } #[cfg_attr( From 9584b229b8d100de1cd1e6b028fc546962ed9e9b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Mon, 4 Dec 2023 10:35:50 +0100 Subject: [PATCH 170/319] make tests file yaml --- Cargo.lock | 1 + ci/svd2rust-regress/Cargo.toml | 3 +- ci/svd2rust-regress/src/main.rs | 8 +- ci/svd2rust-regress/src/tests.rs | 23 +- ci/svd2rust-regress/tests.json | 4098 ------------------------------ ci/svd2rust-regress/tests.yml | 3072 ++++++++++++++++++++++ 6 files changed, 3096 insertions(+), 4109 deletions(-) delete mode 100644 ci/svd2rust-regress/tests.json create mode 100644 ci/svd2rust-regress/tests.yml diff --git a/Cargo.lock b/Cargo.lock index 74b0237e..d9d01134 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1267,6 +1267,7 @@ dependencies = [ "reqwest", "serde", "serde_json", + "serde_yaml", "svd2rust", "syn 2.0.39", "thiserror", diff --git a/ci/svd2rust-regress/Cargo.toml b/ci/svd2rust-regress/Cargo.toml index 7f7ea214..10709734 100644 --- a/ci/svd2rust-regress/Cargo.toml +++ b/ci/svd2rust-regress/Cargo.toml @@ -7,12 +7,13 @@ authors = ["James Munns ", "The svd2rust developers"] [dependencies] clap = { version = "4.1", features = ["color", "derive", "string", "env"] } svd2rust = { path = "../../" } -reqwest = { version = "0.11", features= ["blocking"] } +reqwest = { version = "0.11", features = ["blocking"] } rayon = "1.4" anyhow = "1" thiserror = "1" serde = "1" serde_json = "1" +serde_yaml = "0.9" prettyplease = "0.2" syn = "2" wildmatch = "2.1.1" diff --git a/ci/svd2rust-regress/src/main.rs b/ci/svd2rust-regress/src/main.rs index 0c820965..1dde0230 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/ci/svd2rust-regress/src/main.rs @@ -241,7 +241,7 @@ pub struct Opts { #[clap(global = true, long = "toolchain")] // , env = "RUSTUP_TOOLCHAIN" pub rustup_toolchain: Option, - /// Test cases to run, defaults to `tests.json` + /// Test cases to run #[clap(global = true, long, default_value = default_test_cases())] pub test_cases: std::path::PathBuf, @@ -273,18 +273,18 @@ impl Opts { } } -/// Hack to use ci/tests.json as default value when running as `cargo run` +/// Hack to use ci/tests.yml as default value when running as `cargo run` fn default_test_cases() -> std::ffi::OsString { std::env::var_os("CARGO_MANIFEST_DIR") .map(|mut e| { - e.extend([std::ffi::OsStr::new("/tests.json")]); + e.extend([std::ffi::OsStr::new("/tests.yml")]); std::path::PathBuf::from(e) .strip_prefix(std::env::current_dir().unwrap()) .unwrap() .to_owned() .into_os_string() }) - .unwrap_or_else(|| std::ffi::OsString::from("tests.json".to_owned())) + .unwrap_or_else(|| std::ffi::OsString::from("tests.yml".to_owned())) } fn default_svd2rust() -> std::ffi::OsString { diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index 3e3d348e..412c95a4 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -104,12 +104,23 @@ pub fn tests(test_cases: Option<&std::path::Path>) -> Result<&'static [TestCase] Ok(cases) } else { let path = test_cases.ok_or_else(|| anyhow::format_err!("no test cases specified"))?; - let cases: Vec = serde_json::from_reader( - std::fs::OpenOptions::new() - .read(true) - .open(path) - .with_context(|| format!("couldn't open file {}", path.display()))?, - )?; + let cases: Vec = if path.extension() != Some(std::ffi::OsStr::new("yml")) { + serde_json::from_reader( + std::fs::OpenOptions::new() + .read(true) + .open(path) + .with_context(|| format!("couldn't open file {}", path.display()))?, + )? + } else if path.extension() != Some(std::ffi::OsStr::new("json")) { + serde_yaml::from_reader( + std::fs::OpenOptions::new() + .read(true) + .open(path) + .with_context(|| format!("couldn't open file {}", path.display()))?, + )? + } else { + anyhow::bail!("unknown file extension for {}", path.display()); + }; Ok(TESTS.get_or_init(|| cases)) } } diff --git a/ci/svd2rust-regress/tests.json b/ci/svd2rust-regress/tests.json deleted file mode 100644 index 6a968e25..00000000 --- a/ci/svd2rust-regress/tests.json +++ /dev/null @@ -1,4098 +0,0 @@ -[ - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9CN11", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9CN12", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9G10", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9G15", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9G20", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9G25", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9G35", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9M10", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9M11", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9N12", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9X25", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "AT91SAM9X35", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3A4C", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3A8C", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N00A", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N00B", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N0A", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N0B", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N0C", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N1A", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N1B", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N1C", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N2A", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N2B", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N2C", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N4A", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N4B", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Atmel", - "chip": "ATSAM3N4C", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": 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false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Toshiba", - "chip": "M36B", - "svd_url": null, - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "cortex-m", - "mfgr": "Toshiba", - "chip": "M061", - "svd_url": null, - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "riscv", - "mfgr": "SiFive", - "chip": "E310x", - "svd_url": "https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x.svd", - "should_pass": false, - "run_when": "Never" - }, - { - "arch": "msp430", - "mfgr": "TexasInstruments", - "chip": "msp430g2553", - "svd_url": "https://github.com/pftbest/msp430g2553/raw/v0.1.3-svd/msp430g2553.svd", - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "msp430", - "mfgr": "TexasInstruments", - "chip": "msp430fr2355", - "svd_url": "https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/master/msp430fr2355.svd", - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "xtensa-lx", - "mfgr": "Espressif", - "chip": "esp32", - "svd_url": "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32.svd", - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "xtensa-lx", - "mfgr": "Espressif", - "chip": "esp32s2", - "svd_url": "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s2.svd", - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "xtensa-lx", - "mfgr": "Espressif", - "chip": "esp32s3", - "svd_url": "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s3.svd", - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "riscv", - "mfgr": "Espressif", - "chip": "esp32c3", - "svd_url": "https://raw.githubusercontent.com/espressif/svd/main/svd/esp32c3.svd", - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "mips", - "mfgr": "Microchip", - "chip": "pic32mx170f256b", - "svd_url": "https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx1xxfxxxb/PIC32MX170F256B.svd.patched", - "should_pass": true, - "run_when": "Always" - }, - { - "arch": "mips", - "mfgr": "Microchip", - "chip": "pic32mx270f256b", - "svd_url": "https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx2xxfxxxb/PIC32MX270F256B.svd.patched", - "should_pass": true, - "run_when": "Always" - } -] \ No newline at end of file diff --git a/ci/svd2rust-regress/tests.yml b/ci/svd2rust-regress/tests.yml new file mode 100644 index 00000000..f53ceeb6 --- /dev/null +++ b/ci/svd2rust-regress/tests.yml @@ -0,0 +1,3072 @@ +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9CN11 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9CN12 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9G10 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9G15 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9G20 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9G25 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9G35 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9M10 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9M11 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9N12 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9X25 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9X35 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3A4C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3A8C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N00A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N00B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N0A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N0B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N0C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N1A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N1B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N1C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N2A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N2B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N2C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N4A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N4B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N4C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S1A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S1B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S1C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S2A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S2B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S2C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S4A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S4B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S4C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S8B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S8C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3SD8B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3SD8C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3U1C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3U1E + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3U2C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3U2E + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3U4C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3U4E + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3X4C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3X4E + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3X8C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3X8E + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM4S16B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM4S16C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM4S8B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM4S8C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM4SD32B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM4SD32C + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMA5D31 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMA5D33 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMA5D34 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMA5D35 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21E15A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21E16A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21E17A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21E18A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21G16A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21G17A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21G18A + svd_url: https://raw.githubusercontent.com/wez/atsamd21-rs/master/svd/ATSAMD21G18A.svd + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21J16A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21J17A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21J18A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMR21E16A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMR21E17A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMR21E18A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMR21G16A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMR21G17A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMR21G18A + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MKV56F20 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MKV56F22 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MKV56F24 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MKV58F20 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MKV58F22 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MKV58F24 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MK61F15 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MK61F15WS + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MK70F12 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MK70F15 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MK70F15WS + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Freescale + chip: MK02F12810 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK10D10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK10D5 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK10D7 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK10DZ10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK10F12 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK11D5 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK11D5WS + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK11DA5 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK12D5 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK20D10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK20D5 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK20D7 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK20DZ10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK20F12 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK21D5 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK21D5WS + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK21DA5 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK21F12 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK21FA12 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK22D5 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK22F12 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK22F12810 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK22F25612 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK22F51212 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK22FA12 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK24F12 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK24F25612 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK26F18 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK30D10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK30D7 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK30DZ10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK40D10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK40D7 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK40DZ10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK50D10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK50D7 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK50DZ10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK51D10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK51D7 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK51DZ10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK52D10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK52DZ10 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK53D10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK53DZ10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK60D10 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK60DZ10 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK60F15 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK63F12 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK64F12 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK65F18 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK66F18 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MK80F25615 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK81F25615 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MK82F25615 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKE14F16 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKE14Z7 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKE15Z7 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKE16F16 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKE18F16 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL28T7_CORE0 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKL28T7_CORE1 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL28Z7 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL81Z7 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKL82Z7 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKS22F12 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV10Z1287 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKV10Z7 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV11Z7 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV30F12810 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKV31F12810 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV31F25612 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV31F51212 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKV40F15 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV42F16 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV43F15 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKV44F15 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV44F16 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV45F15 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKV46F15 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKV46F16 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKW20Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKW21D5 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKW21Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKW22D5 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKW24D5 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKW30Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKW31Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKW40Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKW41Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKE02Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKE04Z1284 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKE04Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKE06Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKE14D7 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKE15D7 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL02Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKL03Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL04Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL05Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKL13Z644 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL14Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL15Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKL16Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL17Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL17Z644 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKL24Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL25Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL26Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKL27Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL27Z644 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL33Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKL33Z644 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL34Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL36Z4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKL43Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKL46Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKM14ZA5 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKM33ZA5 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKM34Z7 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: MKM34ZA5 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: MKW01Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: SKEAZ1284 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Freescale + chip: SKEAZN642 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Freescale + chip: SKEAZN84 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF10xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF10xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF11xK + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF11xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF11xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF11xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF12xK + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF12xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF13xK + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF13xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF13xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF13xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF14xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF14xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF14xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF15xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF15xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF15xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF1AxL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF1AxM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF1AxN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF31xK + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF31xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF31xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF31xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF34xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF34xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF34xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF42xK + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF42xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFA3xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFA3xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFA3xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFA4xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFA4xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFA4xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFAAxL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFAAxM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFAAxN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFB4xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFB4xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFB4xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B160L + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B160R + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B360L + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B360R + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B460L + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B460R + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B560L + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B560R + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF10xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF10xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF11xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF11xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF11xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF11xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF12xJ + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF12xK + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF12xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF12xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF12xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF12xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF21xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF21xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF30xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF30xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF31xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF31xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF31xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF31xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF32xK + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF32xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF32xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF32xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF32xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF40xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF40xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF41xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF41xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF41xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF41xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF42xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF42xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF50xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF50xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF51xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF51xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF51xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF51xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF52xK + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF52xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF52xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF52xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF52xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF61xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF61xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BFD1xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BFD1xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: S6E1A1 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Fujitsu + chip: S6E2CC + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Holtek + chip: ht32f125x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Holtek + chip: ht32f175x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Holtek + chip: ht32f275x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Nordic + chip: nrf51 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Nordic + chip: nrf52 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Nuvoton + chip: M051_Series + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Nuvoton + chip: NUC100_Series + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC11Exx_v5 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC11Uxx_v7 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC11xx_v6a + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC11xx_v6 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC13Uxx_v1 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC15xx_v0.7 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC800_v0.3 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC11E6x_v0.8 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC176x5x_v0.2 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC11Cxx_v9 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC178x_7x + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC178x_7x_v0.8 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC408x_7x_v0.7 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC11Axxv0.6 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC11D14_svd_v4 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC13xx_svd_v1 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC18xx_svd_v18 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC43xx_43Sxx + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC1102_4_v4 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: LPC5410x_v0.4 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: NXP + chip: MK22F25612 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: NXP + chip: MK22F51212 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: NXP + chip: MKW41Z4 + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3C1x4_SVD + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3C1x6_SVD + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3C1x7_SVD + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3L1x4_SVD + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3L1x6_SVD + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3L1x7_SVD + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3U1x4_SVD + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3U1x6_SVD + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3U1x7_SVD + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3L1x8_SVD + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Spansion + chip: MB9AF12xK + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF12xL + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF42xK + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF42xL + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF12xJ + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF12xS + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF12xT + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF16xx + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF32xS + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF32xT + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF36xx + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF42xS + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF42xT + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF46xx + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF52xS + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF52xT + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF56xx + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF10xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF10xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF11xK + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF11xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF11xM + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF11xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF13xK + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF13xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF13xM + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF13xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF14xL + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF14xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF14xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF15xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF15xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF15xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF31xK + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF31xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF31xM + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF31xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF34xL + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AF34xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AF34xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AFA3xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AFA3xM + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AFA3xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AFA4xL + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AFA4xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AFA4xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AFB4xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9AFB4xM + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9AFB4xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF10xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF10xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF11xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF11xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF11xS + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF11xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF12xK + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF12xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF12xM + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF21xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF21xT + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF30xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF30xR + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF31xN + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF31xR + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF31xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF31xT + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF32xK + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF32xL + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF32xM + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF40xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF40xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF41xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF41xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF41xS + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF41xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF50xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF50xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF51xN + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF51xR + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF51xS + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF51xT + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF52xK + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF52xL + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF52xM + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BF61xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BF61xT + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: Spansion + chip: MB9BFD1xS + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: Spansion + chip: MB9BFD1xT + svd_url: + should_pass: true + run_when: NotShort +- arch: cortex-m + mfgr: STMicro + chip: STM32F030 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F031x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F042x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F072x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F091x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F0xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F100xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F101xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F102xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F103xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F105xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F107xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F20x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F21x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F301 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F302 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F303 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F3x4 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F373 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F401 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F405 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F407 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F410 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F411 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F412 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F413 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F427 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F429 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F446 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F469 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x2 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x3 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x5 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x6 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x7 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x9 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32G07x + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: STMicro + chip: STM32G431xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32G441xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32G471xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32G474xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32G483xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32G484xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32L100 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32L15xC + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32L15xxE + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32L15xxxA + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32L1xx + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32L4x6 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32W108 + svd_url: + should_pass: true + run_when: Always +- arch: cortex-m + mfgr: STMicro + chip: STM32L051x + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: STMicro + chip: STM32L052x + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: STMicro + chip: STM32L053x + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: STMicro + chip: STM32L062x + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: STMicro + chip: STM32L063x + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Toshiba + chip: M365 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Toshiba + chip: M367 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Toshiba + chip: M368 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Toshiba + chip: M369 + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Toshiba + chip: M36B + svd_url: + should_pass: false + run_when: Never +- arch: cortex-m + mfgr: Toshiba + chip: M061 + svd_url: + should_pass: true + run_when: Always +- arch: riscv + mfgr: SiFive + chip: E310x + svd_url: https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x.svd + should_pass: false + run_when: Never +- arch: msp430 + mfgr: TexasInstruments + chip: msp430g2553 + svd_url: https://github.com/pftbest/msp430g2553/raw/v0.1.3-svd/msp430g2553.svd + should_pass: true + run_when: Always +- arch: msp430 + mfgr: TexasInstruments + chip: msp430fr2355 + svd_url: https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/master/msp430fr2355.svd + should_pass: true + run_when: Always +- arch: xtensa-lx + mfgr: Espressif + chip: esp32 + svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32.svd + should_pass: true + run_when: Always +- arch: xtensa-lx + mfgr: Espressif + chip: esp32s2 + svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s2.svd + should_pass: true + run_when: Always +- arch: xtensa-lx + mfgr: Espressif + chip: esp32s3 + svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s3.svd + should_pass: true + run_when: Always +- arch: riscv + mfgr: Espressif + chip: esp32c3 + svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32c3.svd + should_pass: true + run_when: Always +- arch: mips + mfgr: Microchip + chip: pic32mx170f256b + svd_url: https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx1xxfxxxb/PIC32MX170F256B.svd.patched + should_pass: true + run_when: Always +- arch: mips + mfgr: Microchip + chip: pic32mx270f256b + svd_url: https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx2xxfxxxb/PIC32MX270F256B.svd.patched + should_pass: true + run_when: Always From 301eef10c74bf9f6f97f8038e67c544eb26d0fee Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 5 Dec 2023 00:10:05 +0300 Subject: [PATCH 171/319] cleanup --- Cargo.toml | 2 +- ci/svd2rust-regress/src/diff.rs | 19 +- ci/svd2rust-regress/src/svd_test.rs | 7 +- ci/svd2rust-regress/src/tests.rs | 2 + ci/svd2rust-regress/tests.yml | 1526 +++++++++------------------ src/config.rs | 16 +- 6 files changed, 536 insertions(+), 1036 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index de83adaf..507c8000 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -73,4 +73,4 @@ features = ["full","extra-traits"] [workspace] members = ["ci/svd2rust-regress"] default-members = ["."] -exclude = ["output"] \ No newline at end of file +exclude = ["output"] diff --git a/ci/svd2rust-regress/src/diff.rs b/ci/svd2rust-regress/src/diff.rs index 0a79f1a5..f4c2337a 100644 --- a/ci/svd2rust-regress/src/diff.rs +++ b/ci/svd2rust-regress/src/diff.rs @@ -158,16 +158,15 @@ impl Diffing { .collect::>(); if tests.len() != 1 { let error = anyhow::anyhow!("diff requires exactly one test case"); - if tests.is_empty() { - return Err(error.context("matched no tests")); - } else if tests.len() > 10 { - return Err(error.context(format!("matched multiple ({}) tests", tests.len()))); - } - return Err(error.context(format!( - "matched multiple ({}) tests\n{:?}", - tests.len(), - tests.iter().map(|t| t.name()).collect::>() - ))); + let len = tests.len(); + return Err(match len { + 0 => error.context("matched no tests"), + 10.. => error.context(format!("matched multiple ({len}) tests")), + _ => error.context(format!( + "matched multiple ({len}) tests\n{:?}", + tests.iter().map(|t| t.name()).collect::>() + )), + }); } let baseline = tests[0] diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 1f5d2916..5be44920 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -245,9 +245,10 @@ impl TestCase { true, "svd2rust", Some(&lib_rs_file).filter(|_| { - (self.arch != Target::CortexM) - && (self.arch != Target::Msp430) - && (self.arch != Target::XtensaLX) + !matches!( + self.arch, + Target::CortexM | Target::Msp430 | Target::XtensaLX + ) }), Some(&svd2rust_err_file), &[], diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index 412c95a4..fedd28fd 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -55,6 +55,7 @@ impl std::fmt::Display for Manufacturer { } #[derive(Debug, serde::Serialize, serde::Deserialize)] +#[serde(rename_all = "kebab-case")] pub enum RunWhen { Always, NotShort, @@ -68,6 +69,7 @@ pub struct TestCase { pub arch: Target, pub mfgr: Manufacturer, pub chip: String, + #[serde(default, skip_serializing_if = "Option::is_none")] svd_url: Option, pub should_pass: bool, run_when: RunWhen, diff --git a/ci/svd2rust-regress/tests.yml b/ci/svd2rust-regress/tests.yml index f53ceeb6..05afd680 100644 --- a/ci/svd2rust-regress/tests.yml +++ b/ci/svd2rust-regress/tests.yml @@ -1,3072 +1,2570 @@ - arch: cortex-m mfgr: Atmel chip: AT91SAM9CN11 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9CN12 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9G10 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9G15 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9G20 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9G25 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9G35 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9M10 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9M11 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9N12 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9X25 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: AT91SAM9X35 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3A4C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3A8C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N00A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N00B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N0A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N0B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N0C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N1A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N1B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N1C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N2A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N2B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N2C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N4A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N4B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3N4C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S1A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S1B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S1C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S2A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S2B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S2C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S4A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S4B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S4C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S8B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3S8C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3SD8B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3SD8C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3U1C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3U1E - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3U2C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3U2E - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3U4C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3U4E - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3X4C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3X4E - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3X8C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM3X8E - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM4S16B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM4S16C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM4S8B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM4S8C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM4SD32B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAM4SD32C - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMA5D31 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMA5D33 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMA5D34 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMA5D35 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMD21E15A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMD21E16A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMD21E17A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMD21E18A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMD21G16A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMD21G17A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMD21G18A svd_url: https://raw.githubusercontent.com/wez/atsamd21-rs/master/svd/ATSAMD21G18A.svd should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Atmel chip: ATSAMD21J16A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMD21J17A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMD21J18A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMR21E16A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMR21E17A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMR21E18A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMR21G16A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMR21G17A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Atmel chip: ATSAMR21G18A - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MKV56F20 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MKV56F22 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MKV56F24 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MKV58F20 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MKV58F22 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MKV58F24 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MK61F15 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MK61F15WS - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MK70F12 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MK70F15 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MK70F15WS - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Freescale chip: MK02F12810 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK10D10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK10D5 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK10D7 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK10DZ10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK10F12 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK11D5 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK11D5WS - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK11DA5 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK12D5 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK20D10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK20D5 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK20D7 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK20DZ10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK20F12 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK21D5 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK21D5WS - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK21DA5 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK21F12 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK21FA12 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK22D5 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK22F12 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK22F12810 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK22F25612 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK22F51212 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK22FA12 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK24F12 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK24F25612 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK26F18 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK30D10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK30D7 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK30DZ10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK40D10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK40D7 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK40DZ10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK50D10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK50D7 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK50DZ10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK51D10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK51D7 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK51DZ10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK52D10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK52DZ10 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK53D10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK53DZ10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK60D10 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK60DZ10 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK60F15 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK63F12 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK64F12 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK65F18 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK66F18 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MK80F25615 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK81F25615 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MK82F25615 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKE14F16 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKE14Z7 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKE15Z7 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKE16F16 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKE18F16 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL28T7_CORE0 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKL28T7_CORE1 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL28Z7 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL81Z7 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKL82Z7 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKS22F12 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV10Z1287 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKV10Z7 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV11Z7 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV30F12810 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKV31F12810 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV31F25612 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV31F51212 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKV40F15 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV42F16 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV43F15 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKV44F15 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV44F16 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV45F15 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKV46F15 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKV46F16 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKW20Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKW21D5 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKW21Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKW22D5 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKW24D5 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKW30Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKW31Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKW40Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKW41Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKE02Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKE04Z1284 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKE04Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKE06Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKE14D7 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKE15D7 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL02Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKL03Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL04Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL05Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKL13Z644 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL14Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL15Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKL16Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL17Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL17Z644 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKL24Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL25Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL26Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKL27Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL27Z644 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL33Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKL33Z644 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL34Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL36Z4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKL43Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKL46Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKM14ZA5 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKM33ZA5 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKM34Z7 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKM34ZA5 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: MKW01Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: SKEAZ1284 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Freescale chip: SKEAZN642 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Freescale chip: SKEAZN84 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Fujitsu chip: MB9AF10xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF10xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF11xK - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF11xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF11xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF11xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF12xK - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF12xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF13xK - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF13xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF13xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF13xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF14xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF14xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF14xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF15xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF15xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF15xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF1AxL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF1AxM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF1AxN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF31xK - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF31xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF31xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF31xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF34xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF34xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF34xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF42xK - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF42xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA3xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA3xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA3xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA4xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA4xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA4xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFAAxL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFAAxM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFAAxN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFB4xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFB4xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFB4xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B160L - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B160R - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B360L - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B360R - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B460L - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B460R - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B560L - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B560R - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF10xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF10xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF11xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF11xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF11xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF11xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xJ - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xK - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF21xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF21xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF30xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF30xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF31xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF31xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF31xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF31xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xK - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF40xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF40xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF41xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF41xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF41xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF41xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF42xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF42xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF50xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF50xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF51xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF51xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF51xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF51xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xK - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF61xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF61xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BFD1xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BFD1xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: S6E1A1 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Fujitsu chip: S6E2CC - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Holtek chip: ht32f125x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Holtek chip: ht32f175x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Holtek chip: ht32f275x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Nordic chip: nrf51 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Nordic chip: nrf52 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Nuvoton chip: M051_Series - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Nuvoton chip: NUC100_Series - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC11Exx_v5 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC11Uxx_v7 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC11xx_v6a - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC11xx_v6 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC13Uxx_v1 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC15xx_v0.7 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC800_v0.3 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC11E6x_v0.8 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC176x5x_v0.2 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC11Cxx_v9 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC178x_7x - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC178x_7x_v0.8 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC408x_7x_v0.7 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC11Axxv0.6 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC11D14_svd_v4 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC13xx_svd_v1 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC18xx_svd_v18 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC43xx_43Sxx - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC1102_4_v4 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: LPC5410x_v0.4 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: NXP chip: MK22F25612 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: NXP chip: MK22F51212 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: NXP chip: MKW41Z4 - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3C1x4_SVD - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3C1x6_SVD - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3C1x7_SVD - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3L1x4_SVD - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3L1x6_SVD - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3L1x7_SVD - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3U1x4_SVD - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3U1x6_SVD - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3U1x7_SVD - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: SiliconLabs chip: SIM3L1x8_SVD - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Spansion chip: MB9AF12xK - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF12xL - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF42xK - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF42xL - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF12xJ - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF12xS - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF12xT - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF16xx - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF32xS - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF32xT - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF36xx - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF42xS - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF42xT - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF46xx - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF52xS - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF52xT - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF56xx - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF10xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF10xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF11xK - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF11xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF11xM - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF11xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF13xK - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF13xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF13xM - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF13xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF14xL - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF14xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF14xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF15xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF15xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF15xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF31xK - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF31xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF31xM - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF31xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF34xL - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AF34xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF34xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AFA3xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AFA3xM - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AFA3xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AFA4xL - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AFA4xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AFA4xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AFB4xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AFB4xM - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9AFB4xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF10xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF10xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF11xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF11xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF11xS - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF11xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF12xK - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF12xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF12xM - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF21xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF21xT - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF30xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF30xR - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF31xN - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF31xR - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF31xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF31xT - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF32xK - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF32xL - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF32xM - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF40xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF40xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF41xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF41xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF41xS - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF41xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF50xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF50xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF51xN - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF51xR - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF51xS - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF51xT - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF52xK - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF52xL - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF52xM - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BF61xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF61xT - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: Spansion chip: MB9BFD1xS - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BFD1xT - svd_url: should_pass: true - run_when: NotShort + run_when: not-short - arch: cortex-m mfgr: STMicro chip: STM32F030 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F031x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F042x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F072x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F091x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F0xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F100xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F101xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F102xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F103xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F105xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F107xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F20x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F21x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F301 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F302 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F303 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F3x4 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F373 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F401 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F405 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F407 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F410 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F411 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F412 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F413 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F427 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F429 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F446 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F469 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x2 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x3 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x5 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x6 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x7 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x9 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G07x - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: STMicro chip: STM32G431xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G441xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G471xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G474xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G483xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G484xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L100 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L15xC - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L15xxE - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L15xxxA - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L1xx - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L4x6 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32W108 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L051x - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: STMicro chip: STM32L052x - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: STMicro chip: STM32L053x - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: STMicro chip: STM32L062x - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: STMicro chip: STM32L063x - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Toshiba chip: M365 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Toshiba chip: M367 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Toshiba chip: M368 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Toshiba chip: M369 - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Toshiba chip: M36B - svd_url: should_pass: false - run_when: Never + run_when: never - arch: cortex-m mfgr: Toshiba chip: M061 - svd_url: should_pass: true - run_when: Always + run_when: always - arch: riscv mfgr: SiFive chip: E310x svd_url: https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x.svd should_pass: false - run_when: Never + run_when: never - arch: msp430 mfgr: TexasInstruments chip: msp430g2553 svd_url: https://github.com/pftbest/msp430g2553/raw/v0.1.3-svd/msp430g2553.svd should_pass: true - run_when: Always + run_when: always - arch: msp430 mfgr: TexasInstruments chip: msp430fr2355 svd_url: https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/master/msp430fr2355.svd should_pass: true - run_when: Always + run_when: always - arch: xtensa-lx mfgr: Espressif chip: esp32 svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32.svd should_pass: true - run_when: Always + run_when: always - arch: xtensa-lx mfgr: Espressif chip: esp32s2 svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s2.svd should_pass: true - run_when: Always + run_when: always - arch: xtensa-lx mfgr: Espressif chip: esp32s3 svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s3.svd should_pass: true - run_when: Always + run_when: always - arch: riscv mfgr: Espressif chip: esp32c3 svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32c3.svd should_pass: true - run_when: Always + run_when: always - arch: mips mfgr: Microchip chip: pic32mx170f256b svd_url: https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx1xxfxxxb/PIC32MX170F256B.svd.patched should_pass: true - run_when: Always + run_when: always - arch: mips mfgr: Microchip chip: pic32mx270f256b svd_url: https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx2xxfxxxb/PIC32MX270F256B.svd.patched should_pass: true - run_when: Always + run_when: always diff --git a/src/config.rs b/src/config.rs index 02771e87..7656bf43 100644 --- a/src/config.rs +++ b/src/config.rs @@ -52,14 +52,14 @@ pub enum Target { impl std::fmt::Display for Target { fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result { - match self { - Target::CortexM => f.write_str("cortex-m"), - Target::Msp430 => f.write_str("msp430"), - Target::RISCV => f.write_str("riscv"), - Target::XtensaLX => f.write_str("xtensa-lx"), - Target::Mips => f.write_str("mips"), - Target::None => f.write_str("none"), - } + f.write_str(match self { + Target::CortexM => "cortex-m", + Target::Msp430 => "msp430", + Target::RISCV => "riscv", + Target::XtensaLX => "xtensa-lx", + Target::Mips => "mips", + Target::None => "none", + }) } } From cb56476e0f3e53dc1452152aff13761b5d80339b Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 5 Dec 2023 09:19:26 +0300 Subject: [PATCH 172/319] check 404 --- ci/svd2rust-regress/src/svd_test.rs | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 5be44920..9b7f4d6f 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -1,4 +1,4 @@ -use anyhow::{Context, Result}; +use anyhow::{anyhow, Context, Result}; use svd2rust::{util::ToSanitizedCase, Target}; use crate::{command::CommandExt, tests::TestCase, Opts, TestOpts}; @@ -213,10 +213,14 @@ impl TestCase { } tracing::info!("Downloading SVD"); // FIXME: Avoid downloading multiple times, especially if we're using the diff command - let svd = reqwest::blocking::get(self.svd_url()) - .with_context(|| "Failed to get svd URL")? + let svd_url = &self.svd_url(); + let svd = reqwest::blocking::get(svd_url) + .with_context(|| format!("Failed to get svd URL: {svd_url}"))? .text() .with_context(|| "SVD is bad text")?; + if svd == "404: Not Found" { + return Err(anyhow!("Failed to get svd URL: {svd_url}. {svd}").into()); + } let chip_svd = format!("{}.svd", &self.chip); let svd_file = path_helper_base(&chip_dir, &[&chip_svd]); file_helper(&svd, &svd_file)?; From 4560744b3d2bae30bd4beaedf9eb2f0a6fd60ade Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 5 Dec 2023 09:31:32 +0300 Subject: [PATCH 173/319] posborn -> cmsis-svd-data --- ci/script.sh | 20 ++++++++++---------- ci/svd2rust-regress/src/tests.rs | 2 +- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/ci/script.sh b/ci/script.sh index afcaebf9..1e4ab69a 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -1,7 +1,7 @@ set -euxo pipefail test_svd() { - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/$VENDOR/${1}.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/$VENDOR/${1}.svd } test_patched_stm32() { @@ -510,15 +510,15 @@ main() { SiliconLabs) # #99 regression tests - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/SiliconLabs/SiM3_NRND/SIM3C1x4.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/SiliconLabs/SiM3_NRND/SIM3C1x6.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/SiliconLabs/SiM3_NRND/SIM3C1x7.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/SiliconLabs/SiM3_NRND/SIM3L1x4.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/SiliconLabs/SiM3_NRND/SIM3L1x6.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/SiliconLabs/SiM3_NRND/SIM3L1x7.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/SiliconLabs/SiM3_NRND/SIM3U1x4.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/SiliconLabs/SiM3_NRND/SIM3U1x6.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/SiliconLabs/SiM3_NRND/SIM3U1x7.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3C1x4.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3C1x6.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3C1x7.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3L1x4.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3L1x6.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3L1x7.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3U1x4.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3U1x6.svd + test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3U1x7.svd # FIXME(???) panicked at "c.text.clone()" # test_svd SIM3L1x8_SVD diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index fedd28fd..7f9e57ac 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -79,7 +79,7 @@ impl TestCase { pub fn svd_url(&self) -> String { match &self.svd_url { Some(u) => u.to_owned(), - None => format!("https://raw.githubusercontent.com/posborne/cmsis-svd/master/data/{vendor:?}/{chip}.svd", + None => format!("https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/{vendor:?}/{chip}.svd", vendor = self.mfgr, chip = self.chip ) From a65d514745636c32d8cd44510373ff7ef3985ae5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Tue, 5 Dec 2023 12:37:00 +0100 Subject: [PATCH 174/319] small fixes --- ci/svd2rust-regress/src/diff.rs | 8 ++--- ci/svd2rust-regress/src/main.rs | 49 +++++++++++++++-------------- ci/svd2rust-regress/src/svd_test.rs | 8 ++--- ci/svd2rust-regress/src/tests.rs | 2 +- src/util.rs | 14 +++++---- 5 files changed, 42 insertions(+), 39 deletions(-) diff --git a/ci/svd2rust-regress/src/diff.rs b/ci/svd2rust-regress/src/diff.rs index f4c2337a..0d1aaf7a 100644 --- a/ci/svd2rust-regress/src/diff.rs +++ b/ci/svd2rust-regress/src/diff.rs @@ -146,13 +146,13 @@ impl Diffing { } }) .filter(|t| { - if !self.chip.is_empty() { + if self.chip.is_empty() { + false + } else { self.chip.iter().any(|c| { wildmatch::WildMatch::new(&c.to_ascii_lowercase()) .matches(&t.chip.to_ascii_lowercase()) }) - } else { - false } }) .collect::>(); @@ -206,7 +206,7 @@ impl Diffing { // FIXME: refactor this to be less ugly let [baseline_sc, current_sc] = self.get_source_and_command(); let baseline = match baseline_sc.and_then(|(source, _)| source) { - reference @ None | reference @ Some("" | "master") => { + reference @ (None | Some("" | "master")) => { github::get_release_binary_artifact(reference.unwrap_or("master"), &opts.output_dir) .with_context(|| "couldn't get svd2rust latest unreleased artifact")? } diff --git a/ci/svd2rust-regress/src/main.rs b/ci/svd2rust-regress/src/main.rs index 1dde0230..f9385630 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/ci/svd2rust-regress/src/main.rs @@ -44,6 +44,7 @@ pub fn get_cargo_metadata() -> &'static CargoMetadata { } /// Returns the cargo workspace for the manifest +#[must_use] pub fn get_cargo_workspace() -> &'static std::path::Path { &get_cargo_metadata().workspace_root } @@ -129,11 +130,11 @@ impl TestOpts { }) // Specify chip - note: may match multiple .filter(|t| { - if !self.chip.is_empty() { - self.chip.iter().any(|c| WildMatch::new(c).matches(&t.chip)) - } else { + if self.chip.is_empty() { // Don't run failable tests unless wanted self.bad_tests || t.should_pass + } else { + self.chip.iter().any(|c| WildMatch::new(c).matches(&t.chip)) } }) .collect::>(); @@ -190,10 +191,10 @@ impl TestOpts { read_file(stderr, &mut buf); buf } - _ => "".into(), + _ => String::new(), } } else { - "".into() + String::new() }; tracing::error!( "Failed: {} - {} seconds. {:?}{}", @@ -253,38 +254,39 @@ pub struct Opts { } impl Opts { - fn use_rustfmt(&self) -> bool { + const fn use_rustfmt(&self) -> bool { match self.subcommand { - Subcommand::Tests(TestOpts { format, .. }) => format, - Subcommand::Diff(Diffing { format, .. }) => format, - Subcommand::Ci(Ci { format, .. }) => format, + Subcommand::Tests(TestOpts { format, .. }) + | Subcommand::Diff(Diffing { format, .. }) + | Subcommand::Ci(Ci { format, .. }) => format, } } - fn use_form(&self) -> bool { + const fn use_form(&self) -> bool { match self.subcommand { - Subcommand::Tests(TestOpts { form_lib, .. }) => form_lib, - Subcommand::Diff(Diffing { + Subcommand::Tests(TestOpts { form_lib, .. }) + | Subcommand::Diff(Diffing { form_split: form_lib, .. - }) => form_lib, - Subcommand::Ci(Ci { form_lib, .. }) => form_lib, + }) + | Subcommand::Ci(Ci { form_lib, .. }) => form_lib, } } } /// Hack to use ci/tests.yml as default value when running as `cargo run` fn default_test_cases() -> std::ffi::OsString { - std::env::var_os("CARGO_MANIFEST_DIR") - .map(|mut e| { + std::env::var_os("CARGO_MANIFEST_DIR").map_or_else( + || std::ffi::OsString::from("tests.yml".to_owned()), + |mut e| { e.extend([std::ffi::OsStr::new("/tests.yml")]); std::path::PathBuf::from(e) .strip_prefix(std::env::current_dir().unwrap()) .unwrap() .to_owned() .into_os_string() - }) - .unwrap_or_else(|| std::ffi::OsString::from("tests.yml".to_owned())) + }, + ) } fn default_svd2rust() -> std::ffi::OsString { @@ -326,9 +328,7 @@ fn validate_tests(tests: &[tests::TestCase]) { } } - if fail { - panic!("Tests failed validation"); - } + assert!(!fail, "Tests failed validation"); } fn read_file(path: &PathBuf, buf: &mut String) { @@ -376,9 +376,10 @@ fn main() -> Result<(), anyhow::Error> { } (&None, true) => { // FIXME: Use Option::filter instead when stable, rust-lang/rust#45860 - if !default_rustfmt.iter().any(|p| p.is_file()) { - panic!("No rustfmt found"); - } + assert!( + default_rustfmt.iter().any(|p| p.is_file()), + "No rustfmt found" + ); if let Some(default_rustfmt) = default_rustfmt { RUSTFMT.get_or_init(|| default_rustfmt); } diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 9b7f4d6f..8f149d60 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -216,11 +216,11 @@ impl TestCase { let svd_url = &self.svd_url(); let svd = reqwest::blocking::get(svd_url) .with_context(|| format!("Failed to get svd URL: {svd_url}"))? + .error_for_status() + .with_context(|| anyhow!("Response is not ok for svd url"))? .text() .with_context(|| "SVD is bad text")?; - if svd == "404: Not Found" { - return Err(anyhow!("Failed to get svd URL: {svd_url}. {svd}").into()); - } + let chip_svd = format!("{}.svd", &self.chip); let svd_file = path_helper_base(&chip_dir, &[&chip_svd]); file_helper(&svd, &svd_file)?; @@ -262,7 +262,7 @@ impl TestCase { Target::CortexM | Target::Mips | Target::Msp430 | Target::XtensaLX => { // TODO: Give error the path to stderr fs::rename(path_helper_base(&chip_dir, &["lib.rs"]), &lib_rs_file) - .with_context(|| "While moving lib.rs file")? + .with_context(|| "While moving lib.rs file")?; } _ => {} } diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index 7f9e57ac..c77e57c5 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -86,7 +86,7 @@ impl TestCase { } } - pub fn should_run(&self, short_test: bool) -> bool { + pub const fn should_run(&self, short_test: bool) -> bool { match (&self.run_when, short_test) { (&Always, _) => true, (&NotShort, true) => false, diff --git a/src/util.rs b/src/util.rs index 722a24cb..547d879a 100644 --- a/src/util.rs +++ b/src/util.rs @@ -144,7 +144,7 @@ pub fn respace(s: &str) -> String { pub fn escape_brackets(s: &str) -> String { s.split('[') - .fold("".to_string(), |acc, x| { + .fold(String::new(), |acc, x| { if acc.is_empty() { x.to_string() } else if acc.ends_with('\\') { @@ -154,7 +154,7 @@ pub fn escape_brackets(s: &str) -> String { } }) .split(']') - .fold("".to_string(), |acc, x| { + .fold(String::new(), |acc, x| { if acc.is_empty() { x.to_string() } else if acc.ends_with('\\') { @@ -445,11 +445,13 @@ pub fn peripheral_names(d: &Device) -> Vec { for p in &d.peripherals { match p { Peripheral::Single(info) => { - v.push(replace_suffix(&info.name.to_sanitized_snake_case(), "")) + v.push(replace_suffix(&info.name.to_sanitized_snake_case(), "")); + } + Peripheral::Array(info, dim) => { + v.extend( + svd_rs::array::names(info, dim).map(|n| n.to_sanitized_snake_case().into()), + ); } - Peripheral::Array(info, dim) => v.extend( - svd_rs::array::names(info, dim).map(|n| n.to_sanitized_snake_case().into()), - ), } } v.sort(); From 1a74d737585328e5c93c92c24221dbf9be7e9c08 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Tue, 5 Dec 2023 20:19:48 +0100 Subject: [PATCH 175/319] add more context to setup errors --- ci/svd2rust-regress/src/svd_test.rs | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 8f149d60..a2f649a4 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -116,11 +116,13 @@ impl TestCase { opts: &Opts, test_opts: &TestOpts, ) -> Result>, TestError> { - let (chip_dir, mut process_stderr_paths) = self.setup_case( - &opts.output_dir, - &test_opts.current_bin_path, - test_opts.command.as_deref(), - )?; + let (chip_dir, mut process_stderr_paths) = self + .setup_case( + &opts.output_dir, + &test_opts.current_bin_path, + test_opts.command.as_deref(), + ) + .with_context(|| anyhow!("when setting up case for {}", self.name()))?; // Run `cargo check`, capturing stderr to a log file let cargo_check_err_file = path_helper_base(&chip_dir, &["cargo-check.err.log"]); let output = Command::new("cargo") From f047661bddd63e199dd763f47d9b3a1b7f466608 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Wed, 6 Dec 2023 18:42:52 +0100 Subject: [PATCH 176/319] improve output --- .cargo/config.toml | 2 +- .github/workflows/diff.yml | 9 ++- ci/svd2rust-regress/src/command.rs | 25 +++--- ci/svd2rust-regress/src/diff.rs | 52 ++++++++---- ci/svd2rust-regress/src/github.rs | 2 +- ci/svd2rust-regress/src/main.rs | 1 + ci/svd2rust-regress/src/svd_test.rs | 118 ++++++++++++++++------------ ci/svd2rust-regress/tests.yml | 2 +- 8 files changed, 124 insertions(+), 87 deletions(-) diff --git a/.cargo/config.toml b/.cargo/config.toml index f897ca7b..43ca37f1 100644 --- a/.cargo/config.toml +++ b/.cargo/config.toml @@ -2,4 +2,4 @@ linker = "aarch64-linux-gnu-gcc" [alias] -regress = "run -p svd2rust-regress --" \ No newline at end of file +regress = "run -p svd2rust-regress --" diff --git a/.github/workflows/diff.yml b/.github/workflows/diff.yml index 50f8424f..a6d40960 100644 --- a/.github/workflows/diff.yml +++ b/.github/workflows/diff.yml @@ -18,6 +18,8 @@ jobs: - name: Cache uses: Swatinem/rust-cache@v2 + with: + shared-key: "diff" - run: cargo regress ci id: regress-ci @@ -41,13 +43,14 @@ jobs: - name: Cache uses: Swatinem/rust-cache@v2 with: - cache-on-failure: true + shared-key: "diff" - uses: taiki-e/install-action@v2 if: matrix.needs_semver_checks with: tool: cargo-semver-checks + # if a new line is added here, make sure to update the `summary` job to reference the new step index - uses: taiki-e/install-action@v2 with: tool: git-delta @@ -59,8 +62,8 @@ jobs: GIT_PAGER: delta --hunk-header-style omit summary: runs-on: ubuntu-latest - needs: [diff] - if: always() + needs: [diff, generate] + if: always() && needs.generate.outputs.diffs != '{}' && needs.generate.outputs.diffs != '[]' && needs.generate.outputs.diffs != '' steps: - uses: actions/checkout@v4 diff --git a/ci/svd2rust-regress/src/command.rs b/ci/svd2rust-regress/src/command.rs index 77291bd0..2c873bb8 100644 --- a/ci/svd2rust-regress/src/command.rs +++ b/ci/svd2rust-regress/src/command.rs @@ -7,7 +7,7 @@ pub trait CommandExt { fn run(&mut self, hide: bool) -> Result<(), anyhow::Error>; #[track_caller] - fn get_output(&mut self) -> Result; + fn get_output(&mut self, can_fail: bool) -> Result; #[track_caller] fn get_output_string(&mut self) -> Result; @@ -33,17 +33,11 @@ impl CommandExt for Command { } #[track_caller] - fn get_output(&mut self) -> Result { - let output = self.output().with_context(|| { - format!( - "command `{}{}` couldn't be run", - self.get_current_dir() - .map(|d| format!("{} ", d.display())) - .unwrap_or_default(), - self.display() - ) - })?; - if output.status.success() { + fn get_output(&mut self, can_fail: bool) -> Result { + let output = self + .output() + .with_context(|| format!("command `{}` couldn't be run", self.display()))?; + if output.status.success() || can_fail { Ok(output) } else { anyhow::bail!( @@ -57,12 +51,15 @@ impl CommandExt for Command { #[track_caller] fn get_output_string(&mut self) -> Result { - String::from_utf8(self.get_output()?.stdout).map_err(Into::into) + String::from_utf8(self.get_output(true)?.stdout).map_err(Into::into) } fn display(&self) -> String { format!( - "{} {}", + "{}{} {}", + self.get_current_dir() + .map(|d| format!("{} ", d.display())) + .unwrap_or_default(), self.get_program().to_string_lossy(), self.get_args() .map(|s| s.to_string_lossy()) diff --git a/ci/svd2rust-regress/src/diff.rs b/ci/svd2rust-regress/src/diff.rs index 0d1aaf7a..2bfb0d64 100644 --- a/ci/svd2rust-regress/src/diff.rs +++ b/ci/svd2rust-regress/src/diff.rs @@ -13,10 +13,10 @@ pub struct Diffing { /// Change the base version by starting with `@` followed by the source. /// /// supports `@pr` for current pr, `@master` for latest master build, or a version tag like `@v0.30.0` - #[clap(global = true, long, alias = "base")] + #[clap(global = true, long = "baseline", alias = "base")] pub baseline: Option, - #[clap(global = true, long, alias = "head")] + #[clap(global = true, long = "current", alias = "head")] pub current: Option, /// Enable formatting with `rustfmt` @@ -72,6 +72,17 @@ pub struct Diffing { pub enum DiffingMode { Semver, Diff, + Pr, +} + +impl DiffingMode { + /// Returns `true` if the diffing mode is [`Pr`]. + /// + /// [`Pr`]: DiffingMode::Pr + #[must_use] + pub fn is_pr(&self) -> bool { + matches!(self, Self::Pr) + } } type Source<'s> = Option<&'s str>; @@ -83,7 +94,7 @@ impl Diffing { .make_case(opts) .with_context(|| "couldn't setup test case")?; match self.sub.unwrap_or(DiffingMode::Diff) { - DiffingMode::Diff => { + DiffingMode::Diff | DiffingMode::Pr => { let mut command; if let Some(pager) = &self.pager { if self.use_pager_directly { @@ -156,27 +167,34 @@ impl Diffing { } }) .collect::>(); - if tests.len() != 1 { - let error = anyhow::anyhow!("diff requires exactly one test case"); - let len = tests.len(); - return Err(match len { - 0 => error.context("matched no tests"), - 10.. => error.context(format!("matched multiple ({len}) tests")), - _ => error.context(format!( - "matched multiple ({len}) tests\n{:?}", - tests.iter().map(|t| t.name()).collect::>() - )), - }); - } + let test = match (tests.len(), self.sub) { + (1, _) => tests[0], + (1.., Some(DiffingMode::Pr)) => tests + .iter() + .find(|t| t.chip == "STM32F401") + .unwrap_or(&tests[0]), + _ => { + let error = anyhow::anyhow!("diff requires exactly one test case"); + let len = tests.len(); + return Err(match len { + 0 => error.context("matched no tests"), + 10.. => error.context(format!("matched multiple ({len}) tests")), + _ => error.context(format!( + "matched multiple ({len}) tests\n{:?}", + tests.iter().map(|t| t.name()).collect::>() + )), + }); + } + }; - let baseline = tests[0] + let baseline = test .setup_case( &opts.output_dir.join("baseline"), &baseline_bin, baseline_cmd, ) .with_context(|| "couldn't create head")?; - let current = tests[0] + let current = test .setup_case(&opts.output_dir.join("current"), ¤t_bin, current_cmd) .with_context(|| "couldn't create base")?; diff --git a/ci/svd2rust-regress/src/github.rs b/ci/svd2rust-regress/src/github.rs index 996d6e87..1a5b0ecb 100644 --- a/ci/svd2rust-regress/src/github.rs +++ b/ci/svd2rust-regress/src/github.rs @@ -148,7 +148,7 @@ pub fn get_release_binary_artifact( Command::new("gzip") .arg("-d") .arg(output_dir.join(artifact)) - .get_output()?; + .get_output(false)?; } } _ => { diff --git a/ci/svd2rust-regress/src/main.rs b/ci/svd2rust-regress/src/main.rs index f9385630..a4bec671 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/ci/svd2rust-regress/src/main.rs @@ -348,6 +348,7 @@ fn main() -> Result<(), anyhow::Error> { tracing_subscriber::fmt() .pretty() .with_target(false) + .with_writer(std::io::stderr) .with_env_filter( tracing_subscriber::EnvFilter::builder() .with_default_directive(tracing::level_filters::LevelFilter::INFO.into()) diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index a2f649a4..fc87778e 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -6,6 +6,7 @@ use std::io::prelude::*; use std::path::PathBuf; use std::process::{Command, Output}; use std::{ + fmt::Write as _, fs::{self, File, OpenOptions}, path::Path, }; @@ -67,7 +68,7 @@ impl std::fmt::Debug for ProcessFailed { trait CommandHelper { fn capture_outputs( - &self, + &mut self, cant_fail: bool, name: &str, stdout: Option<&PathBuf>, @@ -76,26 +77,48 @@ trait CommandHelper { ) -> Result<(), TestError>; } -impl CommandHelper for Output { +impl CommandHelper for Command { + #[tracing::instrument(skip_all, fields(stdout = tracing::field::Empty, stderr = tracing::field::Empty))] fn capture_outputs( - &self, + &mut self, cant_fail: bool, name: &str, stdout: Option<&PathBuf>, stderr: Option<&PathBuf>, previous_processes_stderr: &[PathBuf], ) -> Result<(), TestError> { + let output = self.get_output(true)?; + let out_payload = String::from_utf8_lossy(&output.stdout); if let Some(out) = stdout { - let out_payload = String::from_utf8_lossy(&self.stdout); file_helper(&out_payload, out)?; }; + let err_payload = String::from_utf8_lossy(&output.stderr); if let Some(err) = stderr { - let err_payload = String::from_utf8_lossy(&self.stderr); file_helper(&err_payload, err)?; }; - - if cant_fail && !self.status.success() { + if cant_fail && !output.status.success() { + let span = tracing::Span::current(); + let mut message = format!("Process failed: {}", self.display()); + if !out_payload.trim().is_empty() { + span.record( + "stdout", + tracing::field::display( + stdout.map(|p| p.display().to_string()).unwrap_or_default(), + ), + ); + write!(message, "\nstdout: \n{}", out_payload).unwrap(); + } + if !err_payload.trim().is_empty() { + span.record( + "stderr", + tracing::field::display( + stderr.map(|p| p.display().to_string()).unwrap_or_default(), + ), + ); + write!(message, "\nstderr: \n{}", err_payload).unwrap(); + } + tracing::error!(message=%message); return Err(ProcessFailed { command: name.into(), stdout: stdout.cloned(), @@ -125,18 +148,17 @@ impl TestCase { .with_context(|| anyhow!("when setting up case for {}", self.name()))?; // Run `cargo check`, capturing stderr to a log file let cargo_check_err_file = path_helper_base(&chip_dir, &["cargo-check.err.log"]); - let output = Command::new("cargo") + Command::new("cargo") .arg("check") .current_dir(&chip_dir) - .output() + .capture_outputs( + true, + "cargo check", + None, + Some(&cargo_check_err_file), + &process_stderr_paths, + ) .with_context(|| "failed to check")?; - output.capture_outputs( - true, - "cargo check", - None, - Some(&cargo_check_err_file), - &process_stderr_paths, - )?; process_stderr_paths.push(cargo_check_err_file); Ok(if opts.verbose > 1 { Some(process_stderr_paths) @@ -180,9 +202,8 @@ impl TestCase { .arg("--vcs") .arg("none") .arg(&chip_dir) - .output() - .with_context(|| "Failed to cargo init")? - .capture_outputs(true, "cargo init", None, None, &[])?; + .capture_outputs(true, "cargo init", None, None, &[]) + .with_context(|| "Failed to cargo init")?; let svd_toml = path_helper_base(&chip_dir, &["Cargo.toml"]); let mut file = OpenOptions::new() .write(true) @@ -242,23 +263,22 @@ impl TestCase { if let Some(command) = command { svd2rust_bin.arg(command); } - let output = svd2rust_bin + svd2rust_bin .args(["-i", &chip_svd]) .args(["--target", target]) .current_dir(&chip_dir) - .get_output()?; - output.capture_outputs( - true, - "svd2rust", - Some(&lib_rs_file).filter(|_| { - !matches!( - self.arch, - Target::CortexM | Target::Msp430 | Target::XtensaLX - ) - }), - Some(&svd2rust_err_file), - &[], - )?; + .capture_outputs( + true, + "svd2rust", + Some(&lib_rs_file).filter(|_| { + !matches!( + self.arch, + Target::CortexM | Target::Msp430 | Target::XtensaLX + ) + }), + Some(&svd2rust_err_file), + &[], + )?; process_stderr_paths.push(svd2rust_err_file); match self.arch { Target::CortexM | Target::Mips | Target::Msp430 | Target::XtensaLX => { @@ -287,20 +307,19 @@ impl TestCase { let new_lib_rs_file = path_helper_base(&chip_dir, &["lib.rs"]); std::fs::rename(lib_rs_file, &new_lib_rs_file) .with_context(|| "While moving lib.rs file")?; - let output = Command::new(form_bin_path) + Command::new(form_bin_path) .arg("--input") .arg(&new_lib_rs_file) .arg("--outdir") .arg(&src_dir) - .output() + .capture_outputs( + true, + "form", + None, + Some(&form_err_file), + &process_stderr_paths, + ) .with_context(|| "failed to form")?; - output.capture_outputs( - true, - "form", - None, - Some(&form_err_file), - &process_stderr_paths, - )?; std::fs::remove_file(&new_lib_rs_file) .with_context(|| "While removing lib.rs file after form")?; } @@ -322,15 +341,14 @@ impl TestCase { let output = Command::new(rustfmt_bin_path) .arg(entry) .args(["--edition", "2021"]) - .output() + .capture_outputs( + false, + "rustfmt", + None, + Some(&rustfmt_err_file), + &process_stderr_paths, + ) .with_context(|| "failed to format")?; - output.capture_outputs( - false, - "rustfmt", - None, - Some(&rustfmt_err_file), - &process_stderr_paths, - )?; } process_stderr_paths.push(rustfmt_err_file); diff --git a/ci/svd2rust-regress/tests.yml b/ci/svd2rust-regress/tests.yml index 05afd680..1d6c0000 100644 --- a/ci/svd2rust-regress/tests.yml +++ b/ci/svd2rust-regress/tests.yml @@ -10,7 +10,7 @@ run_when: never - arch: cortex-m mfgr: Atmel - chip: AT91SAM9G10 + chip: AT91SAM9G09 should_pass: false run_when: never - arch: cortex-m From b366167d359a36b4a66f66f83465cb05c99e179b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Wed, 6 Dec 2023 18:48:59 +0100 Subject: [PATCH 177/319] bump lockfile --- Cargo.lock | 74 +++++++++++++++++++++++++++--------------------------- 1 file changed, 37 insertions(+), 37 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index d9d01134..b88d138c 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -48,30 +48,30 @@ checksum = "7079075b41f533b8c61d2a4d073c4676e1f8b249ff94a393b0595db304e0dd87" [[package]] name = "anstyle-parse" -version = "0.2.2" +version = "0.2.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "317b9a89c1868f5ea6ff1d9539a69f45dffc21ce321ac1fd1160dfa48c8e2140" +checksum = "c75ac65da39e5fe5ab759307499ddad880d724eed2f6ce5b5e8a26f4f387928c" dependencies = [ "utf8parse", ] [[package]] name = "anstyle-query" -version = "1.0.0" +version = "1.0.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5ca11d4be1bab0c8bc8734a9aa7bf4ee8316d462a08c6ac5052f888fef5b494b" +checksum = "a3a318f1f38d2418400f8209655bfd825785afd25aa30bb7ba6cc792e4596748" dependencies = [ - "windows-sys 0.48.0", + "windows-sys 0.52.0", ] [[package]] name = "anstyle-wincon" -version = "3.0.1" +version = "3.0.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f0699d10d2f4d628a98ee7b57b289abbc98ff3bad977cb3152709d4bf2330628" +checksum = "1cd54b81ec8d6180e24654d0b371ad22fc3dd083b6ff8ba325b72e00c87660a7" dependencies = [ "anstyle", - "windows-sys 0.48.0", + "windows-sys 0.52.0", ] [[package]] @@ -171,9 +171,9 @@ checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd" [[package]] name = "clap" -version = "4.4.10" +version = "4.4.11" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "41fffed7514f420abec6d183b1d3acfd9099c79c3a10a06ade4f8203f1411272" +checksum = "bfaff671f6b22ca62406885ece523383b9b64022e341e53e009a62ebc47a45f2" dependencies = [ "clap_builder", "clap_derive", @@ -181,9 +181,9 @@ dependencies = [ [[package]] name = "clap_builder" -version = "4.4.9" +version = "4.4.11" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "63361bae7eef3771745f02d8d892bec2fee5f6e34af316ba556e7f97a7069ff1" +checksum = "a216b506622bb1d316cd51328dce24e07bdff4a6128a47c7e7fad11878d5adbb" dependencies = [ "anstream", "anstyle", @@ -223,9 +223,9 @@ checksum = "f7144d30dcf0fafbce74250a3963025d8d52177934239851c917d29f1df280c2" [[package]] name = "core-foundation" -version = "0.9.3" +version = "0.9.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "194a7a9e6de53fa55116934067c844d9d749312f75c6f6d0980e8c252f8c2146" +checksum = "91e195e091a93c46f7102ec7818a2aa394e1e1771c3ab4825963fa03e45afb8f" dependencies = [ "core-foundation-sys", "libc", @@ -233,9 +233,9 @@ dependencies = [ [[package]] name = "core-foundation-sys" -version = "0.8.4" +version = "0.8.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e496a50fda8aacccc86d7529e2c1e0892dbd0f898a6b5645b5561b89c3210efa" +checksum = "06ea2b9bc92be3c2baa9334a323ebca2d6f074ff852cd1d7b11064035cd3868f" [[package]] name = "crossbeam-deque" @@ -513,7 +513,7 @@ version = "0.5.5" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "5444c27eef6923071f7ebcc33e3444508466a76f7a2b93da00ed6e19f30c1ddb" dependencies = [ - "windows-sys", + "windows-sys 0.48.0", ] [[package]] @@ -696,9 +696,9 @@ checksum = "89d92a4743f9a61002fae18374ed11e7973f530cb3a3255fb354818118b2203c" [[package]] name = "linux-raw-sys" -version = "0.4.11" +version = "0.4.12" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "969488b55f8ac402214f3f5fd243ebb7206cf82de60d3172994707a4bcc2b829" +checksum = "c4cd1a83af159aa67994778be9070f0ae1bd732942279cabb14f86f986a21456" [[package]] name = "log" @@ -747,13 +747,13 @@ dependencies = [ [[package]] name = "mio" -version = "0.8.9" +version = "0.8.10" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3dce281c5e46beae905d4de1870d8b1509a9142b62eedf18b443b011ca8343d0" +checksum = "8f3d0b296e374a4e6f3c7b0a1f5a51d748a0d34c85e7dc48fc3fa9a87657fe09" dependencies = [ "libc", "wasi", - "windows-sys", + "windows-sys 0.48.0", ] [[package]] @@ -811,9 +811,9 @@ checksum = "dd8b5dd2ae5ed71462c540258bedcb51965123ad7e7ccf4b9a8cafaa4a63576d" [[package]] name = "openssl" -version = "0.10.60" +version = "0.10.61" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "79a4c6c3a2b158f7f8f2a2fc5a969fa3a068df6fc9dbb4a43845436e3af7c800" +checksum = "6b8419dc8cc6d866deb801274bba2e6f8f6108c1bb7fcc10ee5ab864931dbb45" dependencies = [ "bitflags 2.4.1", "cfg-if", @@ -843,9 +843,9 @@ checksum = "ff011a302c396a5197692431fc1948019154afc178baf7d8e37367442a4601cf" [[package]] name = "openssl-sys" -version = "0.9.96" +version = "0.9.97" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3812c071ba60da8b5677cc12bcb1d42989a65553772897a7e0355545a819838f" +checksum = "c3eaad34cdd97d81de97964fc7f29e2d104f483840d906ef56daa1912338460b" dependencies = [ "cc", "libc", @@ -1039,15 +1039,15 @@ checksum = "d626bb9dae77e28219937af045c257c28bfd3f69333c512553507f5f9798cb76" [[package]] name = "rustix" -version = "0.38.25" +version = "0.38.26" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "dc99bc2d4f1fed22595588a013687477aedf3cdcfb26558c559edb67b4d9b22e" +checksum = "9470c4bf8246c8daf25f9598dca807fb6510347b1e1cfa55749113850c79d88a" dependencies = [ "bitflags 2.4.1", "errno", "libc", "linux-raw-sys", - "windows-sys 0.48.0", + "windows-sys 0.52.0", ] [[package]] @@ -1062,7 +1062,7 @@ version = "0.1.22" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "0c3733bf4cf7ea0880754e19cb5a462007c4a8c1914bff372ccc95b464f1df88" dependencies = [ - "windows-sys", + "windows-sys 0.48.0", ] [[package]] @@ -1200,7 +1200,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "7b5fac59a5cb5dd637972e5fca70daf0523c9067fcdc4842f053dae04a18f8e9" dependencies = [ "libc", - "windows-sys", + "windows-sys 0.48.0", ] [[package]] @@ -1330,7 +1330,7 @@ dependencies = [ "fastrand", "redox_syscall", "rustix", - "windows-sys", + "windows-sys 0.48.0", ] [[package]] @@ -1400,7 +1400,7 @@ dependencies = [ "num_cpus", "pin-project-lite", "socket2 0.5.5", - "windows-sys", + "windows-sys 0.48.0", ] [[package]] @@ -1697,7 +1697,7 @@ dependencies = [ "home", "once_cell", "rustix", - "windows-sys", + "windows-sys 0.48.0", ] [[package]] @@ -1871,9 +1871,9 @@ checksum = "dff9641d1cd4be8d1a070daf9e3773c5f67e78b4d9d42263020c057706765c04" [[package]] name = "winnow" -version = "0.5.19" +version = "0.5.25" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "829846f3e3db426d4cee4510841b71a8e58aa2a76b1132579487ae430ccd9c7b" +checksum = "b7e87b8dfbe3baffbe687eef2e164e32286eff31a5ee16463ce03d991643ec94" dependencies = [ "memchr", ] @@ -1885,7 +1885,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "524e57b2c537c0f9b1e69f1965311ec12182b4122e45035b1508cd24d2adadb1" dependencies = [ "cfg-if", - "windows-sys", + "windows-sys 0.48.0", ] [[package]] From f041e58abecd66c7b02d9174ec57fc7151ddc03d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Wed, 6 Dec 2023 19:40:36 +0100 Subject: [PATCH 178/319] add (some) patched stm32 svds and switch default to STM32F103 --- ci/svd2rust-regress/src/diff.rs | 2 +- ci/svd2rust-regress/tests.yml | 121 +++++++++++++++++++++++++------- 2 files changed, 97 insertions(+), 26 deletions(-) diff --git a/ci/svd2rust-regress/src/diff.rs b/ci/svd2rust-regress/src/diff.rs index 2bfb0d64..7873d5c9 100644 --- a/ci/svd2rust-regress/src/diff.rs +++ b/ci/svd2rust-regress/src/diff.rs @@ -171,7 +171,7 @@ impl Diffing { (1, _) => tests[0], (1.., Some(DiffingMode::Pr)) => tests .iter() - .find(|t| t.chip == "STM32F401") + .find(|t| t.chip == "STM32F103") .unwrap_or(&tests[0]), _ => { let error = anyhow::anyhow!("diff requires exactly one test case"); diff --git a/ci/svd2rust-regress/tests.yml b/ci/svd2rust-regress/tests.yml index 1d6c0000..d1d68d4e 100644 --- a/ci/svd2rust-regress/tests.yml +++ b/ci/svd2rust-regress/tests.yml @@ -2209,6 +2209,102 @@ chip: STM32F030 should_pass: true run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32F0x2 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f0x2.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32F103 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f103.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32F411 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f411.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32F469 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f469.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x3 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f7x3.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32G070 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32g070.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32G473 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32g473.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32H753 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32h753.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32L0x3 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32l0x3.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32L162 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32l162.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32L4x6 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32l4x6.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32L562 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32l562.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32MP157 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32mp157.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32WB55 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32wb55.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32WLE5 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32wle5.svd.patched + should_pass: true + run_when: always +- arch: cortex-m + mfgr: STMicro + chip: STM32C011 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32c011.svd.patched + should_pass: true + run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F031x @@ -2249,11 +2345,6 @@ chip: STM32F102xx should_pass: true run_when: always -- arch: cortex-m - mfgr: STMicro - chip: STM32F103xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F105xx @@ -2319,11 +2410,6 @@ chip: STM32F410 should_pass: true run_when: always -- arch: cortex-m - mfgr: STMicro - chip: STM32F411 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F412 @@ -2349,11 +2435,6 @@ chip: STM32F446 should_pass: true run_when: always -- arch: cortex-m - mfgr: STMicro - chip: STM32F469 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x @@ -2364,11 +2445,6 @@ chip: STM32F7x2 should_pass: true run_when: always -- arch: cortex-m - mfgr: STMicro - chip: STM32F7x3 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x5 @@ -2449,11 +2525,6 @@ chip: STM32L1xx should_pass: true run_when: always -- arch: cortex-m - mfgr: STMicro - chip: STM32L4x6 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32W108 From 848ca10cb38ea3c12c4a34fa8e042343975843fe Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Wed, 6 Dec 2023 19:53:36 +0100 Subject: [PATCH 179/319] minimize tests.yml --- ci/svd2rust-regress/src/main.rs | 2 +- ci/svd2rust-regress/src/tests.rs | 9 +- ci/svd2rust-regress/tests.yml | 502 ------------------------------- 3 files changed, 9 insertions(+), 504 deletions(-) diff --git a/ci/svd2rust-regress/src/main.rs b/ci/svd2rust-regress/src/main.rs index a4bec671..a8c1d246 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/ci/svd2rust-regress/src/main.rs @@ -106,7 +106,7 @@ pub struct TestOpts { impl TestOpts { fn run(&self, opt: &Opts) -> Result<(), anyhow::Error> { - let tests = tests::tests(None)? + let tests = tests::tests(Some(&opt.test_cases))? .iter() // Short test? .filter(|t| t.should_run(!self.long_test)) diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index c77e57c5..7cd31024 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -54,9 +54,10 @@ impl std::fmt::Display for Manufacturer { } } -#[derive(Debug, serde::Serialize, serde::Deserialize)] +#[derive(Debug, serde::Serialize, serde::Deserialize, Default)] #[serde(rename_all = "kebab-case")] pub enum RunWhen { + #[default] Always, NotShort, @@ -71,10 +72,16 @@ pub struct TestCase { pub chip: String, #[serde(default, skip_serializing_if = "Option::is_none")] svd_url: Option, + #[serde(default = "true_")] pub should_pass: bool, + #[serde(default)] run_when: RunWhen, } +fn true_() -> bool { + true +} + impl TestCase { pub fn svd_url(&self) -> String { match &self.svd_url { diff --git a/ci/svd2rust-regress/tests.yml b/ci/svd2rust-regress/tests.yml index d1d68d4e..a1dadb4a 100644 --- a/ci/svd2rust-regress/tests.yml +++ b/ci/svd2rust-regress/tests.yml @@ -442,8 +442,6 @@ - arch: cortex-m mfgr: Freescale chip: MK02F12810 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK10D10 @@ -457,8 +455,6 @@ - arch: cortex-m mfgr: Freescale chip: MK10D7 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK10DZ10 @@ -472,8 +468,6 @@ - arch: cortex-m mfgr: Freescale chip: MK11D5 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK11D5WS @@ -487,8 +481,6 @@ - arch: cortex-m mfgr: Freescale chip: MK12D5 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK20D10 @@ -502,8 +494,6 @@ - arch: cortex-m mfgr: Freescale chip: MK20D7 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK20DZ10 @@ -517,8 +507,6 @@ - arch: cortex-m mfgr: Freescale chip: MK21D5 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK21D5WS @@ -532,8 +520,6 @@ - arch: cortex-m mfgr: Freescale chip: MK21F12 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK21FA12 @@ -547,8 +533,6 @@ - arch: cortex-m mfgr: Freescale chip: MK22F12 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK22F12810 @@ -562,8 +546,6 @@ - arch: cortex-m mfgr: Freescale chip: MK22F51212 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK22FA12 @@ -577,8 +559,6 @@ - arch: cortex-m mfgr: Freescale chip: MK24F25612 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK26F18 @@ -592,8 +572,6 @@ - arch: cortex-m mfgr: Freescale chip: MK30D7 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK30DZ10 @@ -607,8 +585,6 @@ - arch: cortex-m mfgr: Freescale chip: MK40D7 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK40DZ10 @@ -622,8 +598,6 @@ - arch: cortex-m mfgr: Freescale chip: MK50D7 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK50DZ10 @@ -637,8 +611,6 @@ - arch: cortex-m mfgr: Freescale chip: MK51D7 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK51DZ10 @@ -652,8 +624,6 @@ - arch: cortex-m mfgr: Freescale chip: MK52DZ10 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK53D10 @@ -667,8 +637,6 @@ - arch: cortex-m mfgr: Freescale chip: MK60D10 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK60DZ10 @@ -682,8 +650,6 @@ - arch: cortex-m mfgr: Freescale chip: MK63F12 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK64F12 @@ -697,8 +663,6 @@ - arch: cortex-m mfgr: Freescale chip: MK66F18 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MK80F25615 @@ -712,8 +676,6 @@ - arch: cortex-m mfgr: Freescale chip: MK82F25615 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKE14F16 @@ -727,8 +689,6 @@ - arch: cortex-m mfgr: Freescale chip: MKE15Z7 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKE16F16 @@ -742,8 +702,6 @@ - arch: cortex-m mfgr: Freescale chip: MKL28T7_CORE0 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKL28T7_CORE1 @@ -757,8 +715,6 @@ - arch: cortex-m mfgr: Freescale chip: MKL81Z7 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKL82Z7 @@ -772,8 +728,6 @@ - arch: cortex-m mfgr: Freescale chip: MKV10Z1287 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKV10Z7 @@ -787,8 +741,6 @@ - arch: cortex-m mfgr: Freescale chip: MKV30F12810 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKV31F12810 @@ -802,8 +754,6 @@ - arch: cortex-m mfgr: Freescale chip: MKV31F51212 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKV40F15 @@ -817,8 +767,6 @@ - arch: cortex-m mfgr: Freescale chip: MKV43F15 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKV44F15 @@ -832,8 +780,6 @@ - arch: cortex-m mfgr: Freescale chip: MKV45F15 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKV46F15 @@ -847,8 +793,6 @@ - arch: cortex-m mfgr: Freescale chip: MKW20Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKW21D5 @@ -862,8 +806,6 @@ - arch: cortex-m mfgr: Freescale chip: MKW22D5 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKW24D5 @@ -877,8 +819,6 @@ - arch: cortex-m mfgr: Freescale chip: MKW31Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKW40Z4 @@ -892,8 +832,6 @@ - arch: cortex-m mfgr: Freescale chip: MKE02Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKE04Z1284 @@ -907,8 +845,6 @@ - arch: cortex-m mfgr: Freescale chip: MKE06Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKE14D7 @@ -922,8 +858,6 @@ - arch: cortex-m mfgr: Freescale chip: MKL02Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKL03Z4 @@ -937,8 +871,6 @@ - arch: cortex-m mfgr: Freescale chip: MKL05Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKL13Z644 @@ -952,8 +884,6 @@ - arch: cortex-m mfgr: Freescale chip: MKL15Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKL16Z4 @@ -967,8 +897,6 @@ - arch: cortex-m mfgr: Freescale chip: MKL17Z644 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKL24Z4 @@ -982,8 +910,6 @@ - arch: cortex-m mfgr: Freescale chip: MKL26Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKL27Z4 @@ -997,8 +923,6 @@ - arch: cortex-m mfgr: Freescale chip: MKL33Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKL33Z644 @@ -1012,8 +936,6 @@ - arch: cortex-m mfgr: Freescale chip: MKL36Z4 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKL43Z4 @@ -1027,8 +949,6 @@ - arch: cortex-m mfgr: Freescale chip: MKM14ZA5 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKM33ZA5 @@ -1042,8 +962,6 @@ - arch: cortex-m mfgr: Freescale chip: MKM34ZA5 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: MKW01Z4 @@ -1057,8 +975,6 @@ - arch: cortex-m mfgr: Freescale chip: SKEAZN642 - should_pass: true - run_when: always - arch: cortex-m mfgr: Freescale chip: SKEAZN84 @@ -1067,523 +983,315 @@ - arch: cortex-m mfgr: Fujitsu chip: MB9AF10xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF10xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF11xK - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF11xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF11xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF11xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF12xK - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF12xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF13xK - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF13xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF13xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF13xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF14xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF14xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF14xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF15xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF15xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF15xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF1AxL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF1AxM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF1AxN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF31xK - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF31xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF31xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF31xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF34xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF34xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF34xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF42xK - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AF42xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA3xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA3xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA3xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA4xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA4xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFA4xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFAAxL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFAAxM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFAAxN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFB4xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFB4xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9AFB4xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B160L - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B160R - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B360L - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B360R - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B460L - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B460R - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B560L - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9B560R - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF10xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF10xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF11xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF11xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF11xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF11xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xJ - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xK - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF12xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF21xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF21xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF30xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF30xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF31xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF31xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF31xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF31xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xK - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF32xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF40xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF40xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF41xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF41xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF41xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF41xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF42xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF42xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF50xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF50xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF51xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF51xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF51xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF51xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xK - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF52xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF61xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BF61xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BFD1xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: MB9BFD1xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: S6E1A1 - should_pass: true - run_when: always - arch: cortex-m mfgr: Fujitsu chip: S6E2CC - should_pass: true - run_when: always - arch: cortex-m mfgr: Holtek chip: ht32f125x - should_pass: true - run_when: always - arch: cortex-m mfgr: Holtek chip: ht32f175x - should_pass: true - run_when: always - arch: cortex-m mfgr: Holtek chip: ht32f275x - should_pass: true - run_when: always - arch: cortex-m mfgr: Nordic chip: nrf51 - should_pass: true - run_when: always - arch: cortex-m mfgr: Nordic chip: nrf52 @@ -1857,8 +1565,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF10xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF11xK @@ -1867,8 +1573,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF11xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF11xM @@ -1877,8 +1581,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF11xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF13xK @@ -1887,8 +1589,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF13xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF13xM @@ -1897,8 +1597,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF13xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF14xL @@ -1907,8 +1605,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF14xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF14xN @@ -1917,8 +1613,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF15xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF15xN @@ -1927,8 +1621,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF15xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF31xK @@ -1937,8 +1629,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF31xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF31xM @@ -1947,8 +1637,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF31xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF34xL @@ -1957,8 +1645,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AF34xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AF34xN @@ -1967,8 +1653,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AFA3xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AFA3xM @@ -1977,8 +1661,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AFA3xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AFA4xL @@ -1987,8 +1669,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AFA4xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AFA4xN @@ -1997,8 +1677,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AFB4xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9AFB4xM @@ -2007,8 +1685,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9AFB4xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF10xN @@ -2017,8 +1693,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF10xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF11xN @@ -2027,8 +1701,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF11xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF11xS @@ -2037,8 +1709,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF11xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF12xK @@ -2047,8 +1717,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF12xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF12xM @@ -2057,8 +1725,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF21xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF21xT @@ -2067,8 +1733,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF30xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF30xR @@ -2077,8 +1741,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF31xN - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF31xR @@ -2087,8 +1749,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF31xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF31xT @@ -2097,8 +1757,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF32xK - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF32xL @@ -2107,8 +1765,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF32xM - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF40xN @@ -2117,8 +1773,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF40xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF41xN @@ -2127,8 +1781,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF41xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF41xS @@ -2137,8 +1789,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF41xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF50xN @@ -2147,8 +1797,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF50xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF51xN @@ -2157,8 +1805,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF51xR - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF51xS @@ -2167,8 +1813,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF51xT - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF52xK @@ -2177,8 +1821,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF52xL - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF52xM @@ -2187,8 +1829,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BF61xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BF61xT @@ -2197,8 +1837,6 @@ - arch: cortex-m mfgr: Spansion chip: MB9BFD1xS - should_pass: true - run_when: always - arch: cortex-m mfgr: Spansion chip: MB9BFD1xT @@ -2207,264 +1845,166 @@ - arch: cortex-m mfgr: STMicro chip: STM32F030 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F0x2 svd_url: https://stm32-rs.github.io/stm32-rs/stm32f0x2.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F103 svd_url: https://stm32-rs.github.io/stm32-rs/stm32f103.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F411 svd_url: https://stm32-rs.github.io/stm32-rs/stm32f411.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F469 svd_url: https://stm32-rs.github.io/stm32-rs/stm32f469.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x3 svd_url: https://stm32-rs.github.io/stm32-rs/stm32f7x3.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G070 svd_url: https://stm32-rs.github.io/stm32-rs/stm32g070.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G473 svd_url: https://stm32-rs.github.io/stm32-rs/stm32g473.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32H753 svd_url: https://stm32-rs.github.io/stm32-rs/stm32h753.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L0x3 svd_url: https://stm32-rs.github.io/stm32-rs/stm32l0x3.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L162 svd_url: https://stm32-rs.github.io/stm32-rs/stm32l162.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L4x6 svd_url: https://stm32-rs.github.io/stm32-rs/stm32l4x6.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L562 svd_url: https://stm32-rs.github.io/stm32-rs/stm32l562.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32MP157 svd_url: https://stm32-rs.github.io/stm32-rs/stm32mp157.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32WB55 svd_url: https://stm32-rs.github.io/stm32-rs/stm32wb55.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32WLE5 svd_url: https://stm32-rs.github.io/stm32-rs/stm32wle5.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32C011 svd_url: https://stm32-rs.github.io/stm32-rs/stm32c011.svd.patched - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F031x - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F042x - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F072x - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F091x - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F0xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F100xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F101xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F102xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F105xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F107xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F20x - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F21x - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F301 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F302 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F303 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F3x4 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F373 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F401 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F405 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F407 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F410 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F412 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F413 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F427 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F429 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F446 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x2 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x5 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x6 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x7 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32F7x9 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G07x @@ -2473,63 +2013,39 @@ - arch: cortex-m mfgr: STMicro chip: STM32G431xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G441xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G471xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G474xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G483xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32G484xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L100 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L15xC - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L15xxE - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L15xxxA - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L1xx - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32W108 - should_pass: true - run_when: always - arch: cortex-m mfgr: STMicro chip: STM32L051x @@ -2583,8 +2099,6 @@ - arch: cortex-m mfgr: Toshiba chip: M061 - should_pass: true - run_when: always - arch: riscv mfgr: SiFive chip: E310x @@ -2595,47 +2109,31 @@ mfgr: TexasInstruments chip: msp430g2553 svd_url: https://github.com/pftbest/msp430g2553/raw/v0.1.3-svd/msp430g2553.svd - should_pass: true - run_when: always - arch: msp430 mfgr: TexasInstruments chip: msp430fr2355 svd_url: https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/master/msp430fr2355.svd - should_pass: true - run_when: always - arch: xtensa-lx mfgr: Espressif chip: esp32 svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32.svd - should_pass: true - run_when: always - arch: xtensa-lx mfgr: Espressif chip: esp32s2 svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s2.svd - should_pass: true - run_when: always - arch: xtensa-lx mfgr: Espressif chip: esp32s3 svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s3.svd - should_pass: true - run_when: always - arch: riscv mfgr: Espressif chip: esp32c3 svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32c3.svd - should_pass: true - run_when: always - arch: mips mfgr: Microchip chip: pic32mx170f256b svd_url: https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx1xxfxxxb/PIC32MX170F256B.svd.patched - should_pass: true - run_when: always - arch: mips mfgr: Microchip chip: pic32mx270f256b svd_url: https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx2xxfxxxb/PIC32MX270F256B.svd.patched - should_pass: true - run_when: always From eb0c405c648c628a32d0edda5bfbc9efeee84cf0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Wed, 6 Dec 2023 20:24:53 +0100 Subject: [PATCH 180/319] fix last arg parsing and wrong lookup for chips --- ci/svd2rust-regress/src/diff.rs | 58 +++++++++++++++++++++-------- ci/svd2rust-regress/src/svd_test.rs | 4 +- 2 files changed, 46 insertions(+), 16 deletions(-) diff --git a/ci/svd2rust-regress/src/diff.rs b/ci/svd2rust-regress/src/diff.rs index 7873d5c9..dd4623f6 100644 --- a/ci/svd2rust-regress/src/diff.rs +++ b/ci/svd2rust-regress/src/diff.rs @@ -30,7 +30,7 @@ pub struct Diffing { #[clap(subcommand)] pub sub: Option, - #[clap(long, short = 'c')] + #[clap(global = true, long, short = 'c')] pub chip: Vec, /// Filter by manufacturer, case sensitive, may be combined with other filters @@ -65,14 +65,23 @@ pub struct Diffing { pub use_pager_directly: bool, #[clap(last = true)] - pub args: Option, + pub last_args: Option, } -#[derive(clap::Parser, Debug, Clone, Copy)] +#[derive(clap::Parser, Debug, Clone)] pub enum DiffingMode { - Semver, - Diff, - Pr, + Semver { + #[clap(last = true)] + last_args: Option, + }, + Diff { + #[clap(last = true)] + last_args: Option, + }, + Pr { + #[clap(last = true)] + last_args: Option, + }, } impl DiffingMode { @@ -81,7 +90,7 @@ impl DiffingMode { /// [`Pr`]: DiffingMode::Pr #[must_use] pub fn is_pr(&self) -> bool { - matches!(self, Self::Pr) + matches!(self, Self::Pr { .. }) } } @@ -93,8 +102,8 @@ impl Diffing { let [baseline, current] = self .make_case(opts) .with_context(|| "couldn't setup test case")?; - match self.sub.unwrap_or(DiffingMode::Diff) { - DiffingMode::Diff | DiffingMode::Pr => { + match self.sub.as_ref() { + None | Some(DiffingMode::Diff { .. } | DiffingMode::Pr { .. }) => { let mut command; if let Some(pager) = &self.pager { if self.use_pager_directly { @@ -118,7 +127,7 @@ impl Diffing { .with_context(|| "couldn't run diff") .map(|_| ()) } - DiffingMode::Semver => std::process::Command::new("cargo") + Some(DiffingMode::Semver { .. }) => std::process::Command::new("cargo") .args(["semver-checks", "check-release"]) .arg("--baseline-root") .arg(baseline.0) @@ -158,7 +167,7 @@ impl Diffing { }) .filter(|t| { if self.chip.is_empty() { - false + true } else { self.chip.iter().any(|c| { wildmatch::WildMatch::new(&c.to_ascii_lowercase()) @@ -167,9 +176,9 @@ impl Diffing { } }) .collect::>(); - let test = match (tests.len(), self.sub) { + let test = match (tests.len(), self.sub.as_ref()) { (1, _) => tests[0], - (1.., Some(DiffingMode::Pr)) => tests + (_, Some(DiffingMode::Pr { .. })) => tests .iter() .find(|t| t.chip == "STM32F103") .unwrap_or(&tests[0]), @@ -187,15 +196,34 @@ impl Diffing { } }; + let last_args = self.last_args.as_deref().or(match &self.sub { + Some( + DiffingMode::Diff { last_args } + | DiffingMode::Pr { last_args } + | DiffingMode::Semver { last_args }, + ) => last_args.as_deref(), + None => None, + }); + let join = |opt1: Option<&str>, opt2: Option<&str>| -> Option { + match (opt1, opt2) { + (Some(str1), Some(str2)) => Some(format!("{} {}", str1, str2)), + (Some(str), None) | (None, Some(str)) => Some(str.to_owned()), + (None, None) => None, + } + }; let baseline = test .setup_case( &opts.output_dir.join("baseline"), &baseline_bin, - baseline_cmd, + join(baseline_cmd, last_args).as_deref(), ) .with_context(|| "couldn't create head")?; let current = test - .setup_case(&opts.output_dir.join("current"), ¤t_bin, current_cmd) + .setup_case( + &opts.output_dir.join("current"), + ¤t_bin, + join(current_cmd, last_args).as_deref(), + ) .with_context(|| "couldn't create base")?; Ok([baseline, current]) diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index fc87778e..bdb595c6 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -261,7 +261,9 @@ impl TestCase { tracing::info!("Running svd2rust"); let mut svd2rust_bin = Command::new(svd2rust_bin_path); if let Some(command) = command { - svd2rust_bin.arg(command); + if !command.is_empty() { + svd2rust_bin.arg(command); + } } svd2rust_bin .args(["-i", &chip_svd]) From bccbf90d95f834579de9ab47ebfe69815c285d2b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Wed, 6 Dec 2023 21:24:02 +0100 Subject: [PATCH 181/319] fix clippy and wrong order of commands on /ci diff --- .github/workflows/diff.yml | 2 +- ci/svd2rust-regress/src/svd_test.rs | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/.github/workflows/diff.yml b/.github/workflows/diff.yml index a6d40960..c4d2acbf 100644 --- a/.github/workflows/diff.yml +++ b/.github/workflows/diff.yml @@ -55,7 +55,7 @@ jobs: with: tool: git-delta - - run: cargo regress diff ${{ matrix.command }} --use-pager-directly + - run: cargo regress diff --use-pager-directly ${{ matrix.command }} env: GH_TOKEN: ${{ github.token }} GITHUB_PR: ${{ matrix.pr }} diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index bdb595c6..7f0f290f 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -4,7 +4,7 @@ use svd2rust::{util::ToSanitizedCase, Target}; use crate::{command::CommandExt, tests::TestCase, Opts, TestOpts}; use std::io::prelude::*; use std::path::PathBuf; -use std::process::{Command, Output}; +use std::process::Command; use std::{ fmt::Write as _, fs::{self, File, OpenOptions}, @@ -340,7 +340,7 @@ impl TestCase { src_files.sort(); for entry in src_files { - let output = Command::new(rustfmt_bin_path) + Command::new(rustfmt_bin_path) .arg(entry) .args(["--edition", "2021"]) .capture_outputs( From b042c5a51fc98813675b0675e9735738494c85bd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Wed, 6 Dec 2023 21:28:12 +0100 Subject: [PATCH 182/319] only run n comment containing `\n/ci` --- .github/workflows/diff.yml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.github/workflows/diff.yml b/.github/workflows/diff.yml index c4d2acbf..47b5ecc4 100644 --- a/.github/workflows/diff.yml +++ b/.github/workflows/diff.yml @@ -8,7 +8,7 @@ jobs: runs-on: ubuntu-latest outputs: diffs: ${{ steps.regress-ci.outputs.diffs }} - if: ${{ github.event.issue.pull_request }} + if: github.event.issue.pull_request && (contains(github.event.comment.body, '\n/ci') || startsWith(github.event.comment.body, '/ci')) steps: - uses: actions/checkout@v4 @@ -63,7 +63,7 @@ jobs: summary: runs-on: ubuntu-latest needs: [diff, generate] - if: always() && needs.generate.outputs.diffs != '{}' && needs.generate.outputs.diffs != '[]' && needs.generate.outputs.diffs != '' + if: always() && needs.generate.outputs.diffs != '{}' && needs.generate.outputs.diffs != '[]' && needs.generate.outputs.diffs != '' && needs.generate.result == 'success' steps: - uses: actions/checkout@v4 From 1075da76cae095ed09cfcb3176bec1f8e38ed078 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Sun, 10 Dec 2023 16:01:08 +0100 Subject: [PATCH 183/319] allow downloading arbitrary svd with `--url` --- ci/svd2rust-regress/src/diff.rs | 32 ++++++++++++++++++++++++++++---- ci/svd2rust-regress/src/tests.rs | 9 +++++---- 2 files changed, 33 insertions(+), 8 deletions(-) diff --git a/ci/svd2rust-regress/src/diff.rs b/ci/svd2rust-regress/src/diff.rs index dd4623f6..4d3d2a81 100644 --- a/ci/svd2rust-regress/src/diff.rs +++ b/ci/svd2rust-regress/src/diff.rs @@ -64,6 +64,10 @@ pub struct Diffing { #[clap(long, short = 'P')] pub use_pager_directly: bool, + /// URL for SVD to download + #[clap(global = true, long)] + pub url: Option, + #[clap(last = true)] pub last_args: Option, } @@ -176,12 +180,32 @@ impl Diffing { } }) .collect::>(); - let test = match (tests.len(), self.sub.as_ref()) { - (1, _) => tests[0], - (_, Some(DiffingMode::Pr { .. })) => tests + + let test = match (tests.len(), self.sub.as_ref(), self.url.as_ref()) { + (1, _, None) => tests[0].clone(), + (_, Some(DiffingMode::Pr { .. }), None) => tests .iter() .find(|t| t.chip == "STM32F103") - .unwrap_or(&tests[0]), + .map(|t| (*t).clone()) + .unwrap_or_else(|| tests[0].clone()), + (_, _, Some(url)) => crate::tests::TestCase { + arch: self + .arch + .clone() + .map(|s| svd2rust::Target::parse(&s)) + .transpose()? + .unwrap_or_default(), + mfgr: crate::tests::Manufacturer::Unknown, + chip: url + .rsplit('/') + .next() + .and_then(|file| file.split('.').next()) + .ok_or_else(|| anyhow::anyhow!("couldn't get chip name from url"))? + .to_owned(), + svd_url: Some(url.to_owned()), + should_pass: true, + run_when: crate::tests::RunWhen::Always, + }, _ => { let error = anyhow::anyhow!("diff requires exactly one test case"); let len = tests.len(); diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index 7cd31024..040b4c78 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -23,6 +23,7 @@ pub enum Manufacturer { SiFive, TexasInstruments, Espressif, + Unknown, } impl Manufacturer { @@ -54,7 +55,7 @@ impl std::fmt::Display for Manufacturer { } } -#[derive(Debug, serde::Serialize, serde::Deserialize, Default)] +#[derive(Debug, serde::Serialize, serde::Deserialize, Default, Clone, Copy)] #[serde(rename_all = "kebab-case")] pub enum RunWhen { #[default] @@ -65,17 +66,17 @@ pub enum RunWhen { Never, } -#[derive(serde::Serialize, serde::Deserialize)] +#[derive(serde::Serialize, serde::Deserialize, Clone)] pub struct TestCase { pub arch: Target, pub mfgr: Manufacturer, pub chip: String, #[serde(default, skip_serializing_if = "Option::is_none")] - svd_url: Option, + pub svd_url: Option, #[serde(default = "true_")] pub should_pass: bool, #[serde(default)] - run_when: RunWhen, + pub run_when: RunWhen, } fn true_() -> bool { From 79837917d8f3f70e085817714c4d2f70ff37f1a1 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 23 Dec 2023 09:44:43 +0300 Subject: [PATCH 184/319] move in R::field_iter --- Cargo.lock | 185 ++++++++++++++++++--------------------- src/generate/register.rs | 2 +- 2 files changed, 86 insertions(+), 101 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index b88d138c..c21f8313 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -28,9 +28,9 @@ dependencies = [ [[package]] name = "anstream" -version = "0.6.4" +version = "0.6.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "2ab91ebe16eb252986481c5b62f6098f3b698a45e34b5b98200cf20dd2484a44" +checksum = "d664a92ecae85fd0a7392615844904654d1d5f5514837f471ddef4a057aba1b6" dependencies = [ "anstyle", "anstyle-parse", @@ -57,9 +57,9 @@ dependencies = [ [[package]] name = "anstyle-query" -version = "1.0.1" +version = "1.0.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a3a318f1f38d2418400f8209655bfd825785afd25aa30bb7ba6cc792e4596748" +checksum = "e28923312444cdd728e4738b3f9c9cac739500909bb3d3c94b43551b16517648" dependencies = [ "windows-sys 0.52.0", ] @@ -76,9 +76,9 @@ dependencies = [ [[package]] name = "anyhow" -version = "1.0.75" +version = "1.0.76" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a4668cab20f66d8d020e1fbc0ebe47217433c1b6c8f2040faf858554e394ace6" +checksum = "59d2a3357dde987206219e78ecfbbb6e8dad06cbb65292758d3270e6254f7355" [[package]] name = "arrayref" @@ -132,13 +132,15 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "327762f6e5a765692301e5bb513e0d9fef63be86bbc14528052b1cd3e6f03e07" [[package]] -name = "blake2b_simd" -version = "1.0.2" +name = "blake3" +version = "1.5.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "23285ad32269793932e830392f2fe2f83e26488fd3ec778883a93c8323735780" +checksum = "0231f06152bf547e9c2b5194f247cd97aacf6dcd8b15d8e5ec0663f64580da87" dependencies = [ "arrayref", "arrayvec", + "cc", + "cfg-if", "constant_time_eq", ] @@ -200,7 +202,7 @@ dependencies = [ "heck", "proc-macro2", "quote", - "syn 2.0.39", + "syn 2.0.42", ] [[package]] @@ -239,9 +241,9 @@ checksum = "06ea2b9bc92be3c2baa9334a323ebca2d6f074ff852cd1d7b11064035cd3868f" [[package]] name = "crossbeam-deque" -version = "0.8.3" +version = "0.8.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ce6fd6f855243022dcecf8702fef0c297d4338e226845fe067f6341ad9fa0cef" +checksum = "fca89a0e215bab21874660c67903c5f143333cab1da83d041c7ded6053774751" dependencies = [ "cfg-if", "crossbeam-epoch", @@ -250,22 +252,21 @@ dependencies = [ [[package]] name = "crossbeam-epoch" -version = "0.9.15" +version = "0.9.16" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ae211234986c545741a7dc064309f67ee1e5ad243d0e48335adc0484d960bcc7" +checksum = "2d2fe95351b870527a5d09bf563ed3c97c0cffb87cf1c78a591bf48bb218d9aa" dependencies = [ "autocfg", "cfg-if", "crossbeam-utils", "memoffset", - "scopeguard", ] [[package]] name = "crossbeam-utils" -version = "0.8.16" +version = "0.8.17" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5a22b2d63d4d1dc0b7f1b6b2747dd0088008a9be28b6ddf0b1e7d335e3037294" +checksum = "c06d96137f14f244c37f989d9fff8f95e6c18b918e71f36638f8c49112e4c78f" dependencies = [ "cfg-if", ] @@ -509,11 +510,11 @@ checksum = "d77f7ec81a6d05a3abb01ab6eb7590f6083d08449fe5a1c8b1e620283546ccb7" [[package]] name = "home" -version = "0.5.5" +version = "0.5.9" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5444c27eef6923071f7ebcc33e3444508466a76f7a2b93da00ed6e19f30c1ddb" +checksum = "e3d1354bf6b7235cb4a0576c2619fd4ed18183f689b12b006a0ee7329eeff9a5" dependencies = [ - "windows-sys 0.48.0", + "windows-sys 0.52.0", ] [[package]] @@ -538,9 +539,9 @@ dependencies = [ [[package]] name = "http-body" -version = "0.4.5" +version = "0.4.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d5f38f16d184e36f2408a55281cd658ecbd3ca05cce6d6510a176eca393e26d1" +checksum = "7ceab25649e9960c0311ea418d17bee82c0dcec1bd053b5f9a66e265a693bed2" dependencies = [ "bytes", "http", @@ -567,9 +568,9 @@ checksum = "9a3a5bfb195931eeb336b2a7b4d761daec841b97f947d34394601737a7bba5e4" [[package]] name = "hyper" -version = "0.14.27" +version = "0.14.28" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ffb1cfd654a8219eaef89881fdb3bb3b1cdc5fa75ded05d6933b2b382e395468" +checksum = "bf96e135eb83a2a8ddf766e426a841d8ddd7449d5f00d34ea02b41d2f19eef80" dependencies = [ "bytes", "futures-channel", @@ -582,7 +583,7 @@ dependencies = [ "httpdate", "itoa", "pin-project-lite", - "socket2 0.4.10", + "socket2", "tokio", "tower-service", "tracing", @@ -642,11 +643,11 @@ checksum = "8f518f335dce6725a761382244631d86cf0ccb2863413590b31338feb467f9c3" [[package]] name = "irx-config" -version = "3.3.0" +version = "3.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3b0071d0561e65904b6ea900e6e09d84579766c20a2b6b4d628eaf3caf9ec9ee" +checksum = "37b4596c58f6e49195fe4794f4b9d630c4be5b04608f44a79aa28195f47c6018" dependencies = [ - "blake2b_simd", + "blake3", "clap", "derive_builder", "serde", @@ -669,9 +670,9 @@ dependencies = [ [[package]] name = "itoa" -version = "1.0.9" +version = "1.0.10" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "af150ab688ff2122fcef229be89cb50dd66af9e01a4ff320cc137eecc9bacc38" +checksum = "b1a46d1a171d865aa5f83f92695765caa047a9b4cbae2cbf37dbd613a793fd4c" [[package]] name = "js-sys" @@ -690,9 +691,9 @@ checksum = "e2abad23fbc42b3700f2f279844dc832adb2b2eb069b2df918f455c4e18cc646" [[package]] name = "libc" -version = "0.2.150" +version = "0.2.151" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "89d92a4743f9a61002fae18374ed11e7973f530cb3a3255fb354818118b2203c" +checksum = "302d7ab3130588088d277783b1e2d2e10c9e9e4a16dd9050e6ec93fb3e7048f4" [[package]] name = "linux-raw-sys" @@ -805,15 +806,15 @@ dependencies = [ [[package]] name = "once_cell" -version = "1.18.0" +version = "1.19.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "dd8b5dd2ae5ed71462c540258bedcb51965123ad7e7ccf4b9a8cafaa4a63576d" +checksum = "3fdb12b2476b595f9358c5161aa467c2438859caa136dec86c26fdd2efe17b92" [[package]] name = "openssl" -version = "0.10.61" +version = "0.10.62" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6b8419dc8cc6d866deb801274bba2e6f8f6108c1bb7fcc10ee5ab864931dbb45" +checksum = "8cde4d2d9200ad5909f8dac647e29482e07c3a35de8a13fce7c9c7747ad9f671" dependencies = [ "bitflags 2.4.1", "cfg-if", @@ -832,7 +833,7 @@ checksum = "a948666b637a0f465e8564c73e89d4dde00d72d4d473cc972f390fc3dcee7d9c" dependencies = [ "proc-macro2", "quote", - "syn 2.0.39", + "syn 2.0.42", ] [[package]] @@ -843,9 +844,9 @@ checksum = "ff011a302c396a5197692431fc1948019154afc178baf7d8e37367442a4601cf" [[package]] name = "openssl-sys" -version = "0.9.97" +version = "0.9.98" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c3eaad34cdd97d81de97964fc7f29e2d104f483840d906ef56daa1912338460b" +checksum = "c1665caf8ab2dc9aef43d1c0023bd904633a6a05cb30b0ad59bec2ae986e57a7" dependencies = [ "cc", "libc", @@ -879,9 +880,9 @@ checksum = "8b870d8c151b6f2fb93e84a13146138f05d02ed11c7e7c54f8826aaaf7c9f184" [[package]] name = "pkg-config" -version = "0.3.27" +version = "0.3.28" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "26072860ba924cbfa98ea39c8c19b4dd6a4a25423dbdf219c1eca91aa0cf6964" +checksum = "69d3587f8a9e599cc7ec2c00e331f71c4e69a5f9a4b8a6efd5b07466b9736f9a" [[package]] name = "prettyplease" @@ -890,14 +891,14 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "ae005bd773ab59b4725093fd7df83fd7892f7d8eafb48dbd7de6e024e4215f9d" dependencies = [ "proc-macro2", - "syn 2.0.39", + "syn 2.0.42", ] [[package]] name = "proc-macro2" -version = "1.0.70" +version = "1.0.71" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "39278fbbf5fb4f646ce651690877f89d1c5811a3d4acb27700c1cb3cdb78fd3b" +checksum = "75cb1540fadbd5b8fbccc4dddad2734eba435053f725621c070711a14bb5f4b8" dependencies = [ "unicode-ident", ] @@ -986,9 +987,9 @@ checksum = "c08c74e62047bb2de4ff487b251e4a92e24f48745648451635cec7d591162d9f" [[package]] name = "reqwest" -version = "0.11.22" +version = "0.11.23" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "046cd98826c46c2ac8ddecae268eb5c2e58628688a5fc7a2643704a73faba95b" +checksum = "37b1ae8d9ac08420c66222fb9096fc5de435c3c48542bc5336c51892cffafb41" dependencies = [ "base64", "bytes", @@ -1039,9 +1040,9 @@ checksum = "d626bb9dae77e28219937af045c257c28bfd3f69333c512553507f5f9798cb76" [[package]] name = "rustix" -version = "0.38.26" +version = "0.38.28" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "9470c4bf8246c8daf25f9598dca807fb6510347b1e1cfa55749113850c79d88a" +checksum = "72e572a5e8ca657d7366229cdde4bd14c4eb5499a9573d4d366fe1b599daa316" dependencies = [ "bitflags 2.4.1", "errno", @@ -1052,9 +1053,9 @@ dependencies = [ [[package]] name = "ryu" -version = "1.0.15" +version = "1.0.16" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1ad4cc8da4ef723ed60bced201181d83791ad433213d8c24efffda1eec85d741" +checksum = "f98d2aa92eebf49b69786be48e4477826b256916e84a57ff2a4f21923b48eb4c" [[package]] name = "schannel" @@ -1065,12 +1066,6 @@ dependencies = [ "windows-sys 0.48.0", ] -[[package]] -name = "scopeguard" -version = "1.2.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "94143f37725109f92c262ed2cf5e59bce7498c01bcc1502d7b9afe439a4e9f49" - [[package]] name = "security-framework" version = "2.9.2" @@ -1111,7 +1106,7 @@ checksum = "43576ca501357b9b071ac53cdc7da8ef0cbd9493d8df094cd821777ea6e894d3" dependencies = [ "proc-macro2", "quote", - "syn 2.0.39", + "syn 2.0.42", ] [[package]] @@ -1127,9 +1122,9 @@ dependencies = [ [[package]] name = "serde_spanned" -version = "0.6.4" +version = "0.6.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "12022b835073e5b11e90a14f86838ceb1c8fb0325b72416845c487ac0fa95e80" +checksum = "eb3622f419d1296904700073ea6cc23ad690adbd66f13ea683df73298736f0c1" dependencies = [ "serde", ] @@ -1148,9 +1143,9 @@ dependencies = [ [[package]] name = "serde_yaml" -version = "0.9.27" +version = "0.9.29" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3cc7a1570e38322cfe4154732e5110f887ea57e22b76f4bfd32b5bdd3368666c" +checksum = "a15e0ef66bf939a7c890a0bf6d5a733c70202225f9888a89ed5c62298b019129" dependencies = [ "indexmap", "itoa", @@ -1183,16 +1178,6 @@ version = "1.11.2" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "4dccd0940a2dcdf68d092b8cbab7dc0ad8fa938bf95787e1b916b0e3d0e8e970" -[[package]] -name = "socket2" -version = "0.4.10" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "9f7916fc008ca5542385b89a3d3ce689953c143e9304a9bf8beec1de48994c0d" -dependencies = [ - "libc", - "winapi", -] - [[package]] name = "socket2" version = "0.5.5" @@ -1252,7 +1237,7 @@ dependencies = [ "serde_yaml", "svd-parser", "svd-rs", - "syn 2.0.39", + "syn 2.0.42", "thiserror", ] @@ -1269,7 +1254,7 @@ dependencies = [ "serde_json", "serde_yaml", "svd2rust", - "syn 2.0.39", + "syn 2.0.42", "thiserror", "tracing", "tracing-subscriber", @@ -1290,9 +1275,9 @@ dependencies = [ [[package]] name = "syn" -version = "2.0.39" +version = "2.0.42" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "23e78b90f2fcf45d3e842032ce32e3f2d1545ba6636271dcbf24fa306d87be7a" +checksum = "5b7d0a2c048d661a1a59fcd7355baa232f7ed34e0ee4df2eef3c1c1c0d3852d8" dependencies = [ "proc-macro2", "quote", @@ -1344,22 +1329,22 @@ dependencies = [ [[package]] name = "thiserror" -version = "1.0.50" +version = "1.0.51" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f9a7210f5c9a7156bb50aa36aed4c95afb51df0df00713949448cf9e97d382d2" +checksum = "f11c217e1416d6f036b870f14e0413d480dbf28edbee1f877abaf0206af43bb7" dependencies = [ "thiserror-impl", ] [[package]] name = "thiserror-impl" -version = "1.0.50" +version = "1.0.51" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "266b2e40bc00e5a6c09c3584011e08b06f123c00362c92b975ba9843aaaa14b8" +checksum = "01742297787513b79cf8e29d1056ede1313e2420b7b3b15d0a768b4921f549df" dependencies = [ "proc-macro2", "quote", - "syn 2.0.39", + "syn 2.0.42", ] [[package]] @@ -1389,9 +1374,9 @@ checksum = "1f3ccbac311fea05f86f61904b462b55fb3df8837a366dfc601a0161d0532f20" [[package]] name = "tokio" -version = "1.34.0" +version = "1.35.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d0c014766411e834f7af5b8f4cf46257aab4036ca95e9d2c144a10f59ad6f5b9" +checksum = "c89b4efa943be685f629b149f53829423f8f5531ea21249408e8e2f8671ec104" dependencies = [ "backtrace", "bytes", @@ -1399,7 +1384,7 @@ dependencies = [ "mio", "num_cpus", "pin-project-lite", - "socket2 0.5.5", + "socket2", "windows-sys 0.48.0", ] @@ -1429,9 +1414,9 @@ dependencies = [ [[package]] name = "toml" -version = "0.7.8" +version = "0.8.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "dd79e69d3b627db300ff956027cc6c3798cef26d22526befdfcd12feeb6d2257" +checksum = "a1a195ec8c9da26928f773888e0742ca3ca1040c6cd859c919c9f59c1954ab35" dependencies = [ "serde", "serde_spanned", @@ -1450,9 +1435,9 @@ dependencies = [ [[package]] name = "toml_edit" -version = "0.19.15" +version = "0.21.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1b5bb770da30e5cbfde35a2d7b9b8a2c4b8ef89548a7a6aeab5c9a576e3e7421" +checksum = "d34d383cd00a163b4a5b85053df514d45bc330f6de7737edfe0a93311d1eaa03" dependencies = [ "indexmap", "serde", @@ -1486,7 +1471,7 @@ checksum = "34704c8d6ebcbc939824180af020566b01a7c01f80641264eba0999f6c2b6be7" dependencies = [ "proc-macro2", "quote", - "syn 2.0.39", + "syn 2.0.42", ] [[package]] @@ -1530,15 +1515,15 @@ dependencies = [ [[package]] name = "try-lock" -version = "0.2.4" +version = "0.2.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3528ecfd12c466c6f163363caf2d02a71161dd5e1cc6ae7b34207ea2d42d81ed" +checksum = "e421abadd41a4225275504ea4d6566923418b7f05506fbc9c0fe86ba7396114b" [[package]] name = "unicode-bidi" -version = "0.3.13" +version = "0.3.14" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "92888ba5573ff080736b3648696b70cafad7d250551175acbaa4e0385b3e1460" +checksum = "6f2528f27a9eb2b21e69c95319b30bd0efd85d09c379741b0f78ea1d86be2416" [[package]] name = "unicode-ident" @@ -1557,9 +1542,9 @@ dependencies = [ [[package]] name = "unsafe-libyaml" -version = "0.2.9" +version = "0.2.10" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f28467d3e1d3c6586d8f25fa243f544f5800fec42d97032474e17222c2b75cfa" +checksum = "ab4c90930b95a82d00dc9e9ac071b4991924390d46cbd0dfe566148667605e4b" [[package]] name = "url" @@ -1632,7 +1617,7 @@ dependencies = [ "once_cell", "proc-macro2", "quote", - "syn 2.0.39", + "syn 2.0.42", "wasm-bindgen-shared", ] @@ -1666,7 +1651,7 @@ checksum = "f0eb82fcb7930ae6219a7ecfd55b217f5f0893484b7a13022ebb2b2bf20b5283" dependencies = [ "proc-macro2", "quote", - "syn 2.0.39", + "syn 2.0.42", "wasm-bindgen-backend", "wasm-bindgen-shared", ] @@ -1702,9 +1687,9 @@ dependencies = [ [[package]] name = "wildmatch" -version = "2.1.1" +version = "2.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ee583bdc5ff1cf9db20e9db5bb3ff4c3089a8f6b8b31aff265c9aba85812db86" +checksum = "ffa44a4268d649eba546544ed45fd9591059d9653a0e584efe030b56d8172b58" [[package]] name = "winapi" @@ -1871,9 +1856,9 @@ checksum = "dff9641d1cd4be8d1a070daf9e3773c5f67e78b4d9d42263020c057706765c04" [[package]] name = "winnow" -version = "0.5.25" +version = "0.5.30" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b7e87b8dfbe3baffbe687eef2e164e32286eff31a5ee16463ce03d991643ec94" +checksum = "9b5c3db89721d50d0e2a673f5043fc4722f76dcc352d7b1ab8b8288bed4ed2c5" dependencies = [ "memchr", ] diff --git a/src/generate/register.rs b/src/generate/register.rs index 5942c193..7ae49c20 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -924,7 +924,7 @@ pub fn fields( #[doc = #doc] #inline pub fn #name_snake_case_iter(&self) -> impl Iterator + '_ { - (0..#dim).map(|n| #reader_ty::new ( #value )) + (0..#dim).map(move |n| #reader_ty::new ( #value )) } }); From eea8296a4d9dc045bb60fac2b7a6b88a35d4d318 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 23 Dec 2023 10:31:35 +0300 Subject: [PATCH 185/319] changelog --- CHANGELOG.md | 1 + 1 file changed, 1 insertion(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index a145fbd5..72ed4041 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -10,6 +10,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Add `svd::Device` validation after parsing by `serde` - Add `skip-crate-attributes` config flag - Better display parsing errors +- move in R::field_iter ## [v0.31.2] - 2023-11-29 From 6abf3d09e5f8eb81207cc8410ce76435de38b9f4 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 25 Dec 2023 09:22:36 +0300 Subject: [PATCH 186/319] fix irx-config version --- CHANGELOG.md | 2 +- Cargo.lock | 22 ++++++++++------------ Cargo.toml | 2 +- 3 files changed, 12 insertions(+), 14 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 72ed4041..f251ca25 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -10,7 +10,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Add `svd::Device` validation after parsing by `serde` - Add `skip-crate-attributes` config flag - Better display parsing errors -- move in R::field_iter +- `move` in `R::field_iter` implementation (iterator of field array values) ## [v0.31.2] - 2023-11-29 diff --git a/Cargo.lock b/Cargo.lock index c21f8313..b432ee8f 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -132,15 +132,13 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "327762f6e5a765692301e5bb513e0d9fef63be86bbc14528052b1cd3e6f03e07" [[package]] -name = "blake3" -version = "1.5.0" +name = "blake2b_simd" +version = "1.0.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0231f06152bf547e9c2b5194f247cd97aacf6dcd8b15d8e5ec0663f64580da87" +checksum = "23285ad32269793932e830392f2fe2f83e26488fd3ec778883a93c8323735780" dependencies = [ "arrayref", "arrayvec", - "cc", - "cfg-if", "constant_time_eq", ] @@ -643,11 +641,11 @@ checksum = "8f518f335dce6725a761382244631d86cf0ccb2863413590b31338feb467f9c3" [[package]] name = "irx-config" -version = "3.4.0" +version = "3.3.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "37b4596c58f6e49195fe4794f4b9d630c4be5b04608f44a79aa28195f47c6018" +checksum = "3b0071d0561e65904b6ea900e6e09d84579766c20a2b6b4d628eaf3caf9ec9ee" dependencies = [ - "blake3", + "blake2b_simd", "clap", "derive_builder", "serde", @@ -1414,9 +1412,9 @@ dependencies = [ [[package]] name = "toml" -version = "0.8.8" +version = "0.7.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a1a195ec8c9da26928f773888e0742ca3ca1040c6cd859c919c9f59c1954ab35" +checksum = "dd79e69d3b627db300ff956027cc6c3798cef26d22526befdfcd12feeb6d2257" dependencies = [ "serde", "serde_spanned", @@ -1435,9 +1433,9 @@ dependencies = [ [[package]] name = "toml_edit" -version = "0.21.0" +version = "0.19.15" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d34d383cd00a163b4a5b85053df514d45bc330f6de7737edfe0a93311d1eaa03" +checksum = "1b5bb770da30e5cbfde35a2d7b9b8a2c4b8ef89548a7a6aeab5c9a576e3e7421" dependencies = [ "indexmap", "serde", diff --git a/Cargo.toml b/Cargo.toml index 507c8000..71991680 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -44,7 +44,7 @@ yaml = ["dep:serde_yaml"] [dependencies] clap = { version = "4.0", optional = true } -irx-config = { version = "3.3", features = ["cmd", "toml-parser"], optional = true } +irx-config = { version = "=3.3.0", features = ["cmd", "toml-parser"], optional = true } env_logger = { version = "0.10", optional = true } inflections = "1.1" log = { version = "~0.4", features = ["std"] } From 5f758a080954c00b31e9b11f06409a47921d86d9 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 25 Dec 2023 14:38:26 +0300 Subject: [PATCH 187/319] release 0.31.3 --- CHANGELOG.md | 5 ++++- Cargo.lock | 2 +- Cargo.toml | 2 +- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index f251ca25..2acc92e3 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.31.3] - 2023-12-25 + - Add `svd::Device` validation after parsing by `serde` - Add `skip-crate-attributes` config flag - Better display parsing errors @@ -852,7 +854,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.31.2...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.31.3...HEAD +[v0.31.3]: https://github.com/rust-embedded/svd2rust/compare/v0.31.2...v0.31.3 [v0.31.2]: https://github.com/rust-embedded/svd2rust/compare/v0.31.1...v0.31.2 [v0.31.1]: https://github.com/rust-embedded/svd2rust/compare/v0.31.0...v0.31.1 [v0.31.0]: https://github.com/rust-embedded/svd2rust/compare/v0.30.3...v0.31.0 diff --git a/Cargo.lock b/Cargo.lock index b432ee8f..52fa5d4b 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1218,7 +1218,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.31.2" +version = "0.31.3" dependencies = [ "anyhow", "clap", diff --git a/Cargo.toml b/Cargo.toml index 71991680..2b37e056 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.31.2" +version = "0.31.3" readme = "README.md" rust-version = "1.70" From e28f402f3128a95b067a9e1bf87c62b4e6db0650 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Wed, 27 Dec 2023 12:00:02 +0100 Subject: [PATCH 188/319] limit /ci diff to members only --- .github/workflows/diff.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/diff.yml b/.github/workflows/diff.yml index 47b5ecc4..c64712d9 100644 --- a/.github/workflows/diff.yml +++ b/.github/workflows/diff.yml @@ -8,7 +8,7 @@ jobs: runs-on: ubuntu-latest outputs: diffs: ${{ steps.regress-ci.outputs.diffs }} - if: github.event.issue.pull_request && (contains(github.event.comment.body, '\n/ci') || startsWith(github.event.comment.body, '/ci')) + if: github.event.issue.pull_request && github.event.comment.author_association == 'MEMBER' && (contains(github.event.comment.body, '\n/ci') || startsWith(github.event.comment.body, '/ci')) steps: - uses: actions/checkout@v4 From 1735fffda6e2d1b520e44b18afa2870209d6a2d2 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 2 Jan 2024 10:27:12 +0300 Subject: [PATCH 189/319] Custom prefix/case/suffix for identifiers --- CHANGELOG.md | 2 + src/config.rs | 104 ++++++++++++++++++++++++++++- src/generate/device.rs | 21 +++--- src/generate/interrupt.rs | 15 +++-- src/generate/peripheral.rs | 71 ++++++++++---------- src/generate/register.rs | 131 +++++++++++++++++-------------------- src/main.rs | 6 +- src/util.rs | 32 +++++---- 8 files changed, 245 insertions(+), 137 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 2acc92e3..cf546140 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Custom prefix/case/suffix for identifiers + ## [v0.31.3] - 2023-12-25 - Add `svd::Device` validation after parsing by `serde` diff --git a/src/config.rs b/src/config.rs index 7656bf43..82e40118 100644 --- a/src/config.rs +++ b/src/config.rs @@ -1,9 +1,8 @@ use anyhow::{bail, Result}; use std::path::{Path, PathBuf}; -#[cfg_attr(feature = "serde", derive(serde::Deserialize))] +#[cfg_attr(feature = "serde", derive(serde::Deserialize), serde(default))] #[derive(Clone, PartialEq, Eq, Debug, Default)] -#[cfg_attr(feature = "serde", serde(default))] pub struct Config { pub target: Target, pub atomics: bool, @@ -28,6 +27,7 @@ pub struct Config { pub interrupt_link_section: Option, pub reexport_core_peripherals: bool, pub reexport_interrupt: bool, + pub ident_formats: IdentFormats, } #[allow(clippy::upper_case_acronyms)] @@ -116,3 +116,103 @@ impl SourceType { .unwrap_or_default() } } + +#[cfg_attr( + feature = "serde", + derive(serde::Deserialize), + serde(rename_all = "lowercase") +)] +#[derive(Clone, Debug, PartialEq, Eq, Default)] +pub enum Case { + #[default] + Constant, + Pascal, + Snake, +} + +#[derive(Clone, Debug, Default, PartialEq, Eq)] +#[cfg_attr(feature = "serde", derive(serde::Deserialize), serde(default))] +pub struct IdentFormat { + pub case: Option, + pub prefix: String, + pub suffix: String, +} + +impl IdentFormat { + pub fn case(mut self, case: Case) -> Self { + self.case = Some(case); + self + } + pub fn constant_case(mut self) -> Self { + self.case = Some(Case::Constant); + self + } + pub fn pascal_case(mut self) -> Self { + self.case = Some(Case::Pascal); + self + } + pub fn scake_case(mut self) -> Self { + self.case = Some(Case::Pascal); + self + } + pub fn prefix(mut self, prefix: &str) -> Self { + self.prefix = prefix.into(); + self + } + pub fn suffix(mut self, suffix: &str) -> Self { + self.suffix = suffix.into(); + self + } + pub fn parse(s: &str) -> Result { + let mut it = s.split(":"); + match (it.next(), it.next(), it.next(), it.next()) { + (Some(prefix), Some(case), Some(suffix), None) => { + let case = match case { + "C" | "CONSTANT" => Some(Case::Constant), + "P" | "Pascal" => Some(Case::Pascal), + "S" | "snake" => Some(Case::Snake), + "_" => None, + _ => return Err(()), + }; + Ok(Self { + case, + prefix: prefix.into(), + suffix: suffix.into(), + }) + } + _ => Err(()), + } + } +} + +#[derive(Clone, Debug, PartialEq, Eq)] +#[cfg_attr(feature = "serde", derive(serde::Deserialize), serde(default))] +pub struct IdentFormats { + pub field_reader: IdentFormat, + pub field_writer: IdentFormat, + pub enum_name: IdentFormat, + pub enum_write_name: IdentFormat, + pub enum_value: IdentFormat, + pub interrupt: IdentFormat, + pub cluster: IdentFormat, + pub register: IdentFormat, + pub register_spec: IdentFormat, + pub peripheral: IdentFormat, +} + +impl Default for IdentFormats { + fn default() -> Self { + Self { + field_reader: IdentFormat::default().constant_case().suffix("_R"), + field_writer: IdentFormat::default().constant_case().suffix("_W"), + enum_name: IdentFormat::default().constant_case().suffix("_A"), + enum_write_name: IdentFormat::default().constant_case().suffix("_AW"), + enum_value: IdentFormat::default().constant_case(), + interrupt: IdentFormat::default().constant_case(), + cluster: IdentFormat::default().constant_case(), + register: IdentFormat::default().constant_case(), + register_spec: IdentFormat::default().constant_case().suffix("_SPEC"), + peripheral: IdentFormat::default().constant_case(), + } + } +} diff --git a/src/generate/device.rs b/src/generate/device.rs index 4683e2cd..8ce9105a 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -1,5 +1,5 @@ use crate::svd::{array::names, Device, Peripheral}; -use proc_macro2::{Ident, Span, TokenStream}; +use proc_macro2::{Span, TokenStream}; use quote::{quote, ToTokens}; use log::debug; @@ -9,7 +9,7 @@ use std::io::Write; use std::path::Path; use crate::config::{Config, Target}; -use crate::util::{self, ToSanitizedCase}; +use crate::util::{self, ident, ToSanitizedCase}; use anyhow::{Context, Result}; use crate::generate::{interrupt, peripheral}; @@ -231,26 +231,27 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result { let p_name = util::name_of(p, config.ignore_groups); let p_snake = p_name.to_sanitized_snake_case(); - let p = p_name.to_sanitized_constant_case(); - let id = Ident::new(&p, Span::call_site()); + let p_ty = ident(&p_name, &config.ident_formats.peripheral, span); if config.feature_peripheral { feature_attribute.extend(quote! { #[cfg(feature = #p_snake)] }) }; fields.extend(quote! { - #[doc = #p] + #[doc = #p_name] #feature_attribute - pub #id: #id, + pub #p_ty: #p_ty, }); - exprs.extend(quote!(#feature_attribute #id: #id { _marker: PhantomData },)); + exprs.extend(quote!(#feature_attribute #p_ty: #p_ty { _marker: PhantomData },)); } Peripheral::Array(_p, dim_element) => { let p_names: Vec> = names(p, dim_element).map(|n| n.into()).collect(); - let p = p_names.iter().map(|p| p.to_sanitized_constant_case()); - let ids_f = p.clone().map(|p| Ident::new(&p, Span::call_site())); + let ids_f = p_names + .iter() + .map(|p| ident(p, &config.ident_formats.peripheral, span)); let ids_e = ids_f.clone(); let feature_attribute = p_names .iter() @@ -265,7 +266,7 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result>(); fields.extend(quote! { #( - #[doc = #p] + #[doc = #p_names] #feature_attribute pub #ids_f: #ids_f, )* diff --git a/src/generate/interrupt.rs b/src/generate/interrupt.rs index c54e1d6b..8c1a2ed6 100644 --- a/src/generate/interrupt.rs +++ b/src/generate/interrupt.rs @@ -5,7 +5,7 @@ use crate::svd::Peripheral; use proc_macro2::{Span, TokenStream}; use quote::quote; -use crate::util::{self, ToSanitizedCase}; +use crate::util::{self, ident, ToSanitizedCase}; use crate::{Config, Target}; use anyhow::Result; @@ -46,6 +46,7 @@ pub fn render( // Current position in the vector table let mut pos = 0; let mut mod_items = TokenStream::new(); + let span = Span::call_site(); for interrupt in &interrupts { while pos < interrupt.0.value { elements.extend(quote!(Vector { _reserved: 0 },)); @@ -53,7 +54,7 @@ pub fn render( } pos += 1; - let name_constant_case = interrupt.0.name.to_constant_case_ident(Span::call_site()); + let i_ty = ident(&interrupt.0.name, &config.ident_formats.interrupt, span); let description = format!( "{} - {}", interrupt.0.value, @@ -89,12 +90,12 @@ pub fn render( variants.extend(quote! { #[doc = #description] #feature_attribute - #name_constant_case = #value, + #i_ty = #value, }); from_arms.extend(quote! { #feature_attribute - #value => Ok(Interrupt::#name_constant_case), + #value => Ok(Interrupt::#i_ty), }); if feature_attribute_flag { @@ -102,12 +103,12 @@ pub fn render( #not_feature_attribute Vector { _reserved: 0 }, #feature_attribute - Vector { _handler: #name_constant_case }, + Vector { _handler: #i_ty }, }); } else { - elements.extend(quote!(Vector { _handler: #name_constant_case },)); + elements.extend(quote!(Vector { _handler: #i_ty },)); } - names.push(name_constant_case); + names.push(i_ty); names_cfg_attr.push(feature_attribute); } diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 64b884f2..9e50d123 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -16,8 +16,8 @@ use quote::{quote, ToTokens}; use syn::{punctuated::Punctuated, Token}; use crate::util::{ - self, name_to_ty, path_segment, type_path, unsuffixed, zst_type, FullName, ToSanitizedCase, - BITS_PER_BYTE, + self, ident, name_to_ty, path_segment, type_path, unsuffixed, zst_type, FullName, + ToSanitizedCase, BITS_PER_BYTE, }; use anyhow::{anyhow, bail, Context, Result}; @@ -38,16 +38,16 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result let name = util::name_of(&p, config.ignore_groups); let span = Span::call_site(); - let name_str = name.to_sanitized_constant_case(); - let name_constant_case = Ident::new(&name_str, span); + let p_ty = ident(&name, &config.ident_formats.peripheral, span); + let name_str = p_ty.to_string(); let address = util::hex(p.base_address); let description = util::respace(p.description.as_ref().unwrap_or(&p.name)); - let name_snake_case = name.to_snake_case_ident(span); + let mod_ty = name.to_snake_case_ident(span); let (derive_regs, base, path) = if let Some(path) = path { (true, path.peripheral.to_snake_case_ident(span), path) } else { - (false, name_snake_case.clone(), BlockPath::new(&p.name)) + (false, mod_ty.clone(), BlockPath::new(&p.name)) }; let mut feature_attribute = TokenStream::new(); @@ -81,8 +81,8 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result for pi in svd::peripheral::expand(p, dim) { let name = &pi.name; let description = pi.description.as_deref().unwrap_or(&p.name); - let name_str = name.to_sanitized_constant_case(); - let name_constant_case = Ident::new(name, span); + let p_ty = ident(name, &config.ident_formats.peripheral, span); + let name_str = p_ty.to_string(); let address = util::hex(pi.base_address); let p_snake = name.to_sanitized_snake_case(); snake_names.push(p_snake.to_string()); @@ -94,13 +94,13 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result out.extend(quote! { #[doc = #description] #feature_attribute_n - pub struct #name_constant_case { _marker: PhantomData<*const ()> } + pub struct #p_ty { _marker: PhantomData<*const ()> } #feature_attribute_n - unsafe impl Send for #name_constant_case {} + unsafe impl Send for #p_ty {} #feature_attribute_n - impl #name_constant_case { + impl #p_ty { ///Pointer to the register block pub const PTR: *const #base::RegisterBlock = #address as *const _; @@ -114,7 +114,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result } #feature_attribute_n - impl Deref for #name_constant_case { + impl Deref for #p_ty { type Target = #base::RegisterBlock; #[inline(always)] @@ -124,7 +124,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result } #feature_attribute_n - impl core::fmt::Debug for #name_constant_case { + impl core::fmt::Debug for #p_ty { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct(#name_str).finish() } @@ -141,7 +141,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result out.extend(quote! { #[doc = #description] #feature_any_attribute - pub use self::#base as #name_snake_case; + pub use self::#base as #mod_ty; }); return Ok(out); } @@ -155,13 +155,13 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result out.extend(quote! { #[doc = #description] #feature_attribute - pub struct #name_constant_case { _marker: PhantomData<*const ()> } + pub struct #p_ty { _marker: PhantomData<*const ()> } #feature_attribute - unsafe impl Send for #name_constant_case {} + unsafe impl Send for #p_ty {} #feature_attribute - impl #name_constant_case { + impl #p_ty { ///Pointer to the register block pub const PTR: *const #base::RegisterBlock = #address as *const _; @@ -175,7 +175,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result } #feature_attribute - impl Deref for #name_constant_case { + impl Deref for #p_ty { type Target = #base::RegisterBlock; #[inline(always)] @@ -185,7 +185,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result } #feature_attribute - impl core::fmt::Debug for #name_constant_case { + impl core::fmt::Debug for #p_ty { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct(#name_str).finish() } @@ -199,7 +199,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result out.extend(quote! { #[doc = #description] #feature_attribute - pub use self::#base as #name_snake_case; + pub use self::#base as #mod_ty; }); return Ok(out); } @@ -252,7 +252,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result out.extend(quote! { #[doc = #description] #feature_attribute - pub mod #name_snake_case #open + pub mod #mod_ty #open }); out.extend(reg_block); @@ -630,15 +630,15 @@ fn register_or_cluster_block( } }); - let name = if let Some(name) = name { - name.to_constant_case_ident(span) + let block_ty = if let Some(name) = name { + ident(name, &config.ident_formats.cluster, span) } else { Ident::new("RegisterBlock", span) }; let accessors = (!accessors.is_empty()).then(|| { quote! { - impl #name { + impl #block_ty { #accessors } } @@ -648,7 +648,7 @@ fn register_or_cluster_block( ///Register block #[repr(C)] #derive_debug - pub struct #name { + pub struct #block_ty { #rbfs } @@ -1375,8 +1375,8 @@ fn cluster_block( // name_snake_case needs to take into account array type. let span = Span::call_site(); - let name_snake_case = mod_name.to_snake_case_ident(span); - let name_constant_case = mod_name.to_constant_case_ident(span); + let mod_ty = mod_name.to_snake_case_ident(span); + let block_ty = ident(&mod_name, &config.ident_formats.cluster, span); if let Some(dpath) = dpath { let dparent = dpath.parent().unwrap(); @@ -1387,10 +1387,11 @@ fn cluster_block( }; let dname = util::replace_suffix(&index.clusters.get(&dpath).unwrap().name, ""); let mut mod_derived = derived.clone(); - derived - .path - .segments - .push(path_segment(dname.to_constant_case_ident(span))); + derived.path.segments.push(path_segment(ident( + &dname, + &config.ident_formats.cluster, + span, + ))); mod_derived .path .segments @@ -1398,8 +1399,8 @@ fn cluster_block( Ok(quote! { #[doc = #description] - pub use self::#derived as #name_constant_case; - pub use self::#mod_derived as #name_snake_case; + pub use self::#derived as #block_ty; + pub use self::#mod_derived as #mod_ty; }) } else { let cpath = path.new_cluster(&c.name); @@ -1429,11 +1430,11 @@ fn cluster_block( Ok(quote! { #[doc = #description] - pub use self::#name_snake_case::#name_constant_case; + pub use self::#mod_ty::#block_ty; ///Cluster #[doc = #description] - pub mod #name_snake_case { + pub mod #mod_ty { #mod_items } }) diff --git a/src/generate/register.rs b/src/generate/register.rs index 7ae49c20..af48cbdf 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -15,12 +15,16 @@ use svd_parser::expand::{ use crate::config::Config; use crate::util::{ - self, ident_to_path, path_segment, replace_suffix, type_path, unsuffixed, FullName, + self, ident, ident_to_path, path_segment, replace_suffix, type_path, unsuffixed, FullName, ToSanitizedCase, U32Ext, }; use anyhow::{anyhow, Result}; use syn::punctuated::Punctuated; +fn regspec(name: &str, config: &Config, span: Span) -> Ident { + ident(name, &config.ident_formats.register_spec, span) +} + pub fn render( register: &Register, path: &BlockPath, @@ -39,8 +43,8 @@ pub fn render( } } let span = Span::call_site(); - let name_constant_case = name.to_constant_case_ident(span); - let name_snake_case = name.to_snake_case_ident(span); + let reg_ty = ident(&name, &config.ident_formats.register, span); + let mod_ty = name.to_snake_case_ident(span); let description = util::escape_special_chars( util::respace(®ister.description.clone().unwrap_or_else(|| { warn!("Missing description for register {}", register.name); @@ -57,21 +61,22 @@ pub fn render( }; let dname = util::name_of(index.registers.get(dpath).unwrap(), config.ignore_groups); let mut mod_derived = derived.clone(); - derived - .path - .segments - .push(path_segment(dname.to_constant_case_ident(span))); + derived.path.segments.push(path_segment(ident( + &dname, + &config.ident_formats.register, + span, + ))); mod_derived .path .segments .push(path_segment(dname.to_snake_case_ident(span))); Ok(quote! { - pub use #derived as #name_constant_case; - pub use #mod_derived as #name_snake_case; + pub use #derived as #reg_ty; + pub use #mod_derived as #mod_ty; }) } else { - let regspec_ident = format!("{name}_SPEC").to_constant_case_ident(span); + let regspec_ty = regspec(&name, config, span); let access = util::access_of(®ister.properties, register.fields.as_deref()); let accs = if access.can_read() && access.can_write() { "rw" @@ -89,21 +94,20 @@ pub fn render( access.can_read(), access.can_write(), register.properties.reset_value.is_some(), - &name_snake_case, + &mod_ty, false, register.read_action, )? ); - if name_snake_case != "cfg" { - alias_doc += format!( - "\n\nFor information about available fields see [`mod@{name_snake_case}`] module" - ) - .as_str(); + if mod_ty != "cfg" { + alias_doc += + format!("\n\nFor information about available fields see [`mod@{mod_ty}`] module") + .as_str(); } let mut out = TokenStream::new(); out.extend(quote! { #[doc = #alias_doc] - pub type #name_constant_case = crate::Reg<#name_snake_case::#regspec_ident>; + pub type #reg_ty = crate::Reg<#mod_ty::#regspec_ty>; }); let mod_items = render_register_mod( register, @@ -115,7 +119,7 @@ pub fn render( out.extend(quote! { #[doc = #description] - pub mod #name_snake_case { + pub mod #mod_ty { #mod_items } }); @@ -196,7 +200,7 @@ pub fn render_register_mod( let properties = ®ister.properties; let name = util::name_of(register, config.ignore_groups); let span = Span::call_site(); - let regspec_ident = format!("{name}_SPEC").to_constant_case_ident(span); + let regspec_ty = regspec(&name, config, span); let name_snake_case = name.to_snake_case_ident(span); let rsize = properties .size @@ -227,7 +231,7 @@ pub fn render_register_mod( let desc = format!("Register `{}` reader", register.name); mod_items.extend(quote! { #[doc = #desc] - pub type R = crate::R<#regspec_ident>; + pub type R = crate::R<#regspec_ty>; }); } @@ -235,7 +239,7 @@ pub fn render_register_mod( let desc = format!("Register `{}` writer", register.name); mod_items.extend(quote! { #[doc = #desc] - pub type W = crate::W<#regspec_ident>; + pub type W = crate::W<#regspec_ty>; }); } @@ -278,7 +282,7 @@ pub fn render_register_mod( one_to_modify_fields_bitmap, ) = fields( cur_fields, - ®spec_ident, + ®spec_ty, register.modified_write_values, access, properties, @@ -291,7 +295,7 @@ pub fn render_register_mod( } else if !access.can_read() || register.read_action.is_some() { r_debug_impl.extend(quote! { #debug_feature - impl core::fmt::Debug for crate::generic::Reg<#regspec_ident> { + impl core::fmt::Debug for crate::generic::Reg<#regspec_ty> { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") } @@ -307,7 +311,7 @@ pub fn render_register_mod( } } #debug_feature - impl core::fmt::Debug for crate::generic::Reg<#regspec_ident> { + impl core::fmt::Debug for crate::generic::Reg<#regspec_ty> { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { core::fmt::Debug::fmt(&self.read(), f) } @@ -388,9 +392,9 @@ pub fn render_register_mod( mod_items.extend(quote! { #[doc = #doc] - pub struct #regspec_ident; + pub struct #regspec_ty; - impl crate::RegisterSpec for #regspec_ident { + impl crate::RegisterSpec for #regspec_ty { type Ux = #rty; } }); @@ -399,7 +403,7 @@ pub fn render_register_mod( let doc = format!("`read()` method returns [`{name_snake_case}::R`](R) reader structure",); mod_items.extend(quote! { #[doc = #doc] - impl crate::Readable for #regspec_ident {} + impl crate::Readable for #regspec_ty {} }); } if can_write { @@ -411,7 +415,7 @@ pub fn render_register_mod( mod_items.extend(quote! { #[doc = #doc] - impl crate::Writable for #regspec_ident { + impl crate::Writable for #regspec_ty { const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = #zero_to_modify_fields_bitmap; const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = #one_to_modify_fields_bitmap; } @@ -421,7 +425,7 @@ pub fn render_register_mod( let doc = format!("`reset()` method sets {} to value {rv}", register.name); mod_items.extend(quote! { #[doc = #doc] - impl crate::Resettable for #regspec_ident { + impl crate::Resettable for #regspec_ty { const RESET_VALUE: Self::Ux = #rv; } }); @@ -437,7 +441,7 @@ fn render_register_mod_debug( ) -> Result { let name = util::name_of(register, config.ignore_groups); let span = Span::call_site(); - let regspec_ident = format!("{name}_SPEC").to_constant_case_ident(span); + let regspec_ty = regspec(&name, config, span); let open = Punct::new('{', Spacing::Alone); let close = Punct::new('}', Spacing::Alone); let mut r_debug_impl = TokenStream::new(); @@ -489,7 +493,7 @@ fn render_register_mod_debug( }); r_debug_impl.extend(quote! { #debug_feature - impl core::fmt::Debug for crate::generic::Reg<#regspec_ident> { + impl core::fmt::Debug for crate::generic::Reg<#regspec_ty> { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { core::fmt::Debug::fmt(&self.read(), f) } @@ -498,7 +502,7 @@ fn render_register_mod_debug( } else if !access.can_read() || register.read_action.is_some() { r_debug_impl.extend(quote! { #debug_feature - impl core::fmt::Debug for crate::generic::Reg<#regspec_ident> { + impl core::fmt::Debug for crate::generic::Reg<#regspec_ty> { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { write!(f, "(not readable)") } @@ -513,7 +517,7 @@ fn render_register_mod_debug( #[allow(clippy::too_many_arguments)] pub fn fields( mut fields: Vec<&Field>, - regspec_ident: &Ident, + regspec_ty: &Ident, rmwv: Option, access: Access, properties: &RegisterProperties, @@ -567,7 +571,6 @@ pub fn fields( } else { name.to_snake_case_ident(span) }; - let name_constant_case = name.to_sanitized_constant_case(); let description_raw = f.description.as_deref().unwrap_or(""); // raw description, if absent using empty string let description = util::respace(&util::escape_special_chars(description_raw)); @@ -651,19 +654,18 @@ pub fn fields( // in enumeratedValues if it's an enumeration, or from field name directly if it's not. let value_read_ty = if let Some((evs, _)) = lookup_filter(&lookup_results, Usage::Read) { - if let Some(enum_name) = &evs.name { - format!("{enum_name}_A").to_constant_case_ident(span) - } else { - // derived_field_value_read_ty - Ident::new(&format!("{name_constant_case}_A"), span) - } + ident( + evs.name.as_deref().unwrap_or(&name), + &config.ident_formats.enum_name, + span, + ) } else { // raw_field_value_read_ty fty.clone() }; // name of read proxy type - let reader_ty = Ident::new(&(name_constant_case.clone() + "_R"), span); + let reader_ty = ident(&name, &config.ident_formats.field_reader, span); // if it's enumeratedValues and it's derived from base, don't derive the read proxy // as the base has already dealt with this; @@ -715,14 +717,13 @@ pub fn fields( evs_r = Some(evs); // parse enum variants from enumeratedValues svd record - let mut variants = Variant::from_enumerated_values(evs, config.pascal_enum_values)?; + let mut variants = Variant::from_enumerated_values(evs, config)?; let map = enums_to_map(evs); let mut def = evs .default_value() .and_then(|def| { - minimal_hole(&map, width) - .map(|v| Variant::from_value(v, def, config.pascal_enum_values)) + minimal_hole(&map, width).map(|v| Variant::from_value(v, def, config)) }) .transpose()?; if variants.len() == 1 << width { @@ -877,7 +878,7 @@ pub fn fields( evs_r = Some(evs); // generate pub use field_1 reader as field_2 reader let base_field = util::replace_suffix(&base.field.name, ""); - let base_r = (base_field + "_R").to_constant_case_ident(span); + let base_r = ident(&base_field, &config.ident_formats.field_reader, span); if !reader_derives.contains(&reader_ty) { let base_path = base_syn_path(base, &fpath, &base_r)?; mod_items.extend(quote! { @@ -988,24 +989,19 @@ pub fn fields( let value_write_ty = if let Some((evs, _)) = lookup_filter(&lookup_results, Usage::Write) { let writer_reader_different_enum = evs_r != Some(evs); - let ty_suffix = if writer_reader_different_enum { - "AW" + let fmt = if writer_reader_different_enum { + &config.ident_formats.enum_write_name } else { - "A" + &config.ident_formats.enum_name }; - if let Some(enum_name) = &evs.name { - format!("{enum_name}_{ty_suffix}").to_constant_case_ident(span) - } else { - // derived_field_value_write_ty - Ident::new(&format!("{name_constant_case}_{ty_suffix}"), span) - } + ident(evs.name.as_deref().unwrap_or(&name), fmt, span) } else { // raw_field_value_write_ty fty.clone() }; // name of write proxy type - let writer_ty = Ident::new(&(name_constant_case.clone() + "_W"), span); + let writer_ty = ident(&name, &config.ident_formats.field_writer, span); let mut proxy_items = TokenStream::new(); let mut unsafety = unsafety(f.write_constraint.as_ref(), width); @@ -1013,13 +1009,12 @@ pub fn fields( // if we writes to enumeratedValues, generate its structure if it differs from read structure. if let Some((evs, None)) = lookup_filter(&lookup_results, Usage::Write) { // parse variants from enumeratedValues svd record - let mut variants = Variant::from_enumerated_values(evs, config.pascal_enum_values)?; + let mut variants = Variant::from_enumerated_values(evs, config)?; let map = enums_to_map(evs); let mut def = evs .default_value() .and_then(|def| { - minimal_hole(&map, width) - .map(|v| Variant::from_value(v, def, config.pascal_enum_values)) + minimal_hole(&map, width).map(|v| Variant::from_value(v, def, config)) }) .transpose()?; if variants.len() == 1 << width { @@ -1158,7 +1153,7 @@ pub fn fields( // generate pub use field_1 writer as field_2 writer let base_field = util::replace_suffix(&base.field.name, ""); - let base_w = (base_field + "_W").to_constant_case_ident(span); + let base_w = ident(&base_field, &config.ident_formats.field_writer, span); if !writer_derives.contains(&writer_ty) { let base_path = base_syn_path(base, &fpath, &base_w)?; mod_items.extend(quote! { @@ -1197,7 +1192,7 @@ pub fn fields( #[doc = #note] #inline #[must_use] - pub fn #name_snake_case(&mut self, n: u8) -> #writer_ty<#regspec_ident> { + pub fn #name_snake_case(&mut self, n: u8) -> #writer_ty<#regspec_ty> { #[allow(clippy::no_effect)] [(); #dim][n as usize]; #writer_ty::new(self, #offset_calc) @@ -1218,7 +1213,7 @@ pub fn fields( #[doc = #doc] #inline #[must_use] - pub fn #name_snake_case_n(&mut self) -> #writer_ty<#regspec_ident> { + pub fn #name_snake_case_n(&mut self) -> #writer_ty<#regspec_ty> { #writer_ty::new(self, #sub_offset) } }); @@ -1230,7 +1225,7 @@ pub fn fields( #[doc = #doc] #inline #[must_use] - pub fn #name_snake_case(&mut self) -> #writer_ty<#regspec_ident> { + pub fn #name_snake_case(&mut self) -> #writer_ty<#regspec_ty> { #writer_ty::new(self, #offset) } }); @@ -1285,7 +1280,7 @@ struct Variant { } impl Variant { - fn from_enumerated_values(evs: &EnumeratedValues, pc: bool) -> Result> { + fn from_enumerated_values(evs: &EnumeratedValues, config: &Config) -> Result> { evs.values .iter() // filter out all reserved variants, as we should not @@ -1295,11 +1290,11 @@ impl Variant { let value = ev .value .ok_or_else(|| anyhow!("EnumeratedValue {} has no `` entry", ev.name))?; - Self::from_value(value, ev, pc) + Self::from_value(value, ev, config) }) .collect::>>() } - fn from_value(value: u64, ev: &EnumeratedValue, pc: bool) -> Result { + fn from_value(value: u64, ev: &EnumeratedValue, config: &Config) -> Result { let span = Span::call_site(); let nksc = ev.name.to_sanitized_not_keyword_snake_case(); let sc = util::sanitize_keyword(nksc.clone()); @@ -1308,11 +1303,7 @@ impl Variant { .description .clone() .unwrap_or_else(|| format!("`{value:b}`")), - pc: if pc { - ev.name.to_pascal_case_ident(span) - } else { - ev.name.to_constant_case_ident(span) - }, + pc: ident(&ev.name, &config.ident_formats.enum_value, span), nksc: Ident::new(&nksc, span), sc: Ident::new(&sc, span), value, diff --git a/src/main.rs b/src/main.rs index 9d1761e0..c9a6f379 100755 --- a/src/main.rs +++ b/src/main.rs @@ -171,12 +171,13 @@ fn run() -> Result<()> { .action(ArgAction::SetTrue) .help("Make advanced checks due to parsing SVD"), ) + // TODO: deprecate .arg( Arg::new("pascal_enum_values") .long("pascal-enum-values") .alias("pascal_enum_values") .action(ArgAction::SetTrue) - .help("Use PascalCase in stead of UPPER_CASE for enumerated values"), + .help("Use PascalCase in stead of CONSTANT_CASE for enumerated values"), ) .arg( Arg::new("source_type") @@ -248,6 +249,9 @@ fn run() -> Result<()> { config.source_type = SourceType::from_path(file) } let path = config.output_dir.as_deref().unwrap_or(Path::new(".")); + if config.pascal_enum_values { + config.ident_formats.enum_value.case = Some(svd2rust::config::Case::Pascal); + } info!("Parsing device from SVD file"); let device = load_from(input, &config)?; diff --git a/src/util.rs b/src/util.rs index 547d879a..fd80df55 100644 --- a/src/util.rs +++ b/src/util.rs @@ -1,5 +1,6 @@ use std::borrow::Cow; +pub use crate::config::{Case, IdentFormat}; use crate::svd::{Access, Device, Field, RegisterInfo, RegisterProperties}; use html_escape::encode_text_minimal; use inflections::Inflect; @@ -20,13 +21,6 @@ pub const BITS_PER_BYTE: u32 = 8; /// that are not valid in Rust ident const BLACKLIST_CHARS: &[char] = &['(', ')', '[', ']', '/', ' ', '-']; -#[derive(Clone, Debug, PartialEq, Eq)] -pub enum Case { - Constant, - Pascal, - Snake, -} - impl Case { pub fn cow_to_case<'a>(&self, cow: Cow<'a, str>) -> Cow<'a, str> { match self { @@ -45,16 +39,30 @@ impl Case { } } pub fn sanitize<'a>(&self, s: &'a str) -> Cow<'a, str> { - let s = if s.contains(BLACKLIST_CHARS) { - Cow::Owned(s.replace(BLACKLIST_CHARS, "")) - } else { - s.into() - }; + let s = sanitize(s); self.cow_to_case(s) } } +fn sanitize(s: &str) -> Cow<'_, str> { + if s.contains(BLACKLIST_CHARS) { + Cow::Owned(s.replace(BLACKLIST_CHARS, "")) + } else { + s.into() + } +} + +pub fn ident(name: &str, fmt: &IdentFormat, span: Span) -> Ident { + let name = match &fmt.case { + Some(Case::Constant) => name.to_sanitized_constant_case(), + Some(Case::Pascal) => name.to_sanitized_pascal_case(), + Some(Case::Snake) => name.to_sanitized_snake_case(), + _ => sanitize(name), + }; + Ident::new(&format!("{}{}{}", fmt.prefix, name, fmt.suffix), span) +} + /// Convert self string into specific case without overlapping to svd2rust internal names pub trait ToSanitizedCase { /// Convert self into PascalCase. From 5f741b8897959f8599cabb284ca6aaa97823985b Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 2 Jan 2024 18:25:37 +0300 Subject: [PATCH 190/319] simplify peripheral array expand --- src/generate/device.rs | 40 +++++++++++++--------------------------- 1 file changed, 13 insertions(+), 27 deletions(-) diff --git a/src/generate/device.rs b/src/generate/device.rs index 8ce9105a..5251c7ba 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -3,7 +3,6 @@ use proc_macro2::{Span, TokenStream}; use quote::{quote, ToTokens}; use log::debug; -use std::borrow::Cow; use std::fs::File; use std::io::Write; use std::path::Path; @@ -247,33 +246,20 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result { - let p_names: Vec> = names(p, dim_element).map(|n| n.into()).collect(); - let ids_f = p_names - .iter() - .map(|p| ident(p, &config.ident_formats.peripheral, span)); - let ids_e = ids_f.clone(); - let feature_attribute = p_names - .iter() - .map(|p_name| { - let p_snake = p_name.to_sanitized_snake_case(); - let mut feature_attribute = feature_attribute.clone(); - if config.feature_peripheral { - feature_attribute.extend(quote! { #[cfg(feature = #p_snake)] }) - }; - feature_attribute - }) - .collect::>(); - fields.extend(quote! { - #( - #[doc = #p_names] + Peripheral::Array(p, dim_element) => { + for p_name in names(p, dim_element) { + let p_snake = p_name.to_sanitized_snake_case(); + let p_ty = ident(&p_name, &config.ident_formats.peripheral, span); + if config.feature_peripheral { + feature_attribute.extend(quote! { #[cfg(feature = #p_snake)] }) + }; + fields.extend(quote! { + #[doc = #p_name] #feature_attribute - pub #ids_f: #ids_f, - )* - }); - exprs.extend( - quote!(#(#feature_attribute #ids_e: #ids_e { _marker: PhantomData },)*), - ); + pub #p_ty: #p_ty, + }); + exprs.extend(quote!(#feature_attribute #p_ty: #p_ty { _marker: PhantomData },)); + } } } } From 9b0cb35c9ea13d24f5020ae79c589a9bafb1ac20 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 3 Jan 2024 19:56:04 +0300 Subject: [PATCH 191/319] bump svd --- Cargo.lock | 39 +++++++++++++++------------------------ Cargo.toml | 4 ++-- 2 files changed, 17 insertions(+), 26 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 52fa5d4b..c7dbfb99 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -941,14 +941,14 @@ dependencies = [ [[package]] name = "regex" -version = "1.10.2" +version = "1.9.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "380b951a9c5e80ddfd6136919eef32310721aa4aacd4889a8d39124b026ab343" +checksum = "ebee201405406dbf528b8b672104ae6d6d63e6d118cb10e4d51abbc7b58044ff" dependencies = [ "aho-corasick", "memchr", - "regex-automata 0.4.3", - "regex-syntax 0.8.2", + "regex-automata 0.3.9", + "regex-syntax 0.7.5", ] [[package]] @@ -962,13 +962,13 @@ dependencies = [ [[package]] name = "regex-automata" -version = "0.4.3" +version = "0.3.9" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5f804c7828047e88b2d32e2d7fe5a105da8ee3264f01902f796c8e067dc2483f" +checksum = "59b23e92ee4318893fa3fe3e6fb365258efbfe6ac6ab30f090cdcbb7aa37efa9" dependencies = [ "aho-corasick", "memchr", - "regex-syntax 0.8.2", + "regex-syntax 0.7.5", ] [[package]] @@ -979,9 +979,9 @@ checksum = "f162c6dd7b008981e4d40210aca20b4bd0f9b60ca9271061b07f78537722f2e1" [[package]] name = "regex-syntax" -version = "0.8.2" +version = "0.7.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c08c74e62047bb2de4ff487b251e4a92e24f48745648451635cec7d591162d9f" +checksum = "dbb5fb1acd8a1a18b3dd5be62d25485eb770e05afb408a9627d14d451bae12da" [[package]] name = "reqwest" @@ -1023,12 +1023,9 @@ dependencies = [ [[package]] name = "roxmltree" -version = "0.18.1" +version = "0.19.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "862340e351ce1b271a378ec53f304a5558f7db87f3769dc655a8f6ecbb68b302" -dependencies = [ - "xmlparser", -] +checksum = "3cd14fd5e3b777a7422cca79358c57a8f6e3a703d9ac187448d0daf220c2407f" [[package]] name = "rustc-demangle" @@ -1194,9 +1191,9 @@ checksum = "73473c0e59e6d5812c5dfe2a064a6444949f089e20eec9a2e5506596494e4623" [[package]] name = "svd-parser" -version = "0.14.4" +version = "0.14.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b49637951d99ea9f89b2bfb269ff0a21b8d647d01b0bb9949987b98871548fef" +checksum = "3d17a2c2ef5aa450e80d714232a5932e7d8a39cac092e9e9ef8411bc833de3c4" dependencies = [ "anyhow", "roxmltree", @@ -1206,9 +1203,9 @@ dependencies = [ [[package]] name = "svd-rs" -version = "0.14.6" +version = "0.14.7" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "88d664449a290ecd6253d977d350cdf4026781223a72473fc55ea1e456e2b5d9" +checksum = "1c82f375efa1d0145467e6cc98fa0e4e1a3f3d497cece4bcdda247f4904a77d4" dependencies = [ "once_cell", "regex", @@ -1870,9 +1867,3 @@ dependencies = [ "cfg-if", "windows-sys 0.48.0", ] - -[[package]] -name = "xmlparser" -version = "0.13.6" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "66fee0b777b0f5ac1c69bb06d361268faafa61cd4682ae064a171c16c433e9e4" diff --git a/Cargo.toml b/Cargo.toml index 2b37e056..d827ac15 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -60,11 +60,11 @@ html-escape = "0.2" [dependencies.svd-parser] features = ["expand"] -version = "0.14.4" +version = "0.14.5" [dependencies.svd-rs] features = ["serde"] -version = "0.14.6" +version = "0.14.7" [dependencies.syn] version = "2.0" From 96a8c0da44677189b3758ab7bb77d010fe37f709 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 3 Jan 2024 20:41:31 +0300 Subject: [PATCH 192/319] remove dead code --- src/config.rs | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/src/config.rs b/src/config.rs index 82e40118..cc270fe1 100644 --- a/src/config.rs +++ b/src/config.rs @@ -163,26 +163,6 @@ impl IdentFormat { self.suffix = suffix.into(); self } - pub fn parse(s: &str) -> Result { - let mut it = s.split(":"); - match (it.next(), it.next(), it.next(), it.next()) { - (Some(prefix), Some(case), Some(suffix), None) => { - let case = match case { - "C" | "CONSTANT" => Some(Case::Constant), - "P" | "Pascal" => Some(Case::Pascal), - "S" | "snake" => Some(Case::Snake), - "_" => None, - _ => return Err(()), - }; - Ok(Self { - case, - prefix: prefix.into(), - suffix: suffix.into(), - }) - } - _ => Err(()), - } - } } #[derive(Clone, Debug, PartialEq, Eq)] From 6e1185fa714d9558b63ae2f6f0d37bdd5f6ddeaa Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 3 Jan 2024 21:07:59 +0300 Subject: [PATCH 193/319] non_exhaustive --- src/config.rs | 1 + 1 file changed, 1 insertion(+) diff --git a/src/config.rs b/src/config.rs index cc270fe1..8a359dd1 100644 --- a/src/config.rs +++ b/src/config.rs @@ -123,6 +123,7 @@ impl SourceType { serde(rename_all = "lowercase") )] #[derive(Clone, Debug, PartialEq, Eq, Default)] +#[non_exhaustive] pub enum Case { #[default] Constant, From b4c4fe2d3fb358f0c9982862708dfce8afcb5635 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 3 Jan 2024 22:18:20 +0300 Subject: [PATCH 194/319] release 0.31.4 --- CHANGELOG.md | 7 +++++-- Cargo.lock | 2 +- Cargo.toml | 2 +- 3 files changed, 7 insertions(+), 4 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index cf546140..6649d514 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,7 +7,9 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] -- Custom prefix/case/suffix for identifiers +## [v0.31.4] - 2024-01-03 + +- Custom prefix/case/suffix for identifiers (by `svd2rust.toml` config file) ## [v0.31.3] - 2023-12-25 @@ -856,7 +858,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.31.3...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.31.4...HEAD +[v0.31.4]: https://github.com/rust-embedded/svd2rust/compare/v0.31.3...v0.31.4 [v0.31.3]: https://github.com/rust-embedded/svd2rust/compare/v0.31.2...v0.31.3 [v0.31.2]: https://github.com/rust-embedded/svd2rust/compare/v0.31.1...v0.31.2 [v0.31.1]: https://github.com/rust-embedded/svd2rust/compare/v0.31.0...v0.31.1 diff --git a/Cargo.lock b/Cargo.lock index c7dbfb99..a2acfcfc 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1215,7 +1215,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.31.3" +version = "0.31.4" dependencies = [ "anyhow", "clap", diff --git a/Cargo.toml b/Cargo.toml index d827ac15..055bdfe5 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.31.3" +version = "0.31.4" readme = "README.md" rust-version = "1.70" From cd11fdf0403995fbdd834e1e9f50d6a366b0a57b Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Thu, 4 Jan 2024 08:35:03 +0300 Subject: [PATCH 195/319] cargo doc constants generation --- CHANGELOG.md | 2 ++ src/generate/register.rs | 6 +++--- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 6649d514..4e76538b 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Fix `cargo doc` constants generation + ## [v0.31.4] - 2024-01-03 - Custom prefix/case/suffix for identifiers (by `svd2rust.toml` config file) diff --git a/src/generate/register.rs b/src/generate/register.rs index af48cbdf..21fb1746 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -416,8 +416,8 @@ pub fn render_register_mod( mod_items.extend(quote! { #[doc = #doc] impl crate::Writable for #regspec_ty { - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = #zero_to_modify_fields_bitmap; - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = #one_to_modify_fields_bitmap; + const ZERO_TO_MODIFY_FIELDS_BITMAP: #rty = #zero_to_modify_fields_bitmap; + const ONE_TO_MODIFY_FIELDS_BITMAP: #rty = #one_to_modify_fields_bitmap; } }); } @@ -426,7 +426,7 @@ pub fn render_register_mod( mod_items.extend(quote! { #[doc = #doc] impl crate::Resettable for #regspec_ty { - const RESET_VALUE: Self::Ux = #rv; + const RESET_VALUE: #rty = #rv; } }); } From 810807b55c4724a50fcfc3a48f1fcfd7ba61a52c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Thu, 4 Jan 2024 11:02:57 +0100 Subject: [PATCH 196/319] make diff work on origin = fork --- .github/workflows/diff.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/diff.yml b/.github/workflows/diff.yml index c64712d9..981cc11a 100644 --- a/.github/workflows/diff.yml +++ b/.github/workflows/diff.yml @@ -8,7 +8,7 @@ jobs: runs-on: ubuntu-latest outputs: diffs: ${{ steps.regress-ci.outputs.diffs }} - if: github.event.issue.pull_request && github.event.comment.author_association == 'MEMBER' && (contains(github.event.comment.body, '\n/ci') || startsWith(github.event.comment.body, '/ci')) + if: github.event.issue.pull_request && (github.event.comment.author_association == 'MEMBER' || github.event.comment.author_association == 'OWNER') && (contains(github.event.comment.body, '\n/ci') || startsWith(github.event.comment.body, '/ci')) steps: - uses: actions/checkout@v4 From d43e1d85576dca1f2047730b89ac50112449bf50 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Thu, 4 Jan 2024 11:17:19 +0100 Subject: [PATCH 197/319] Add debug job to workflow --- .github/workflows/diff.yml | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/.github/workflows/diff.yml b/.github/workflows/diff.yml index 981cc11a..ad751b26 100644 --- a/.github/workflows/diff.yml +++ b/.github/workflows/diff.yml @@ -4,6 +4,25 @@ on: types: [created] jobs: + debug: + runs-on: ubuntu-latest + needs: [diff, generate, summary] + if: always() && (vars.ACTIONS_RUNNER_DEBUG || vars.ACTIONS_STEP_DEBUG ) + steps: + - name: echo needs + run: echo '${{ toJson(needs) }}' + - name: echo github + run: echo '${{ toJson(github) }}' + - name: echo pull request + run: echo '${{ github.event.issue.pull_request == 'true' }}' + - name: echo comment association + run: echo '${{ github.event.comment.author_association }} - ${{ github.event.comment.author_association == 'MEMBER' || github.event.comment.author_association == 'OWNER' }}' + - name: echo comment body + run: echo '${{ contains(github.event.comment.body, '\n/ci') || startsWith(github.event.comment.body, '/ci') }}' + - name: echo generate diffs + run: echo '${{ needs.generate.outputs.diffs != '{}' && needs.generate.outputs.diffs != '[]' && needs.generate.outputs.diffs != '' }}' + - name: echo generate result + run: echo '${{ needs.generate.result == 'success' }}' generate: runs-on: ubuntu-latest outputs: From adba0438eb7cb1952cef5601c9ed77625a489af4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Thu, 4 Jan 2024 13:40:40 +0100 Subject: [PATCH 198/319] fix missing move in register/cluster array iter closure --- CHANGELOG.md | 3 ++- src/generate/peripheral/accessor.rs | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 4e76538b..76eb00d0 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,7 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] -- Fix `cargo doc` constants generation +- `move` in `RegisterBlock::reg_iter` implementation (iterator of register/cluster array) +- Fix `cargo doc` constants generation ## [v0.31.4] - 2024-01-03 diff --git a/src/generate/peripheral/accessor.rs b/src/generate/peripheral/accessor.rs index 76a17b55..d074117b 100644 --- a/src/generate/peripheral/accessor.rs +++ b/src/generate/peripheral/accessor.rs @@ -190,7 +190,7 @@ impl ToTokens for RawArrayAccessor { #[doc = #doc] #[inline(always)] pub fn #name_iter(&self) -> impl Iterator { - (0..#dim).map(|n| #cast) + (0..#dim).map(move |n| #cast) } } .to_tokens(tokens); From 1bfe45166d42e72c7a136d8292e97519213c2406 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Thu, 4 Jan 2024 13:40:40 +0100 Subject: [PATCH 199/319] release 0.31.5 --- CHANGELOG.md | 5 ++++- Cargo.lock | 2 +- Cargo.toml | 2 +- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 76eb00d0..b27ed24b 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.31.5] - 2024-01-04 + - `move` in `RegisterBlock::reg_iter` implementation (iterator of register/cluster array) - Fix `cargo doc` constants generation @@ -861,7 +863,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.31.4...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.31.5...HEAD +[v0.31.5]: https://github.com/rust-embedded/svd2rust/compare/v0.31.4...v0.31.5 [v0.31.4]: https://github.com/rust-embedded/svd2rust/compare/v0.31.3...v0.31.4 [v0.31.3]: https://github.com/rust-embedded/svd2rust/compare/v0.31.2...v0.31.3 [v0.31.2]: https://github.com/rust-embedded/svd2rust/compare/v0.31.1...v0.31.2 diff --git a/Cargo.lock b/Cargo.lock index a2acfcfc..4299f182 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1215,7 +1215,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.31.4" +version = "0.31.5" dependencies = [ "anyhow", "clap", diff --git a/Cargo.toml b/Cargo.toml index 055bdfe5..b07a8b9a 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.31.4" +version = "0.31.5" readme = "README.md" rust-version = "1.70" From fa91c3966a6184b6dd873cdfc77fe59fe2f35acc Mon Sep 17 00:00:00 2001 From: gephaistos Date: Mon, 25 Dec 2023 16:30:33 +0200 Subject: [PATCH 200/319] Add `base-address-shift` configuration flag --- CHANGELOG.md | 2 ++ src/config.rs | 1 + src/generate/peripheral.rs | 4 ++-- src/main.rs | 11 +++++++++++ 4 files changed, 16 insertions(+), 2 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index b27ed24b..098ac4de 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Add `base-address-shift` config flag + ## [v0.31.5] - 2024-01-04 - `move` in `RegisterBlock::reg_iter` implementation (iterator of register/cluster array) diff --git a/src/config.rs b/src/config.rs index 8a359dd1..644e59a1 100644 --- a/src/config.rs +++ b/src/config.rs @@ -28,6 +28,7 @@ pub struct Config { pub reexport_core_peripherals: bool, pub reexport_interrupt: bool, pub ident_formats: IdentFormats, + pub base_address_shift: u64, } #[allow(clippy::upper_case_acronyms)] diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 9e50d123..5f1cae85 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -40,7 +40,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result let span = Span::call_site(); let p_ty = ident(&name, &config.ident_formats.peripheral, span); let name_str = p_ty.to_string(); - let address = util::hex(p.base_address); + let address = util::hex(p.base_address + config.base_address_shift); let description = util::respace(p.description.as_ref().unwrap_or(&p.name)); let mod_ty = name.to_snake_case_ident(span); @@ -83,7 +83,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result let description = pi.description.as_deref().unwrap_or(&p.name); let p_ty = ident(name, &config.ident_formats.peripheral, span); let name_str = p_ty.to_string(); - let address = util::hex(pi.base_address); + let address = util::hex(pi.base_address + config.base_address_shift); let p_snake = name.to_sanitized_snake_case(); snake_names.push(p_snake.to_string()); let mut feature_attribute_n = feature_attribute.clone(); diff --git a/src/main.rs b/src/main.rs index c9a6f379..6c366fea 100755 --- a/src/main.rs +++ b/src/main.rs @@ -199,6 +199,17 @@ fn run() -> Result<()> { .action(ArgAction::SetTrue) .help("Reexport interrupt macro from cortex-m-rt like crates"), ) + .arg( + Arg::new("base_address_shift") + .short('b') + .long("base-address-shift") + .alias("base_address_shift") + .action(ArgAction::Set) + .help("Add offset to all base addresses on all peripherals in the SVD file.") + .long_help("Add offset to all base addresses on all peripherals in the SVD file. +Useful for soft-cores where the peripheral address range isn't necessarily fixed. +Ignore this option if you are not building your own FPGA based soft-cores."), + ) .arg( Arg::new("log_level") .long("log") From ceecfe4fcf57a8d726bca9546a842944b5d1862a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Fri, 2 Feb 2024 01:00:27 +0100 Subject: [PATCH 201/319] remove debug --- .github/workflows/diff.yml | 19 ------------------- 1 file changed, 19 deletions(-) diff --git a/.github/workflows/diff.yml b/.github/workflows/diff.yml index ad751b26..981cc11a 100644 --- a/.github/workflows/diff.yml +++ b/.github/workflows/diff.yml @@ -4,25 +4,6 @@ on: types: [created] jobs: - debug: - runs-on: ubuntu-latest - needs: [diff, generate, summary] - if: always() && (vars.ACTIONS_RUNNER_DEBUG || vars.ACTIONS_STEP_DEBUG ) - steps: - - name: echo needs - run: echo '${{ toJson(needs) }}' - - name: echo github - run: echo '${{ toJson(github) }}' - - name: echo pull request - run: echo '${{ github.event.issue.pull_request == 'true' }}' - - name: echo comment association - run: echo '${{ github.event.comment.author_association }} - ${{ github.event.comment.author_association == 'MEMBER' || github.event.comment.author_association == 'OWNER' }}' - - name: echo comment body - run: echo '${{ contains(github.event.comment.body, '\n/ci') || startsWith(github.event.comment.body, '/ci') }}' - - name: echo generate diffs - run: echo '${{ needs.generate.outputs.diffs != '{}' && needs.generate.outputs.diffs != '[]' && needs.generate.outputs.diffs != '' }}' - - name: echo generate result - run: echo '${{ needs.generate.result == 'success' }}' generate: runs-on: ubuntu-latest outputs: From 63f5b658f91327231f2ee02b8a23773a7f661357 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Fri, 2 Feb 2024 01:01:29 +0100 Subject: [PATCH 202/319] fix incorrect handling of checking for presence of newline --- .github/workflows/diff.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.github/workflows/diff.yml b/.github/workflows/diff.yml index 981cc11a..f1200e03 100644 --- a/.github/workflows/diff.yml +++ b/.github/workflows/diff.yml @@ -8,7 +8,7 @@ jobs: runs-on: ubuntu-latest outputs: diffs: ${{ steps.regress-ci.outputs.diffs }} - if: github.event.issue.pull_request && (github.event.comment.author_association == 'MEMBER' || github.event.comment.author_association == 'OWNER') && (contains(github.event.comment.body, '\n/ci') || startsWith(github.event.comment.body, '/ci')) + if: github.event.issue.pull_request && (github.event.comment.author_association == 'MEMBER' || github.event.comment.author_association == 'OWNER') && (contains(toJson(github.event.comment.body), '\n/ci') || startsWith(github.event.comment.body, '/ci')) steps: - uses: actions/checkout@v4 From 9b8493eb09d51717517d3ee304be490bdc1d2e71 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Sat, 3 Feb 2024 21:33:21 +0100 Subject: [PATCH 203/319] use regular diff --- .github/workflows/diff.yml | 6 +++--- Cargo.toml | 7 ++++++- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/.github/workflows/diff.yml b/.github/workflows/diff.yml index f1200e03..e89e88a6 100644 --- a/.github/workflows/diff.yml +++ b/.github/workflows/diff.yml @@ -50,16 +50,16 @@ jobs: with: tool: cargo-semver-checks - # if a new line is added here, make sure to update the `summary` job to reference the new step index - uses: taiki-e/install-action@v2 with: tool: git-delta - - run: cargo regress diff --use-pager-directly ${{ matrix.command }} + # if a new line is added here, make sure to update the `summary` job to reference the new step index + - run: cargo regress diff ${{ matrix.command }} env: GH_TOKEN: ${{ github.token }} GITHUB_PR: ${{ matrix.pr }} - GIT_PAGER: delta --hunk-header-style omit + GIT_PAGER: delta --raw summary: runs-on: ubuntu-latest needs: [diff, generate] diff --git a/Cargo.toml b/Cargo.toml index b07a8b9a..61e50375 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -73,4 +73,9 @@ features = ["full","extra-traits"] [workspace] members = ["ci/svd2rust-regress"] default-members = ["."] -exclude = ["output"] +exclude = [ + "output/**", +# workaround for https://github.com/rust-lang/cargo/pull/12779 + "output/baseline/**", + "output/current/**" +] From b0f6c2c7cf840e7ab1e7119bc173554f41d62757 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Sat, 3 Feb 2024 21:34:45 +0100 Subject: [PATCH 204/319] use pr number directly --- .github/workflows/diff.yml | 8 ++++---- ci/svd2rust-regress/src/ci.rs | 4 ++-- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/.github/workflows/diff.yml b/.github/workflows/diff.yml index e89e88a6..660fbc41 100644 --- a/.github/workflows/diff.yml +++ b/.github/workflows/diff.yml @@ -25,7 +25,7 @@ jobs: id: regress-ci env: GITHUB_COMMENT: ${{ github.event.comment.body }} - GITHUB_COMMENT_PR: ${{ github.event.comment.issue_url }} + GITHUB_COMMENT_PR: ${{ github.event.issue.number }} diff: runs-on: ubuntu-latest needs: [generate] @@ -55,6 +55,7 @@ jobs: tool: git-delta # if a new line is added here, make sure to update the `summary` job to reference the new step index + - run: cargo regress diff ${{ matrix.command }} - run: cargo regress diff ${{ matrix.command }} env: GH_TOKEN: ${{ github.token }} @@ -68,9 +69,8 @@ jobs: - uses: actions/checkout@v4 - run: | - PR_ID=$(echo "${{ github.event.comment.issue_url }}" | grep -o '[0-9]\+$') gh run view ${{ github.run_id }} --json jobs | \ - jq -r '"Diff for [comment]("+$comment+")\n\n" + ([.jobs[] | select(.name | startswith("diff")) | "- [" + (.name | capture("\\((?[^,]+),.*") | .name) + "](" + .url + "?pr=" + $pr_id + "#step:7:45)"] | join("\n"))' --arg pr_id "$PR_ID" --arg comment "${{ github.event.comment.url }}"| \ - gh pr comment "$PR_ID" --body "$(< /dev/stdin)" + jq -r '"Diff for [comment]("+$comment+")\n\n" + ([.jobs[] | select(.name | startswith("diff")) | "- [" + (.name | capture("\\((?[^,]+),.*") | .name) + "](" + .url + "?pr=" + $pr_id + "#step:7:47)"] | join("\n"))' --arg pr_id "${{ github.event.issue.number }}" --arg comment "${{ github.event.comment.url }}"| \ + gh pr comment "${{ github.event.issue.number }}" --body "$(< /dev/stdin)" env: GH_TOKEN: ${{ github.token }} diff --git a/ci/svd2rust-regress/src/ci.rs b/ci/svd2rust-regress/src/ci.rs index e8c4d2b1..4e4494a0 100644 --- a/ci/svd2rust-regress/src/ci.rs +++ b/ci/svd2rust-regress/src/ci.rs @@ -11,7 +11,7 @@ pub struct Ci { #[clap(env = "GITHUB_COMMENT")] pub comment: String, #[clap(env = "GITHUB_COMMENT_PR")] - pub comment_pr: String, + pub comment_pr: usize, } #[derive(serde::Serialize)] @@ -32,7 +32,7 @@ impl Ci { diffs.push(Diff { needs_semver_checks: command.contains("semver"), command: command.to_owned(), - pr: self.comment_pr.split('/').last().unwrap().parse()?, + pr: self.comment_pr, }); } let json = serde_json::to_string(&diffs)?; From 657075285c10d2e976d9eecd8eba75b9ee6a7eed Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Sat, 3 Feb 2024 21:35:02 +0100 Subject: [PATCH 205/319] make args global --- ci/svd2rust-regress/src/diff.rs | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/ci/svd2rust-regress/src/diff.rs b/ci/svd2rust-regress/src/diff.rs index 4d3d2a81..a2e132ff 100644 --- a/ci/svd2rust-regress/src/diff.rs +++ b/ci/svd2rust-regress/src/diff.rs @@ -8,7 +8,7 @@ use crate::Opts; #[derive(clap::Parser, Debug)] #[clap(name = "diff")] pub struct Diffing { - /// The base version of svd2rust to use and the command input, defaults to latest master build + /// The base version of svd2rust to use and the command input, defaults to latest master build: `@master` /// /// Change the base version by starting with `@` followed by the source. /// @@ -16,6 +16,7 @@ pub struct Diffing { #[clap(global = true, long = "baseline", alias = "base")] pub baseline: Option, + /// The head version of svd2rust to use and the command input, defaults to current pr: `@pr` #[clap(global = true, long = "current", alias = "head")] pub current: Option, @@ -27,14 +28,12 @@ pub struct Diffing { #[clap(global = true, long)] pub form_split: bool, - #[clap(subcommand)] - pub sub: Option, - #[clap(global = true, long, short = 'c')] pub chip: Vec, /// Filter by manufacturer, case sensitive, may be combined with other filters #[clap( + global = true, short = 'm', long = "manufacturer", ignore_case = true, @@ -44,6 +43,7 @@ pub struct Diffing { /// Filter by architecture, case sensitive, may be combined with other filters #[clap( + global = true, short = 'a', long = "architecture", ignore_case = true, @@ -54,20 +54,24 @@ pub struct Diffing { #[clap(global = true, long)] pub diff_folder: Option, - #[clap(hide = true, env = "GITHUB_PR")] + /// The pr number to use for `@pr`. If not set will try to get the current pr with the command `gh pr` + #[clap(env = "GITHUB_PR", global = true, long)] pub pr: Option, - #[clap(env = "GIT_PAGER", long)] + #[clap(env = "GIT_PAGER", global = true, long)] pub pager: Option, /// if set, will use pager directly instead of `git -c core.pager` - #[clap(long, short = 'P')] + #[clap(global = true, long, short = 'P')] pub use_pager_directly: bool, /// URL for SVD to download #[clap(global = true, long)] pub url: Option, + #[clap(subcommand)] + pub sub: Option, + #[clap(last = true)] pub last_args: Option, } From b829f35eddb209348a546dca8f59987f85cb385f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Sat, 3 Feb 2024 22:12:04 +0100 Subject: [PATCH 206/319] add single chip test that can take a url ``` cargo regress test -a cortex-m --url https://raw.githubusercontent.com/cmsis-svd/cmsis-svd/9c416c5ff18e7d272a792c13bd235ebe30eef816/data/ARM_SAMPLE/CMSDK_CM3.svd ``` --- Cargo.toml | 5 +- ci/svd2rust-regress/src/main.rs | 127 ++++++++++++++++++++++++---- ci/svd2rust-regress/src/svd_test.rs | 12 +-- ci/svd2rust-regress/src/tests.rs | 2 +- 4 files changed, 122 insertions(+), 24 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index 61e50375..28418c58 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -74,8 +74,9 @@ features = ["full","extra-traits"] members = ["ci/svd2rust-regress"] default-members = ["."] exclude = [ - "output/**", -# workaround for https://github.com/rust-lang/cargo/pull/12779 + "output", + # workaround for https://github.com/rust-lang/cargo/pull/12779, doesn't work for output though + # see https://github.com/rust-lang/cargo/issues/6009#issuecomment-1925445245 "output/baseline/**", "output/current/**" ] diff --git a/ci/svd2rust-regress/src/main.rs b/ci/svd2rust-regress/src/main.rs index a8c1d246..0e0eb09a 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/ci/svd2rust-regress/src/main.rs @@ -50,7 +50,7 @@ pub fn get_cargo_workspace() -> &'static std::path::Path { } #[derive(clap::Parser, Debug)] -pub struct TestOpts { +pub struct TestAll { /// Run a long test (it's very long) #[clap(short = 'l', long)] pub long_test: bool, @@ -59,7 +59,7 @@ pub struct TestOpts { #[clap(short = 'c', long)] pub chip: Vec, - /// Filter by manufacturer, case sensitive, may be combined with other filters + /// Filter by manufacturer, may be combined with other filters #[clap( short = 'm', long = "manufacturer", @@ -68,7 +68,7 @@ pub struct TestOpts { )] pub mfgr: Option, - /// Filter by architecture, case sensitive, may be combined with other filters + /// Filter by architecture, may be combined with other filters #[clap( short = 'a', long = "architecture", @@ -104,7 +104,97 @@ pub struct TestOpts { // TODO: Compile svd2rust? } -impl TestOpts { +#[derive(clap::Parser, Debug)] +// TODO: Replace with https://github.com/clap-rs/clap/issues/2621 when available +#[group(id = "svd_source", required = true)] +pub struct Test { + /// Enable formatting with `rustfmt` + #[arg(short = 'f', long)] + pub format: bool, + + #[arg(long)] + /// Enable splitting `lib.rs` with `form` + pub form_lib: bool, + + #[arg( + short = 'm', + long = "manufacturer", + ignore_case = true, + value_parser = manufacturers(), + )] + /// Manufacturer + pub mfgr: Option, + #[arg( + short = 'a', + long = "architecture", + ignore_case = true, + value_parser = architectures(), + )] + /// Architecture + pub arch: Option, + #[arg(long, group = "svd_source", conflicts_with_all = ["svd_file"], requires = "arch")] + /// URL to SVD file to test + pub url: Option, + #[arg(long = "svd", group = "svd_source")] + /// Path to SVD file to test + pub svd_file: Option, + #[arg(long, group = "svd_source")] + /// Chip to use, use `--url` or `--svd-file` for another way to specify svd + pub chip: Option, + + /// Path to an `svd2rust` binary, relative or absolute. + /// Defaults to `target/release/svd2rust[.exe]` of this repository + /// (which must be already built) + #[clap(short = 'p', long = "svd2rust-path", default_value = default_svd2rust())] + pub current_bin_path: PathBuf, + #[clap(last = true)] + pub command: Option, +} + +impl Test { + fn run(&self, opts: &Opts) -> Result<(), anyhow::Error> { + match self { + Self { url: Some(url), .. } => {} + Self { + svd_file: Some(svd_file), + .. + } => {} + Self { + chip: Some(chip), .. + } => {} + _ => unreachable!("clap should not allow this"), + } + let test = if let (Some(url), Some(arch)) = (&self.url, &self.arch) { + tests::TestCase { + arch: svd2rust::Target::parse(&arch)?, + mfgr: tests::Manufacturer::Unknown, + chip: self + .chip + .as_deref() + .or_else(|| url.rsplit('/').next().and_then(|s| s.strip_suffix(".svd"))) + .ok_or_else(|| { + anyhow::anyhow!( + "could not figure out chip name, specify with `--chip `", + ) + })? + .to_owned(), + svd_url: Some(url.clone()), + should_pass: true, + run_when: tests::RunWhen::default(), + } + } else { + tests::tests(Some(&opts.test_cases))? + .iter() + .find(|t| self.chip.iter().any(|c| WildMatch::new(c).matches(&t.chip))) + .ok_or_else(|| anyhow::anyhow!("no test found for chip"))? + .to_owned() + }; + test.test(opts, &self.current_bin_path, self.command.as_deref())?; + Ok(()) + } +} + +impl TestAll { fn run(&self, opt: &Opts) -> Result<(), anyhow::Error> { let tests = tests::tests(Some(&opt.test_cases))? .iter() @@ -152,7 +242,7 @@ impl TestOpts { tests.par_iter().for_each(|t| { let start = Instant::now(); - match t.test(opt, self) { + match t.test(opt, &self.current_bin_path, self.command.as_deref()) { Ok(s) => { if let Some(stderrs) = s { let mut buf = String::new(); @@ -217,7 +307,8 @@ impl TestOpts { #[derive(clap::Subcommand, Debug)] pub enum Subcommand { Diff(Diffing), - Tests(TestOpts), + Tests(TestAll), + Test(Test), Ci(Ci), } @@ -256,7 +347,8 @@ pub struct Opts { impl Opts { const fn use_rustfmt(&self) -> bool { match self.subcommand { - Subcommand::Tests(TestOpts { format, .. }) + Subcommand::Tests(TestAll { format, .. }) + | Subcommand::Test(Test { format, .. }) | Subcommand::Diff(Diffing { format, .. }) | Subcommand::Ci(Ci { format, .. }) => format, } @@ -264,7 +356,8 @@ impl Opts { const fn use_form(&self) -> bool { match self.subcommand { - Subcommand::Tests(TestOpts { form_lib, .. }) + Subcommand::Tests(TestAll { form_lib, .. }) + | Subcommand::Test(Test { form_lib, .. }) | Subcommand::Diff(Diffing { form_split: form_lib, .. @@ -278,13 +371,10 @@ impl Opts { fn default_test_cases() -> std::ffi::OsString { std::env::var_os("CARGO_MANIFEST_DIR").map_or_else( || std::ffi::OsString::from("tests.yml".to_owned()), - |mut e| { - e.extend([std::ffi::OsStr::new("/tests.yml")]); - std::path::PathBuf::from(e) - .strip_prefix(std::env::current_dir().unwrap()) - .unwrap() - .to_owned() - .into_os_string() + |path| { + let path = std::path::PathBuf::from(path); + let path = path.join("tests.yml"); + path.to_owned().into_os_string() }, ) } @@ -414,6 +504,13 @@ fn main() -> Result<(), anyhow::Error> { } Subcommand::Diff(diff) => diff.run(&opt).with_context(|| "failed to run diff"), Subcommand::Ci(ci) => ci.run(&opt).with_context(|| "failed to run ci"), + Subcommand::Test(test) => { + anyhow::ensure!( + test.current_bin_path.exists(), + "svd2rust binary does not exist" + ); + test.run(&opt).with_context(|| "failed to run test") + } } } diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 7f0f290f..881fe77c 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -1,7 +1,7 @@ use anyhow::{anyhow, Context, Result}; use svd2rust::{util::ToSanitizedCase, Target}; -use crate::{command::CommandExt, tests::TestCase, Opts, TestOpts}; +use crate::{command::CommandExt, tests::TestCase, Opts, TestAll}; use std::io::prelude::*; use std::path::PathBuf; use std::process::Command; @@ -133,17 +133,18 @@ impl CommandHelper for Command { } impl TestCase { - #[tracing::instrument(skip(self, opts, test_opts), fields(name = %self.name()))] + #[tracing::instrument(skip(self, opts), fields(name = %self.name()))] pub fn test( &self, opts: &Opts, - test_opts: &TestOpts, + bin_path: &Path, + command: Option<&str>, ) -> Result>, TestError> { let (chip_dir, mut process_stderr_paths) = self .setup_case( &opts.output_dir, - &test_opts.current_bin_path, - test_opts.command.as_deref(), + bin_path, + command, ) .with_context(|| anyhow!("when setting up case for {}", self.name()))?; // Run `cargo check`, capturing stderr to a log file @@ -355,7 +356,6 @@ impl TestCase { process_stderr_paths.push(rustfmt_err_file); } - tracing::info!("Done processing"); Ok((chip_dir, process_stderr_paths)) } } diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index 040b4c78..f1562a5d 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -66,7 +66,7 @@ pub enum RunWhen { Never, } -#[derive(serde::Serialize, serde::Deserialize, Clone)] +#[derive(serde::Serialize, serde::Deserialize, Clone, Debug)] pub struct TestCase { pub arch: Target, pub mfgr: Manufacturer, From 7eb01b47dc58c3dbed4ce107cc6e332625d4aa14 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Sat, 3 Feb 2024 22:28:55 +0100 Subject: [PATCH 207/319] more information --- .github/workflows/diff.yml | 2 ++ ci/svd2rust-regress/src/svd_test.rs | 6 +----- 2 files changed, 3 insertions(+), 5 deletions(-) diff --git a/.github/workflows/diff.yml b/.github/workflows/diff.yml index 660fbc41..20b8ea50 100644 --- a/.github/workflows/diff.yml +++ b/.github/workflows/diff.yml @@ -5,6 +5,8 @@ on: jobs: generate: + name: | + Generate matrix. ${{ github.event.comment.user.name }}: ${{ github.event.comment.author_association}} runs-on: ubuntu-latest outputs: diffs: ${{ steps.regress-ci.outputs.diffs }} diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 881fe77c..8ca31f33 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -141,11 +141,7 @@ impl TestCase { command: Option<&str>, ) -> Result>, TestError> { let (chip_dir, mut process_stderr_paths) = self - .setup_case( - &opts.output_dir, - bin_path, - command, - ) + .setup_case(&opts.output_dir, bin_path, command) .with_context(|| anyhow!("when setting up case for {}", self.name()))?; // Run `cargo check`, capturing stderr to a log file let cargo_check_err_file = path_helper_base(&chip_dir, &["cargo-check.err.log"]); From 57f6bbe5730c39351efac30cd2b34e238513f9fd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Sun, 4 Feb 2024 00:47:18 +0100 Subject: [PATCH 208/319] properly split command --- Cargo.lock | 7 +++++++ ci/svd2rust-regress/Cargo.toml | 1 + ci/svd2rust-regress/src/svd_test.rs | 4 +++- 3 files changed, 11 insertions(+), 1 deletion(-) diff --git a/Cargo.lock b/Cargo.lock index 4299f182..86748504 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1158,6 +1158,12 @@ dependencies = [ "lazy_static", ] +[[package]] +name = "shell-words" +version = "1.1.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "24188a676b6ae68c3b2cb3a01be17fbf7240ce009799bb56d5b1409051e78fde" + [[package]] name = "slab" version = "0.4.9" @@ -1248,6 +1254,7 @@ dependencies = [ "serde", "serde_json", "serde_yaml", + "shell-words", "svd2rust", "syn 2.0.42", "thiserror", diff --git a/ci/svd2rust-regress/Cargo.toml b/ci/svd2rust-regress/Cargo.toml index 10709734..3b882db7 100644 --- a/ci/svd2rust-regress/Cargo.toml +++ b/ci/svd2rust-regress/Cargo.toml @@ -20,3 +20,4 @@ wildmatch = "2.1.1" which = "5.0.0" tracing = "0.1.40" tracing-subscriber = { version = "0.3.18", features = ["env-filter", "fmt"] } +shell-words = "1.1" diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 8ca31f33..6f1e0d9f 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -259,7 +259,9 @@ impl TestCase { let mut svd2rust_bin = Command::new(svd2rust_bin_path); if let Some(command) = command { if !command.is_empty() { - svd2rust_bin.arg(command); + svd2rust_bin.args( + shell_words::split(command).context("unable to split command into args")?, + ); } } svd2rust_bin From a1804424f64c39977feae94fa79e0456b710616a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Sun, 4 Feb 2024 20:44:14 +0100 Subject: [PATCH 209/319] Fix typo --- .github/workflows/diff.yml | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/.github/workflows/diff.yml b/.github/workflows/diff.yml index 20b8ea50..2ab5dc72 100644 --- a/.github/workflows/diff.yml +++ b/.github/workflows/diff.yml @@ -57,8 +57,7 @@ jobs: tool: git-delta # if a new line is added here, make sure to update the `summary` job to reference the new step index - - run: cargo regress diff ${{ matrix.command }} - - run: cargo regress diff ${{ matrix.command }} + - run: cargo regress diff --use-pager-directly ${{ matrix.command }} env: GH_TOKEN: ${{ github.token }} GITHUB_PR: ${{ matrix.pr }} From 4cdb264be1fe6703bf9338142e7a1c3eca0b6e42 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 3 Feb 2024 14:03:23 +0300 Subject: [PATCH 210/319] add ident-format option, fix identificator bugs --- .github/workflows/ci.yml | 6 +- CHANGELOG.md | 2 + Cargo.toml | 2 +- README.md | 2 +- ci/svd2rust-regress/src/svd_test.rs | 6 +- src/config.rs | 103 +++++++++++---- src/generate/device.rs | 31 +++-- src/generate/interrupt.rs | 9 +- src/generate/peripheral.rs | 142 ++++++++++++-------- src/generate/register.rs | 172 ++++++++++++++---------- src/lib.rs | 35 ++++- src/main.rs | 74 ++++++++--- src/util.rs | 196 ++++++++++++++++------------ 13 files changed, 498 insertions(+), 282 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 5d239663..0ac4693e 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -56,7 +56,7 @@ jobs: include: - { rust: stable, vendor: Atmel, options: all } - { rust: stable, vendor: Atmel, options: "" } - - { rust: stable, vendor: Freescale, options: all } + - { rust: stable, vendor: Freescale, options: "--strict --atomics" } - { rust: stable, vendor: Freescale, options: "" } - { rust: stable, vendor: Fujitsu, options: "" } - { rust: stable, vendor: Fujitsu, options: "--atomics" } @@ -80,11 +80,11 @@ jobs: - { rust: stable, vendor: Spansion, options: "--atomics" } - { rust: stable, vendor: STMicro, options: "" } - { rust: stable, vendor: STMicro, options: "--atomics" } - - { rust: stable, vendor: STM32-patched, options: "--strict --pascal-enum-values --max-cluster-size --atomics --atomics-feature atomics --impl-debug --impl-defmt defmt" } + - { rust: stable, vendor: STM32-patched, options: "--strict -f enum_value::p: --max-cluster-size --atomics --atomics-feature atomics --impl-debug --impl-defmt defmt" } - { rust: stable, vendor: Toshiba, options: all } - { rust: stable, vendor: Toshiba, options: "" } # Test MSRV - - { rust: 1.70.0, vendor: Nordic, options: "" } + - { rust: 1.74.0, vendor: Nordic, options: "" } # Use nightly for architectures which don't support stable - { rust: nightly, vendor: MSP430, options: "--atomics" } - { rust: nightly, vendor: MSP430, options: "" } diff --git a/CHANGELOG.md b/CHANGELOG.md index 098ac4de..b49cd3d4 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,7 +7,9 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Bump MSRV to 1.74 - Add `base-address-shift` config flag +- Fix case changing bugs, add `--ident-format` (`-f`) option flag ## [v0.31.5] - 2024-01-04 diff --git a/Cargo.toml b/Cargo.toml index 28418c58..b5aa0cc9 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -25,7 +25,7 @@ name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" version = "0.31.5" readme = "README.md" -rust-version = "1.70" +rust-version = "1.74" [package.metadata.deb] section = "rust" diff --git a/README.md b/README.md index d2f06d4d..f1f02e9e 100644 --- a/README.md +++ b/README.md @@ -1,5 +1,5 @@ ![GitHub top language](https://img.shields.io/github/languages/top/rust-embedded/svd2rust) -![Minimum Supported Rust Version](https://img.shields.io/badge/rustc-1.70+-blue.svg) +![Minimum Supported Rust Version](https://img.shields.io/badge/rustc-1.74+-blue.svg) [![crates.io](https://img.shields.io/crates/v/svd2rust.svg)](https://crates.io/crates/svd2rust) [![crates.io](https://img.shields.io/crates/d/svd2rust.svg)](https://crates.io/crates/svd2rust) [![Released API docs](https://docs.rs/svd2rust/badge.svg)](https://docs.rs/svd2rust) diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 6f1e0d9f..5ac8bbd9 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -1,5 +1,5 @@ use anyhow::{anyhow, Context, Result}; -use svd2rust::{util::ToSanitizedCase, Target}; +use svd2rust::{util::Case, Target}; use crate::{command::CommandExt, tests::TestCase, Opts, TestAll}; use std::io::prelude::*; @@ -176,7 +176,7 @@ impl TestCase { Ok(val) => val, Err(_) => "rusttester".into(), }; - let chip_dir = output_dir.join(self.name().to_sanitized_snake_case().as_ref()); + let chip_dir = output_dir.join(Case::Snake.sanitize(&self.name()).as_ref()); tracing::span::Span::current() .record("chip_dir", tracing::field::display(chip_dir.display())); if let Err(err) = fs::remove_dir_all(&chip_dir) { @@ -195,7 +195,7 @@ impl TestCase { .env("USER", user) .arg("init") .arg("--name") - .arg(self.name().to_sanitized_snake_case().as_ref()) + .arg(Case::Snake.sanitize(&self.name()).as_ref()) .arg("--vcs") .arg("none") .arg(&chip_dir) diff --git a/src/config.rs b/src/config.rs index 644e59a1..c188940a 100644 --- a/src/config.rs +++ b/src/config.rs @@ -1,8 +1,13 @@ use anyhow::{bail, Result}; -use std::path::{Path, PathBuf}; +use std::{ + collections::HashMap, + ops::{Deref, DerefMut}, + path::{Path, PathBuf}, +}; #[cfg_attr(feature = "serde", derive(serde::Deserialize), serde(default))] #[derive(Clone, PartialEq, Eq, Debug, Default)] +#[non_exhaustive] pub struct Config { pub target: Target, pub atomics: bool, @@ -13,7 +18,6 @@ pub struct Config { pub ignore_groups: bool, pub keep_list: bool, pub strict: bool, - pub pascal_enum_values: bool, pub feature_group: bool, pub feature_peripheral: bool, pub max_cluster_size: bool, @@ -135,6 +139,7 @@ pub enum Case { #[derive(Clone, Debug, Default, PartialEq, Eq)] #[cfg_attr(feature = "serde", derive(serde::Deserialize), serde(default))] pub struct IdentFormat { + // Ident case. `None` means don't change pub case: Option, pub prefix: String, pub suffix: String, @@ -153,8 +158,8 @@ impl IdentFormat { self.case = Some(Case::Pascal); self } - pub fn scake_case(mut self) -> Self { - self.case = Some(Case::Pascal); + pub fn snake_case(mut self) -> Self { + self.case = Some(Case::Snake); self } pub fn prefix(mut self, prefix: &str) -> Self { @@ -169,32 +174,74 @@ impl IdentFormat { #[derive(Clone, Debug, PartialEq, Eq)] #[cfg_attr(feature = "serde", derive(serde::Deserialize), serde(default))] -pub struct IdentFormats { - pub field_reader: IdentFormat, - pub field_writer: IdentFormat, - pub enum_name: IdentFormat, - pub enum_write_name: IdentFormat, - pub enum_value: IdentFormat, - pub interrupt: IdentFormat, - pub cluster: IdentFormat, - pub register: IdentFormat, - pub register_spec: IdentFormat, - pub peripheral: IdentFormat, -} +pub struct IdentFormats(HashMap); impl Default for IdentFormats { fn default() -> Self { - Self { - field_reader: IdentFormat::default().constant_case().suffix("_R"), - field_writer: IdentFormat::default().constant_case().suffix("_W"), - enum_name: IdentFormat::default().constant_case().suffix("_A"), - enum_write_name: IdentFormat::default().constant_case().suffix("_AW"), - enum_value: IdentFormat::default().constant_case(), - interrupt: IdentFormat::default().constant_case(), - cluster: IdentFormat::default().constant_case(), - register: IdentFormat::default().constant_case(), - register_spec: IdentFormat::default().constant_case().suffix("_SPEC"), - peripheral: IdentFormat::default().constant_case(), - } + let mut map = HashMap::new(); + + map.insert("field_accessor".into(), IdentFormat::default().snake_case()); + map.insert( + "field_reader".into(), + IdentFormat::default().constant_case().suffix("_R"), + ); + map.insert( + "field_writer".into(), + IdentFormat::default().constant_case().suffix("_W"), + ); + map.insert( + "enum_name".into(), + IdentFormat::default().constant_case().suffix("_A"), + ); + map.insert( + "enum_write_name".into(), + IdentFormat::default().constant_case().suffix("_AW"), + ); + map.insert("enum_value".into(), IdentFormat::default().constant_case()); + map.insert( + "enum_value_accessor".into(), + IdentFormat::default().snake_case(), + ); + map.insert("interrupt".into(), IdentFormat::default().constant_case()); + map.insert("cluster".into(), IdentFormat::default().constant_case()); + map.insert( + "cluster_accessor".into(), + IdentFormat::default().snake_case(), + ); + map.insert("cluster_mod".into(), IdentFormat::default().snake_case()); + map.insert("register".into(), IdentFormat::default().constant_case()); + map.insert( + "register_spec".into(), + IdentFormat::default().pascal_case().suffix("_SPEC"), + ); + map.insert( + "register_accessor".into(), + IdentFormat::default().snake_case(), + ); + map.insert("register_mod".into(), IdentFormat::default().snake_case()); + map.insert("peripheral".into(), IdentFormat::default().constant_case()); + map.insert( + "peripheral_singleton".into(), + IdentFormat::default().constant_case(), + ); + map.insert("peripheral_mod".into(), IdentFormat::default().snake_case()); + map.insert( + "peripheral_feature".into(), + IdentFormat::default().snake_case(), + ); + + Self(map) + } +} + +impl Deref for IdentFormats { + type Target = HashMap; + fn deref(&self) -> &Self::Target { + &self.0 + } +} +impl DerefMut for IdentFormats { + fn deref_mut(&mut self) -> &mut Self::Target { + &mut self.0 } } diff --git a/src/generate/device.rs b/src/generate/device.rs index 5251c7ba..fc87fef2 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -8,7 +8,7 @@ use std::io::Write; use std::path::Path; use crate::config::{Config, Target}; -use crate::util::{self, ident, ToSanitizedCase}; +use crate::util::{self, ident}; use anyhow::{Context, Result}; use crate::generate::{interrupt, peripheral}; @@ -192,6 +192,7 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Result Result { let p_name = util::name_of(p, config.ignore_groups); - let p_snake = p_name.to_sanitized_snake_case(); - let p_ty = ident(&p_name, &config.ident_formats.peripheral, span); + let p_feature = feature_format.apply(&p_name); + let p_ty = ident(&p_name, &config, "peripheral", span); + let p_singleton = ident(&p_name, &config, "peripheral_singleton", span); if config.feature_peripheral { - feature_attribute.extend(quote! { #[cfg(feature = #p_snake)] }) + feature_attribute.extend(quote! { #[cfg(feature = #p_feature)] }) }; fields.extend(quote! { #[doc = #p_name] #feature_attribute - pub #p_ty: #p_ty, + pub #p_singleton: #p_ty, }); - exprs.extend(quote!(#feature_attribute #p_ty: #p_ty { _marker: PhantomData },)); + exprs.extend( + quote!(#feature_attribute #p_singleton: #p_ty { _marker: PhantomData },), + ); } Peripheral::Array(p, dim_element) => { for p_name in names(p, dim_element) { - let p_snake = p_name.to_sanitized_snake_case(); - let p_ty = ident(&p_name, &config.ident_formats.peripheral, span); + let p_feature = feature_format.apply(&p_name); + let p_ty = ident(&p_name, &config, "peripheral", span); + let p_singleton = ident(&p_name, &config, "peripheral_singleton", span); if config.feature_peripheral { - feature_attribute.extend(quote! { #[cfg(feature = #p_snake)] }) + feature_attribute.extend(quote! { #[cfg(feature = #p_feature)] }) }; fields.extend(quote! { #[doc = #p_name] #feature_attribute - pub #p_ty: #p_ty, + pub #p_singleton: #p_ty, }); - exprs.extend(quote!(#feature_attribute #p_ty: #p_ty { _marker: PhantomData },)); + exprs.extend( + quote!(#feature_attribute #p_singleton: #p_ty { _marker: PhantomData },), + ); } } } diff --git a/src/generate/interrupt.rs b/src/generate/interrupt.rs index 8c1a2ed6..1c48b06e 100644 --- a/src/generate/interrupt.rs +++ b/src/generate/interrupt.rs @@ -5,7 +5,7 @@ use crate::svd::Peripheral; use proc_macro2::{Span, TokenStream}; use quote::quote; -use crate::util::{self, ident, ToSanitizedCase}; +use crate::util::{self, ident}; use crate::{Config, Target}; use anyhow::Result; @@ -47,6 +47,7 @@ pub fn render( let mut pos = 0; let mut mod_items = TokenStream::new(); let span = Span::call_site(); + let feature_format = config.ident_formats.get("peripheral_feature").unwrap(); for interrupt in &interrupts { while pos < interrupt.0.value { elements.extend(quote!(Vector { _reserved: 0 },)); @@ -54,7 +55,7 @@ pub fn render( } pos += 1; - let i_ty = ident(&interrupt.0.name, &config.ident_formats.interrupt, span); + let i_ty = ident(&interrupt.0.name, &config, "interrupt", span); let description = format!( "{} - {}", interrupt.0.value, @@ -74,13 +75,13 @@ pub fn render( let mut feature_attribute = TokenStream::new(); let mut not_feature_attribute = TokenStream::new(); if config.feature_group && interrupt.1.is_some() { - let feature_name = interrupt.1.as_ref().unwrap().to_sanitized_snake_case(); + let feature_name = feature_format.apply(interrupt.1.as_ref().unwrap()); feature_attribute_flag = true; feature_attribute.extend(quote! { #[cfg(feature = #feature_name)] }); not_feature_attribute.extend(quote! { feature = #feature_name, }); } if config.feature_peripheral { - let feature_name = interrupt.2.to_sanitized_snake_case(); + let feature_name = feature_format.apply(&interrupt.2); feature_attribute_flag = true; feature_attribute.extend(quote! { #[cfg(feature = #feature_name)] }); not_feature_attribute.extend(quote! { feature = #feature_name, }); diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 5f1cae85..bc4c3fc3 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -16,8 +16,7 @@ use quote::{quote, ToTokens}; use syn::{punctuated::Punctuated, Token}; use crate::util::{ - self, ident, name_to_ty, path_segment, type_path, unsuffixed, zst_type, FullName, - ToSanitizedCase, BITS_PER_BYTE, + self, ident, name_to_ty, path_segment, type_path, unsuffixed, zst_type, FullName, BITS_PER_BYTE, }; use anyhow::{anyhow, bail, Context, Result}; @@ -38,21 +37,26 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result let name = util::name_of(&p, config.ignore_groups); let span = Span::call_site(); - let p_ty = ident(&name, &config.ident_formats.peripheral, span); + let p_ty = ident(&name, &config, "peripheral", span); let name_str = p_ty.to_string(); let address = util::hex(p.base_address + config.base_address_shift); let description = util::respace(p.description.as_ref().unwrap_or(&p.name)); - let mod_ty = name.to_snake_case_ident(span); + let mod_ty = ident(&name, config, "peripheral_mod", span); let (derive_regs, base, path) = if let Some(path) = path { - (true, path.peripheral.to_snake_case_ident(span), path) + ( + true, + ident(&path.peripheral, config, "peripheral_mod", span), + path, + ) } else { (false, mod_ty.clone(), BlockPath::new(&p.name)) }; let mut feature_attribute = TokenStream::new(); + let feature_format = config.ident_formats.get("peripheral_feature").unwrap(); if config.feature_group && p.group_name.is_some() { - let feature_name = p.group_name.as_ref().unwrap().to_sanitized_snake_case(); + let feature_name = feature_format.apply(p.group_name.as_ref().unwrap()); feature_attribute.extend(quote! { #[cfg(feature = #feature_name)] }); }; @@ -77,22 +81,24 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result match &p { Peripheral::Array(p, dim) => { - let mut snake_names = Vec::with_capacity(dim.dim as _); + let mut feature_names = Vec::with_capacity(dim.dim as _); for pi in svd::peripheral::expand(p, dim) { let name = &pi.name; let description = pi.description.as_deref().unwrap_or(&p.name); - let p_ty = ident(name, &config.ident_formats.peripheral, span); + let p_ty = ident(name, &config, "peripheral", span); let name_str = p_ty.to_string(); + let doc_alias = (&name_str != name).then(|| quote!(#[doc(alias = #name)])); let address = util::hex(pi.base_address + config.base_address_shift); - let p_snake = name.to_sanitized_snake_case(); - snake_names.push(p_snake.to_string()); + let p_feature = feature_format.apply(name); + feature_names.push(p_feature.to_string()); let mut feature_attribute_n = feature_attribute.clone(); if config.feature_peripheral { - feature_attribute_n.extend(quote! { #[cfg(feature = #p_snake)] }) + feature_attribute_n.extend(quote! { #[cfg(feature = #p_feature)] }) }; // Insert the peripherals structure out.extend(quote! { #[doc = #description] + #doc_alias #feature_attribute_n pub struct #p_ty { _marker: PhantomData<*const ()> } @@ -132,7 +138,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result }); } - let feature_any_attribute = quote! {#[cfg(any(#(feature = #snake_names),*))]}; + let feature_any_attribute = quote! {#[cfg(any(#(feature = #feature_names),*))]}; // Derived peripherals may not require re-implementation, and will instead // use a single definition of the non-derived version. @@ -147,9 +153,9 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result } } Peripheral::Single(_) => { - let p_snake = name.to_sanitized_snake_case(); + let p_feature = feature_format.apply(&name); if config.feature_peripheral { - feature_attribute.extend(quote! { #[cfg(feature = #p_snake)] }) + feature_attribute.extend(quote! { #[cfg(feature = #p_feature)] }) }; // Insert the peripheral structure out.extend(quote! { @@ -244,7 +250,8 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result "Pushing {} register or cluster blocks into output", ercs.len() ); - let reg_block = register_or_cluster_block(&ercs, &derive_infos, None, None, config)?; + let reg_block = + register_or_cluster_block(&ercs, &derive_infos, None, "Register block", None, config)?; let open = Punct::new('{', Spacing::Alone); let close = Punct::new('}', Spacing::Alone); @@ -526,6 +533,7 @@ fn register_or_cluster_block( ercs: &[RegisterCluster], derive_infos: &[DeriveInfo], name: Option<&str>, + doc: &str, size: Option, config: &Config, ) -> Result { @@ -630,8 +638,13 @@ fn register_or_cluster_block( } }); + let mut doc_alias = None; let block_ty = if let Some(name) = name { - ident(name, &config.ident_formats.cluster, span) + let ty = ident(name, &config, "cluster", span); + if ty.to_string() != name { + doc_alias = Some(quote!(#[doc(alias = #name)])); + } + ty } else { Ident::new("RegisterBlock", span) }; @@ -645,9 +658,10 @@ fn register_or_cluster_block( }); Ok(quote! { - ///Register block #[repr(C)] #derive_debug + #[doc = #doc] + #doc_alias pub struct #block_ty { #rbfs } @@ -981,12 +995,13 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result { let doc = make_comment(cluster_size, info.address_offset, &description); - let name: Ident = info.name.to_snake_case_ident(Span::call_site()); + let name: Ident = ident(&info.name, &config, "cluster_accessor", span); let syn_field = new_syn_field(name.clone(), ty.clone()); cluster_expanded.push(RegisterBlockField { syn_field, @@ -1029,12 +1044,16 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result Result Result Result Result Result Result { let doc = make_comment(register_size, info.address_offset, &description); - let ty = name_to_ty(&ty_name); - let name = ty_name.to_snake_case_ident(Span::call_site()); + let span = Span::call_site(); + let ty = name_to_ty(ident(&ty_str, &config, "register", span)); + let name: Ident = ident(&ty_name, &config, "register_accessor", span); let syn_field = new_syn_field(name.clone(), ty.clone()); register_expanded.push(RegisterBlockField { syn_field, @@ -1191,7 +1212,7 @@ fn expand_register( // force expansion and rename if we're deriving an array that doesnt start at 0 so we don't get name collisions let index: Cow = if let Some(dim_index) = &array_info.dim_index { - dim_index.first().unwrap().into() + dim_index[0].as_str().into() } else if sequential_indexes_from0 { "0".into() } else { @@ -1210,15 +1231,19 @@ fn expand_register( }; let array_convertible = ac && sequential_addresses; let array_proxy_convertible = ac && disjoint_sequential_addresses; - let ty = name_to_ty(&ty_name); + let span = Span::call_site(); + let ty = name_to_ty(ident(&ty_str, &config, "register", span)); if array_convertible || array_proxy_convertible { - let span = Span::call_site(); - let nb_name_sc = if let Some(dim_name) = array_info.dim_name.as_ref() { - util::fullname(dim_name, &info.alternate_group, config.ignore_groups) - .to_snake_case_ident(span) + let accessor_name = if let Some(dim_name) = array_info.dim_name.as_ref() { + ident( + &util::fullname(dim_name, &info.alternate_group, config.ignore_groups), + &config, + "register_accessor", + span, + ) } else { - ty_name.to_snake_case_ident(span) + ident(&ty_name, &config, "register_accessor", span) }; let doc = make_comment( register_size * array_info.dim, @@ -1229,7 +1254,7 @@ fn expand_register( accessors.push(if array_convertible { ArrayAccessor { doc, - name: nb_name_sc.clone(), + name: accessor_name.clone(), ty: ty.clone(), offset: unsuffixed(info.address_offset), dim: unsuffixed(array_info.dim), @@ -1239,7 +1264,7 @@ fn expand_register( } else { RawArrayAccessor { doc, - name: nb_name_sc.clone(), + name: accessor_name.clone(), ty: ty.clone(), offset: unsuffixed(info.address_offset), dim: unsuffixed(array_info.dim), @@ -1249,9 +1274,12 @@ fn expand_register( }); if !sequential_indexes_from0 || !ends_with_index { for (i, ri) in svd::register::expand(info, array_info).enumerate() { - let idx_name = - util::fullname(&ri.name, &info.alternate_group, config.ignore_groups) - .to_snake_case_ident(span); + let idx_name = ident( + &util::fullname(&ri.name, &info.alternate_group, config.ignore_groups), + &config, + "cluster_accessor", + span, + ); let doc = make_comment( register_size, ri.address_offset, @@ -1263,7 +1291,7 @@ fn expand_register( doc, name: idx_name, ty: ty.clone(), - basename: nb_name_sc.clone(), + basename: accessor_name.clone(), i, } .into(), @@ -1275,7 +1303,7 @@ fn expand_register( } else { zst_type() }; - let syn_field = new_syn_field(nb_name_sc, array_ty); + let syn_field = new_syn_field(accessor_name, array_ty); register_expanded.push(RegisterBlockField { syn_field, offset: info.address_offset, @@ -1293,7 +1321,7 @@ fn expand_register( info.address_offset, ri.description.as_deref().unwrap_or(&ri.name), ); - let name = ri.name.to_snake_case_ident(Span::call_site()); + let name = ident(&ri.name, &config, "register_accessor", span); let syn_field = new_syn_field(name.clone(), ty.clone()); register_expanded.push(RegisterBlockField { @@ -1375,27 +1403,26 @@ fn cluster_block( // name_snake_case needs to take into account array type. let span = Span::call_site(); - let mod_ty = mod_name.to_snake_case_ident(span); - let block_ty = ident(&mod_name, &config.ident_formats.cluster, span); + let mod_ty = ident(&mod_name, config, "cluster_mod", span); + let block_ty = ident(&mod_name, &config, "cluster", span); if let Some(dpath) = dpath { let dparent = dpath.parent().unwrap(); let mut derived = if &dparent == path { type_path(Punctuated::new()) } else { - util::block_path_to_ty(&dparent, span) + util::block_path_to_ty(&dparent, config, span) }; let dname = util::replace_suffix(&index.clusters.get(&dpath).unwrap().name, ""); let mut mod_derived = derived.clone(); - derived.path.segments.push(path_segment(ident( - &dname, - &config.ident_formats.cluster, - span, - ))); + derived + .path + .segments + .push(path_segment(ident(&dname, &config, "cluster", span))); mod_derived .path .segments - .push(path_segment(dname.to_snake_case_ident(span))); + .push(path_segment(ident(&dname, config, "cluster_mod", span))); Ok(quote! { #[doc = #description] @@ -1418,6 +1445,7 @@ fn cluster_block( &c.children, &mod_derive_infos, Some(&mod_name), + &description, cluster_size, config, )?; diff --git a/src/generate/register.rs b/src/generate/register.rs index 21fb1746..5b75711d 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -16,13 +16,30 @@ use svd_parser::expand::{ use crate::config::Config; use crate::util::{ self, ident, ident_to_path, path_segment, replace_suffix, type_path, unsuffixed, FullName, - ToSanitizedCase, U32Ext, + U32Ext, }; use anyhow::{anyhow, Result}; use syn::punctuated::Punctuated; fn regspec(name: &str, config: &Config, span: Span) -> Ident { - ident(name, &config.ident_formats.register_spec, span) + ident(name, &config, "register_spec", span) +} + +fn field_accessor(name: &str, config: &Config, span: Span) -> Ident { + const INTERNALS: [&str; 1] = ["bits"]; + let sc = config + .ident_formats + .get("field_accessor") + .unwrap() + .sanitize(name); + Ident::new( + &(if INTERNALS.contains(&sc.as_ref()) { + sc + "_" + } else { + sc + }), + span, + ) } pub fn render( @@ -43,8 +60,9 @@ pub fn render( } } let span = Span::call_site(); - let reg_ty = ident(&name, &config.ident_formats.register, span); - let mod_ty = name.to_snake_case_ident(span); + let reg_ty = ident(&name, &config, "register", span); + let doc_alias = (®_ty.to_string() != &name).then(|| quote!(#[doc(alias = #name)])); + let mod_ty = ident(&name, config, "register_mod", span); let description = util::escape_special_chars( util::respace(®ister.description.clone().unwrap_or_else(|| { warn!("Missing description for register {}", register.name); @@ -57,19 +75,18 @@ pub fn render( let mut derived = if &dpath.block == path { type_path(Punctuated::new()) } else { - util::block_path_to_ty(&dpath.block, span) + util::block_path_to_ty(&dpath.block, config, span) }; let dname = util::name_of(index.registers.get(dpath).unwrap(), config.ignore_groups); let mut mod_derived = derived.clone(); - derived.path.segments.push(path_segment(ident( - &dname, - &config.ident_formats.register, - span, - ))); + derived + .path + .segments + .push(path_segment(ident(&dname, &config, "register", span))); mod_derived .path .segments - .push(path_segment(dname.to_snake_case_ident(span))); + .push(path_segment(ident(&dname, config, "register_mod", span))); Ok(quote! { pub use #derived as #reg_ty; @@ -107,6 +124,7 @@ pub fn render( let mut out = TokenStream::new(); out.extend(quote! { #[doc = #alias_doc] + #doc_alias pub type #reg_ty = crate::Reg<#mod_ty::#regspec_ty>; }); let mod_items = render_register_mod( @@ -201,7 +219,7 @@ pub fn render_register_mod( let name = util::name_of(register, config.ignore_groups); let span = Span::call_site(); let regspec_ty = regspec(&name, config, span); - let name_snake_case = name.to_snake_case_ident(span); + let mod_ty = ident(&name, config, "register_mod", span); let rsize = properties .size .ok_or_else(|| anyhow!("Register {} has no `size` field", register.name))?; @@ -384,7 +402,7 @@ pub fn render_register_mod( can_read, can_write, can_reset, - &name_snake_case, + &mod_ty, true, register.read_action, )? @@ -400,15 +418,14 @@ pub fn render_register_mod( }); if can_read { - let doc = format!("`read()` method returns [`{name_snake_case}::R`](R) reader structure",); + let doc = format!("`read()` method returns [`{mod_ty}::R`](R) reader structure",); mod_items.extend(quote! { #[doc = #doc] impl crate::Readable for #regspec_ty {} }); } if can_write { - let doc = - format!("`write(|w| ..)` method takes [`{name_snake_case}::W`](W) writer structure",); + let doc = format!("`write(|w| ..)` method takes [`{mod_ty}::W`](W) writer structure",); let zero_to_modify_fields_bitmap = util::hex(zero_to_modify_fields_bitmap); let one_to_modify_fields_bitmap = util::hex(one_to_modify_fields_bitmap); @@ -469,8 +486,8 @@ fn render_register_mod_debug( if field_access.can_read() && f.read_action.is_none() { if let Field::Array(_, de) = &f { for suffix in de.indexes() { - let f_name_n = util::replace_suffix(&f.name, &suffix) - .to_snake_case_ident(Span::call_site()); + let f_name_n = + field_accessor(&util::replace_suffix(&f.name, &suffix), config, span); let f_name_n_s = format!("{f_name_n}"); r_debug_impl.extend(quote! { .field(#f_name_n_s, &format_args!("{}", self.#f_name_n().#bit_or_bits())) @@ -478,7 +495,7 @@ fn render_register_mod_debug( } } else { let f_name = util::replace_suffix(&f.name, ""); - let f_name = f_name.to_snake_case_ident(span); + let f_name = field_accessor(&f_name, config, span); let f_name_s = format!("{f_name}"); r_debug_impl.extend(quote! { .field(#f_name_s, &format_args!("{}", self.#f_name().#bit_or_bits())) @@ -559,18 +576,22 @@ pub fn fields( } let name = util::replace_suffix(&f.name, ""); - let name_snake_case = if let Field::Array( - _, - DimElement { - dim_name: Some(dim_name), - .. + let name_snake_case = field_accessor( + if let Field::Array( + _, + DimElement { + dim_name: Some(dim_name), + .. + }, + ) = &f + { + dim_name + } else { + &name }, - ) = &f - { - dim_name.to_snake_case_ident(span) - } else { - name.to_snake_case_ident(span) - }; + config, + span, + ); let description_raw = f.description.as_deref().unwrap_or(""); // raw description, if absent using empty string let description = util::respace(&util::escape_special_chars(description_raw)); @@ -656,7 +677,8 @@ pub fn fields( { ident( evs.name.as_deref().unwrap_or(&name), - &config.ident_formats.enum_name, + &config, + "enum_name", span, ) } else { @@ -665,7 +687,7 @@ pub fn fields( }; // name of read proxy type - let reader_ty = ident(&name, &config.ident_formats.field_reader, span); + let reader_ty = ident(&name, &config, "field_reader", span); // if it's enumeratedValues and it's derived from base, don't derive the read proxy // as the base has already dealt with this; @@ -826,16 +848,7 @@ pub fn fields( // for each variant defined, we generate an `is_variant` function. for v in &variants { let pc = &v.pc; - let sc = &v.nksc; - - let is_variant = Ident::new( - &if sc.to_string().starts_with('_') { - format!("is{sc}") - } else { - format!("is_{sc}") - }, - span, - ); + let is_variant = &v.is_sc; let doc = util::escape_special_chars(&util::respace(&v.doc)); enum_items.extend(quote! { @@ -848,16 +861,7 @@ pub fn fields( } if let Some(v) = def.as_ref() { let pc = &v.pc; - let sc = &v.nksc; - - let is_variant = Ident::new( - &if sc.to_string().starts_with('_') { - format!("is{sc}") - } else { - format!("is_{sc}") - }, - span, - ); + let is_variant = &v.is_sc; let doc = util::escape_special_chars(&util::respace(&v.doc)); enum_items.extend(quote! { @@ -878,9 +882,9 @@ pub fn fields( evs_r = Some(evs); // generate pub use field_1 reader as field_2 reader let base_field = util::replace_suffix(&base.field.name, ""); - let base_r = ident(&base_field, &config.ident_formats.field_reader, span); + let base_r = ident(&base_field, &config, "field_reader", span); if !reader_derives.contains(&reader_ty) { - let base_path = base_syn_path(base, &fpath, &base_r)?; + let base_path = base_syn_path(base, &fpath, &base_r, config)?; mod_items.extend(quote! { #[doc = #field_reader_brief] pub use #base_path as #reader_ty; @@ -892,7 +896,7 @@ pub fn fields( if base.register() != fpath.register() { // use the same enum structure name if !enum_derives.contains(&value_read_ty) { - let base_path = base_syn_path(base, &fpath, &value_read_ty)?; + let base_path = base_syn_path(base, &fpath, &value_read_ty, config)?; mod_items.extend(quote! { #[doc = #description] pub use #base_path as #value_read_ty; @@ -944,7 +948,7 @@ pub fn fields( } else { value }; - let name_snake_case_n = fi.name.to_snake_case_ident(Span::call_site()); + let name_snake_case_n = field_accessor(&fi.name, config, span); let doc = description_with_bits( fi.description.as_deref().unwrap_or(&fi.name), sub_offset, @@ -990,18 +994,18 @@ pub fn fields( if let Some((evs, _)) = lookup_filter(&lookup_results, Usage::Write) { let writer_reader_different_enum = evs_r != Some(evs); let fmt = if writer_reader_different_enum { - &config.ident_formats.enum_write_name + "enum_write_name" } else { - &config.ident_formats.enum_name + "enum_name" }; - ident(evs.name.as_deref().unwrap_or(&name), fmt, span) + ident(evs.name.as_deref().unwrap_or(&name), &config, fmt, span) } else { // raw_field_value_write_ty fty.clone() }; // name of write proxy type - let writer_ty = ident(&name, &config.ident_formats.field_writer, span); + let writer_ty = ident(&name, &config, "field_writer", span); let mut proxy_items = TokenStream::new(); let mut unsafety = unsafety(f.write_constraint.as_ref(), width); @@ -1153,9 +1157,9 @@ pub fn fields( // generate pub use field_1 writer as field_2 writer let base_field = util::replace_suffix(&base.field.name, ""); - let base_w = ident(&base_field, &config.ident_formats.field_writer, span); + let base_w = ident(&base_field, &config, "field_writer", span); if !writer_derives.contains(&writer_ty) { - let base_path = base_syn_path(base, &fpath, &base_w)?; + let base_path = base_syn_path(base, &fpath, &base_w, config)?; mod_items.extend(quote! { #[doc = #field_writer_brief] pub use #base_path as #writer_ty; @@ -1168,7 +1172,7 @@ pub fn fields( if writer_reader_different_enum { // use the same enum structure name if !writer_enum_derives.contains(&value_write_ty) { - let base_path = base_syn_path(base, &fpath, &value_write_ty)?; + let base_path = base_syn_path(base, &fpath, &value_write_ty, config)?; mod_items.extend(quote! { #[doc = #description] pub use #base_path as #value_write_ty; @@ -1201,7 +1205,7 @@ pub fn fields( for fi in svd::field::expand(f, de) { let sub_offset = fi.bit_offset() as u64; - let name_snake_case_n = &fi.name.to_snake_case_ident(Span::call_site()); + let name_snake_case_n = field_accessor(&fi.name, config, span); let doc = description_with_bits( fi.description.as_deref().unwrap_or(&fi.name), sub_offset, @@ -1274,7 +1278,7 @@ fn unsafety(write_constraint: Option<&WriteConstraint>, width: u32) -> bool { struct Variant { doc: String, pc: Ident, - nksc: Ident, + is_sc: Ident, sc: Ident, value: u64, } @@ -1296,16 +1300,34 @@ impl Variant { } fn from_value(value: u64, ev: &EnumeratedValue, config: &Config) -> Result { let span = Span::call_site(); - let nksc = ev.name.to_sanitized_not_keyword_snake_case(); - let sc = util::sanitize_keyword(nksc.clone()); + let case = config.ident_formats.get("enum_value_accessor").unwrap(); + let nksc = case.apply(&ev.name); + let is_sc = Ident::new( + &if nksc.to_string().starts_with('_') { + format!("is{nksc}") + } else { + format!("is_{nksc}") + }, + span, + ); + let sc = case.sanitize(&ev.name); + const INTERNALS: [&str; 4] = ["set_bit", "clear_bit", "bit", "bits"]; + let sc = Ident::new( + &(if INTERNALS.contains(&sc.as_ref()) { + sc + "_" + } else { + sc + }), + span, + ); Ok(Variant { doc: ev .description .clone() .unwrap_or_else(|| format!("`{value:b}`")), - pc: ident(&ev.name, &config.ident_formats.enum_value, span), - nksc: Ident::new(&nksc, span), - sc: Ident::new(&sc, span), + pc: ident(&ev.name, &config, "enum_value", span), + is_sc, + sc, value, }) } @@ -1455,6 +1477,7 @@ fn base_syn_path( base: &EnumPath, fpath: &FieldPath, base_ident: &Ident, + config: &Config, ) -> Result { let span = Span::call_site(); let path = if base.register() == fpath.register() { @@ -1462,11 +1485,16 @@ fn base_syn_path( } else if base.register().block == fpath.register().block { let mut segments = Punctuated::new(); segments.push(path_segment(Ident::new("super", span))); - segments.push(path_segment(base.register().name.to_snake_case_ident(span))); + segments.push(path_segment(ident( + &replace_suffix(&base.register().name, ""), + config, + "register_mod", + span, + ))); segments.push(path_segment(base_ident.clone())); type_path(segments) } else { - let mut rmod_ = crate::util::register_path_to_ty(base.register(), span); + let mut rmod_ = crate::util::register_path_to_ty(base.register(), config, span); rmod_.path.segments.push(path_segment(base_ident.clone())); rmod_ }; diff --git a/src/lib.rs b/src/lib.rs index 251d7e8e..d056996d 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -548,6 +548,30 @@ //! //! The `--impl-defmt` flag can also be specified to include `defmt::Format` implementations conditionally //! behind the supplied feature name. +//! +//! ## the `--ident-format` flag +//! +//! The `--ident-format type:prefix:case:suffix` (`-f`) flag can also be specified if you want to change +//! default behavior of formatting rust structure and enum names, register access methods, etc. +//! Passingle multiple flags is supported. +//! Supported cases are `snake_case` (pass `snake` or `s`), `PascalCase` (pass `pascal` or `p`), +//! `CONSTANT_CASE` (pass `constant` or `c`) and `leave_CASE_as_in_SVD` (pass `unchanged` or ``). +//! +//! There are identificator formats by default in the table. +//! +//! | IdentifierType | Prefix | Case 0.31 | Suffix | +//! |----------------------------------------------------------------------------------|:------:|:---------:|:-----------:| +//! | field_reader | | constant | _R | +//! | field_writer | | constant | _W | +//! | enum_name | | constant | _A | +//! | enum_write_name | | constant | _AW | +//! | enum_value | | constant | | +//! | interrupt | | constant | | +//! | peripheral_singleton | | constant | | +//! | peripheral
register
cluster | | constant | | +//! | register_spec | | constant | _SPEC | +//! | cluster_accessor
register_accessor
field_accessor
enum_value_accessor | | snake | | +//! | cluster_mod
register_mod
peripheral_mod | | snake | | #![recursion_limit = "128"] use quote::quote; @@ -573,6 +597,8 @@ pub struct DeviceSpecific { use anyhow::{Context, Result}; +use crate::config::IdentFormats; + #[derive(Debug, thiserror::Error)] pub enum SvdError { #[error("Cannot format crate")] @@ -585,10 +611,15 @@ pub enum SvdError { pub fn generate(input: &str, config: &Config) -> Result { use std::fmt::Write; - let device = load_from(input, config)?; + let mut config = config.clone(); + let mut ident_formats = IdentFormats::default(); + ident_formats.extend(config.ident_formats.drain()); + config.ident_formats = ident_formats; + + let device = load_from(input, &config)?; let mut device_x = String::new(); let items = - generate::device::render(&device, config, &mut device_x).map_err(SvdError::Render)?; + generate::device::render(&device, &config, &mut device_x).map_err(SvdError::Render)?; let mut lib_rs = String::new(); writeln!( diff --git a/src/main.rs b/src/main.rs index 6c366fea..b4d02e94 100755 --- a/src/main.rs +++ b/src/main.rs @@ -1,6 +1,8 @@ #![recursion_limit = "128"] -use log::{debug, error, info}; +use log::{debug, error, info, warn}; +use svd2rust::config::IdentFormats; +use svd2rust::util::{Case, IdentFormat}; use std::io::Write; use std::process; @@ -18,6 +20,7 @@ use svd2rust::{ fn parse_configs(app: Command) -> Result { use irx_config::parsers::{cmd, toml}; use irx_config::ConfigBuilder; + let ident_formats = app.clone().get_matches(); let irxconfig = ConfigBuilder::default() .append_parser(cmd::ParserBuilder::new(app).exit_on_error(true).build()?) .append_parser( @@ -29,7 +32,41 @@ fn parse_configs(app: Command) -> Result { ) .load()?; - irxconfig.get().map_err(Into::into) + let mut config: Config = irxconfig.get()?; + let mut idf = IdentFormats::default(); + idf.extend(config.ident_formats.drain()); + config.ident_formats = idf; + + if let Some(ident_formats) = ident_formats.get_many::("ident_format") { + for f in ident_formats { + let mut f = f.split(":"); + if let (Some(n), Some(p), Some(c), Some(s)) = (f.next(), f.next(), f.next(), f.next()) { + let case = match c { + "" | "unchanged" | "svd" => None, + "p" | "pascal" | "type" => Some(Case::Pascal), + "s" | "snake" | "lower" => Some(Case::Snake), + "c" | "constant" | "upper" => Some(Case::Constant), + _ => { + warn!("Ident case `{c}` is unknown"); + continue; + } + }; + if let std::collections::hash_map::Entry::Occupied(mut e) = + config.ident_formats.entry(n.into()) + { + e.insert(IdentFormat { + case, + prefix: p.into(), + suffix: s.into(), + }); + } else { + warn!("Ident format name `{n}` is unknown"); + } + } + } + } + + Ok(config) } fn run() -> Result<()> { @@ -119,6 +156,19 @@ fn run() -> Result<()> { .action(ArgAction::SetTrue) .help("Use independent cfg feature flags for each peripheral"), ) + .arg( + Arg::new("ident_format") + .long("ident-format") + .short('f') + .alias("ident_format") + .action(ArgAction::Append) + .long_help( +format!("Specify `-f type:prefix:case:suffix` to change default ident formatting. +Allowed values of `type` are {:?}. +Allowed cases are `unchanged` (''), `pascal` ('p'), `constant` ('c') and `snake` ('s'). +", IdentFormats::default().keys().collect::>()) +), + ) .arg( Arg::new("max_cluster_size") .long("max-cluster-size") @@ -171,14 +221,6 @@ fn run() -> Result<()> { .action(ArgAction::SetTrue) .help("Make advanced checks due to parsing SVD"), ) - // TODO: deprecate - .arg( - Arg::new("pascal_enum_values") - .long("pascal-enum-values") - .alias("pascal_enum_values") - .action(ArgAction::SetTrue) - .help("Use PascalCase in stead of CONSTANT_CASE for enumerated values"), - ) .arg( Arg::new("source_type") .long("source-type") @@ -260,9 +302,6 @@ Ignore this option if you are not building your own FPGA based soft-cores."), config.source_type = SourceType::from_path(file) } let path = config.output_dir.as_deref().unwrap_or(Path::new(".")); - if config.pascal_enum_values { - config.ident_formats.enum_value.case = Some(svd2rust::config::Case::Pascal); - } info!("Parsing device from SVD file"); let device = load_from(input, &config)?; @@ -292,14 +331,15 @@ Ignore this option if you are not building your own FPGA based soft-cores."), } if config.feature_group || config.feature_peripheral { + let feature_format = config.ident_formats.get("peripheral_feature").unwrap(); let mut features = Vec::new(); if config.feature_group { features.extend( - util::group_names(&device) + util::group_names(&device, &feature_format) .iter() .map(|s| format!("{s} = []\n")), ); - let add_groups: Vec<_> = util::group_names(&device) + let add_groups: Vec<_> = util::group_names(&device, &feature_format) .iter() .map(|s| format!("\"{s}\"")) .collect(); @@ -307,11 +347,11 @@ Ignore this option if you are not building your own FPGA based soft-cores."), } if config.feature_peripheral { features.extend( - util::peripheral_names(&device) + util::peripheral_names(&device, &feature_format) .iter() .map(|s| format!("{s} = []\n")), ); - let add_peripherals: Vec<_> = util::peripheral_names(&device) + let add_peripherals: Vec<_> = util::peripheral_names(&device, &feature_format) .iter() .map(|s| format!("\"{s}\"")) .collect(); diff --git a/src/util.rs b/src/util.rs index fd80df55..2468084b 100644 --- a/src/util.rs +++ b/src/util.rs @@ -1,7 +1,10 @@ use std::borrow::Cow; pub use crate::config::{Case, IdentFormat}; -use crate::svd::{Access, Device, Field, RegisterInfo, RegisterProperties}; +use crate::{ + svd::{Access, Device, Field, RegisterInfo, RegisterProperties}, + Config, +}; use html_escape::encode_text_minimal; use inflections::Inflect; use proc_macro2::{Ident, Span, TokenStream}; @@ -21,6 +24,41 @@ pub const BITS_PER_BYTE: u32 = 8; /// that are not valid in Rust ident const BLACKLIST_CHARS: &[char] = &['(', ')', '[', ']', '/', ' ', '-']; +fn to_pascal_case(s: &str) -> String { + if !s.contains('_') { + s.to_pascal_case() + } else { + let mut string = String::new(); + let mut parts = s.split('_').peekable(); + if let Some(&"") = parts.peek() { + string.push('_'); + } + loop { + if let Some(p) = parts.next() { + if p.is_empty() { + continue; + } + string.push_str(&p.to_pascal_case()); + match parts.peek() { + Some(nxt) + if p.ends_with(|s: char| s.is_numeric()) + && nxt.starts_with(|s: char| s.is_numeric()) => + { + string.push('_'); + } + Some(&"") => { + string.push('_'); + } + _ => {} + } + } else { + break; + } + } + string + } +} + impl Case { pub fn cow_to_case<'a>(&self, cow: Cow<'a, str>) -> Cow<'a, str> { match self { @@ -30,7 +68,7 @@ impl Case { }, Self::Pascal => match cow { Cow::Borrowed(s) if s.is_pascal_case() => cow, - _ => cow.to_pascal_case().into(), + _ => to_pascal_case(&cow).into(), }, Self::Snake => match cow { Cow::Borrowed(s) if s.is_snake_case() => cow, @@ -53,78 +91,49 @@ fn sanitize(s: &str) -> Cow<'_, str> { } } -pub fn ident(name: &str, fmt: &IdentFormat, span: Span) -> Ident { - let name = match &fmt.case { - Some(Case::Constant) => name.to_sanitized_constant_case(), - Some(Case::Pascal) => name.to_sanitized_pascal_case(), - Some(Case::Snake) => name.to_sanitized_snake_case(), - _ => sanitize(name), - }; - Ident::new(&format!("{}{}{}", fmt.prefix, name, fmt.suffix), span) -} - -/// Convert self string into specific case without overlapping to svd2rust internal names -pub trait ToSanitizedCase { - /// Convert self into PascalCase. - /// - /// Use on name of enumeration values. - fn to_sanitized_pascal_case(&self) -> Cow; - fn to_pascal_case_ident(&self, span: Span) -> Ident { - Ident::new(&self.to_sanitized_pascal_case(), span) - } - /// Convert self into CONSTANT_CASE. - /// - /// Use on name of reader structs, writer structs and enumerations. - fn to_sanitized_constant_case(&self) -> Cow; - fn to_constant_case_ident(&self, span: Span) -> Ident { - Ident::new(&self.to_sanitized_constant_case(), span) - } - /// Convert self into snake_case, must use only if the target is used with extra prefix or suffix. - fn to_sanitized_not_keyword_snake_case(&self) -> Cow; // snake_case - /// Convert self into snake_case target and ensure target is not a Rust keyword. - /// - /// If the sanitized target is a Rust keyword, this function adds an underline `_` - /// to it. - /// - /// Use on name of peripheral modules, register modules and field modules. - fn to_sanitized_snake_case(&self) -> Cow { - let s = self.to_sanitized_not_keyword_snake_case(); - sanitize_keyword(s) - } - fn to_snake_case_ident(&self, span: Span) -> Ident { - Ident::new(&self.to_sanitized_snake_case(), span) - } +pub fn ident(name: &str, config: &Config, fmt: &str, span: Span) -> Ident { + Ident::new( + &config + .ident_formats + .get(fmt) + .expect("Missing {fmt} entry") + .sanitize(name), + span, + ) } -impl ToSanitizedCase for str { - fn to_sanitized_pascal_case(&self) -> Cow { - let s = Case::Pascal.sanitize(self); - if s.as_bytes().first().unwrap_or(&0).is_ascii_digit() { - Cow::from(format!("_{}", s)) +impl IdentFormat { + pub fn apply<'a>(&self, name: &'a str) -> Cow<'a, str> { + let name = match &self.case { + Some(case) => case.sanitize(name), + _ => sanitize(name), + }; + if self.prefix.is_empty() && self.suffix.is_empty() { + name } else { - s + format!("{}{}{}", self.prefix, name, self.suffix).into() } } - fn to_sanitized_constant_case(&self) -> Cow { - let s = Case::Constant.sanitize(self); - if s.as_bytes().first().unwrap_or(&0).is_ascii_digit() { + pub fn sanitize<'a>(&self, name: &'a str) -> Cow<'a, str> { + let s = self.apply(name); + let s = if s.as_bytes().first().unwrap_or(&0).is_ascii_digit() { Cow::from(format!("_{}", s)) } else { s + }; + match self.case { + Some(Case::Snake) | None => sanitize_keyword(s), + _ => s, } } - fn to_sanitized_not_keyword_snake_case(&self) -> Cow { - const INTERNALS: [&str; 4] = ["set_bit", "clear_bit", "bit", "bits"]; - - let s = Case::Snake.sanitize(self); - if s.as_bytes().first().unwrap_or(&0).is_ascii_digit() { - format!("_{}", s).into() - } else if INTERNALS.contains(&s.as_ref()) { - s + "_" - } else { - s - } - } +} + +pub fn ident_str(name: &str, fmt: &IdentFormat) -> String { + let name = match &fmt.case { + Some(case) => case.sanitize(name), + _ => sanitize(name), + }; + format!("{}{}{}", fmt.prefix, name, fmt.suffix) } pub fn sanitize_keyword(sc: Cow) -> Cow { @@ -281,28 +290,43 @@ pub fn zst_type() -> Type { }) } -pub fn name_to_ty(name: &str) -> Type { - let span = Span::call_site(); +pub fn name_to_ty(name: Ident) -> Type { let mut segments = Punctuated::new(); - segments.push(path_segment(name.to_constant_case_ident(span))); + segments.push(path_segment(name)); syn::Type::Path(type_path(segments)) } -pub fn block_path_to_ty(bpath: &svd_parser::expand::BlockPath, span: Span) -> TypePath { +pub fn block_path_to_ty( + bpath: &svd_parser::expand::BlockPath, + config: &Config, + span: Span, +) -> TypePath { let mut segments = Punctuated::new(); segments.push(path_segment(Ident::new("crate", span))); - segments.push(path_segment(bpath.peripheral.to_snake_case_ident(span))); + segments.push(path_segment(ident( + &bpath.peripheral, + config, + "peripheral_mod", + span, + ))); for ps in &bpath.path { - segments.push(path_segment(ps.to_snake_case_ident(span))); + segments.push(path_segment(ident(&ps, config, "cluster_mod", span))); } type_path(segments) } -pub fn register_path_to_ty(rpath: &svd_parser::expand::RegisterPath, span: Span) -> TypePath { - let mut p = block_path_to_ty(&rpath.block, span); - p.path - .segments - .push(path_segment(rpath.name.to_snake_case_ident(span))); +pub fn register_path_to_ty( + rpath: &svd_parser::expand::RegisterPath, + config: &Config, + span: Span, +) -> TypePath { + let mut p = block_path_to_ty(&rpath.block, config, span); + p.path.segments.push(path_segment(ident( + &rpath.name, + config, + "register_mod", + span, + ))); p } @@ -436,32 +460,40 @@ impl FullName for PeripheralInfo { } } -pub fn group_names(d: &Device) -> Vec> { +pub fn group_names<'a>(d: &'a Device, feature_format: &'a IdentFormat) -> Vec> { let set: HashSet<_> = d .peripherals .iter() .filter_map(|p| p.group_name.as_ref()) - .map(|name| name.to_sanitized_snake_case()) + .map(|name| feature_format.apply(name)) .collect(); let mut v: Vec<_> = set.into_iter().collect(); v.sort(); v } -pub fn peripheral_names(d: &Device) -> Vec { +pub fn peripheral_names(d: &Device, feature_format: &IdentFormat) -> Vec { let mut v = Vec::new(); for p in &d.peripherals { match p { Peripheral::Single(info) => { - v.push(replace_suffix(&info.name.to_sanitized_snake_case(), "")); + v.push(replace_suffix(&feature_format.apply(&info.name), "")); } Peripheral::Array(info, dim) => { - v.extend( - svd_rs::array::names(info, dim).map(|n| n.to_sanitized_snake_case().into()), - ); + v.extend(svd_rs::array::names(info, dim).map(|n| feature_format.apply(&n).into())); } } } v.sort(); v } + +#[test] +fn pascalcase() { + assert_eq!(to_pascal_case("_reserved"), "_Reserved"); + assert_eq!(to_pascal_case("_FOO_BAR_"), "_FooBar_"); + assert_eq!(to_pascal_case("FOO_BAR1"), "FooBar1"); + assert_eq!(to_pascal_case("FOO_BAR_1"), "FooBar1"); + assert_eq!(to_pascal_case("FOO_BAR_1_2"), "FooBar1_2"); + assert_eq!(to_pascal_case("FOO_BAR_1_2_"), "FooBar1_2_"); +} From c2420ca19ca14f85e73fd64d6ce370356a13d7bd Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 23 Dec 2023 14:18:38 +0300 Subject: [PATCH 211/319] generic safe/unsafe W::bits --- CHANGELOG.md | 1 + src/generate/generic.rs | 28 ++++++++++++++++++-- src/generate/register.rs | 57 +++++++++++++--------------------------- 3 files changed, 45 insertions(+), 41 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index b49cd3d4..60eb6221 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -8,6 +8,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] - Bump MSRV to 1.74 +- generic unsafe `W::bits` + safe `W::set` - Add `base-address-shift` config flag - Fix case changing bugs, add `--ident-format` (`-f`) option flag diff --git a/src/generate/generic.rs b/src/generate/generic.rs index 186d3364..1932f97a 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -67,6 +67,9 @@ pub trait Readable: RegisterSpec {} /// /// Registers marked with `Readable` can be also be `modify`'ed. pub trait Writable: RegisterSpec { + /// Is it safe to write any bits to register + type Safety; + /// Specifies the register bits that are not changed if you pass `1` and are changed if you pass `0` const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux; @@ -390,6 +393,27 @@ where /// Used as an argument to the closures in the `write` and `modify` methods of the register. pub type W = raw::W; +impl W { + /// Writes raw bits to the register. + /// + /// # Safety + /// + /// Passing incorrect value can cause undefined behaviour. See reference manual + #[inline(always)] + pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self { + self.bits = bits; + self + } +} +impl W where REG: Writable { + /// Writes raw bits to the register. + #[inline(always)] + pub fn set(&mut self, bits: REG::Ux) -> &mut Self { + self.bits = bits; + self + } +} + /// Field reader. /// /// Result of the `read` methods of fields. @@ -445,9 +469,9 @@ impl BitReader { } } -#[doc(hidden)] +/// Marker for register/field writers which can take any value of specified width pub struct Safe; -#[doc(hidden)] +/// You should check that value is allowed to pass to register/field writer marked with this pub struct Unsafe; /// Write field Proxy with unsafe `bits` diff --git a/src/generate/register.rs b/src/generate/register.rs index 5b75711d..9bfddf30 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -26,7 +26,7 @@ fn regspec(name: &str, config: &Config, span: Span) -> Ident { } fn field_accessor(name: &str, config: &Config, span: Span) -> Ident { - const INTERNALS: [&str; 1] = ["bits"]; + const INTERNALS: [&str; 2] = ["bits", "set"]; let sc = config .ident_formats .get("field_accessor") @@ -355,44 +355,6 @@ pub fn render_register_mod( mod_items.extend(w_impl_items); - // the writer can be safe if: - // * there is a single field that covers the entire register - // * that field can represent all values - // * the write constraints of the register allow full range of values - let can_write_safe = !unsafety( - register - .fields - .as_ref() - .and_then(|fields| fields.first()) - .and_then(|field| field.write_constraint) - .as_ref(), - rsize, - ) || !unsafety(register.write_constraint.as_ref(), rsize); - - if can_write_safe { - mod_items.extend(quote! { - #[doc = "Writes raw bits to the register."] - #[inline(always)] - pub fn bits(&mut self, bits: #rty) -> &mut Self { - self.bits = bits; - self - } - }); - } else { - mod_items.extend(quote! { - /// Writes raw bits to the register. - /// - /// # Safety - /// - /// Passing incorrect value can cause undefined behaviour. See reference manual - #[inline(always)] - pub unsafe fn bits(&mut self, bits: #rty) -> &mut Self { - self.bits = bits; - self - } - }); - } - close.to_tokens(&mut mod_items); } @@ -425,6 +387,22 @@ pub fn render_register_mod( }); } if can_write { + // the writer can be safe if: + // * there is a single field that covers the entire register + // * that field can represent all values + // * the write constraints of the register allow full range of values + let can_write_safe = !unsafety( + register + .fields + .as_ref() + .and_then(|fields| fields.first()) + .and_then(|field| field.write_constraint) + .as_ref(), + rsize, + ) || !unsafety(register.write_constraint.as_ref(), rsize); + let safe_ty = if can_write_safe { "Safe" } else { "Unsafe" }; + let safe_ty = Ident::new(safe_ty, span); + let doc = format!("`write(|w| ..)` method takes [`{mod_ty}::W`](W) writer structure",); let zero_to_modify_fields_bitmap = util::hex(zero_to_modify_fields_bitmap); @@ -433,6 +411,7 @@ pub fn render_register_mod( mod_items.extend(quote! { #[doc = #doc] impl crate::Writable for #regspec_ty { + type Safety = crate::#safe_ty; const ZERO_TO_MODIFY_FIELDS_BITMAP: #rty = #zero_to_modify_fields_bitmap; const ONE_TO_MODIFY_FIELDS_BITMAP: #rty = #one_to_modify_fields_bitmap; } From 29ad43c5be869aedd993113a8d8a80056d217066 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Sat, 17 Feb 2024 22:35:32 +0100 Subject: [PATCH 212/319] fix warnings in regress --- ci/svd2rust-regress/src/main.rs | 11 ++++------- ci/svd2rust-regress/src/svd_test.rs | 2 +- 2 files changed, 5 insertions(+), 8 deletions(-) diff --git a/ci/svd2rust-regress/src/main.rs b/ci/svd2rust-regress/src/main.rs index 0e0eb09a..4d32f1ac 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/ci/svd2rust-regress/src/main.rs @@ -154,19 +154,16 @@ pub struct Test { impl Test { fn run(&self, opts: &Opts) -> Result<(), anyhow::Error> { match self { - Self { url: Some(url), .. } => {} + Self { url: Some(_), .. } => {} Self { - svd_file: Some(svd_file), - .. - } => {} - Self { - chip: Some(chip), .. + svd_file: Some(_), .. } => {} + Self { chip: Some(_), .. } => {} _ => unreachable!("clap should not allow this"), } let test = if let (Some(url), Some(arch)) = (&self.url, &self.arch) { tests::TestCase { - arch: svd2rust::Target::parse(&arch)?, + arch: svd2rust::Target::parse(arch)?, mfgr: tests::Manufacturer::Unknown, chip: self .chip diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 5ac8bbd9..13bb6648 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -1,7 +1,7 @@ use anyhow::{anyhow, Context, Result}; use svd2rust::{util::Case, Target}; -use crate::{command::CommandExt, tests::TestCase, Opts, TestAll}; +use crate::{command::CommandExt, tests::TestCase, Opts}; use std::io::prelude::*; use std::path::PathBuf; use std::process::Command; From 2176940c77b9dc7c683fcd2564d036fffd4a0ab3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Sat, 17 Feb 2024 22:37:58 +0100 Subject: [PATCH 213/319] apply clippy suggestions --- src/generate/device.rs | 8 ++++---- src/generate/interrupt.rs | 2 +- src/generate/peripheral.rs | 36 ++++++++++++++++++------------------ src/generate/register.rs | 22 +++++++++++----------- src/main.rs | 10 +++++----- src/util.rs | 34 +++++++++++++++------------------- 6 files changed, 54 insertions(+), 58 deletions(-) diff --git a/src/generate/device.rs b/src/generate/device.rs index fc87fef2..25d6bdd2 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -236,8 +236,8 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result { let p_name = util::name_of(p, config.ignore_groups); let p_feature = feature_format.apply(&p_name); - let p_ty = ident(&p_name, &config, "peripheral", span); - let p_singleton = ident(&p_name, &config, "peripheral_singleton", span); + let p_ty = ident(&p_name, config, "peripheral", span); + let p_singleton = ident(&p_name, config, "peripheral_singleton", span); if config.feature_peripheral { feature_attribute.extend(quote! { #[cfg(feature = #p_feature)] }) }; @@ -253,8 +253,8 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result { for p_name in names(p, dim_element) { let p_feature = feature_format.apply(&p_name); - let p_ty = ident(&p_name, &config, "peripheral", span); - let p_singleton = ident(&p_name, &config, "peripheral_singleton", span); + let p_ty = ident(&p_name, config, "peripheral", span); + let p_singleton = ident(&p_name, config, "peripheral_singleton", span); if config.feature_peripheral { feature_attribute.extend(quote! { #[cfg(feature = #p_feature)] }) }; diff --git a/src/generate/interrupt.rs b/src/generate/interrupt.rs index 1c48b06e..10d9bdde 100644 --- a/src/generate/interrupt.rs +++ b/src/generate/interrupt.rs @@ -55,7 +55,7 @@ pub fn render( } pos += 1; - let i_ty = ident(&interrupt.0.name, &config, "interrupt", span); + let i_ty = ident(&interrupt.0.name, config, "interrupt", span); let description = format!( "{} - {}", interrupt.0.value, diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index bc4c3fc3..34f421c6 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -37,7 +37,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result let name = util::name_of(&p, config.ignore_groups); let span = Span::call_site(); - let p_ty = ident(&name, &config, "peripheral", span); + let p_ty = ident(&name, config, "peripheral", span); let name_str = p_ty.to_string(); let address = util::hex(p.base_address + config.base_address_shift); let description = util::respace(p.description.as_ref().unwrap_or(&p.name)); @@ -85,7 +85,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result for pi in svd::peripheral::expand(p, dim) { let name = &pi.name; let description = pi.description.as_deref().unwrap_or(&p.name); - let p_ty = ident(name, &config, "peripheral", span); + let p_ty = ident(name, config, "peripheral", span); let name_str = p_ty.to_string(); let doc_alias = (&name_str != name).then(|| quote!(#[doc(alias = #name)])); let address = util::hex(pi.base_address + config.base_address_shift); @@ -640,8 +640,8 @@ fn register_or_cluster_block( let mut doc_alias = None; let block_ty = if let Some(name) = name { - let ty = ident(name, &config, "cluster", span); - if ty.to_string() != name { + let ty = ident(name, config, "cluster", span); + if ty != name { doc_alias = Some(quote!(#[doc(alias = #name)])); } ty @@ -996,12 +996,12 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result { let doc = make_comment(cluster_size, info.address_offset, &description); - let name: Ident = ident(&info.name, &config, "cluster_accessor", span); + let name: Ident = ident(&info.name, config, "cluster_accessor", span); let syn_field = new_syn_field(name.clone(), ty.clone()); cluster_expanded.push(RegisterBlockField { syn_field, @@ -1050,7 +1050,7 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result Result Result { let doc = make_comment(register_size, info.address_offset, &description); let span = Span::call_site(); - let ty = name_to_ty(ident(&ty_str, &config, "register", span)); - let name: Ident = ident(&ty_name, &config, "register_accessor", span); + let ty = name_to_ty(ident(&ty_str, config, "register", span)); + let name: Ident = ident(&ty_name, config, "register_accessor", span); let syn_field = new_syn_field(name.clone(), ty.clone()); register_expanded.push(RegisterBlockField { syn_field, @@ -1232,18 +1232,18 @@ fn expand_register( let array_convertible = ac && sequential_addresses; let array_proxy_convertible = ac && disjoint_sequential_addresses; let span = Span::call_site(); - let ty = name_to_ty(ident(&ty_str, &config, "register", span)); + let ty = name_to_ty(ident(&ty_str, config, "register", span)); if array_convertible || array_proxy_convertible { let accessor_name = if let Some(dim_name) = array_info.dim_name.as_ref() { ident( &util::fullname(dim_name, &info.alternate_group, config.ignore_groups), - &config, + config, "register_accessor", span, ) } else { - ident(&ty_name, &config, "register_accessor", span) + ident(&ty_name, config, "register_accessor", span) }; let doc = make_comment( register_size * array_info.dim, @@ -1276,7 +1276,7 @@ fn expand_register( for (i, ri) in svd::register::expand(info, array_info).enumerate() { let idx_name = ident( &util::fullname(&ri.name, &info.alternate_group, config.ignore_groups), - &config, + config, "cluster_accessor", span, ); @@ -1321,7 +1321,7 @@ fn expand_register( info.address_offset, ri.description.as_deref().unwrap_or(&ri.name), ); - let name = ident(&ri.name, &config, "register_accessor", span); + let name = ident(&ri.name, config, "register_accessor", span); let syn_field = new_syn_field(name.clone(), ty.clone()); register_expanded.push(RegisterBlockField { @@ -1404,7 +1404,7 @@ fn cluster_block( // name_snake_case needs to take into account array type. let span = Span::call_site(); let mod_ty = ident(&mod_name, config, "cluster_mod", span); - let block_ty = ident(&mod_name, &config, "cluster", span); + let block_ty = ident(&mod_name, config, "cluster", span); if let Some(dpath) = dpath { let dparent = dpath.parent().unwrap(); @@ -1418,7 +1418,7 @@ fn cluster_block( derived .path .segments - .push(path_segment(ident(&dname, &config, "cluster", span))); + .push(path_segment(ident(&dname, config, "cluster", span))); mod_derived .path .segments diff --git a/src/generate/register.rs b/src/generate/register.rs index 9bfddf30..bf078785 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -22,7 +22,7 @@ use anyhow::{anyhow, Result}; use syn::punctuated::Punctuated; fn regspec(name: &str, config: &Config, span: Span) -> Ident { - ident(name, &config, "register_spec", span) + ident(name, config, "register_spec", span) } fn field_accessor(name: &str, config: &Config, span: Span) -> Ident { @@ -60,8 +60,8 @@ pub fn render( } } let span = Span::call_site(); - let reg_ty = ident(&name, &config, "register", span); - let doc_alias = (®_ty.to_string() != &name).then(|| quote!(#[doc(alias = #name)])); + let reg_ty = ident(&name, config, "register", span); + let doc_alias = (reg_ty.to_string().as_str() != name).then(|| quote!(#[doc(alias = #name)])); let mod_ty = ident(&name, config, "register_mod", span); let description = util::escape_special_chars( util::respace(®ister.description.clone().unwrap_or_else(|| { @@ -82,7 +82,7 @@ pub fn render( derived .path .segments - .push(path_segment(ident(&dname, &config, "register", span))); + .push(path_segment(ident(&dname, config, "register", span))); mod_derived .path .segments @@ -656,7 +656,7 @@ pub fn fields( { ident( evs.name.as_deref().unwrap_or(&name), - &config, + config, "enum_name", span, ) @@ -666,7 +666,7 @@ pub fn fields( }; // name of read proxy type - let reader_ty = ident(&name, &config, "field_reader", span); + let reader_ty = ident(&name, config, "field_reader", span); // if it's enumeratedValues and it's derived from base, don't derive the read proxy // as the base has already dealt with this; @@ -861,7 +861,7 @@ pub fn fields( evs_r = Some(evs); // generate pub use field_1 reader as field_2 reader let base_field = util::replace_suffix(&base.field.name, ""); - let base_r = ident(&base_field, &config, "field_reader", span); + let base_r = ident(&base_field, config, "field_reader", span); if !reader_derives.contains(&reader_ty) { let base_path = base_syn_path(base, &fpath, &base_r, config)?; mod_items.extend(quote! { @@ -977,14 +977,14 @@ pub fn fields( } else { "enum_name" }; - ident(evs.name.as_deref().unwrap_or(&name), &config, fmt, span) + ident(evs.name.as_deref().unwrap_or(&name), config, fmt, span) } else { // raw_field_value_write_ty fty.clone() }; // name of write proxy type - let writer_ty = ident(&name, &config, "field_writer", span); + let writer_ty = ident(&name, config, "field_writer", span); let mut proxy_items = TokenStream::new(); let mut unsafety = unsafety(f.write_constraint.as_ref(), width); @@ -1136,7 +1136,7 @@ pub fn fields( // generate pub use field_1 writer as field_2 writer let base_field = util::replace_suffix(&base.field.name, ""); - let base_w = ident(&base_field, &config, "field_writer", span); + let base_w = ident(&base_field, config, "field_writer", span); if !writer_derives.contains(&writer_ty) { let base_path = base_syn_path(base, &fpath, &base_w, config)?; mod_items.extend(quote! { @@ -1304,7 +1304,7 @@ impl Variant { .description .clone() .unwrap_or_else(|| format!("`{value:b}`")), - pc: ident(&ev.name, &config, "enum_value", span), + pc: ident(&ev.name, config, "enum_value", span), is_sc, sc, value, diff --git a/src/main.rs b/src/main.rs index b4d02e94..029aab6a 100755 --- a/src/main.rs +++ b/src/main.rs @@ -39,7 +39,7 @@ fn parse_configs(app: Command) -> Result { if let Some(ident_formats) = ident_formats.get_many::("ident_format") { for f in ident_formats { - let mut f = f.split(":"); + let mut f = f.split(':'); if let (Some(n), Some(p), Some(c), Some(s)) = (f.next(), f.next(), f.next(), f.next()) { let case = match c { "" | "unchanged" | "svd" => None, @@ -335,11 +335,11 @@ Ignore this option if you are not building your own FPGA based soft-cores."), let mut features = Vec::new(); if config.feature_group { features.extend( - util::group_names(&device, &feature_format) + util::group_names(&device, feature_format) .iter() .map(|s| format!("{s} = []\n")), ); - let add_groups: Vec<_> = util::group_names(&device, &feature_format) + let add_groups: Vec<_> = util::group_names(&device, feature_format) .iter() .map(|s| format!("\"{s}\"")) .collect(); @@ -347,11 +347,11 @@ Ignore this option if you are not building your own FPGA based soft-cores."), } if config.feature_peripheral { features.extend( - util::peripheral_names(&device, &feature_format) + util::peripheral_names(&device, feature_format) .iter() .map(|s| format!("{s} = []\n")), ); - let add_peripherals: Vec<_> = util::peripheral_names(&device, &feature_format) + let add_peripherals: Vec<_> = util::peripheral_names(&device, feature_format) .iter() .map(|s| format!("\"{s}\"")) .collect(); diff --git a/src/util.rs b/src/util.rs index 2468084b..60eebb2a 100644 --- a/src/util.rs +++ b/src/util.rs @@ -33,26 +33,22 @@ fn to_pascal_case(s: &str) -> String { if let Some(&"") = parts.peek() { string.push('_'); } - loop { - if let Some(p) = parts.next() { - if p.is_empty() { - continue; + while let Some(p) = parts.next() { + if p.is_empty() { + continue; + } + string.push_str(&p.to_pascal_case()); + match parts.peek() { + Some(nxt) + if p.ends_with(|s: char| s.is_numeric()) + && nxt.starts_with(|s: char| s.is_numeric()) => + { + string.push('_'); } - string.push_str(&p.to_pascal_case()); - match parts.peek() { - Some(nxt) - if p.ends_with(|s: char| s.is_numeric()) - && nxt.starts_with(|s: char| s.is_numeric()) => - { - string.push('_'); - } - Some(&"") => { - string.push('_'); - } - _ => {} + Some(&"") => { + string.push('_'); } - } else { - break; + _ => {} } } string @@ -310,7 +306,7 @@ pub fn block_path_to_ty( span, ))); for ps in &bpath.path { - segments.push(path_segment(ident(&ps, config, "cluster_mod", span))); + segments.push(path_segment(ident(ps, config, "cluster_mod", span))); } type_path(segments) } From 30eb39898041c734023ba9124d684003ba96bc37 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 3 Feb 2024 14:03:23 +0300 Subject: [PATCH 214/319] change case defaults --- .github/workflows/ci.yml | 7 ++++--- CHANGELOG.md | 2 +- src/config.rs | 25 +++++++++++-------------- src/lib.rs | 38 ++++++++++++++++++++++++-------------- 4 files changed, 40 insertions(+), 32 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 0ac4693e..5a3243b9 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -56,7 +56,7 @@ jobs: include: - { rust: stable, vendor: Atmel, options: all } - { rust: stable, vendor: Atmel, options: "" } - - { rust: stable, vendor: Freescale, options: "--strict --atomics" } + - { rust: stable, vendor: Freescale, options: all } - { rust: stable, vendor: Freescale, options: "" } - { rust: stable, vendor: Fujitsu, options: "" } - { rust: stable, vendor: Fujitsu, options: "--atomics" } @@ -88,8 +88,9 @@ jobs: # Use nightly for architectures which don't support stable - { rust: nightly, vendor: MSP430, options: "--atomics" } - { rust: nightly, vendor: MSP430, options: "" } - - { rust: nightly, vendor: Espressif, options: "--atomics" } - - { rust: nightly, vendor: Espressif, options: "" } + # Workaround for _1token0 + - { rust: nightly, vendor: Espressif, options: "--atomics --ident-format register::c:" } + - { rust: nightly, vendor: Espressif, options: "--ident-format register:::Reg" } steps: - uses: actions/checkout@v4 diff --git a/CHANGELOG.md b/CHANGELOG.md index 60eb6221..2a35a712 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -10,7 +10,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Bump MSRV to 1.74 - generic unsafe `W::bits` + safe `W::set` - Add `base-address-shift` config flag -- Fix case changing bugs, add `--ident-format` (`-f`) option flag +- Use `PascalCase` for type idents, fix case changing bugs, add `--ident-format` (`-f`) option flag ## [v0.31.5] - 2024-01-04 diff --git a/src/config.rs b/src/config.rs index c188940a..ce824498 100644 --- a/src/config.rs +++ b/src/config.rs @@ -183,46 +183,43 @@ impl Default for IdentFormats { map.insert("field_accessor".into(), IdentFormat::default().snake_case()); map.insert( "field_reader".into(), - IdentFormat::default().constant_case().suffix("_R"), + IdentFormat::default().pascal_case().suffix("R"), ); map.insert( "field_writer".into(), - IdentFormat::default().constant_case().suffix("_W"), - ); - map.insert( - "enum_name".into(), - IdentFormat::default().constant_case().suffix("_A"), + IdentFormat::default().pascal_case().suffix("W"), ); + map.insert("enum_name".into(), IdentFormat::default().pascal_case()); map.insert( "enum_write_name".into(), - IdentFormat::default().constant_case().suffix("_AW"), + IdentFormat::default().pascal_case().suffix("WO"), ); - map.insert("enum_value".into(), IdentFormat::default().constant_case()); + map.insert("enum_value".into(), IdentFormat::default().pascal_case()); map.insert( "enum_value_accessor".into(), IdentFormat::default().snake_case(), ); - map.insert("interrupt".into(), IdentFormat::default().constant_case()); - map.insert("cluster".into(), IdentFormat::default().constant_case()); + map.insert("interrupt".into(), IdentFormat::default()); + map.insert("cluster".into(), IdentFormat::default().pascal_case()); map.insert( "cluster_accessor".into(), IdentFormat::default().snake_case(), ); map.insert("cluster_mod".into(), IdentFormat::default().snake_case()); - map.insert("register".into(), IdentFormat::default().constant_case()); + map.insert("register".into(), IdentFormat::default().pascal_case()); map.insert( "register_spec".into(), - IdentFormat::default().pascal_case().suffix("_SPEC"), + IdentFormat::default().pascal_case().suffix("Spec"), ); map.insert( "register_accessor".into(), IdentFormat::default().snake_case(), ); map.insert("register_mod".into(), IdentFormat::default().snake_case()); - map.insert("peripheral".into(), IdentFormat::default().constant_case()); + map.insert("peripheral".into(), IdentFormat::default().pascal_case()); map.insert( "peripheral_singleton".into(), - IdentFormat::default().constant_case(), + IdentFormat::default().snake_case(), ); map.insert("peripheral_mod".into(), IdentFormat::default().snake_case()); map.insert( diff --git a/src/lib.rs b/src/lib.rs index d056996d..7509dc63 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -558,20 +558,30 @@ //! `CONSTANT_CASE` (pass `constant` or `c`) and `leave_CASE_as_in_SVD` (pass `unchanged` or ``). //! //! There are identificator formats by default in the table. -//! -//! | IdentifierType | Prefix | Case 0.31 | Suffix | -//! |----------------------------------------------------------------------------------|:------:|:---------:|:-----------:| -//! | field_reader | | constant | _R | -//! | field_writer | | constant | _W | -//! | enum_name | | constant | _A | -//! | enum_write_name | | constant | _AW | -//! | enum_value | | constant | | -//! | interrupt | | constant | | -//! | peripheral_singleton | | constant | | -//! | peripheral
register
cluster | | constant | | -//! | register_spec | | constant | _SPEC | -//! | cluster_accessor
register_accessor
field_accessor
enum_value_accessor | | snake | | -//! | cluster_mod
register_mod
peripheral_mod | | snake | | +//! Since `svd2rust` 0.32 defaults have been changed. +//! +//! | IdentifierType | Prefix | Case | Case 0.31 | Suffix | Suffix 0.31 | +//! |----------------------------------------------------------------------------------|:------:|:---------:|:---------:|:------:|:-----------:| +//! | field_reader | | pascal | constant | R | _R | +//! | field_writer | | pascal | constant | W | _W | +//! | enum_name | | pascal | constant | | _A | +//! | enum_write_name | | pascal | constant | WO | _AW | +//! | enum_value | | pascal | constant | | | +//! | interrupt | | unchanged | constant | | | +//! | peripheral_singleton | | snake | constant | | | +//! | peripheral
register
cluster | | pascal | constant | | | +//! | register_spec | | pascal | constant | Spec | _SPEC | +//! | cluster_accessor
register_accessor
field_accessor
enum_value_accessor | | snake | snake | | | +//! | cluster_mod
register_mod
peripheral_mod | | snake | snake | | | +//! +//! To revert old behavior for `field_reader` you need to pass flag `-f field_reader::c:_R`. And repeat similar for other idents. +//! +//! Also you can do the same in config file: +//! ```toml +//! [ident_formats.field_reader] +//! case = constant +//! suffix = "_R" +//! ``` #![recursion_limit = "128"] use quote::quote; From 135782497b1a9607fb3ae4204237d91f77845a0b Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 16 Feb 2024 21:47:10 +0300 Subject: [PATCH 215/319] IdentFormatsTheme --- .github/workflows/ci.yml | 2 +- src/config.rs | 170 +++++++++++++++++++++++++++------------ src/lib.rs | 41 +++++----- src/main.rs | 16 +++- 4 files changed, 154 insertions(+), 75 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 5a3243b9..3e9807ac 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -89,7 +89,7 @@ jobs: - { rust: nightly, vendor: MSP430, options: "--atomics" } - { rust: nightly, vendor: MSP430, options: "" } # Workaround for _1token0 - - { rust: nightly, vendor: Espressif, options: "--atomics --ident-format register::c:" } + - { rust: nightly, vendor: Espressif, options: "--atomics --ident-formats-theme legacy" } - { rust: nightly, vendor: Espressif, options: "--ident-format register:::Reg" } steps: diff --git a/src/config.rs b/src/config.rs index ce824498..c9300c41 100644 --- a/src/config.rs +++ b/src/config.rs @@ -32,6 +32,7 @@ pub struct Config { pub reexport_core_peripherals: bool, pub reexport_interrupt: bool, pub ident_formats: IdentFormats, + pub ident_formats_theme: IdentFormatsTheme, pub base_address_shift: u64, } @@ -172,62 +173,113 @@ impl IdentFormat { } } -#[derive(Clone, Debug, PartialEq, Eq)] +#[derive(Clone, Debug, Default, PartialEq, Eq)] #[cfg_attr(feature = "serde", derive(serde::Deserialize), serde(default))] pub struct IdentFormats(HashMap); -impl Default for IdentFormats { - fn default() -> Self { - let mut map = HashMap::new(); - - map.insert("field_accessor".into(), IdentFormat::default().snake_case()); - map.insert( - "field_reader".into(), - IdentFormat::default().pascal_case().suffix("R"), - ); - map.insert( - "field_writer".into(), - IdentFormat::default().pascal_case().suffix("W"), - ); - map.insert("enum_name".into(), IdentFormat::default().pascal_case()); - map.insert( - "enum_write_name".into(), - IdentFormat::default().pascal_case().suffix("WO"), - ); - map.insert("enum_value".into(), IdentFormat::default().pascal_case()); - map.insert( - "enum_value_accessor".into(), - IdentFormat::default().snake_case(), - ); - map.insert("interrupt".into(), IdentFormat::default()); - map.insert("cluster".into(), IdentFormat::default().pascal_case()); - map.insert( - "cluster_accessor".into(), - IdentFormat::default().snake_case(), - ); - map.insert("cluster_mod".into(), IdentFormat::default().snake_case()); - map.insert("register".into(), IdentFormat::default().pascal_case()); - map.insert( - "register_spec".into(), - IdentFormat::default().pascal_case().suffix("Spec"), - ); - map.insert( - "register_accessor".into(), - IdentFormat::default().snake_case(), - ); - map.insert("register_mod".into(), IdentFormat::default().snake_case()); - map.insert("peripheral".into(), IdentFormat::default().pascal_case()); - map.insert( - "peripheral_singleton".into(), - IdentFormat::default().snake_case(), - ); - map.insert("peripheral_mod".into(), IdentFormat::default().snake_case()); - map.insert( - "peripheral_feature".into(), - IdentFormat::default().snake_case(), - ); - - Self(map) +impl IdentFormats { + pub fn new_theme() -> Self { + Self(HashMap::from([ + ("field_accessor".into(), IdentFormat::default().snake_case()), + ( + "field_reader".into(), + IdentFormat::default().pascal_case().suffix("R"), + ), + ( + "field_writer".into(), + IdentFormat::default().pascal_case().suffix("W"), + ), + ("enum_name".into(), IdentFormat::default().pascal_case()), + ( + "enum_write_name".into(), + IdentFormat::default().pascal_case().suffix("WO"), + ), + ("enum_value".into(), IdentFormat::default().pascal_case()), + ( + "enum_value_accessor".into(), + IdentFormat::default().snake_case(), + ), + ("interrupt".into(), IdentFormat::default()), + ("cluster".into(), IdentFormat::default().pascal_case()), + ( + "cluster_accessor".into(), + IdentFormat::default().snake_case(), + ), + ("cluster_mod".into(), IdentFormat::default().snake_case()), + ("register".into(), IdentFormat::default().pascal_case()), + ( + "register_spec".into(), + IdentFormat::default().pascal_case().suffix("Spec"), + ), + ( + "register_accessor".into(), + IdentFormat::default().snake_case(), + ), + ("register_mod".into(), IdentFormat::default().snake_case()), + ("peripheral".into(), IdentFormat::default().pascal_case()), + ( + "peripheral_singleton".into(), + IdentFormat::default().snake_case(), + ), + ("peripheral_mod".into(), IdentFormat::default().snake_case()), + ( + "peripheral_feature".into(), + IdentFormat::default().snake_case(), + ), + ])) + } + pub fn legacy_theme() -> Self { + Self(HashMap::from([ + ("field_accessor".into(), IdentFormat::default().snake_case()), + ( + "field_reader".into(), + IdentFormat::default().constant_case().suffix("_R"), + ), + ( + "field_writer".into(), + IdentFormat::default().constant_case().suffix("_W"), + ), + ( + "enum_name".into(), + IdentFormat::default().constant_case().suffix("_A"), + ), + ( + "enum_write_name".into(), + IdentFormat::default().constant_case().suffix("_AW"), + ), + ("enum_value".into(), IdentFormat::default().constant_case()), + ( + "enum_value_accessor".into(), + IdentFormat::default().snake_case(), + ), + ("interrupt".into(), IdentFormat::default().constant_case()), + ("cluster".into(), IdentFormat::default().constant_case()), + ( + "cluster_accessor".into(), + IdentFormat::default().snake_case(), + ), + ("cluster_mod".into(), IdentFormat::default().snake_case()), + ("register".into(), IdentFormat::default().constant_case()), + ( + "register_spec".into(), + IdentFormat::default().constant_case().suffix("_SPEC"), + ), + ( + "register_accessor".into(), + IdentFormat::default().snake_case(), + ), + ("register_mod".into(), IdentFormat::default().snake_case()), + ("peripheral".into(), IdentFormat::default().constant_case()), + ( + "peripheral_singleton".into(), + IdentFormat::default().constant_case(), + ), + ("peripheral_mod".into(), IdentFormat::default().snake_case()), + ( + "peripheral_feature".into(), + IdentFormat::default().snake_case(), + ), + ])) } } @@ -242,3 +294,15 @@ impl DerefMut for IdentFormats { &mut self.0 } } + +#[cfg_attr( + feature = "serde", + derive(serde::Deserialize), + serde(rename_all = "lowercase") +)] +#[derive(Clone, Copy, Debug, Default, PartialEq, Eq)] +pub enum IdentFormatsTheme { + #[default] + New, + Legacy, +} diff --git a/src/lib.rs b/src/lib.rs index 7509dc63..fa9a4f73 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -549,7 +549,7 @@ //! The `--impl-defmt` flag can also be specified to include `defmt::Format` implementations conditionally //! behind the supplied feature name. //! -//! ## the `--ident-format` flag +//! ## the `--ident-format` and `--ident-formats-theme` flags //! //! The `--ident-format type:prefix:case:suffix` (`-f`) flag can also be specified if you want to change //! default behavior of formatting rust structure and enum names, register access methods, etc. @@ -560,21 +560,21 @@ //! There are identificator formats by default in the table. //! Since `svd2rust` 0.32 defaults have been changed. //! -//! | IdentifierType | Prefix | Case | Case 0.31 | Suffix | Suffix 0.31 | -//! |----------------------------------------------------------------------------------|:------:|:---------:|:---------:|:------:|:-----------:| -//! | field_reader | | pascal | constant | R | _R | -//! | field_writer | | pascal | constant | W | _W | -//! | enum_name | | pascal | constant | | _A | -//! | enum_write_name | | pascal | constant | WO | _AW | -//! | enum_value | | pascal | constant | | | -//! | interrupt | | unchanged | constant | | | -//! | peripheral_singleton | | snake | constant | | | -//! | peripheral
register
cluster | | pascal | constant | | | -//! | register_spec | | pascal | constant | Spec | _SPEC | -//! | cluster_accessor
register_accessor
field_accessor
enum_value_accessor | | snake | snake | | | -//! | cluster_mod
register_mod
peripheral_mod | | snake | snake | | | -//! -//! To revert old behavior for `field_reader` you need to pass flag `-f field_reader::c:_R`. And repeat similar for other idents. +//! | IdentifierType | Prefix | Case | Case 0.31 | Suffix | Suffix 0.31 | +//! |--------------------------------------------------------------------------------|:------:|:---------:|:---------:|:------:|:-----------:| +//! | field_reader | | pascal | constant | R | _R | +//! | field_writer | | pascal | constant | W | _W | +//! | enum_name | | pascal | constant | | _A | +//! | enum_write_name | | pascal | constant | WO | _AW | +//! | enum_value | | pascal | constant | | | +//! | interrupt | | unchanged | constant | | | +//! | peripheral_singleton | | snake | constant | | | +//! | peripheral
register
cluster | | pascal | constant | | | +//! | register_spec | | pascal | constant | Spec | _SPEC | +//! | cluster_accessor
register_accessor
field_accessor
enum_value_accessor | | snake | snake | | | +//! | cluster_mod
register_mod
peripheral_mod | | snake | snake | | | +//! +//! To revert old behavior for `field_reader` you need to pass flag `-f field_reader::c:_R`. //! //! Also you can do the same in config file: //! ```toml @@ -582,6 +582,8 @@ //! case = constant //! suffix = "_R" //! ``` +//! +//! To revert old behavior for all identifiers you may pass `--ident-formats-theme legacy`. #![recursion_limit = "128"] use quote::quote; @@ -607,7 +609,7 @@ pub struct DeviceSpecific { use anyhow::{Context, Result}; -use crate::config::IdentFormats; +use crate::config::{IdentFormats, IdentFormatsTheme}; #[derive(Debug, thiserror::Error)] pub enum SvdError { @@ -622,7 +624,10 @@ pub fn generate(input: &str, config: &Config) -> Result { use std::fmt::Write; let mut config = config.clone(); - let mut ident_formats = IdentFormats::default(); + let mut ident_formats = match config.ident_formats_theme { + IdentFormatsTheme::New => IdentFormats::new_theme(), + IdentFormatsTheme::Legacy => IdentFormats::legacy_theme(), + }; ident_formats.extend(config.ident_formats.drain()); config.ident_formats = ident_formats; diff --git a/src/main.rs b/src/main.rs index 029aab6a..2b48dbd7 100755 --- a/src/main.rs +++ b/src/main.rs @@ -1,7 +1,7 @@ #![recursion_limit = "128"] use log::{debug, error, info, warn}; -use svd2rust::config::IdentFormats; +use svd2rust::config::{IdentFormats, IdentFormatsTheme}; use svd2rust::util::{Case, IdentFormat}; use std::io::Write; @@ -33,7 +33,10 @@ fn parse_configs(app: Command) -> Result { .load()?; let mut config: Config = irxconfig.get()?; - let mut idf = IdentFormats::default(); + let mut idf = match config.ident_formats_theme { + IdentFormatsTheme::New => IdentFormats::new_theme(), + IdentFormatsTheme::Legacy => IdentFormats::legacy_theme(), + }; idf.extend(config.ident_formats.drain()); config.ident_formats = idf; @@ -166,9 +169,16 @@ fn run() -> Result<()> { format!("Specify `-f type:prefix:case:suffix` to change default ident formatting. Allowed values of `type` are {:?}. Allowed cases are `unchanged` (''), `pascal` ('p'), `constant` ('c') and `snake` ('s'). -", IdentFormats::default().keys().collect::>()) +", IdentFormats::new_theme().keys().collect::>()) ), ) + .arg( + Arg::new("ident_formats_theme") + .long("ident-formats-theme") + .help("A set of `ident_format` settings. `new` or `legacy`") + .action(ArgAction::Set) + .value_name("THEME"), + ) .arg( Arg::new("max_cluster_size") .long("max-cluster-size") From 6328bdee0a44b00eb740ea63169474345e732b67 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 16 Feb 2024 23:49:56 +0300 Subject: [PATCH 216/319] common_theme --- src/config.rs | 81 +++++++++++++++++++++++---------------------------- src/lib.rs | 2 +- 2 files changed, 38 insertions(+), 45 deletions(-) diff --git a/src/config.rs b/src/config.rs index c9300c41..5beb0a20 100644 --- a/src/config.rs +++ b/src/config.rs @@ -178,9 +178,36 @@ impl IdentFormat { pub struct IdentFormats(HashMap); impl IdentFormats { - pub fn new_theme() -> Self { + fn common() -> Self { Self(HashMap::from([ ("field_accessor".into(), IdentFormat::default().snake_case()), + ( + "register_accessor".into(), + IdentFormat::default().snake_case(), + ), + ( + "enum_value_accessor".into(), + IdentFormat::default().snake_case(), + ), + ("cluster".into(), IdentFormat::default().pascal_case()), + ( + "cluster_accessor".into(), + IdentFormat::default().snake_case(), + ), + ("register_mod".into(), IdentFormat::default().snake_case()), + ("cluster_mod".into(), IdentFormat::default().snake_case()), + ("peripheral_mod".into(), IdentFormat::default().snake_case()), + ( + "peripheral_feature".into(), + IdentFormat::default().snake_case(), + ), + ])) + } + + pub fn new_theme() -> Self { + let mut map = Self::common(); + + map.extend([ ( "field_reader".into(), IdentFormat::default().pascal_case().suffix("R"), @@ -195,42 +222,25 @@ impl IdentFormats { IdentFormat::default().pascal_case().suffix("WO"), ), ("enum_value".into(), IdentFormat::default().pascal_case()), - ( - "enum_value_accessor".into(), - IdentFormat::default().snake_case(), - ), ("interrupt".into(), IdentFormat::default()), - ("cluster".into(), IdentFormat::default().pascal_case()), - ( - "cluster_accessor".into(), - IdentFormat::default().snake_case(), - ), - ("cluster_mod".into(), IdentFormat::default().snake_case()), ("register".into(), IdentFormat::default().pascal_case()), ( "register_spec".into(), IdentFormat::default().pascal_case().suffix("Spec"), ), - ( - "register_accessor".into(), - IdentFormat::default().snake_case(), - ), - ("register_mod".into(), IdentFormat::default().snake_case()), ("peripheral".into(), IdentFormat::default().pascal_case()), ( "peripheral_singleton".into(), IdentFormat::default().snake_case(), ), - ("peripheral_mod".into(), IdentFormat::default().snake_case()), - ( - "peripheral_feature".into(), - IdentFormat::default().snake_case(), - ), - ])) + ]); + + map } pub fn legacy_theme() -> Self { - Self(HashMap::from([ - ("field_accessor".into(), IdentFormat::default().snake_case()), + let mut map = Self::common(); + + map.extend([ ( "field_reader".into(), IdentFormat::default().constant_case().suffix("_R"), @@ -248,38 +258,21 @@ impl IdentFormats { IdentFormat::default().constant_case().suffix("_AW"), ), ("enum_value".into(), IdentFormat::default().constant_case()), - ( - "enum_value_accessor".into(), - IdentFormat::default().snake_case(), - ), ("interrupt".into(), IdentFormat::default().constant_case()), ("cluster".into(), IdentFormat::default().constant_case()), - ( - "cluster_accessor".into(), - IdentFormat::default().snake_case(), - ), - ("cluster_mod".into(), IdentFormat::default().snake_case()), ("register".into(), IdentFormat::default().constant_case()), ( "register_spec".into(), IdentFormat::default().constant_case().suffix("_SPEC"), ), - ( - "register_accessor".into(), - IdentFormat::default().snake_case(), - ), - ("register_mod".into(), IdentFormat::default().snake_case()), ("peripheral".into(), IdentFormat::default().constant_case()), ( "peripheral_singleton".into(), IdentFormat::default().constant_case(), ), - ("peripheral_mod".into(), IdentFormat::default().snake_case()), - ( - "peripheral_feature".into(), - IdentFormat::default().snake_case(), - ), - ])) + ]); + + map } } diff --git a/src/lib.rs b/src/lib.rs index fa9a4f73..6d579712 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -572,7 +572,7 @@ //! | peripheral
register
cluster | | pascal | constant | | | //! | register_spec | | pascal | constant | Spec | _SPEC | //! | cluster_accessor
register_accessor
field_accessor
enum_value_accessor | | snake | snake | | | -//! | cluster_mod
register_mod
peripheral_mod | | snake | snake | | | +//! | cluster_mod
register_mod
peripheral_mod
peripheral_feature | | snake | snake | | | //! //! To revert old behavior for `field_reader` you need to pass flag `-f field_reader::c:_R`. //! From 6969a746efe490f423183a59a4812ce2259a3864 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 17 Feb 2024 12:24:40 +0300 Subject: [PATCH 217/319] IdentFormat::parse --- src/config.rs | 151 +++++++++++++++++++++++++++----------------------- src/main.rs | 45 +++++++-------- 2 files changed, 102 insertions(+), 94 deletions(-) diff --git a/src/config.rs b/src/config.rs index 5beb0a20..22796e27 100644 --- a/src/config.rs +++ b/src/config.rs @@ -137,6 +137,26 @@ pub enum Case { Snake, } +impl Case { + pub fn parse(c: &str) -> Result, IdentFormatError> { + Ok(match c { + "" | "unchanged" | "svd" => None, + "p" | "pascal" | "type" => Some(Case::Pascal), + "s" | "snake" | "lower" => Some(Case::Snake), + "c" | "constant" | "upper" => Some(Case::Constant), + _ => { + return Err(IdentFormatError::UnknownCase(c.into())); + } + }) + } +} + +#[derive(Clone, Debug, PartialEq, Eq)] +pub enum IdentFormatError { + UnknownCase(String), + Other, +} + #[derive(Clone, Debug, Default, PartialEq, Eq)] #[cfg_attr(feature = "serde", derive(serde::Deserialize), serde(default))] pub struct IdentFormat { @@ -171,6 +191,36 @@ impl IdentFormat { self.suffix = suffix.into(); self } + pub fn parse(s: &str) -> Result { + let mut f = s.split(":"); + match (f.next(), f.next(), f.next()) { + (Some(p), Some(c), Some(s)) => { + let case = Case::parse(c)?; + Ok(Self { + case, + prefix: p.into(), + suffix: s.into(), + }) + } + (Some(p), Some(c), None) => { + let case = Case::parse(c)?; + Ok(Self { + case, + prefix: p.into(), + suffix: "".into(), + }) + } + (Some(c), None, None) => { + let case = Case::parse(c)?; + Ok(Self { + case, + prefix: "".into(), + suffix: "".into(), + }) + } + _ => Err(IdentFormatError::Other), + } + } } #[derive(Clone, Debug, Default, PartialEq, Eq)] @@ -179,56 +229,34 @@ pub struct IdentFormats(HashMap); impl IdentFormats { fn common() -> Self { + let snake = IdentFormat::default().snake_case(); Self(HashMap::from([ - ("field_accessor".into(), IdentFormat::default().snake_case()), - ( - "register_accessor".into(), - IdentFormat::default().snake_case(), - ), - ( - "enum_value_accessor".into(), - IdentFormat::default().snake_case(), - ), - ("cluster".into(), IdentFormat::default().pascal_case()), - ( - "cluster_accessor".into(), - IdentFormat::default().snake_case(), - ), - ("register_mod".into(), IdentFormat::default().snake_case()), - ("cluster_mod".into(), IdentFormat::default().snake_case()), - ("peripheral_mod".into(), IdentFormat::default().snake_case()), - ( - "peripheral_feature".into(), - IdentFormat::default().snake_case(), - ), + ("field_accessor".into(), snake.clone()), + ("register_accessor".into(), snake.clone()), + ("enum_value_accessor".into(), snake.clone()), + ("cluster_accessor".into(), snake.clone()), + ("register_mod".into(), snake.clone()), + ("cluster_mod".into(), snake.clone()), + ("peripheral_mod".into(), snake.clone()), + ("peripheral_feature".into(), snake), ])) } pub fn new_theme() -> Self { let mut map = Self::common(); + let pascal = IdentFormat::default().pascal_case(); map.extend([ - ( - "field_reader".into(), - IdentFormat::default().pascal_case().suffix("R"), - ), - ( - "field_writer".into(), - IdentFormat::default().pascal_case().suffix("W"), - ), - ("enum_name".into(), IdentFormat::default().pascal_case()), - ( - "enum_write_name".into(), - IdentFormat::default().pascal_case().suffix("WO"), - ), - ("enum_value".into(), IdentFormat::default().pascal_case()), + ("field_reader".into(), pascal.clone().suffix("R")), + ("field_writer".into(), pascal.clone().suffix("W")), + ("enum_name".into(), pascal.clone()), + ("enum_write_name".into(), pascal.clone().suffix("WO")), + ("enum_value".into(), pascal.clone()), ("interrupt".into(), IdentFormat::default()), - ("register".into(), IdentFormat::default().pascal_case()), - ( - "register_spec".into(), - IdentFormat::default().pascal_case().suffix("Spec"), - ), - ("peripheral".into(), IdentFormat::default().pascal_case()), + ("register".into(), pascal.clone()), + ("cluster".into(), pascal.clone()), + ("register_spec".into(), pascal.clone().suffix("Spec")), + ("peripheral".into(), pascal), ( "peripheral_singleton".into(), IdentFormat::default().snake_case(), @@ -240,36 +268,19 @@ impl IdentFormats { pub fn legacy_theme() -> Self { let mut map = Self::common(); + let constant = IdentFormat::default().constant_case(); map.extend([ - ( - "field_reader".into(), - IdentFormat::default().constant_case().suffix("_R"), - ), - ( - "field_writer".into(), - IdentFormat::default().constant_case().suffix("_W"), - ), - ( - "enum_name".into(), - IdentFormat::default().constant_case().suffix("_A"), - ), - ( - "enum_write_name".into(), - IdentFormat::default().constant_case().suffix("_AW"), - ), - ("enum_value".into(), IdentFormat::default().constant_case()), - ("interrupt".into(), IdentFormat::default().constant_case()), - ("cluster".into(), IdentFormat::default().constant_case()), - ("register".into(), IdentFormat::default().constant_case()), - ( - "register_spec".into(), - IdentFormat::default().constant_case().suffix("_SPEC"), - ), - ("peripheral".into(), IdentFormat::default().constant_case()), - ( - "peripheral_singleton".into(), - IdentFormat::default().constant_case(), - ), + ("field_reader".into(), constant.clone().suffix("_R")), + ("field_writer".into(), constant.clone().suffix("_W")), + ("enum_name".into(), constant.clone().suffix("_A")), + ("enum_write_name".into(), constant.clone().suffix("_AW")), + ("enum_value".into(), constant.clone()), + ("interrupt".into(), constant.clone()), + ("cluster".into(), constant.clone()), + ("register".into(), constant.clone()), + ("register_spec".into(), constant.clone().suffix("_SPEC")), + ("peripheral".into(), constant.clone()), + ("peripheral_singleton".into(), constant), ]); map diff --git a/src/main.rs b/src/main.rs index 2b48dbd7..d6d75391 100755 --- a/src/main.rs +++ b/src/main.rs @@ -1,8 +1,8 @@ #![recursion_limit = "128"] use log::{debug, error, info, warn}; -use svd2rust::config::{IdentFormats, IdentFormatsTheme}; -use svd2rust::util::{Case, IdentFormat}; +use svd2rust::config::{IdentFormatError, IdentFormats, IdentFormatsTheme}; +use svd2rust::util::IdentFormat; use std::io::Write; use std::process; @@ -41,30 +41,27 @@ fn parse_configs(app: Command) -> Result { config.ident_formats = idf; if let Some(ident_formats) = ident_formats.get_many::("ident_format") { - for f in ident_formats { - let mut f = f.split(':'); - if let (Some(n), Some(p), Some(c), Some(s)) = (f.next(), f.next(), f.next(), f.next()) { - let case = match c { - "" | "unchanged" | "svd" => None, - "p" | "pascal" | "type" => Some(Case::Pascal), - "s" | "snake" | "lower" => Some(Case::Snake), - "c" | "constant" | "upper" => Some(Case::Constant), - _ => { - warn!("Ident case `{c}` is unknown"); - continue; - } - }; + for fs in ident_formats { + if let Some((n, fmt)) = fs.split_once(':') { if let std::collections::hash_map::Entry::Occupied(mut e) = config.ident_formats.entry(n.into()) { - e.insert(IdentFormat { - case, - prefix: p.into(), - suffix: s.into(), - }); + match IdentFormat::parse(fmt) { + Ok(ident_format) => { + e.insert(ident_format); + } + Err(IdentFormatError::UnknownCase(c)) => { + warn!("Ident case `{c}` is unknown") + } + Err(IdentFormatError::Other) => { + warn!("Can't parse identifier format string `{fmt}`") + } + } } else { warn!("Ident format name `{n}` is unknown"); } + } else { + warn!("Can't parse identifier format string `{fs}`"); } } } @@ -345,11 +342,11 @@ Ignore this option if you are not building your own FPGA based soft-cores."), let mut features = Vec::new(); if config.feature_group { features.extend( - util::group_names(&device, feature_format) + util::group_names(&device, &feature_format) .iter() .map(|s| format!("{s} = []\n")), ); - let add_groups: Vec<_> = util::group_names(&device, feature_format) + let add_groups: Vec<_> = util::group_names(&device, &feature_format) .iter() .map(|s| format!("\"{s}\"")) .collect(); @@ -357,11 +354,11 @@ Ignore this option if you are not building your own FPGA based soft-cores."), } if config.feature_peripheral { features.extend( - util::peripheral_names(&device, feature_format) + util::peripheral_names(&device, &feature_format) .iter() .map(|s| format!("{s} = []\n")), ); - let add_peripherals: Vec<_> = util::peripheral_names(&device, feature_format) + let add_peripherals: Vec<_> = util::peripheral_names(&device, &feature_format) .iter() .map(|s| format!("\"{s}\"")) .collect(); From 85c54d7508fed69393b7affb273dbf9aefb61d75 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 17 Feb 2024 12:33:56 +0300 Subject: [PATCH 218/319] make theme optional --- src/config.rs | 8 +++----- src/lib.rs | 4 ++-- src/main.rs | 6 +++--- 3 files changed, 8 insertions(+), 10 deletions(-) diff --git a/src/config.rs b/src/config.rs index 22796e27..a68d98e7 100644 --- a/src/config.rs +++ b/src/config.rs @@ -32,7 +32,7 @@ pub struct Config { pub reexport_core_peripherals: bool, pub reexport_interrupt: bool, pub ident_formats: IdentFormats, - pub ident_formats_theme: IdentFormatsTheme, + pub ident_formats_theme: Option, pub base_address_shift: u64, } @@ -242,7 +242,7 @@ impl IdentFormats { ])) } - pub fn new_theme() -> Self { + pub fn default_theme() -> Self { let mut map = Self::common(); let pascal = IdentFormat::default().pascal_case(); @@ -304,9 +304,7 @@ impl DerefMut for IdentFormats { derive(serde::Deserialize), serde(rename_all = "lowercase") )] -#[derive(Clone, Copy, Debug, Default, PartialEq, Eq)] +#[derive(Clone, Copy, Debug, PartialEq, Eq)] pub enum IdentFormatsTheme { - #[default] - New, Legacy, } diff --git a/src/lib.rs b/src/lib.rs index 6d579712..e8118099 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -625,8 +625,8 @@ pub fn generate(input: &str, config: &Config) -> Result { let mut config = config.clone(); let mut ident_formats = match config.ident_formats_theme { - IdentFormatsTheme::New => IdentFormats::new_theme(), - IdentFormatsTheme::Legacy => IdentFormats::legacy_theme(), + Some(IdentFormatsTheme::Legacy) => IdentFormats::legacy_theme(), + _ => IdentFormats::default_theme(), }; ident_formats.extend(config.ident_formats.drain()); config.ident_formats = ident_formats; diff --git a/src/main.rs b/src/main.rs index d6d75391..17d62e75 100755 --- a/src/main.rs +++ b/src/main.rs @@ -34,8 +34,8 @@ fn parse_configs(app: Command) -> Result { let mut config: Config = irxconfig.get()?; let mut idf = match config.ident_formats_theme { - IdentFormatsTheme::New => IdentFormats::new_theme(), - IdentFormatsTheme::Legacy => IdentFormats::legacy_theme(), + Some(IdentFormatsTheme::Legacy) => IdentFormats::legacy_theme(), + _ => IdentFormats::default_theme(), }; idf.extend(config.ident_formats.drain()); config.ident_formats = idf; @@ -166,7 +166,7 @@ fn run() -> Result<()> { format!("Specify `-f type:prefix:case:suffix` to change default ident formatting. Allowed values of `type` are {:?}. Allowed cases are `unchanged` (''), `pascal` ('p'), `constant` ('c') and `snake` ('s'). -", IdentFormats::new_theme().keys().collect::>()) +", IdentFormats::default_theme().keys().collect::>()) ), ) .arg( From 1ea2d3bc94d280d4bee751d37717b0b8729c6f1f Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 21 Feb 2024 17:59:00 +0300 Subject: [PATCH 219/319] add enum_read_name --- CHANGELOG.md | 1 + src/config.rs | 2 ++ src/generate/register.rs | 73 +++++++++++++++++----------------------- src/lib.rs | 2 +- 4 files changed, 34 insertions(+), 44 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 2a35a712..36b9c51b 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -11,6 +11,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - generic unsafe `W::bits` + safe `W::set` - Add `base-address-shift` config flag - Use `PascalCase` for type idents, fix case changing bugs, add `--ident-format` (`-f`) option flag +- Add `enum_read_name` for `read-only` enums ## [v0.31.5] - 2024-01-04 diff --git a/src/config.rs b/src/config.rs index a68d98e7..1979db22 100644 --- a/src/config.rs +++ b/src/config.rs @@ -250,6 +250,7 @@ impl IdentFormats { ("field_reader".into(), pascal.clone().suffix("R")), ("field_writer".into(), pascal.clone().suffix("W")), ("enum_name".into(), pascal.clone()), + ("enum_read_name".into(), pascal.clone()), ("enum_write_name".into(), pascal.clone().suffix("WO")), ("enum_value".into(), pascal.clone()), ("interrupt".into(), IdentFormat::default()), @@ -273,6 +274,7 @@ impl IdentFormats { ("field_reader".into(), constant.clone().suffix("_R")), ("field_writer".into(), constant.clone().suffix("_W")), ("enum_name".into(), constant.clone().suffix("_A")), + ("enum_read_name".into(), constant.clone().suffix("_A")), ("enum_write_name".into(), constant.clone().suffix("_AW")), ("enum_value".into(), constant.clone()), ("interrupt".into(), constant.clone()), diff --git a/src/generate/register.rs b/src/generate/register.rs index bf078785..d8975df7 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -612,7 +612,14 @@ pub fn fields( lookup_results.push((ev, epath)); } - let mut evs_r = None; + let read_enum = lookup_filter(&lookup_results, Usage::Read); + let write_enum = lookup_filter(&lookup_results, Usage::Write); + + // does the read and the write value has the same name? If we have the same, + // we can reuse read value type other than generating a new one. + let writer_reader_different_enum = !(can_read + && can_write + && matches!((read_enum, write_enum), (Some(e1), Some(e2)) if e1.0 == e2.0)); let brief_suffix = if let Field::Array(_, de) = &f { if let Some(range) = de.indexes_as_range() { @@ -652,14 +659,13 @@ pub fn fields( // get the type of value structure. It can be generated from either name field // in enumeratedValues if it's an enumeration, or from field name directly if it's not. - let value_read_ty = if let Some((evs, _)) = lookup_filter(&lookup_results, Usage::Read) - { - ident( - evs.name.as_deref().unwrap_or(&name), - config, - "enum_name", - span, - ) + let value_read_ty = if let Some((evs, _)) = read_enum { + let fmt = if writer_reader_different_enum { + "enum_read_name" + } else { + "enum_name" + }; + ident(evs.name.as_deref().unwrap_or(&name), config, fmt, span) } else { // raw_field_value_read_ty fty.clone() @@ -674,10 +680,7 @@ pub fn fields( // information in enumeratedValues; // if it's not enumeratedValues, always derive the read proxy as we do not need to re-export // it again from BitReader or FieldReader. - let should_derive_reader = matches!( - lookup_filter(&lookup_results, Usage::Read), - Some((_, None)) | None - ); + let should_derive_reader = matches!(read_enum, Some((_, None)) | None); // derive the read proxy structure if necessary. if should_derive_reader { @@ -712,11 +715,7 @@ pub fn fields( // if this is an enumeratedValues not derived from base, generate the enum structure // and implement functions for each value in enumeration. - if let Some((evs, None)) = lookup_filter(&lookup_results, Usage::Read) { - // we have enumeration for read, record this. If the enumeration for write operation - // later on is the same as the read enumeration, we reuse and do not generate again. - evs_r = Some(evs); - + if let Some((evs, None)) = read_enum { // parse enum variants from enumeratedValues svd record let mut variants = Variant::from_enumerated_values(evs, config)?; @@ -856,9 +855,7 @@ pub fn fields( // if this value is derived from a base, generate `pub use` code for each read proxy and value // if necessary. - if let Some((evs, Some(base))) = lookup_filter(&lookup_results, Usage::Read) { - // preserve value; if read type equals write type, writer would not generate value type again - evs_r = Some(evs); + if let Some((_, Some(base))) = read_enum { // generate pub use field_1 reader as field_2 reader let base_field = util::replace_suffix(&base.field.name, ""); let base_r = ident(&base_field, config, "field_reader", span); @@ -969,19 +966,17 @@ pub fn fields( // gets a brief of write proxy let field_writer_brief = format!("Field `{name}{brief_suffix}` writer - {description}"); - let value_write_ty = - if let Some((evs, _)) = lookup_filter(&lookup_results, Usage::Write) { - let writer_reader_different_enum = evs_r != Some(evs); - let fmt = if writer_reader_different_enum { - "enum_write_name" - } else { - "enum_name" - }; - ident(evs.name.as_deref().unwrap_or(&name), config, fmt, span) + let value_write_ty = if let Some((evs, _)) = write_enum { + let fmt = if writer_reader_different_enum { + "enum_write_name" } else { - // raw_field_value_write_ty - fty.clone() + "enum_name" }; + ident(evs.name.as_deref().unwrap_or(&name), config, fmt, span) + } else { + // raw_field_value_write_ty + fty.clone() + }; // name of write proxy type let writer_ty = ident(&name, config, "field_writer", span); @@ -990,7 +985,7 @@ pub fn fields( let mut unsafety = unsafety(f.write_constraint.as_ref(), width); // if we writes to enumeratedValues, generate its structure if it differs from read structure. - if let Some((evs, None)) = lookup_filter(&lookup_results, Usage::Write) { + if let Some((evs, None)) = write_enum { // parse variants from enumeratedValues svd record let mut variants = Variant::from_enumerated_values(evs, config)?; let map = enums_to_map(evs); @@ -1011,10 +1006,6 @@ pub fn fields( unsafety = false; } - // does the read and the write value has the same name? If we have the same, - // we can reuse read value type other than generating a new one. - let writer_reader_different_enum = evs_r != Some(evs); - // generate write value structure and From conversation if we can't reuse read value structure. if writer_reader_different_enum { if variants.is_empty() { @@ -1056,10 +1047,7 @@ pub fn fields( // derive writer. We derive writer if the write proxy is in current register module, // or writer in different register have different _SPEC structures - let should_derive_writer = matches!( - lookup_filter(&lookup_results, Usage::Write), - Some((_, None)) | None - ); + let should_derive_writer = matches!(write_enum, Some((_, None)) | None); // derive writer structure by type alias to generic write proxy structure. if should_derive_writer { @@ -1128,7 +1116,7 @@ pub fn fields( }); } - if let Some((evs, Some(base))) = lookup_filter(&lookup_results, Usage::Write) { + if let Some((_, Some(base))) = write_enum { // if base.register == None, derive write from the same module. This is allowed because both // the generated and source write proxy are in the same module. // we never reuse writer for writer in different module does not have the same _SPEC strcuture, @@ -1147,7 +1135,6 @@ pub fn fields( } // if base.register == None, it emits pub use structure from same module. if base.register() != fpath.register() { - let writer_reader_different_enum = evs_r != Some(evs); if writer_reader_different_enum { // use the same enum structure name if !writer_enum_derives.contains(&value_write_ty) { diff --git a/src/lib.rs b/src/lib.rs index e8118099..6a0b754f 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -564,7 +564,7 @@ //! |--------------------------------------------------------------------------------|:------:|:---------:|:---------:|:------:|:-----------:| //! | field_reader | | pascal | constant | R | _R | //! | field_writer | | pascal | constant | W | _W | -//! | enum_name | | pascal | constant | | _A | +//! | enum_name
enum_read_name | | pascal | constant | | _A | //! | enum_write_name | | pascal | constant | WO | _AW | //! | enum_value | | pascal | constant | | | //! | interrupt | | unchanged | constant | | | From 9a87eae25597f3372a35a5d4ea060dab91a379c7 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 21 Feb 2024 20:13:28 +0300 Subject: [PATCH 220/319] bump svd --- Cargo.lock | 79 +++++++++++++++++++++--------------------------------- Cargo.toml | 6 ++--- 2 files changed, 33 insertions(+), 52 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 86748504..81d9a121 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -28,9 +28,9 @@ dependencies = [ [[package]] name = "anstream" -version = "0.6.5" +version = "0.6.12" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d664a92ecae85fd0a7392615844904654d1d5f5514837f471ddef4a057aba1b6" +checksum = "96b09b5178381e0874812a9b157f7fe84982617e48f71f4e3235482775e5b540" dependencies = [ "anstyle", "anstyle-parse", @@ -42,9 +42,9 @@ dependencies = [ [[package]] name = "anstyle" -version = "1.0.4" +version = "1.0.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7079075b41f533b8c61d2a4d073c4676e1f8b249ff94a393b0595db304e0dd87" +checksum = "8901269c6307e8d93993578286ac0edf7f195079ffff5ebdeea6a59ffb7e36bc" [[package]] name = "anstyle-parse" @@ -350,17 +350,27 @@ dependencies = [ "cfg-if", ] +[[package]] +name = "env_filter" +version = "0.1.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a009aa4810eb158359dda09d0c87378e4bbb89b5a801f016885a4707ba24f7ea" +dependencies = [ + "log", + "regex", +] + [[package]] name = "env_logger" -version = "0.10.1" +version = "0.11.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "95b3f3e67048839cb0d0781f445682a35113da7121f7c949db0e2be96a4fbece" +checksum = "6c012a26a7f605efc424dd53697843a72be7dc86ad2d01f7814337794a12231d" dependencies = [ + "anstream", + "anstyle", + "env_filter", "humantime", - "is-terminal", "log", - "regex", - "termcolor", ] [[package]] @@ -655,17 +665,6 @@ dependencies = [ "toml", ] -[[package]] -name = "is-terminal" -version = "0.4.9" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "cb0889898416213fab133e1d33a0e5858a48177452750691bde3666d0fdbaf8b" -dependencies = [ - "hermit-abi", - "rustix", - "windows-sys 0.48.0", -] - [[package]] name = "itoa" version = "1.0.10" @@ -941,14 +940,14 @@ dependencies = [ [[package]] name = "regex" -version = "1.9.6" +version = "1.10.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ebee201405406dbf528b8b672104ae6d6d63e6d118cb10e4d51abbc7b58044ff" +checksum = "b62dbe01f0b06f9d8dc7d49e05a0785f153b00b2c227856282f671e0318c9b15" dependencies = [ "aho-corasick", "memchr", - "regex-automata 0.3.9", - "regex-syntax 0.7.5", + "regex-automata 0.4.5", + "regex-syntax 0.8.2", ] [[package]] @@ -962,13 +961,13 @@ dependencies = [ [[package]] name = "regex-automata" -version = "0.3.9" +version = "0.4.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "59b23e92ee4318893fa3fe3e6fb365258efbfe6ac6ab30f090cdcbb7aa37efa9" +checksum = "5bb987efffd3c6d0d8f5f89510bb458559eab11e4f869acb20bf845e016259cd" dependencies = [ "aho-corasick", "memchr", - "regex-syntax 0.7.5", + "regex-syntax 0.8.2", ] [[package]] @@ -979,9 +978,9 @@ checksum = "f162c6dd7b008981e4d40210aca20b4bd0f9b60ca9271061b07f78537722f2e1" [[package]] name = "regex-syntax" -version = "0.7.5" +version = "0.8.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "dbb5fb1acd8a1a18b3dd5be62d25485eb770e05afb408a9627d14d451bae12da" +checksum = "c08c74e62047bb2de4ff487b251e4a92e24f48745648451635cec7d591162d9f" [[package]] name = "reqwest" @@ -1209,9 +1208,9 @@ dependencies = [ [[package]] name = "svd-rs" -version = "0.14.7" +version = "0.14.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1c82f375efa1d0145467e6cc98fa0e4e1a3f3d497cece4bcdda247f4904a77d4" +checksum = "6aea8090314157cc490b559da0c66f2228c066b56154f0321ad83b459a0a8278" dependencies = [ "once_cell", "regex", @@ -1320,15 +1319,6 @@ dependencies = [ "windows-sys 0.48.0", ] -[[package]] -name = "termcolor" -version = "1.4.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ff1bc3d3f05aff0403e8ac0d92ced918ec05b666a43f83297ccef5bea8a3d449" -dependencies = [ - "winapi-util", -] - [[package]] name = "thiserror" version = "1.0.51" @@ -1709,15 +1699,6 @@ version = "0.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "ac3b87c63620426dd9b991e5ce0329eff545bccbbb34f3be09ff6fb6ab51b7b6" -[[package]] -name = "winapi-util" -version = "0.1.6" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f29e6f9198ba0d26b4c9f07dbe6f9ed633e1f3d5b8b414090084349e46a52596" -dependencies = [ - "winapi", -] - [[package]] name = "winapi-x86_64-pc-windows-gnu" version = "0.4.0" diff --git a/Cargo.toml b/Cargo.toml index b5aa0cc9..56b3189b 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -45,7 +45,7 @@ yaml = ["dep:serde_yaml"] [dependencies] clap = { version = "4.0", optional = true } irx-config = { version = "=3.3.0", features = ["cmd", "toml-parser"], optional = true } -env_logger = { version = "0.10", optional = true } +env_logger = { version = "0.11", optional = true } inflections = "1.1" log = { version = "~0.4", features = ["std"] } quote = "1.0" @@ -55,7 +55,7 @@ thiserror = "1.0" serde = { version = "1.0", optional = true } serde_json = { version = "1.0.85", optional = true } serde_yaml = { version = "0.9.11", optional = true } -regex = "1.9.0" +regex = "1.10.0" html-escape = "0.2" [dependencies.svd-parser] @@ -64,7 +64,7 @@ version = "0.14.5" [dependencies.svd-rs] features = ["serde"] -version = "0.14.7" +version = "0.14.8" [dependencies.syn] version = "2.0" From 440248c011a0efdd9a59d0e5d206d68ba0baa544 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Sat, 24 Feb 2024 12:14:30 +0100 Subject: [PATCH 221/319] semver has a default chip --- ci/svd2rust-regress/src/diff.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ci/svd2rust-regress/src/diff.rs b/ci/svd2rust-regress/src/diff.rs index a2e132ff..3220157f 100644 --- a/ci/svd2rust-regress/src/diff.rs +++ b/ci/svd2rust-regress/src/diff.rs @@ -187,7 +187,7 @@ impl Diffing { let test = match (tests.len(), self.sub.as_ref(), self.url.as_ref()) { (1, _, None) => tests[0].clone(), - (_, Some(DiffingMode::Pr { .. }), None) => tests + (_, Some(DiffingMode::Pr { .. } | DiffingMode::Semver { .. }), None) => tests .iter() .find(|t| t.chip == "STM32F103") .map(|t| (*t).clone()) From a351921cc1dbb89a00a1726620954f06535692cb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Sat, 24 Feb 2024 12:14:49 +0100 Subject: [PATCH 222/319] workaround cargo issue --- ci/svd2rust-regress/src/svd_test.rs | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 13bb6648..1ea01f2e 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -191,6 +191,10 @@ impl TestCase { self.name(), chip_dir.display() ); + // XXX: Workaround for https://github.com/rust-lang/cargo/issues/6009#issuecomment-1925445245 + let manifest_path = crate::get_cargo_workspace().join("Cargo.toml"); + let workspace_toml = + fs::read(&manifest_path).context("failed to read workspace Cargo.toml")?; Command::new("cargo") .env("USER", user) .arg("init") @@ -201,6 +205,9 @@ impl TestCase { .arg(&chip_dir) .capture_outputs(true, "cargo init", None, None, &[]) .with_context(|| "Failed to cargo init")?; + std::fs::write(manifest_path, workspace_toml) + .context("failed to write workspace Cargo.toml")?; + let svd_toml = path_helper_base(&chip_dir, &["Cargo.toml"]); let mut file = OpenOptions::new() .write(true) From 1b7e5e47adf37e669d92c53c34575fac82b03ba6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Sat, 24 Feb 2024 12:17:25 +0100 Subject: [PATCH 223/319] check for membership later, since the check seems to not work --- .github/workflows/diff.yml | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/.github/workflows/diff.yml b/.github/workflows/diff.yml index 2ab5dc72..a055ddec 100644 --- a/.github/workflows/diff.yml +++ b/.github/workflows/diff.yml @@ -6,12 +6,18 @@ on: jobs: generate: name: | - Generate matrix. ${{ github.event.comment.user.name }}: ${{ github.event.comment.author_association}} + Generate matrix. runs-on: ubuntu-latest outputs: diffs: ${{ steps.regress-ci.outputs.diffs }} - if: github.event.issue.pull_request && (github.event.comment.author_association == 'MEMBER' || github.event.comment.author_association == 'OWNER') && (contains(toJson(github.event.comment.body), '\n/ci') || startsWith(github.event.comment.body, '/ci')) + if: contains(toJson(github.event.comment.body), '\n/ci') || startsWith(github.event.comment.body, '/ci') steps: + - name: Is member + run: | + if [[ "${{ github.event.comment.author_association }}" != "MEMBER" && "${{ github.event.comment.author_association }}" != "OWNER" ]]; then + exit 1 + fi + - uses: actions/checkout@v4 - uses: dtolnay/rust-toolchain@master From 10bab4fe629e8143fc7f0b2f7542553688d9fb6c Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Thu, 22 Feb 2024 13:03:46 +0300 Subject: [PATCH 224/319] ReadWriteEnum --- CHANGELOG.md | 2 +- src/generate/register.rs | 116 ++++++++++++++++++++++++++++++++------- 2 files changed, 97 insertions(+), 21 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 36b9c51b..876c495c 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -11,7 +11,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - generic unsafe `W::bits` + safe `W::set` - Add `base-address-shift` config flag - Use `PascalCase` for type idents, fix case changing bugs, add `--ident-format` (`-f`) option flag -- Add `enum_read_name` for `read-only` enums +- Add `enum_read_name` for `read-only` enums, `RWEnum` helper ## [v0.31.5] - 2024-01-04 diff --git a/src/generate/register.rs b/src/generate/register.rs index d8975df7..0e8796fe 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -510,6 +510,71 @@ fn render_register_mod_debug( Ok(r_debug_impl) } +type EV = (EnumeratedValues, Option); + +pub enum RWEnum<'a> { + ReadAndWriteEnum(&'a EV), + ReadEnumWriteEnum(&'a EV, &'a EV), + ReadEnumWriteRaw(&'a EV), + ReadRawWriteEnum(&'a EV), + ReadEnum(&'a EV), + ReadRaw, + WriteEnum(&'a EV), + WriteRaw, + ReadRawWriteRaw, +} +impl<'a> RWEnum<'a> { + pub fn different_enums(&self) -> bool { + matches!(self, Self::ReadEnumWriteEnum(_, _)) + } + pub fn read_write(&self) -> bool { + matches!( + self, + Self::ReadAndWriteEnum(_) + | Self::ReadEnumWriteEnum(_, _) + | Self::ReadEnumWriteRaw(_) + | Self::ReadRawWriteEnum(_) + | Self::ReadRawWriteRaw + ) + } + pub fn read_only(&self) -> bool { + matches!(self, Self::ReadEnum(_) | Self::ReadRaw) + } + pub fn can_read(&self) -> bool { + self.read_write() || self.read_only() + } + pub fn write_only(&self) -> bool { + matches!(self, Self::WriteEnum(_) | Self::WriteRaw) + } + pub fn can_write(&self) -> bool { + self.read_write() || self.write_only() + } + pub fn read_enum(&self) -> Option<&'a EV> { + match *self { + Self::ReadAndWriteEnum(e) + | Self::ReadEnumWriteEnum(e, _) + | Self::ReadEnumWriteRaw(e) + | Self::ReadEnum(e) => Some(e), + _ => None, + } + } + pub fn write_enum(&self) -> Option<&'a EV> { + match *self { + Self::ReadAndWriteEnum(e) + | Self::ReadEnumWriteEnum(_, e) + | Self::ReadRawWriteEnum(e) + | Self::WriteEnum(e) => Some(e), + _ => None, + } + } + pub fn gen_write_enum(&self) -> bool { + matches!( + self, + Self::ReadEnumWriteEnum(_, _) | Self::ReadRawWriteEnum(_) | Self::WriteEnum(_) + ) + } +} + #[allow(clippy::too_many_arguments)] pub fn fields( mut fields: Vec<&Field>, @@ -612,14 +677,25 @@ pub fn fields( lookup_results.push((ev, epath)); } - let read_enum = lookup_filter(&lookup_results, Usage::Read); - let write_enum = lookup_filter(&lookup_results, Usage::Write); - - // does the read and the write value has the same name? If we have the same, - // we can reuse read value type other than generating a new one. - let writer_reader_different_enum = !(can_read - && can_write - && matches!((read_enum, write_enum), (Some(e1), Some(e2)) if e1.0 == e2.0)); + let rwenum = match ( + can_read, + lookup_filter(&lookup_results, Usage::Read), + can_write, + lookup_filter(&lookup_results, Usage::Write), + ) { + (true, Some(e1), true, Some(e2)) if e1.0 == e2.0 => RWEnum::ReadAndWriteEnum(e1), + (true, Some(e1), true, Some(e2)) => RWEnum::ReadEnumWriteEnum(e1, e2), + (true, Some(e), true, None) => RWEnum::ReadEnumWriteRaw(e), + (true, None, true, Some(e)) => RWEnum::ReadRawWriteEnum(e), + (true, Some(e), false, _) => RWEnum::ReadEnum(e), + (true, None, false, _) => RWEnum::ReadRaw, + (false, _, true, Some(e)) => RWEnum::WriteEnum(e), + (false, _, true, None) => RWEnum::WriteRaw, + (true, _, true, _) => RWEnum::ReadRawWriteRaw, + (false, _, false, _) => { + return Err(anyhow!("Field {fpath} is not writtable or readable")) + } + }; let brief_suffix = if let Field::Array(_, de) = &f { if let Some(range) = de.indexes_as_range() { @@ -659,8 +735,8 @@ pub fn fields( // get the type of value structure. It can be generated from either name field // in enumeratedValues if it's an enumeration, or from field name directly if it's not. - let value_read_ty = if let Some((evs, _)) = read_enum { - let fmt = if writer_reader_different_enum { + let value_read_ty = if let Some((evs, _)) = rwenum.read_enum() { + let fmt = if rwenum.different_enums() { "enum_read_name" } else { "enum_name" @@ -680,7 +756,7 @@ pub fn fields( // information in enumeratedValues; // if it's not enumeratedValues, always derive the read proxy as we do not need to re-export // it again from BitReader or FieldReader. - let should_derive_reader = matches!(read_enum, Some((_, None)) | None); + let should_derive_reader = matches!(rwenum.read_enum(), Some((_, None)) | None); // derive the read proxy structure if necessary. if should_derive_reader { @@ -715,7 +791,7 @@ pub fn fields( // if this is an enumeratedValues not derived from base, generate the enum structure // and implement functions for each value in enumeration. - if let Some((evs, None)) = read_enum { + if let Some((evs, None)) = rwenum.read_enum() { // parse enum variants from enumeratedValues svd record let mut variants = Variant::from_enumerated_values(evs, config)?; @@ -855,7 +931,7 @@ pub fn fields( // if this value is derived from a base, generate `pub use` code for each read proxy and value // if necessary. - if let Some((_, Some(base))) = read_enum { + if let Some((_, Some(base))) = rwenum.read_enum() { // generate pub use field_1 reader as field_2 reader let base_field = util::replace_suffix(&base.field.name, ""); let base_r = ident(&base_field, config, "field_reader", span); @@ -966,8 +1042,8 @@ pub fn fields( // gets a brief of write proxy let field_writer_brief = format!("Field `{name}{brief_suffix}` writer - {description}"); - let value_write_ty = if let Some((evs, _)) = write_enum { - let fmt = if writer_reader_different_enum { + let value_write_ty = if let Some((evs, _)) = rwenum.write_enum() { + let fmt = if rwenum.different_enums() { "enum_write_name" } else { "enum_name" @@ -985,7 +1061,7 @@ pub fn fields( let mut unsafety = unsafety(f.write_constraint.as_ref(), width); // if we writes to enumeratedValues, generate its structure if it differs from read structure. - if let Some((evs, None)) = write_enum { + if let Some((evs, None)) = rwenum.write_enum() { // parse variants from enumeratedValues svd record let mut variants = Variant::from_enumerated_values(evs, config)?; let map = enums_to_map(evs); @@ -1007,7 +1083,7 @@ pub fn fields( } // generate write value structure and From conversation if we can't reuse read value structure. - if writer_reader_different_enum { + if rwenum.gen_write_enum() { if variants.is_empty() { add_with_no_variants( mod_items, @@ -1047,7 +1123,7 @@ pub fn fields( // derive writer. We derive writer if the write proxy is in current register module, // or writer in different register have different _SPEC structures - let should_derive_writer = matches!(write_enum, Some((_, None)) | None); + let should_derive_writer = matches!(rwenum.write_enum(), Some((_, None)) | None); // derive writer structure by type alias to generic write proxy structure. if should_derive_writer { @@ -1116,7 +1192,7 @@ pub fn fields( }); } - if let Some((_, Some(base))) = write_enum { + if let Some((_, Some(base))) = rwenum.write_enum() { // if base.register == None, derive write from the same module. This is allowed because both // the generated and source write proxy are in the same module. // we never reuse writer for writer in different module does not have the same _SPEC strcuture, @@ -1135,7 +1211,7 @@ pub fn fields( } // if base.register == None, it emits pub use structure from same module. if base.register() != fpath.register() { - if writer_reader_different_enum { + if rwenum.gen_write_enum() { // use the same enum structure name if !writer_enum_derives.contains(&value_write_ty) { let base_path = base_syn_path(base, &fpath, &value_write_ty, config)?; From 7af7013c96f1690d9acc0f4f3f2f672fd281c711 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 23 Feb 2024 07:19:35 +0300 Subject: [PATCH 225/319] disable Fujitsu S6E2CC --- ci/script.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ci/script.sh b/ci/script.sh index 1e4ab69a..fcb1199e 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -404,7 +404,7 @@ main() { test_svd MB9BFD1xS test_svd MB9BFD1xT test_svd S6E1A1 - test_svd S6E2CC + #test_svd S6E2CC #broken CANFD.FDESCR access ;; GD32) From 17092f35a3a54c7d773db98d888e65d7b926d7b7 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 23 Feb 2024 09:42:06 +0300 Subject: [PATCH 226/319] refactor field generation logic --- src/generate/register.rs | 271 +++++++++++++++++++++------------------ 1 file changed, 145 insertions(+), 126 deletions(-) diff --git a/src/generate/register.rs b/src/generate/register.rs index 0e8796fe..0fb00cc9 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -567,7 +567,31 @@ impl<'a> RWEnum<'a> { _ => None, } } - pub fn gen_write_enum(&self) -> bool { + pub fn generate_reader(&self) -> bool { + matches!( + self, + Self::ReadAndWriteEnum((_, None)) + | Self::ReadEnumWriteEnum((_, None), _) + | Self::ReadEnumWriteRaw((_, None)) + | Self::ReadRawWriteEnum(_) + | Self::ReadEnum((_, None)) + | Self::ReadRaw + | Self::ReadRawWriteRaw + ) + } + pub fn generate_writer(&self) -> bool { + matches!( + self, + Self::ReadAndWriteEnum((_, None)) + | Self::ReadEnumWriteEnum(_, (_, None)) + | Self::ReadRawWriteEnum((_, None)) + | Self::ReadEnumWriteRaw(_) + | Self::WriteEnum((_, None)) + | Self::WriteRaw + | Self::ReadRawWriteRaw + ) + } + pub fn generate_write_enum(&self) -> bool { matches!( self, Self::ReadEnumWriteEnum(_, _) | Self::ReadRawWriteEnum(_) | Self::WriteEnum(_) @@ -691,7 +715,7 @@ pub fn fields( (true, None, false, _) => RWEnum::ReadRaw, (false, _, true, Some(e)) => RWEnum::WriteEnum(e), (false, _, true, None) => RWEnum::WriteRaw, - (true, _, true, _) => RWEnum::ReadRawWriteRaw, + (true, None, true, None) => RWEnum::ReadRawWriteRaw, (false, _, false, _) => { return Err(anyhow!("Field {fpath} is not writtable or readable")) } @@ -710,29 +734,6 @@ pub fn fields( // If this field can be read, generate read proxy structure and value structure. if can_read { - let cast = if width == 1 { - quote! { != 0 } - } else { - quote! { as #fty } - }; - let value = if offset != 0 { - let offset = &unsuffixed(offset); - quote! { (self.bits >> #offset) } - } else { - quote! { self.bits } - }; - let value = if use_mask && use_cast { - quote! { (#value & #hexmask) #cast } - } else if use_mask { - quote! { #value & #hexmask } - } else { - value - }; - - // get a brief description for this field - // the suffix string from field name is removed in brief description. - let field_reader_brief = format!("Field `{name}{brief_suffix}` reader - {description}"); - // get the type of value structure. It can be generated from either name field // in enumeratedValues if it's an enumeration, or from field name directly if it's not. let value_read_ty = if let Some((evs, _)) = rwenum.read_enum() { @@ -747,45 +748,6 @@ pub fn fields( fty.clone() }; - // name of read proxy type - let reader_ty = ident(&name, config, "field_reader", span); - - // if it's enumeratedValues and it's derived from base, don't derive the read proxy - // as the base has already dealt with this; - // if it's enumeratedValues but not derived from base, derive the reader from - // information in enumeratedValues; - // if it's not enumeratedValues, always derive the read proxy as we do not need to re-export - // it again from BitReader or FieldReader. - let should_derive_reader = matches!(rwenum.read_enum(), Some((_, None)) | None); - - // derive the read proxy structure if necessary. - if should_derive_reader { - let reader = if width == 1 { - if value_read_ty == "bool" { - quote! { crate::BitReader } - } else { - quote! { crate::BitReader<#value_read_ty> } - } - } else if value_read_ty == "u8" { - quote! { crate::FieldReader } - } else { - quote! { crate::FieldReader<#value_read_ty> } - }; - let mut readerdoc = field_reader_brief.clone(); - if let Some(action) = f.read_action { - readerdoc += match action { - ReadAction::Clear => "\n\nThe field is **cleared** (set to zero) following a read operation.", - ReadAction::Set => "\n\nThe field is **set** (set to ones) following a read operation.", - ReadAction::Modify => "\n\nThe field is **modified** in some way after a read operation.", - ReadAction::ModifyExternal => "\n\nOne or more dependent resources other than the current field are immediately affected by a read operation.", - }; - } - mod_items.extend(quote! { - #[doc = #readerdoc] - pub type #reader_ty = #reader; - }); - } - // collect information on items in enumeration to generate it later. let mut enum_items = TokenStream::new(); @@ -927,11 +889,61 @@ pub fn fields( }); } } + } else if let Some((_, Some(base))) = rwenum.read_enum() { + // only pub use enum when derived from another register. + // If field is in the same register it emits + // pub use enum from same module which is not expected + if base.register() != fpath.register() { + // use the same enum structure name + if !enum_derives.contains(&value_read_ty) { + let base_path = base_syn_path(base, &fpath, &value_read_ty, config)?; + mod_items.extend(quote! { + #[doc = #description] + pub use #base_path as #value_read_ty; + }); + enum_derives.insert(value_read_ty.clone()); + } + } } - // if this value is derived from a base, generate `pub use` code for each read proxy and value - // if necessary. - if let Some((_, Some(base))) = rwenum.read_enum() { + // get a brief description for this field + // the suffix string from field name is removed in brief description. + let field_reader_brief = format!("Field `{name}{brief_suffix}` reader - {description}"); + + // name of read proxy type + let reader_ty = ident(&name, config, "field_reader", span); + + if rwenum.generate_reader() { + // Generate the read proxy structure if necessary. + + let reader = if width == 1 { + if value_read_ty == "bool" { + quote! { crate::BitReader } + } else { + quote! { crate::BitReader<#value_read_ty> } + } + } else if value_read_ty == "u8" { + quote! { crate::FieldReader } + } else { + quote! { crate::FieldReader<#value_read_ty> } + }; + let mut readerdoc = field_reader_brief.clone(); + if let Some(action) = f.read_action { + readerdoc += match action { + ReadAction::Clear => "\n\nThe field is **cleared** (set to zero) following a read operation.", + ReadAction::Set => "\n\nThe field is **set** (set to ones) following a read operation.", + ReadAction::Modify => "\n\nThe field is **modified** in some way after a read operation.", + ReadAction::ModifyExternal => "\n\nOne or more dependent resources other than the current field are immediately affected by a read operation.", + }; + } + mod_items.extend(quote! { + #[doc = #readerdoc] + pub type #reader_ty = #reader; + }); + } else if let Some((_, Some(base))) = rwenum.read_enum() { + // if this value is derived from a base, generate `pub use` code for each read proxy + // and value if necessary. + // generate pub use field_1 reader as field_2 reader let base_field = util::replace_suffix(&base.field.name, ""); let base_r = ident(&base_field, config, "field_reader", span); @@ -943,21 +955,15 @@ pub fn fields( }); reader_derives.insert(reader_ty.clone()); } - // only pub use enum when base.register != None. if base.register == None, it emits - // pub use enum from same module which is not expected - if base.register() != fpath.register() { - // use the same enum structure name - if !enum_derives.contains(&value_read_ty) { - let base_path = base_syn_path(base, &fpath, &value_read_ty, config)?; - mod_items.extend(quote! { - #[doc = #description] - pub use #base_path as #value_read_ty; - }); - enum_derives.insert(value_read_ty.clone()); - } - } } + // Generate field reader accessors + let cast = if width == 1 { + quote! { != 0 } + } else { + quote! { as #fty } + }; + if let Field::Array(f, de) = &f { let increment = de.dim_increment; let doc = util::replace_suffix(&description, &brief_suffix); @@ -1015,6 +1021,20 @@ pub fn fields( }); } } else { + let value = if offset != 0 { + let offset = &unsuffixed(offset); + quote! { (self.bits >> #offset) } + } else { + quote! { self.bits } + }; + let value = if use_mask && use_cast { + quote! { (#value & #hexmask) #cast } + } else if use_mask { + quote! { #value & #hexmask } + } else { + value + }; + let doc = description_with_bits(description_raw, offset, width); r_impl_items.extend(quote! { #[doc = #doc] @@ -1038,10 +1058,6 @@ pub fn fields( // If this field can be written, generate write proxy. Generate write value if it differs from // the read value, or else we reuse read value. if can_write { - let mwv = f.modified_write_values.or(rmwv).unwrap_or_default(); - // gets a brief of write proxy - let field_writer_brief = format!("Field `{name}{brief_suffix}` writer - {description}"); - let value_write_ty = if let Some((evs, _)) = rwenum.write_enum() { let fmt = if rwenum.different_enums() { "enum_write_name" @@ -1054,9 +1070,6 @@ pub fn fields( fty.clone() }; - // name of write proxy type - let writer_ty = ident(&name, config, "field_writer", span); - let mut proxy_items = TokenStream::new(); let mut unsafety = unsafety(f.write_constraint.as_ref(), width); @@ -1083,7 +1096,7 @@ pub fn fields( } // generate write value structure and From conversation if we can't reuse read value structure. - if rwenum.gen_write_enum() { + if rwenum.generate_write_enum() { if variants.is_empty() { add_with_no_variants( mod_items, @@ -1119,14 +1132,33 @@ pub fn fields( } }); } + } else if let Some((_, Some(base))) = rwenum.write_enum() { + // If field is in the same register it emits pub use structure from same module. + if base.register() != fpath.register() { + if rwenum.generate_write_enum() { + // use the same enum structure name + if !writer_enum_derives.contains(&value_write_ty) { + let base_path = base_syn_path(base, &fpath, &value_write_ty, config)?; + mod_items.extend(quote! { + #[doc = #description] + pub use #base_path as #value_write_ty; + }); + writer_enum_derives.insert(value_write_ty.clone()); + } + } + } } - // derive writer. We derive writer if the write proxy is in current register module, - // or writer in different register have different _SPEC structures - let should_derive_writer = matches!(rwenum.write_enum(), Some((_, None)) | None); + let mwv = f.modified_write_values.or(rmwv).unwrap_or_default(); + + // gets a brief of write proxy + let field_writer_brief = format!("Field `{name}{brief_suffix}` writer - {description}"); + + // name of write proxy type + let writer_ty = ident(&name, config, "field_writer", span); - // derive writer structure by type alias to generic write proxy structure. - if should_derive_writer { + // Generate writer structure by type alias to generic write proxy structure. + if rwenum.generate_writer() { let proxy = if width == 1 { use ModifiedWriteValues::*; let wproxy = Ident::new( @@ -1166,6 +1198,23 @@ pub fn fields( #[doc = #field_writer_brief] pub type #writer_ty<'a, REG> = #proxy; }); + } else if let Some((_, Some(base))) = rwenum.write_enum() { + // if base.register == None, derive write from the same module. This is allowed because both + // the generated and source write proxy are in the same module. + // we never reuse writer for writer in different module does not have the same _SPEC strcuture, + // thus we cannot write to current register using re-exported write proxy. + + // generate pub use field_1 writer as field_2 writer + let base_field = util::replace_suffix(&base.field.name, ""); + let base_w = ident(&base_field, config, "field_writer", span); + if !writer_derives.contains(&writer_ty) { + let base_path = base_syn_path(base, &fpath, &base_w, config)?; + mod_items.extend(quote! { + #[doc = #field_writer_brief] + pub use #base_path as #writer_ty; + }); + writer_derives.insert(writer_ty.clone()); + } } // generate proxy items from collected information @@ -1192,39 +1241,7 @@ pub fn fields( }); } - if let Some((_, Some(base))) = rwenum.write_enum() { - // if base.register == None, derive write from the same module. This is allowed because both - // the generated and source write proxy are in the same module. - // we never reuse writer for writer in different module does not have the same _SPEC strcuture, - // thus we cannot write to current register using re-exported write proxy. - - // generate pub use field_1 writer as field_2 writer - let base_field = util::replace_suffix(&base.field.name, ""); - let base_w = ident(&base_field, config, "field_writer", span); - if !writer_derives.contains(&writer_ty) { - let base_path = base_syn_path(base, &fpath, &base_w, config)?; - mod_items.extend(quote! { - #[doc = #field_writer_brief] - pub use #base_path as #writer_ty; - }); - writer_derives.insert(writer_ty.clone()); - } - // if base.register == None, it emits pub use structure from same module. - if base.register() != fpath.register() { - if rwenum.gen_write_enum() { - // use the same enum structure name - if !writer_enum_derives.contains(&value_write_ty) { - let base_path = base_syn_path(base, &fpath, &value_write_ty, config)?; - mod_items.extend(quote! { - #[doc = #description] - pub use #base_path as #value_write_ty; - }); - writer_enum_derives.insert(value_write_ty.clone()); - } - } - } - } - + // Generate field writer accessors if let Field::Array(f, de) = &f { let increment = de.dim_increment; let offset_calc = calculate_offset(increment, offset, false); @@ -1276,6 +1293,8 @@ pub fn fields( } }); } + + // Update register modify bit masks let bitmask = (u64::MAX >> (64 - width)) << offset; use ModifiedWriteValues::*; match mwv { From 241b3f7f87e4034313831dc62feecdc3db49e310 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 23 Feb 2024 10:41:49 +0300 Subject: [PATCH 227/319] EV enum --- src/generate/register.rs | 118 +++++++++++++++++++++------------------ 1 file changed, 63 insertions(+), 55 deletions(-) diff --git a/src/generate/register.rs b/src/generate/register.rs index 0fb00cc9..dd9d6c55 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -510,16 +510,38 @@ fn render_register_mod_debug( Ok(r_debug_impl) } -type EV = (EnumeratedValues, Option); +#[derive(Clone, Copy, Debug)] +pub enum EV<'a> { + New(&'a EnumeratedValues), + Derived(&'a EnumeratedValues, &'a EnumPath), +} + +impl<'a> EV<'a> { + fn values(&self) -> &EnumeratedValues { + match self { + Self::New(e) | Self::Derived(e, _) => e, + } + } +} + +impl<'a> From<&'a (EnumeratedValues, Option)> for EV<'a> { + fn from(value: &'a (EnumeratedValues, Option)) -> Self { + match value.1.as_ref() { + Some(base) => Self::Derived(&value.0, &base), + None => Self::New(&value.0), + } + } +} +#[derive(Clone, Copy, Debug)] pub enum RWEnum<'a> { - ReadAndWriteEnum(&'a EV), - ReadEnumWriteEnum(&'a EV, &'a EV), - ReadEnumWriteRaw(&'a EV), - ReadRawWriteEnum(&'a EV), - ReadEnum(&'a EV), + ReadAndWriteEnum(EV<'a>), + ReadEnumWriteEnum(EV<'a>, EV<'a>), + ReadEnumWriteRaw(EV<'a>), + ReadRawWriteEnum(EV<'a>), + ReadEnum(EV<'a>), ReadRaw, - WriteEnum(&'a EV), + WriteEnum(EV<'a>), WriteRaw, ReadRawWriteRaw, } @@ -549,48 +571,24 @@ impl<'a> RWEnum<'a> { pub fn can_write(&self) -> bool { self.read_write() || self.write_only() } - pub fn read_enum(&self) -> Option<&'a EV> { - match *self { + pub fn read_enum(&self) -> Option> { + match self { Self::ReadAndWriteEnum(e) | Self::ReadEnumWriteEnum(e, _) | Self::ReadEnumWriteRaw(e) - | Self::ReadEnum(e) => Some(e), + | Self::ReadEnum(e) => Some(*e), _ => None, } } - pub fn write_enum(&self) -> Option<&'a EV> { - match *self { + pub fn write_enum(&self) -> Option> { + match self { Self::ReadAndWriteEnum(e) | Self::ReadEnumWriteEnum(_, e) | Self::ReadRawWriteEnum(e) - | Self::WriteEnum(e) => Some(e), + | Self::WriteEnum(e) => Some(*e), _ => None, } } - pub fn generate_reader(&self) -> bool { - matches!( - self, - Self::ReadAndWriteEnum((_, None)) - | Self::ReadEnumWriteEnum((_, None), _) - | Self::ReadEnumWriteRaw((_, None)) - | Self::ReadRawWriteEnum(_) - | Self::ReadEnum((_, None)) - | Self::ReadRaw - | Self::ReadRawWriteRaw - ) - } - pub fn generate_writer(&self) -> bool { - matches!( - self, - Self::ReadAndWriteEnum((_, None)) - | Self::ReadEnumWriteEnum(_, (_, None)) - | Self::ReadRawWriteEnum((_, None)) - | Self::ReadEnumWriteRaw(_) - | Self::WriteEnum((_, None)) - | Self::WriteRaw - | Self::ReadRawWriteRaw - ) - } pub fn generate_write_enum(&self) -> bool { matches!( self, @@ -707,13 +705,13 @@ pub fn fields( can_write, lookup_filter(&lookup_results, Usage::Write), ) { - (true, Some(e1), true, Some(e2)) if e1.0 == e2.0 => RWEnum::ReadAndWriteEnum(e1), - (true, Some(e1), true, Some(e2)) => RWEnum::ReadEnumWriteEnum(e1, e2), - (true, Some(e), true, None) => RWEnum::ReadEnumWriteRaw(e), - (true, None, true, Some(e)) => RWEnum::ReadRawWriteEnum(e), - (true, Some(e), false, _) => RWEnum::ReadEnum(e), + (true, Some(e1), true, Some(e2)) if e1.0 == e2.0 => RWEnum::ReadAndWriteEnum(e1.into()), + (true, Some(e1), true, Some(e2)) => RWEnum::ReadEnumWriteEnum(e1.into(), e2.into()), + (true, Some(e), true, None) => RWEnum::ReadEnumWriteRaw(e.into()), + (true, None, true, Some(e)) => RWEnum::ReadRawWriteEnum(e.into()), + (true, Some(e), false, _) => RWEnum::ReadEnum(e.into()), (true, None, false, _) => RWEnum::ReadRaw, - (false, _, true, Some(e)) => RWEnum::WriteEnum(e), + (false, _, true, Some(e)) => RWEnum::WriteEnum(e.into()), (false, _, true, None) => RWEnum::WriteRaw, (true, None, true, None) => RWEnum::ReadRawWriteRaw, (false, _, false, _) => { @@ -736,13 +734,18 @@ pub fn fields( if can_read { // get the type of value structure. It can be generated from either name field // in enumeratedValues if it's an enumeration, or from field name directly if it's not. - let value_read_ty = if let Some((evs, _)) = rwenum.read_enum() { + let value_read_ty = if let Some(ev) = rwenum.read_enum() { let fmt = if rwenum.different_enums() { "enum_read_name" } else { "enum_name" }; - ident(evs.name.as_deref().unwrap_or(&name), config, fmt, span) + ident( + ev.values().name.as_deref().unwrap_or(&name), + config, + fmt, + span, + ) } else { // raw_field_value_read_ty fty.clone() @@ -753,7 +756,7 @@ pub fn fields( // if this is an enumeratedValues not derived from base, generate the enum structure // and implement functions for each value in enumeration. - if let Some((evs, None)) = rwenum.read_enum() { + if let Some(EV::New(evs)) = rwenum.read_enum() { // parse enum variants from enumeratedValues svd record let mut variants = Variant::from_enumerated_values(evs, config)?; @@ -889,7 +892,7 @@ pub fn fields( }); } } - } else if let Some((_, Some(base))) = rwenum.read_enum() { + } else if let Some(EV::Derived(_, base)) = rwenum.read_enum() { // only pub use enum when derived from another register. // If field is in the same register it emits // pub use enum from same module which is not expected @@ -913,7 +916,7 @@ pub fn fields( // name of read proxy type let reader_ty = ident(&name, config, "field_reader", span); - if rwenum.generate_reader() { + if let Some(EV::New(_)) | None = rwenum.read_enum() { // Generate the read proxy structure if necessary. let reader = if width == 1 { @@ -940,7 +943,7 @@ pub fn fields( #[doc = #readerdoc] pub type #reader_ty = #reader; }); - } else if let Some((_, Some(base))) = rwenum.read_enum() { + } else if let Some(EV::Derived(_, base)) = rwenum.read_enum() { // if this value is derived from a base, generate `pub use` code for each read proxy // and value if necessary. @@ -1058,13 +1061,18 @@ pub fn fields( // If this field can be written, generate write proxy. Generate write value if it differs from // the read value, or else we reuse read value. if can_write { - let value_write_ty = if let Some((evs, _)) = rwenum.write_enum() { + let value_write_ty = if let Some(ev) = rwenum.write_enum() { let fmt = if rwenum.different_enums() { "enum_write_name" } else { "enum_name" }; - ident(evs.name.as_deref().unwrap_or(&name), config, fmt, span) + ident( + ev.values().name.as_deref().unwrap_or(&name), + config, + fmt, + span, + ) } else { // raw_field_value_write_ty fty.clone() @@ -1074,7 +1082,7 @@ pub fn fields( let mut unsafety = unsafety(f.write_constraint.as_ref(), width); // if we writes to enumeratedValues, generate its structure if it differs from read structure. - if let Some((evs, None)) = rwenum.write_enum() { + if let Some(EV::New(evs)) = rwenum.write_enum() { // parse variants from enumeratedValues svd record let mut variants = Variant::from_enumerated_values(evs, config)?; let map = enums_to_map(evs); @@ -1132,7 +1140,7 @@ pub fn fields( } }); } - } else if let Some((_, Some(base))) = rwenum.write_enum() { + } else if let Some(EV::Derived(_, base)) = rwenum.write_enum() { // If field is in the same register it emits pub use structure from same module. if base.register() != fpath.register() { if rwenum.generate_write_enum() { @@ -1158,7 +1166,7 @@ pub fn fields( let writer_ty = ident(&name, config, "field_writer", span); // Generate writer structure by type alias to generic write proxy structure. - if rwenum.generate_writer() { + if let Some(EV::New(_)) | None = rwenum.write_enum() { let proxy = if width == 1 { use ModifiedWriteValues::*; let wproxy = Ident::new( @@ -1198,7 +1206,7 @@ pub fn fields( #[doc = #field_writer_brief] pub type #writer_ty<'a, REG> = #proxy; }); - } else if let Some((_, Some(base))) = rwenum.write_enum() { + } else if let Some(EV::Derived(_, base)) = rwenum.write_enum() { // if base.register == None, derive write from the same module. This is allowed because both // the generated and source write proxy are in the same module. // we never reuse writer for writer in different module does not have the same _SPEC strcuture, From edad5271414784d1ab0581fc4bd9319b9c906119 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 23 Feb 2024 22:04:46 +0300 Subject: [PATCH 228/319] review --- src/generate/register.rs | 81 +++++++++++++++++++++------------------- 1 file changed, 43 insertions(+), 38 deletions(-) diff --git a/src/generate/register.rs b/src/generate/register.rs index dd9d6c55..adae8912 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -535,64 +535,63 @@ impl<'a> From<&'a (EnumeratedValues, Option)> for EV<'a> { #[derive(Clone, Copy, Debug)] pub enum RWEnum<'a> { - ReadAndWriteEnum(EV<'a>), - ReadEnumWriteEnum(EV<'a>, EV<'a>), - ReadEnumWriteRaw(EV<'a>), - ReadRawWriteEnum(EV<'a>), - ReadEnum(EV<'a>), - ReadRaw, - WriteEnum(EV<'a>), - WriteRaw, - ReadRawWriteRaw, + ReadWriteCommon(EV<'a>), + ReadWrite(ReadEnum<'a>, WriteEnum<'a>), + Read(ReadEnum<'a>), + Write(WriteEnum<'a>), } + +#[derive(Clone, Copy, Debug)] +pub enum ReadEnum<'a> { + Enum(EV<'a>), + Raw, +} + +#[derive(Clone, Copy, Debug)] +pub enum WriteEnum<'a> { + Enum(EV<'a>), + Raw, +} + impl<'a> RWEnum<'a> { pub fn different_enums(&self) -> bool { - matches!(self, Self::ReadEnumWriteEnum(_, _)) + matches!(self, Self::ReadWrite(ReadEnum::Enum(_), WriteEnum::Enum(_))) } pub fn read_write(&self) -> bool { - matches!( - self, - Self::ReadAndWriteEnum(_) - | Self::ReadEnumWriteEnum(_, _) - | Self::ReadEnumWriteRaw(_) - | Self::ReadRawWriteEnum(_) - | Self::ReadRawWriteRaw - ) + matches!(self, Self::ReadWriteCommon(_) | Self::ReadWrite(_, _)) } pub fn read_only(&self) -> bool { - matches!(self, Self::ReadEnum(_) | Self::ReadRaw) + matches!(self, Self::Read(_)) } pub fn can_read(&self) -> bool { self.read_write() || self.read_only() } pub fn write_only(&self) -> bool { - matches!(self, Self::WriteEnum(_) | Self::WriteRaw) + matches!(self, Self::Write(_)) } pub fn can_write(&self) -> bool { self.read_write() || self.write_only() } pub fn read_enum(&self) -> Option> { match self { - Self::ReadAndWriteEnum(e) - | Self::ReadEnumWriteEnum(e, _) - | Self::ReadEnumWriteRaw(e) - | Self::ReadEnum(e) => Some(*e), + Self::ReadWriteCommon(e) + | Self::ReadWrite(ReadEnum::Enum(e), _) + | Self::Read(ReadEnum::Enum(e)) => Some(*e), _ => None, } } pub fn write_enum(&self) -> Option> { match self { - Self::ReadAndWriteEnum(e) - | Self::ReadEnumWriteEnum(_, e) - | Self::ReadRawWriteEnum(e) - | Self::WriteEnum(e) => Some(*e), + Self::ReadWriteCommon(e) + | Self::ReadWrite(_, WriteEnum::Enum(e)) + | Self::Write(WriteEnum::Enum(e)) => Some(*e), _ => None, } } pub fn generate_write_enum(&self) -> bool { matches!( self, - Self::ReadEnumWriteEnum(_, _) | Self::ReadRawWriteEnum(_) | Self::WriteEnum(_) + Self::ReadWrite(_, WriteEnum::Enum(_)) | Self::Write(WriteEnum::Enum(_)) ) } } @@ -705,15 +704,21 @@ pub fn fields( can_write, lookup_filter(&lookup_results, Usage::Write), ) { - (true, Some(e1), true, Some(e2)) if e1.0 == e2.0 => RWEnum::ReadAndWriteEnum(e1.into()), - (true, Some(e1), true, Some(e2)) => RWEnum::ReadEnumWriteEnum(e1.into(), e2.into()), - (true, Some(e), true, None) => RWEnum::ReadEnumWriteRaw(e.into()), - (true, None, true, Some(e)) => RWEnum::ReadRawWriteEnum(e.into()), - (true, Some(e), false, _) => RWEnum::ReadEnum(e.into()), - (true, None, false, _) => RWEnum::ReadRaw, - (false, _, true, Some(e)) => RWEnum::WriteEnum(e.into()), - (false, _, true, None) => RWEnum::WriteRaw, - (true, None, true, None) => RWEnum::ReadRawWriteRaw, + (true, Some(e1), true, Some(e2)) if e1.0 == e2.0 => RWEnum::ReadWriteCommon(e1.into()), + (true, Some(e1), true, Some(e2)) => { + RWEnum::ReadWrite(ReadEnum::Enum(e1.into()), WriteEnum::Enum(e2.into())) + } + (true, Some(e), true, None) => { + RWEnum::ReadWrite(ReadEnum::Enum(e.into()), WriteEnum::Raw) + } + (true, None, true, Some(e)) => { + RWEnum::ReadWrite(ReadEnum::Raw, WriteEnum::Enum(e.into())) + } + (true, Some(e), false, _) => RWEnum::Read(ReadEnum::Enum(e.into())), + (true, None, false, _) => RWEnum::Read(ReadEnum::Raw), + (false, _, true, Some(e)) => RWEnum::Write(WriteEnum::Enum(e.into())), + (false, _, true, None) => RWEnum::Write(WriteEnum::Raw), + (true, None, true, None) => RWEnum::ReadWrite(ReadEnum::Raw, WriteEnum::Raw), (false, _, false, _) => { return Err(anyhow!("Field {fpath} is not writtable or readable")) } From 15a18123222aaad47f7dcc7ae9ec24d0c0b46c37 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 25 Feb 2024 08:01:05 +0300 Subject: [PATCH 229/319] clippy --- src/config.rs | 2 +- src/generate/register.rs | 22 +++++++++++----------- src/main.rs | 8 ++++---- 3 files changed, 16 insertions(+), 16 deletions(-) diff --git a/src/config.rs b/src/config.rs index 1979db22..81e0164b 100644 --- a/src/config.rs +++ b/src/config.rs @@ -192,7 +192,7 @@ impl IdentFormat { self } pub fn parse(s: &str) -> Result { - let mut f = s.split(":"); + let mut f = s.split(':'); match (f.next(), f.next(), f.next()) { (Some(p), Some(c), Some(s)) => { let case = Case::parse(c)?; diff --git a/src/generate/register.rs b/src/generate/register.rs index adae8912..450f2c4b 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -527,7 +527,7 @@ impl<'a> EV<'a> { impl<'a> From<&'a (EnumeratedValues, Option)> for EV<'a> { fn from(value: &'a (EnumeratedValues, Option)) -> Self { match value.1.as_ref() { - Some(base) => Self::Derived(&value.0, &base), + Some(base) => Self::Derived(&value.0, base), None => Self::New(&value.0), } } @@ -1148,16 +1148,16 @@ pub fn fields( } else if let Some(EV::Derived(_, base)) = rwenum.write_enum() { // If field is in the same register it emits pub use structure from same module. if base.register() != fpath.register() { - if rwenum.generate_write_enum() { - // use the same enum structure name - if !writer_enum_derives.contains(&value_write_ty) { - let base_path = base_syn_path(base, &fpath, &value_write_ty, config)?; - mod_items.extend(quote! { - #[doc = #description] - pub use #base_path as #value_write_ty; - }); - writer_enum_derives.insert(value_write_ty.clone()); - } + // use the same enum structure name + if rwenum.generate_write_enum() + && !writer_enum_derives.contains(&value_write_ty) + { + let base_path = base_syn_path(base, &fpath, &value_write_ty, config)?; + mod_items.extend(quote! { + #[doc = #description] + pub use #base_path as #value_write_ty; + }); + writer_enum_derives.insert(value_write_ty.clone()); } } } diff --git a/src/main.rs b/src/main.rs index 17d62e75..9fd55640 100755 --- a/src/main.rs +++ b/src/main.rs @@ -342,11 +342,11 @@ Ignore this option if you are not building your own FPGA based soft-cores."), let mut features = Vec::new(); if config.feature_group { features.extend( - util::group_names(&device, &feature_format) + util::group_names(&device, feature_format) .iter() .map(|s| format!("{s} = []\n")), ); - let add_groups: Vec<_> = util::group_names(&device, &feature_format) + let add_groups: Vec<_> = util::group_names(&device, feature_format) .iter() .map(|s| format!("\"{s}\"")) .collect(); @@ -354,11 +354,11 @@ Ignore this option if you are not building your own FPGA based soft-cores."), } if config.feature_peripheral { features.extend( - util::peripheral_names(&device, &feature_format) + util::peripheral_names(&device, feature_format) .iter() .map(|s| format!("{s} = []\n")), ); - let add_peripherals: Vec<_> = util::peripheral_names(&device, &feature_format) + let add_peripherals: Vec<_> = util::peripheral_names(&device, feature_format) .iter() .map(|s| format!("\"{s}\"")) .collect(); From ea489e244df425b6a643f212310951c8c52fd04d Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 25 Feb 2024 08:15:20 +0300 Subject: [PATCH 230/319] use match instead of if let --- src/generate/register.rs | 621 ++++++++++++++++++++------------------- 1 file changed, 324 insertions(+), 297 deletions(-) diff --git a/src/generate/register.rs b/src/generate/register.rs index 450f2c4b..bd380a25 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -759,157 +759,171 @@ pub fn fields( // collect information on items in enumeration to generate it later. let mut enum_items = TokenStream::new(); - // if this is an enumeratedValues not derived from base, generate the enum structure - // and implement functions for each value in enumeration. - if let Some(EV::New(evs)) = rwenum.read_enum() { - // parse enum variants from enumeratedValues svd record - let mut variants = Variant::from_enumerated_values(evs, config)?; - - let map = enums_to_map(evs); - let mut def = evs - .default_value() - .and_then(|def| { - minimal_hole(&map, width).map(|v| Variant::from_value(v, def, config)) - }) - .transpose()?; - if variants.len() == 1 << width { - def = None; - } else if variants.len() == (1 << width) - 1 { - if let Some(def) = def.take() { - variants.push(def); - } - } - - // if there's no variant defined in enumeratedValues, generate enumeratedValues with new-type - // wrapper struct, and generate From conversation only. - // else, generate enumeratedValues into a Rust enum with functions for each variant. - if variants.is_empty() { - // generate struct VALUE_READ_TY_A(fty) and From for VALUE_READ_TY_A. - add_with_no_variants(mod_items, &value_read_ty, &fty, &description, rv, config); - } else { - // do we have finite definition of this enumeration in svd? If not, the later code would - // return an Option when the value read from field does not match any defined values. - let has_reserved_variant; - - // generate enum VALUE_READ_TY_A { ... each variants ... } and and From for VALUE_READ_TY_A. - if let Some(def) = def.as_ref() { - add_from_variants( - mod_items, - variants.iter().chain(std::iter::once(def)), - &value_read_ty, - &fty, - &description, - rv, - config, - ); - has_reserved_variant = false; - } else { - add_from_variants( - mod_items, - variants.iter(), - &value_read_ty, - &fty, - &description, - rv, - config, - ); - has_reserved_variant = evs.values.len() != (1 << width); - } - - // prepare code for each match arm. If we have reserved variant, the match operation would - // return an Option, thus we wrap the return value with Some. - let mut arms = TokenStream::new(); - for v in variants.iter().map(|v| { - let i = util::unsuffixed_or_bool(v.value, width); - let pc = &v.pc; + if let Some(ev) = rwenum.read_enum() { + match ev { + // if this is an enumeratedValues not derived from base, generate the enum structure + // and implement functions for each value in enumeration. + EV::New(evs) => { + // parse enum variants from enumeratedValues svd record + let mut variants = Variant::from_enumerated_values(evs, config)?; + + let map = enums_to_map(evs); + let mut def = evs + .default_value() + .and_then(|def| { + minimal_hole(&map, width) + .map(|v| Variant::from_value(v, def, config)) + }) + .transpose()?; + if variants.len() == 1 << width { + def = None; + } else if variants.len() == (1 << width) - 1 { + if let Some(def) = def.take() { + variants.push(def); + } + } - if has_reserved_variant { - quote! { #i => Some(#value_read_ty::#pc), } + // if there's no variant defined in enumeratedValues, generate enumeratedValues with new-type + // wrapper struct, and generate From conversation only. + // else, generate enumeratedValues into a Rust enum with functions for each variant. + if variants.is_empty() { + // generate struct VALUE_READ_TY_A(fty) and From for VALUE_READ_TY_A. + add_with_no_variants( + mod_items, + &value_read_ty, + &fty, + &description, + rv, + config, + ); } else { - quote! { #i => #value_read_ty::#pc, } - } - }) { - arms.extend(v); - } + // do we have finite definition of this enumeration in svd? If not, the later code would + // return an Option when the value read from field does not match any defined values. + let has_reserved_variant; + + // generate enum VALUE_READ_TY_A { ... each variants ... } and and From for VALUE_READ_TY_A. + if let Some(def) = def.as_ref() { + add_from_variants( + mod_items, + variants.iter().chain(std::iter::once(def)), + &value_read_ty, + &fty, + &description, + rv, + config, + ); + has_reserved_variant = false; + } else { + add_from_variants( + mod_items, + variants.iter(), + &value_read_ty, + &fty, + &description, + rv, + config, + ); + has_reserved_variant = evs.values.len() != (1 << width); + } - // if we have reserved variant, for all values other than defined we return None. - // if svd suggests it only would return defined variants but FieldReader has - // other values, it's regarded as unreachable and we enter unreachable! macro. - // This situation is rare and only exists if unsafe code casts any illegal value - // into a FieldReader structure. - if has_reserved_variant { - arms.extend(quote! { - _ => None, - }); - } else if let Some(v) = def.as_ref() { - let pc = &v.pc; - arms.extend(quote! { - _ => #value_read_ty::#pc, - }); - } else if 1 << width.to_ty_width()? != variants.len() { - arms.extend(quote! { - _ => unreachable!(), - }); - } + // prepare code for each match arm. If we have reserved variant, the match operation would + // return an Option, thus we wrap the return value with Some. + let mut arms = TokenStream::new(); + for v in variants.iter().map(|v| { + let i = util::unsuffixed_or_bool(v.value, width); + let pc = &v.pc; + + if has_reserved_variant { + quote! { #i => Some(#value_read_ty::#pc), } + } else { + quote! { #i => #value_read_ty::#pc, } + } + }) { + arms.extend(v); + } - // prepare the `variant` function. This function would return field value in - // Rust structure; if we have reserved variant we return by Option. - let ret_ty = if has_reserved_variant { - quote!(Option<#value_read_ty>) - } else { - quote!(#value_read_ty) - }; - enum_items.extend(quote! { - #[doc = "Get enumerated values variant"] - #inline - pub const fn variant(&self) -> #ret_ty { - match self.bits { - #arms + // if we have reserved variant, for all values other than defined we return None. + // if svd suggests it only would return defined variants but FieldReader has + // other values, it's regarded as unreachable and we enter unreachable! macro. + // This situation is rare and only exists if unsafe code casts any illegal value + // into a FieldReader structure. + if has_reserved_variant { + arms.extend(quote! { + _ => None, + }); + } else if let Some(v) = def.as_ref() { + let pc = &v.pc; + arms.extend(quote! { + _ => #value_read_ty::#pc, + }); + } else if 1 << width.to_ty_width()? != variants.len() { + arms.extend(quote! { + _ => unreachable!(), + }); } - } - }); - // for each variant defined, we generate an `is_variant` function. - for v in &variants { - let pc = &v.pc; - let is_variant = &v.is_sc; - - let doc = util::escape_special_chars(&util::respace(&v.doc)); - enum_items.extend(quote! { - #[doc = #doc] - #inline - pub fn #is_variant(&self) -> bool { - *self == #value_read_ty::#pc + // prepare the `variant` function. This function would return field value in + // Rust structure; if we have reserved variant we return by Option. + let ret_ty = if has_reserved_variant { + quote!(Option<#value_read_ty>) + } else { + quote!(#value_read_ty) + }; + enum_items.extend(quote! { + #[doc = "Get enumerated values variant"] + #inline + pub const fn variant(&self) -> #ret_ty { + match self.bits { + #arms + } + } + }); + + // for each variant defined, we generate an `is_variant` function. + for v in &variants { + let pc = &v.pc; + let is_variant = &v.is_sc; + + let doc = util::escape_special_chars(&util::respace(&v.doc)); + enum_items.extend(quote! { + #[doc = #doc] + #inline + pub fn #is_variant(&self) -> bool { + *self == #value_read_ty::#pc + } + }); } - }); - } - if let Some(v) = def.as_ref() { - let pc = &v.pc; - let is_variant = &v.is_sc; - - let doc = util::escape_special_chars(&util::respace(&v.doc)); - enum_items.extend(quote! { - #[doc = #doc] - #inline - pub fn #is_variant(&self) -> bool { - matches!(self.variant(), #value_read_ty::#pc) + if let Some(v) = def.as_ref() { + let pc = &v.pc; + let is_variant = &v.is_sc; + + let doc = util::escape_special_chars(&util::respace(&v.doc)); + enum_items.extend(quote! { + #[doc = #doc] + #inline + pub fn #is_variant(&self) -> bool { + matches!(self.variant(), #value_read_ty::#pc) + } + }); } - }); + } } - } - } else if let Some(EV::Derived(_, base)) = rwenum.read_enum() { - // only pub use enum when derived from another register. - // If field is in the same register it emits - // pub use enum from same module which is not expected - if base.register() != fpath.register() { - // use the same enum structure name - if !enum_derives.contains(&value_read_ty) { - let base_path = base_syn_path(base, &fpath, &value_read_ty, config)?; - mod_items.extend(quote! { - #[doc = #description] - pub use #base_path as #value_read_ty; - }); - enum_derives.insert(value_read_ty.clone()); + EV::Derived(_, base) => { + // only pub use enum when derived from another register. + // If field is in the same register it emits + // pub use enum from same module which is not expected + if base.register() != fpath.register() { + // use the same enum structure name + if !enum_derives.contains(&value_read_ty) { + let base_path = + base_syn_path(base, &fpath, &value_read_ty, config)?; + mod_items.extend(quote! { + #[doc = #description] + pub use #base_path as #value_read_ty; + }); + enum_derives.insert(value_read_ty.clone()); + } + } } } } @@ -921,47 +935,50 @@ pub fn fields( // name of read proxy type let reader_ty = ident(&name, config, "field_reader", span); - if let Some(EV::New(_)) | None = rwenum.read_enum() { - // Generate the read proxy structure if necessary. + match rwenum.read_enum() { + Some(EV::New(_)) | None => { + // Generate the read proxy structure if necessary. - let reader = if width == 1 { - if value_read_ty == "bool" { - quote! { crate::BitReader } + let reader = if width == 1 { + if value_read_ty == "bool" { + quote! { crate::BitReader } + } else { + quote! { crate::BitReader<#value_read_ty> } + } + } else if value_read_ty == "u8" { + quote! { crate::FieldReader } } else { - quote! { crate::BitReader<#value_read_ty> } - } - } else if value_read_ty == "u8" { - quote! { crate::FieldReader } - } else { - quote! { crate::FieldReader<#value_read_ty> } - }; - let mut readerdoc = field_reader_brief.clone(); - if let Some(action) = f.read_action { - readerdoc += match action { - ReadAction::Clear => "\n\nThe field is **cleared** (set to zero) following a read operation.", - ReadAction::Set => "\n\nThe field is **set** (set to ones) following a read operation.", - ReadAction::Modify => "\n\nThe field is **modified** in some way after a read operation.", - ReadAction::ModifyExternal => "\n\nOne or more dependent resources other than the current field are immediately affected by a read operation.", + quote! { crate::FieldReader<#value_read_ty> } }; - } - mod_items.extend(quote! { - #[doc = #readerdoc] - pub type #reader_ty = #reader; - }); - } else if let Some(EV::Derived(_, base)) = rwenum.read_enum() { - // if this value is derived from a base, generate `pub use` code for each read proxy - // and value if necessary. - - // generate pub use field_1 reader as field_2 reader - let base_field = util::replace_suffix(&base.field.name, ""); - let base_r = ident(&base_field, config, "field_reader", span); - if !reader_derives.contains(&reader_ty) { - let base_path = base_syn_path(base, &fpath, &base_r, config)?; + let mut readerdoc = field_reader_brief.clone(); + if let Some(action) = f.read_action { + readerdoc += match action { + ReadAction::Clear => "\n\nThe field is **cleared** (set to zero) following a read operation.", + ReadAction::Set => "\n\nThe field is **set** (set to ones) following a read operation.", + ReadAction::Modify => "\n\nThe field is **modified** in some way after a read operation.", + ReadAction::ModifyExternal => "\n\nOne or more dependent resources other than the current field are immediately affected by a read operation.", + }; + } mod_items.extend(quote! { - #[doc = #field_reader_brief] - pub use #base_path as #reader_ty; + #[doc = #readerdoc] + pub type #reader_ty = #reader; }); - reader_derives.insert(reader_ty.clone()); + } + Some(EV::Derived(_, base)) => { + // if this value is derived from a base, generate `pub use` code for each read proxy + // and value if necessary. + + // generate pub use field_1 reader as field_2 reader + let base_field = util::replace_suffix(&base.field.name, ""); + let base_r = ident(&base_field, config, "field_reader", span); + if !reader_derives.contains(&reader_ty) { + let base_path = base_syn_path(base, &fpath, &base_r, config)?; + mod_items.extend(quote! { + #[doc = #field_reader_brief] + pub use #base_path as #reader_ty; + }); + reader_derives.insert(reader_ty.clone()); + } } } @@ -1086,78 +1103,85 @@ pub fn fields( let mut proxy_items = TokenStream::new(); let mut unsafety = unsafety(f.write_constraint.as_ref(), width); - // if we writes to enumeratedValues, generate its structure if it differs from read structure. - if let Some(EV::New(evs)) = rwenum.write_enum() { - // parse variants from enumeratedValues svd record - let mut variants = Variant::from_enumerated_values(evs, config)?; - let map = enums_to_map(evs); - let mut def = evs - .default_value() - .and_then(|def| { - minimal_hole(&map, width).map(|v| Variant::from_value(v, def, config)) - }) - .transpose()?; - if variants.len() == 1 << width { - } else if let Some(def) = def.take() { - variants.push(def); - unsafety = false; - } + if let Some(ev) = rwenum.write_enum() { + match ev { + // if we writes to enumeratedValues, generate its structure if it differs from read structure. + EV::New(evs) => { + // parse variants from enumeratedValues svd record + let mut variants = Variant::from_enumerated_values(evs, config)?; + let map = enums_to_map(evs); + let mut def = evs + .default_value() + .and_then(|def| { + minimal_hole(&map, width) + .map(|v| Variant::from_value(v, def, config)) + }) + .transpose()?; + if variants.len() == 1 << width { + } else if let Some(def) = def.take() { + variants.push(def); + unsafety = false; + } - // if the write structure is finite, it can be safely written. - if variants.len() == 1 << width { - unsafety = false; - } + // if the write structure is finite, it can be safely written. + if variants.len() == 1 << width { + unsafety = false; + } - // generate write value structure and From conversation if we can't reuse read value structure. - if rwenum.generate_write_enum() { - if variants.is_empty() { - add_with_no_variants( - mod_items, - &value_write_ty, - &fty, - &description, - rv, - config, - ); - } else { - add_from_variants( - mod_items, - variants.iter(), - &value_write_ty, - &fty, - &description, - rv, - config, - ); - } - } + // generate write value structure and From conversation if we can't reuse read value structure. + if rwenum.generate_write_enum() { + if variants.is_empty() { + add_with_no_variants( + mod_items, + &value_write_ty, + &fty, + &description, + rv, + config, + ); + } else { + add_from_variants( + mod_items, + variants.iter(), + &value_write_ty, + &fty, + &description, + rv, + config, + ); + } + } - // for each variant defined, generate a write function to this field. - for v in &variants { - let pc = &v.pc; - let sc = &v.sc; - let doc = util::escape_special_chars(&util::respace(&v.doc)); - proxy_items.extend(quote! { - #[doc = #doc] - #inline - pub fn #sc(self) -> &'a mut crate::W { - self.variant(#value_write_ty::#pc) + // for each variant defined, generate a write function to this field. + for v in &variants { + let pc = &v.pc; + let sc = &v.sc; + let doc = util::escape_special_chars(&util::respace(&v.doc)); + proxy_items.extend(quote! { + #[doc = #doc] + #inline + pub fn #sc(self) -> &'a mut crate::W { + self.variant(#value_write_ty::#pc) + } + }); + } + } + EV::Derived(_, base) => { + // If field is in the same register it emits pub use structure from same module. + if base.register() != fpath.register() { + // use the same enum structure name + if rwenum.generate_write_enum() + && !writer_enum_derives.contains(&value_write_ty) + { + let base_path = + base_syn_path(base, &fpath, &value_write_ty, config)?; + mod_items.extend(quote! { + #[doc = #description] + pub use #base_path as #value_write_ty; + }); + writer_enum_derives.insert(value_write_ty.clone()); + } } - }); - } - } else if let Some(EV::Derived(_, base)) = rwenum.write_enum() { - // If field is in the same register it emits pub use structure from same module. - if base.register() != fpath.register() { - // use the same enum structure name - if rwenum.generate_write_enum() - && !writer_enum_derives.contains(&value_write_ty) - { - let base_path = base_syn_path(base, &fpath, &value_write_ty, config)?; - mod_items.extend(quote! { - #[doc = #description] - pub use #base_path as #value_write_ty; - }); - writer_enum_derives.insert(value_write_ty.clone()); } } } @@ -1171,62 +1195,65 @@ pub fn fields( let writer_ty = ident(&name, config, "field_writer", span); // Generate writer structure by type alias to generic write proxy structure. - if let Some(EV::New(_)) | None = rwenum.write_enum() { - let proxy = if width == 1 { - use ModifiedWriteValues::*; - let wproxy = Ident::new( - match mwv { - Modify | Set | Clear => "BitWriter", - OneToSet => "BitWriter1S", - ZeroToClear => "BitWriter0C", - OneToClear => "BitWriter1C", - ZeroToSet => "BitWriter0C", - OneToToggle => "BitWriter1T", - ZeroToToggle => "BitWriter0T", - }, - span, - ); - if value_write_ty == "bool" { - quote! { crate::#wproxy<'a, REG> } - } else { - quote! { crate::#wproxy<'a, REG, #value_write_ty> } - } - } else { - let wproxy = Ident::new( - if unsafety { - "FieldWriter" + match rwenum.write_enum() { + Some(EV::New(_)) | None => { + let proxy = if width == 1 { + use ModifiedWriteValues::*; + let wproxy = Ident::new( + match mwv { + Modify | Set | Clear => "BitWriter", + OneToSet => "BitWriter1S", + ZeroToClear => "BitWriter0C", + OneToClear => "BitWriter1C", + ZeroToSet => "BitWriter0C", + OneToToggle => "BitWriter1T", + ZeroToToggle => "BitWriter0T", + }, + span, + ); + if value_write_ty == "bool" { + quote! { crate::#wproxy<'a, REG> } } else { - "FieldWriterSafe" - }, - span, - ); - let width = &unsuffixed(width); - if value_write_ty == "u8" { - quote! { crate::#wproxy<'a, REG, #width> } + quote! { crate::#wproxy<'a, REG, #value_write_ty> } + } } else { - quote! { crate::#wproxy<'a, REG, #width, #value_write_ty> } - } - }; - mod_items.extend(quote! { - #[doc = #field_writer_brief] - pub type #writer_ty<'a, REG> = #proxy; - }); - } else if let Some(EV::Derived(_, base)) = rwenum.write_enum() { - // if base.register == None, derive write from the same module. This is allowed because both - // the generated and source write proxy are in the same module. - // we never reuse writer for writer in different module does not have the same _SPEC strcuture, - // thus we cannot write to current register using re-exported write proxy. - - // generate pub use field_1 writer as field_2 writer - let base_field = util::replace_suffix(&base.field.name, ""); - let base_w = ident(&base_field, config, "field_writer", span); - if !writer_derives.contains(&writer_ty) { - let base_path = base_syn_path(base, &fpath, &base_w, config)?; + let wproxy = Ident::new( + if unsafety { + "FieldWriter" + } else { + "FieldWriterSafe" + }, + span, + ); + let width = &unsuffixed(width); + if value_write_ty == "u8" { + quote! { crate::#wproxy<'a, REG, #width> } + } else { + quote! { crate::#wproxy<'a, REG, #width, #value_write_ty> } + } + }; mod_items.extend(quote! { #[doc = #field_writer_brief] - pub use #base_path as #writer_ty; + pub type #writer_ty<'a, REG> = #proxy; }); - writer_derives.insert(writer_ty.clone()); + } + Some(EV::Derived(_, base)) => { + // if base.register == None, derive write from the same module. This is allowed because both + // the generated and source write proxy are in the same module. + // we never reuse writer for writer in different module does not have the same _SPEC strcuture, + // thus we cannot write to current register using re-exported write proxy. + + // generate pub use field_1 writer as field_2 writer + let base_field = util::replace_suffix(&base.field.name, ""); + let base_w = ident(&base_field, config, "field_writer", span); + if !writer_derives.contains(&writer_ty) { + let base_path = base_syn_path(base, &fpath, &base_w, config)?; + mod_items.extend(quote! { + #[doc = #field_writer_brief] + pub use #base_path as #writer_ty; + }); + writer_derives.insert(writer_ty.clone()); + } } } From f9b0e252827cbadd0786a22d532441118d00f41f Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 24 Feb 2024 10:20:06 +0300 Subject: [PATCH 231/319] reexport enum --- CHANGELOG.md | 1 + src/generate/register.rs | 125 ++++++++++++++++++--------------------- 2 files changed, 59 insertions(+), 67 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 876c495c..134291e9 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -12,6 +12,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Add `base-address-shift` config flag - Use `PascalCase` for type idents, fix case changing bugs, add `--ident-format` (`-f`) option flag - Add `enum_read_name` for `read-only` enums, `RWEnum` helper +- Reexport enums inside register again ## [v0.31.5] - 2024-01-04 diff --git a/src/generate/register.rs b/src/generate/register.rs index bd380a25..c006a1ef 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -620,8 +620,9 @@ pub fn fields( // Hack for #625 let mut enum_derives = HashSet::new(); + let mut read_enum_derives = HashSet::new(); + let mut write_enum_derives = HashSet::new(); let mut reader_derives = HashSet::new(); - let mut writer_enum_derives = HashSet::new(); let mut writer_derives = HashSet::new(); // TODO enumeratedValues @@ -737,32 +738,31 @@ pub fn fields( // If this field can be read, generate read proxy structure and value structure. if can_read { - // get the type of value structure. It can be generated from either name field - // in enumeratedValues if it's an enumeration, or from field name directly if it's not. + // collect information on items in enumeration to generate it later. + let mut enum_items = TokenStream::new(); + + // if this is an enumeratedValues not derived from base, generate the enum structure + // and implement functions for each value in enumeration. let value_read_ty = if let Some(ev) = rwenum.read_enum() { - let fmt = if rwenum.different_enums() { - "enum_read_name" + let derives; + let fmt; + if rwenum.different_enums() { + derives = &mut read_enum_derives; + fmt = "enum_read_name"; } else { - "enum_name" + derives = &mut enum_derives; + fmt = "enum_name"; }; - ident( + // get the type of value structure. It can be generated from either name field + // in enumeratedValues if it's an enumeration, or from field name directly if it's not. + let value_read_ty = ident( ev.values().name.as_deref().unwrap_or(&name), config, fmt, span, - ) - } else { - // raw_field_value_read_ty - fty.clone() - }; - - // collect information on items in enumeration to generate it later. - let mut enum_items = TokenStream::new(); + ); - if let Some(ev) = rwenum.read_enum() { match ev { - // if this is an enumeratedValues not derived from base, generate the enum structure - // and implement functions for each value in enumeration. EV::New(evs) => { // parse enum variants from enumeratedValues svd record let mut variants = Variant::from_enumerated_values(evs, config)?; @@ -909,24 +909,22 @@ pub fn fields( } } EV::Derived(_, base) => { - // only pub use enum when derived from another register. - // If field is in the same register it emits - // pub use enum from same module which is not expected - if base.register() != fpath.register() { - // use the same enum structure name - if !enum_derives.contains(&value_read_ty) { - let base_path = - base_syn_path(base, &fpath, &value_read_ty, config)?; - mod_items.extend(quote! { - #[doc = #description] - pub use #base_path as #value_read_ty; - }); - enum_derives.insert(value_read_ty.clone()); - } + let base_ident = ident(&base.name, config, fmt, span); + if !derives.contains(&value_read_ty) { + let base_path = base_syn_path(base, &fpath, &base_ident, config)?; + mod_items.extend(quote! { + #[doc = #description] + pub use #base_path as #value_read_ty; + }); } } } - } + derives.insert(value_read_ty.clone()); + value_read_ty + } else { + // raw_field_value_read_ty + fty.clone() + }; // get a brief description for this field // the suffix string from field name is removed in brief description. @@ -1083,29 +1081,28 @@ pub fn fields( // If this field can be written, generate write proxy. Generate write value if it differs from // the read value, or else we reuse read value. if can_write { + let mut proxy_items = TokenStream::new(); + let mut unsafety = unsafety(f.write_constraint.as_ref(), width); + + // if we writes to enumeratedValues, generate its structure if it differs from read structure. let value_write_ty = if let Some(ev) = rwenum.write_enum() { - let fmt = if rwenum.different_enums() { - "enum_write_name" + let derives; + let fmt; + if rwenum.different_enums() { + derives = &mut write_enum_derives; + fmt = "enum_write_name"; } else { - "enum_name" + derives = &mut enum_derives; + fmt = "enum_name"; }; - ident( + let value_write_ty = ident( ev.values().name.as_deref().unwrap_or(&name), config, fmt, span, - ) - } else { - // raw_field_value_write_ty - fty.clone() - }; + ); - let mut proxy_items = TokenStream::new(); - let mut unsafety = unsafety(f.write_constraint.as_ref(), width); - - if let Some(ev) = rwenum.write_enum() { match ev { - // if we writes to enumeratedValues, generate its structure if it differs from read structure. EV::New(evs) => { // parse variants from enumeratedValues svd record let mut variants = Variant::from_enumerated_values(evs, config)?; @@ -1167,24 +1164,23 @@ pub fn fields( } } EV::Derived(_, base) => { - // If field is in the same register it emits pub use structure from same module. - if base.register() != fpath.register() { - // use the same enum structure name - if rwenum.generate_write_enum() - && !writer_enum_derives.contains(&value_write_ty) - { - let base_path = - base_syn_path(base, &fpath, &value_write_ty, config)?; - mod_items.extend(quote! { - #[doc = #description] - pub use #base_path as #value_write_ty; - }); - writer_enum_derives.insert(value_write_ty.clone()); - } + let base_ident = ident(&base.name, config, fmt, span); + + if rwenum.generate_write_enum() && !derives.contains(&value_write_ty) { + let base_path = base_syn_path(base, &fpath, &base_ident, config)?; + mod_items.extend(quote! { + #[doc = #description] + pub use #base_path as #value_write_ty; + }); } } } - } + derives.insert(value_write_ty.clone()); + value_write_ty + } else { + // raw_field_value_write_ty + fty.clone() + }; let mwv = f.modified_write_values.or(rmwv).unwrap_or_default(); @@ -1238,11 +1234,6 @@ pub fn fields( }); } Some(EV::Derived(_, base)) => { - // if base.register == None, derive write from the same module. This is allowed because both - // the generated and source write proxy are in the same module. - // we never reuse writer for writer in different module does not have the same _SPEC strcuture, - // thus we cannot write to current register using re-exported write proxy. - // generate pub use field_1 writer as field_2 writer let base_field = util::replace_suffix(&base.field.name, ""); let base_w = ident(&base_field, config, "field_writer", span); From 4813f560822f4693cd9a956aa60066ecad254a8f Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 25 Feb 2024 14:34:34 +0300 Subject: [PATCH 232/319] always use field names as base for enum names --- src/config.rs | 1 + src/generate/register.rs | 35 ++++++++++++++++++++++++++++++----- src/main.rs | 8 ++++++++ 3 files changed, 39 insertions(+), 5 deletions(-) diff --git a/src/config.rs b/src/config.rs index 81e0164b..e53a2e33 100644 --- a/src/config.rs +++ b/src/config.rs @@ -33,6 +33,7 @@ pub struct Config { pub reexport_interrupt: bool, pub ident_formats: IdentFormats, pub ident_formats_theme: Option, + pub field_names_for_enums: bool, pub base_address_shift: u64, } diff --git a/src/generate/register.rs b/src/generate/register.rs index c006a1ef..bfbfde92 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -756,7 +756,11 @@ pub fn fields( // get the type of value structure. It can be generated from either name field // in enumeratedValues if it's an enumeration, or from field name directly if it's not. let value_read_ty = ident( - ev.values().name.as_deref().unwrap_or(&name), + if config.field_names_for_enums { + &name + } else { + ev.values().name.as_deref().unwrap_or(&name) + }, config, fmt, span, @@ -909,7 +913,16 @@ pub fn fields( } } EV::Derived(_, base) => { - let base_ident = ident(&base.name, config, fmt, span); + let base_ident = if config.field_names_for_enums { + ident( + &util::replace_suffix(&base.field().name, ""), + config, + fmt, + span, + ) + } else { + ident(&base.name, config, fmt, span) + }; if !derives.contains(&value_read_ty) { let base_path = base_syn_path(base, &fpath, &base_ident, config)?; mod_items.extend(quote! { @@ -1096,7 +1109,11 @@ pub fn fields( fmt = "enum_name"; }; let value_write_ty = ident( - ev.values().name.as_deref().unwrap_or(&name), + if config.field_names_for_enums { + &name + } else { + ev.values().name.as_deref().unwrap_or(&name) + }, config, fmt, span, @@ -1164,8 +1181,16 @@ pub fn fields( } } EV::Derived(_, base) => { - let base_ident = ident(&base.name, config, fmt, span); - + let base_ident = if config.field_names_for_enums { + ident( + &util::replace_suffix(&base.field().name, ""), + config, + fmt, + span, + ) + } else { + ident(&base.name, config, fmt, span) + }; if rwenum.generate_write_enum() && !derives.contains(&value_write_ty) { let base_path = base_syn_path(base, &fpath, &base_ident, config)?; mod_items.extend(quote! { diff --git a/src/main.rs b/src/main.rs index 9fd55640..be54cbb3 100755 --- a/src/main.rs +++ b/src/main.rs @@ -172,10 +172,18 @@ Allowed cases are `unchanged` (''), `pascal` ('p'), `constant` ('c') and `snake` .arg( Arg::new("ident_formats_theme") .long("ident-formats-theme") + .alias("ident_formats_theme") .help("A set of `ident_format` settings. `new` or `legacy`") .action(ArgAction::Set) .value_name("THEME"), ) + .arg( + Arg::new("field_names_for_enums") + .long("field-names-for-enums") + .alias("field_names_for_enums") + .action(ArgAction::SetTrue) + .help("Use field name for enumerations even when enumeratedValues has a name"), + ) .arg( Arg::new("max_cluster_size") .long("max-cluster-size") From d3c92acd9f8a442773e3b49b6254cc124d515547 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 26 Feb 2024 09:54:36 +0300 Subject: [PATCH 233/319] Suffix trait --- CHANGELOG.md | 1 + src/generate/peripheral.rs | 26 ++++++++++----------- src/generate/register.rs | 47 ++++++++++++++++++-------------------- src/util.rs | 39 +++++++++++++++++++++---------- 4 files changed, 63 insertions(+), 50 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 134291e9..a54d584b 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -13,6 +13,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Use `PascalCase` for type idents, fix case changing bugs, add `--ident-format` (`-f`) option flag - Add `enum_read_name` for `read-only` enums, `RWEnum` helper - Reexport enums inside register again +- Add `DimSuffix` helper trait ## [v0.31.5] - 2024-01-04 diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 34f421c6..382b3436 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -16,7 +16,8 @@ use quote::{quote, ToTokens}; use syn::{punctuated::Punctuated, Token}; use crate::util::{ - self, ident, name_to_ty, path_segment, type_path, unsuffixed, zst_type, FullName, BITS_PER_BYTE, + self, ident, name_to_ty, path_segment, type_path, unsuffixed, zst_type, DimSuffix, FullName, + BITS_PER_BYTE, }; use anyhow::{anyhow, bail, Context, Result}; @@ -212,9 +213,8 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result } } - let description = util::escape_special_chars( - util::respace(p.description.as_ref().unwrap_or(&name.as_ref().to_owned())).as_ref(), - ); + let description = + util::escape_special_chars(util::respace(p.description.as_ref().unwrap_or(&name)).as_ref()); // Build up an alternate erc list by expanding any derived registers/clusters // erc: *E*ither *R*egister or *C*luster @@ -763,7 +763,7 @@ fn check_erc_derive_infos( Register::Array(..) => { // Only match integer indeces when searching for disjoint arrays - let re_string = util::replace_suffix(&info_name, "([0-9]+|%s)"); + let re_string = info_name.expand_dim("([0-9]+|%s)"); let re = Regex::new(format!("^{re_string}$").as_str()).map_err(|_| { anyhow!("Error creating regex for register {}", register.name) })?; @@ -991,9 +991,9 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result { - ty_name = util::replace_suffix(&info_name, &index); + ty_name = info_name.expand_dim(&index); convert_list && sequential_indexes_from0 } DeriveInfo::Explicit(_) => { - ty_name = util::replace_suffix(&info_name, &index); + ty_name = info_name.expand_dim(&index); convert_list && sequential_indexes_from0 } _ => convert_list, @@ -1399,7 +1399,7 @@ fn cluster_block( ) -> Result { let description = util::escape_special_chars(&util::respace(c.description.as_ref().unwrap_or(&c.name))); - let mod_name = util::replace_suffix(&c.name, ""); + let mod_name = c.name.remove_dim().to_string(); // name_snake_case needs to take into account array type. let span = Span::call_site(); @@ -1413,7 +1413,7 @@ fn cluster_block( } else { util::block_path_to_ty(&dparent, config, span) }; - let dname = util::replace_suffix(&index.clusters.get(&dpath).unwrap().name, ""); + let dname = index.clusters.get(&dpath).unwrap().name.remove_dim(); let mut mod_derived = derived.clone(); derived .path diff --git a/src/generate/register.rs b/src/generate/register.rs index bfbfde92..786f2858 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -15,8 +15,7 @@ use svd_parser::expand::{ use crate::config::Config; use crate::util::{ - self, ident, ident_to_path, path_segment, replace_suffix, type_path, unsuffixed, FullName, - U32Ext, + self, ident, ident_to_path, path_segment, type_path, unsuffixed, DimSuffix, FullName, U32Ext, }; use anyhow::{anyhow, Result}; use syn::punctuated::Punctuated; @@ -55,7 +54,10 @@ pub fn render( if let MaybeArray::Array(info, array_info) = register { if let Some(dim_index) = &array_info.dim_index { let index: Cow = dim_index.first().unwrap().into(); - name = replace_suffix(&info.fullname(config.ignore_groups), &index).into() + name = info + .fullname(config.ignore_groups) + .expand_dim(&index) + .into() } } } @@ -465,15 +467,14 @@ fn render_register_mod_debug( if field_access.can_read() && f.read_action.is_none() { if let Field::Array(_, de) = &f { for suffix in de.indexes() { - let f_name_n = - field_accessor(&util::replace_suffix(&f.name, &suffix), config, span); + let f_name_n = field_accessor(&f.name.expand_dim(&suffix), config, span); let f_name_n_s = format!("{f_name_n}"); r_debug_impl.extend(quote! { .field(#f_name_n_s, &format_args!("{}", self.#f_name_n().#bit_or_bits())) }); } } else { - let f_name = util::replace_suffix(&f.name, ""); + let f_name = f.name.remove_dim(); let f_name = field_accessor(&f_name, config, span); let f_name_s = format!("{f_name}"); r_debug_impl.extend(quote! { @@ -641,7 +642,7 @@ pub fn fields( return Err(anyhow!("incorrect field {}", f.name)); } - let name = util::replace_suffix(&f.name, ""); + let name = f.name.remove_dim(); let name_snake_case = field_accessor( if let Field::Array( _, @@ -694,7 +695,13 @@ pub fn fields( ev = (*index.evs.get(epath).unwrap()).clone(); } } else if let Some(path) = fdpath.as_ref() { - epath = Some(path.new_enum(ev.name.clone().unwrap_or_else(|| path.name.clone()))); + epath = Some( + path.new_enum( + ev.name + .clone() + .unwrap_or_else(|| path.name.remove_dim().into()), + ), + ); } lookup_results.push((ev, epath)); } @@ -914,12 +921,7 @@ pub fn fields( } EV::Derived(_, base) => { let base_ident = if config.field_names_for_enums { - ident( - &util::replace_suffix(&base.field().name, ""), - config, - fmt, - span, - ) + ident(&base.field().name.remove_dim(), config, fmt, span) } else { ident(&base.name, config, fmt, span) }; @@ -980,7 +982,7 @@ pub fn fields( // and value if necessary. // generate pub use field_1 reader as field_2 reader - let base_field = util::replace_suffix(&base.field.name, ""); + let base_field = base.field.name.remove_dim(); let base_r = ident(&base_field, config, "field_reader", span); if !reader_derives.contains(&reader_ty) { let base_path = base_syn_path(base, &fpath, &base_r, config)?; @@ -1002,7 +1004,7 @@ pub fn fields( if let Field::Array(f, de) = &f { let increment = de.dim_increment; - let doc = util::replace_suffix(&description, &brief_suffix); + let doc = description.expand_dim(&brief_suffix); let first_name = svd::array::names(f, de).next().unwrap(); let note = format!("NOTE: `n` is number of field in register. `n == 0` corresponds to `{first_name}` field"); let offset_calc = calculate_offset(increment, offset, true); @@ -1182,12 +1184,7 @@ pub fn fields( } EV::Derived(_, base) => { let base_ident = if config.field_names_for_enums { - ident( - &util::replace_suffix(&base.field().name, ""), - config, - fmt, - span, - ) + ident(&base.field().name.remove_dim(), config, fmt, span) } else { ident(&base.name, config, fmt, span) }; @@ -1260,7 +1257,7 @@ pub fn fields( } Some(EV::Derived(_, base)) => { // generate pub use field_1 writer as field_2 writer - let base_field = util::replace_suffix(&base.field.name, ""); + let base_field = base.field.name.remove_dim(); let base_w = ident(&base_field, config, "field_writer", span); if !writer_derives.contains(&writer_ty) { let base_path = base_syn_path(base, &fpath, &base_w, config)?; @@ -1301,7 +1298,7 @@ pub fn fields( if let Field::Array(f, de) = &f { let increment = de.dim_increment; let offset_calc = calculate_offset(increment, offset, false); - let doc = &util::replace_suffix(&description, &brief_suffix); + let doc = &description.expand_dim(&brief_suffix); let first_name = svd::array::names(f, de).next().unwrap(); let note = format!("NOTE: `n` is number of field in register. `n == 0` corresponds to `{first_name}` field"); let dim = unsuffixed(de.dim); @@ -1603,7 +1600,7 @@ fn base_syn_path( let mut segments = Punctuated::new(); segments.push(path_segment(Ident::new("super", span))); segments.push(path_segment(ident( - &replace_suffix(&base.register().name, ""), + &base.register().name.remove_dim(), config, "register_mod", span, diff --git a/src/util.rs b/src/util.rs index 60eebb2a..4910e6a7 100644 --- a/src/util.rs +++ b/src/util.rs @@ -184,18 +184,12 @@ pub fn escape_special_chars(s: &str) -> String { escape_brackets(&html_escaped) } -pub fn name_of(maybe_array: &MaybeArray, ignore_group: bool) -> Cow { - match maybe_array { - MaybeArray::Single(info) => info.fullname(ignore_group), - MaybeArray::Array(info, _) => replace_suffix(&info.fullname(ignore_group), "").into(), - } -} - -pub fn replace_suffix(name: &str, suffix: &str) -> String { - if name.contains("[%s]") { - name.replace("[%s]", suffix) +pub fn name_of(maybe_array: &MaybeArray, ignore_group: bool) -> String { + let fullname = maybe_array.fullname(ignore_group); + if maybe_array.is_array() { + fullname.remove_dim().into() } else { - name.replace("%s", suffix) + fullname.into() } } @@ -433,6 +427,27 @@ pub fn build_rs() -> TokenStream { } } +pub trait DimSuffix { + fn expand_dim(&self, suffix: &str) -> Cow; + fn remove_dim(&self) -> Cow { + self.expand_dim("") + } +} + +impl DimSuffix for str { + fn expand_dim(&self, suffix: &str) -> Cow { + if self.contains("%s") { + if self.contains("[%s]") { + self.replace("[%s]", suffix).into() + } else { + self.replace("%s", suffix).into() + } + } else { + self.into() + } + } +} + pub trait FullName { fn fullname(&self, ignore_group: bool) -> Cow; } @@ -473,7 +488,7 @@ pub fn peripheral_names(d: &Device, feature_format: &IdentFormat) -> Vec for p in &d.peripherals { match p { Peripheral::Single(info) => { - v.push(replace_suffix(&feature_format.apply(&info.name), "")); + v.push(feature_format.apply(&info.name).remove_dim().into()); } Peripheral::Array(info, dim) => { v.extend(svd_rs::array::names(info, dim).map(|n| feature_format.apply(&n).into())); From bf66a6851cb65ad9f683ee3af6bd4a2ad97722e9 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 25 Feb 2024 19:37:22 +0300 Subject: [PATCH 234/319] release 0.32 --- CHANGELOG.md | 5 ++++- Cargo.lock | 2 +- Cargo.toml | 2 +- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index a54d584b..a1db29b8 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.32.0] - 2024-02-26 + - Bump MSRV to 1.74 - generic unsafe `W::bits` + safe `W::set` - Add `base-address-shift` config flag @@ -871,7 +873,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.31.5...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.32.0...HEAD +[v0.32.0]: https://github.com/rust-embedded/svd2rust/compare/v0.31.5...v0.32.0 [v0.31.5]: https://github.com/rust-embedded/svd2rust/compare/v0.31.4...v0.31.5 [v0.31.4]: https://github.com/rust-embedded/svd2rust/compare/v0.31.3...v0.31.4 [v0.31.3]: https://github.com/rust-embedded/svd2rust/compare/v0.31.2...v0.31.3 diff --git a/Cargo.lock b/Cargo.lock index 81d9a121..0bc69f84 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1220,7 +1220,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.31.5" +version = "0.32.0" dependencies = [ "anyhow", "clap", diff --git a/Cargo.toml b/Cargo.toml index 56b3189b..e9526ae8 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.31.5" +version = "0.32.0" readme = "README.md" rust-version = "1.74" From 2a09cc279d8d8a4623b41cd11652c9f08f4e4cca Mon Sep 17 00:00:00 2001 From: Peter Budny Date: Tue, 19 Mar 2024 18:25:19 +0000 Subject: [PATCH 235/319] fix typo: Incorrect mapping of ZeroToSet --- src/generate/register.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/generate/register.rs b/src/generate/register.rs index 786f2858..d21f11f9 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -1223,7 +1223,7 @@ pub fn fields( OneToSet => "BitWriter1S", ZeroToClear => "BitWriter0C", OneToClear => "BitWriter1C", - ZeroToSet => "BitWriter0C", + ZeroToSet => "BitWriter0S", OneToToggle => "BitWriter1T", ZeroToToggle => "BitWriter0T", }, From b29e33982b43d6df50c10440c0f5943cd0b17641 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 20 Mar 2024 18:36:57 +0300 Subject: [PATCH 236/319] changelog --- CHANGELOG.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index a1db29b8..6040fc67 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Fix bit writer type for `ModifiedWriteValues::ZeroToSet` + ## [v0.32.0] - 2024-02-26 - Bump MSRV to 1.74 From cabb50463666a83ddcd20297979f06ae969a795e Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 19 Mar 2024 17:51:41 +0300 Subject: [PATCH 237/319] add WriteEnum & rm FieldWriterSafe, add set --- CHANGELOG.md | 2 ++ src/generate/generic.rs | 57 ++++++++++++++++++---------------------- src/generate/register.rs | 20 +++++++------- 3 files changed, 36 insertions(+), 43 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 6040fc67..4334fc64 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Add `WriteEnum` constraint for `FieldWriter`s (fix `variant` safety) +- Make field writer `bits` always `unsafe` add `set` for safe writing - Fix bit writer type for `ModifiedWriteValues::ZeroToSet` ## [v0.32.0] - 2024-02-26 diff --git a/src/generate/generic.rs b/src/generate/generic.rs index 1932f97a..563065eb 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -56,6 +56,9 @@ pub trait FieldSpec: Sized { type Ux: Copy + PartialEq + From; } +/// Marker for fields with fixed values +pub trait IsEnum: FieldSpec {} + /// Trait implemented by readable registers to enable the `read` method. /// /// Registers marked with `Writable` can be also be `modify`'ed. @@ -474,16 +477,13 @@ pub struct Safe; /// You should check that value is allowed to pass to register/field writer marked with this pub struct Unsafe; -/// Write field Proxy with unsafe `bits` -pub type FieldWriter<'a, REG, const WI: u8, FI = u8> = raw::FieldWriter<'a, REG, WI, FI, Unsafe>; -/// Write field Proxy with safe `bits` -pub type FieldWriterSafe<'a, REG, const WI: u8, FI = u8> = raw::FieldWriter<'a, REG, WI, FI, Safe>; +/// Write field Proxy +pub type FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> = raw::FieldWriter<'a, REG, WI, FI, Safety>; -impl<'a, REG, const WI: u8, FI> FieldWriter<'a, REG, WI, FI> +impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety> where REG: Writable + RegisterSpec, FI: FieldSpec, - REG::Ux: From, { /// Field width pub const WIDTH: u8 = WI; @@ -499,7 +499,14 @@ where pub const fn offset(&self) -> u8 { self.o } +} +impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety> +where + REG: Writable + RegisterSpec, + FI: FieldSpec, + REG::Ux: From, +{ /// Writes raw bits to the field /// /// # Safety @@ -511,45 +518,31 @@ where self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << self.o; self.w } - /// Writes `variant` to the field - #[inline(always)] - pub fn variant(self, variant: FI) -> &'a mut W { - unsafe { self.bits(FI::Ux::from(variant)) } - } } -impl<'a, REG, const WI: u8, FI> FieldWriterSafe<'a, REG, WI, FI> +impl<'a, REG, const WI: u8, FI> FieldWriter<'a, REG, WI, FI, Safe> where REG: Writable + RegisterSpec, FI: FieldSpec, REG::Ux: From, { - /// Field width - pub const WIDTH: u8 = WI; - - /// Field width - #[inline(always)] - pub const fn width(&self) -> u8 { - WI - } - - /// Field offset - #[inline(always)] - pub const fn offset(&self) -> u8 { - self.o - } - /// Writes raw bits to the field #[inline(always)] - pub fn bits(self, value: FI::Ux) -> &'a mut W { - self.w.bits &= !(REG::Ux::mask::() << self.o); - self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::()) << self.o; - self.w + pub fn set(self, value: FI::Ux) -> &'a mut W { + unsafe { self.bits(value) } } +} + +impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety> +where + REG: Writable + RegisterSpec, + FI: IsEnum, + REG::Ux: From, +{ /// Writes `variant` to the field #[inline(always)] pub fn variant(self, variant: FI) -> &'a mut W { - self.bits(FI::Ux::from(variant)) + unsafe { self.bits(FI::Ux::from(variant)) } } } diff --git a/src/generate/register.rs b/src/generate/register.rs index d21f11f9..1556e3a6 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -1235,19 +1235,16 @@ pub fn fields( quote! { crate::#wproxy<'a, REG, #value_write_ty> } } } else { - let wproxy = Ident::new( - if unsafety { - "FieldWriter" - } else { - "FieldWriterSafe" - }, - span, - ); + let wproxy = Ident::new("FieldWriter", span); let width = &unsuffixed(width); - if value_write_ty == "u8" { + if value_write_ty == "u8" && unsafety { quote! { crate::#wproxy<'a, REG, #width> } - } else { + } else if unsafety { quote! { crate::#wproxy<'a, REG, #width, #value_write_ty> } + } else { + let safe_ty = + Ident::new(if unsafety { "Unsafe" } else { "Safe" }, span); + quote! { crate::#wproxy<'a, REG, #width, #value_write_ty, crate::#safe_ty> } } }; mod_items.extend(quote! { @@ -1425,7 +1422,7 @@ impl Variant { span, ); let sc = case.sanitize(&ev.name); - const INTERNALS: [&str; 4] = ["set_bit", "clear_bit", "bit", "bits"]; + const INTERNALS: [&str; 6] = ["bit", "bits", "clear_bit", "set", "set_bit", "variant"]; let sc = Ident::new( &(if INTERNALS.contains(&sc.as_ref()) { sc + "_" @@ -1552,6 +1549,7 @@ fn add_from_variants<'a>( impl crate::FieldSpec for #pc { type Ux = #fty; } + impl crate::IsEnum for #pc {} }); } } From 595c6dc5459d5d4a2e87c92ea1dc20ebaec42ada Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 20 Mar 2024 11:02:57 +0300 Subject: [PATCH 238/319] Safety helper --- CHANGELOG.md | 2 +- src/generate/register.rs | 74 ++++++++++++++++++++++++++-------------- 2 files changed, 49 insertions(+), 27 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 4334fc64..571ebc47 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,7 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] -- Add `WriteEnum` constraint for `FieldWriter`s (fix `variant` safety) +- Add `IsEnum` constraint for `FieldWriter`s (fix `variant` safety) - Make field writer `bits` always `unsafe` add `set` for safe writing - Fix bit writer type for `ModifiedWriteValues::ZeroToSet` diff --git a/src/generate/register.rs b/src/generate/register.rs index 1556e3a6..614d3c21 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -393,7 +393,7 @@ pub fn render_register_mod( // * there is a single field that covers the entire register // * that field can represent all values // * the write constraints of the register allow full range of values - let can_write_safe = !unsafety( + let safe_ty = if let Safety::Safe = Safety::get( register .fields .as_ref() @@ -401,9 +401,14 @@ pub fn render_register_mod( .and_then(|field| field.write_constraint) .as_ref(), rsize, - ) || !unsafety(register.write_constraint.as_ref(), rsize); - let safe_ty = if can_write_safe { "Safe" } else { "Unsafe" }; - let safe_ty = Ident::new(safe_ty, span); + ) { + Safety::Safe + } else if let Safety::Safe = Safety::get(register.write_constraint.as_ref(), rsize) { + Safety::Safe + } else { + Safety::Unsafe + }; + let safe_ty = safe_ty.ident(span); let doc = format!("`write(|w| ..)` method takes [`{mod_ty}::W`](W) writer structure",); @@ -1097,7 +1102,7 @@ pub fn fields( // the read value, or else we reuse read value. if can_write { let mut proxy_items = TokenStream::new(); - let mut unsafety = unsafety(f.write_constraint.as_ref(), width); + let mut safety = Safety::get(f.write_constraint.as_ref(), width); // if we writes to enumeratedValues, generate its structure if it differs from read structure. let value_write_ty = if let Some(ev) = rwenum.write_enum() { @@ -1136,12 +1141,12 @@ pub fn fields( if variants.len() == 1 << width { } else if let Some(def) = def.take() { variants.push(def); - unsafety = false; + safety = Safety::Safe; } // if the write structure is finite, it can be safely written. if variants.len() == 1 << width { - unsafety = false; + safety = Safety::Safe; } // generate write value structure and From conversation if we can't reuse read value structure. @@ -1237,13 +1242,12 @@ pub fn fields( } else { let wproxy = Ident::new("FieldWriter", span); let width = &unsuffixed(width); - if value_write_ty == "u8" && unsafety { + if value_write_ty == "u8" && safety != Safety::Safe { quote! { crate::#wproxy<'a, REG, #width> } - } else if unsafety { + } else if safety != Safety::Safe { quote! { crate::#wproxy<'a, REG, #width, #value_write_ty> } } else { - let safe_ty = - Ident::new(if unsafety { "Unsafe" } else { "Safe" }, span); + let safe_ty = safety.ident(span); quote! { crate::#wproxy<'a, REG, #width, #value_write_ty, crate::#safe_ty> } } }; @@ -1367,22 +1371,40 @@ pub fn fields( )) } -fn unsafety(write_constraint: Option<&WriteConstraint>, width: u32) -> bool { - match &write_constraint { - Some(&WriteConstraint::Range(range)) - if range.min == 0 && range.max == u64::MAX >> (64 - width) => - { - // the SVD has acknowledged that it's safe to write - // any value that can fit in the field - false - } - None if width == 1 => { - // the field is one bit wide, so we assume it's legal to write - // either value into it or it wouldn't exist; despite that - // if a writeConstraint exists then respect it - false +#[derive(Clone, Debug, PartialEq, Eq)] +enum Safety { + Unsafe, + Safe, +} + +impl Safety { + fn get(write_constraint: Option<&WriteConstraint>, width: u32) -> Self { + match &write_constraint { + Some(&WriteConstraint::Range(range)) + if range.min == 0 && range.max == u64::MAX >> (64 - width) => + { + // the SVD has acknowledged that it's safe to write + // any value that can fit in the field + Self::Safe + } + None if width == 1 => { + // the field is one bit wide, so we assume it's legal to write + // either value into it or it wouldn't exist; despite that + // if a writeConstraint exists then respect it + Self::Safe + } + _ => Self::Unsafe, } - _ => true, + } + fn ident(&self, span: Span) -> Ident { + Ident::new( + if let Self::Safe = self { + "Safe" + } else { + "Unsafe" + }, + span, + ) } } From 0d39bee7546a98d9422fa2884e2f0c694fb14444 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 26 Mar 2024 21:31:09 +0300 Subject: [PATCH 239/319] release 0.33 --- CHANGELOG.md | 7 +++++-- Cargo.lock | 2 +- Cargo.toml | 2 +- 3 files changed, 7 insertions(+), 4 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 571ebc47..bbeae62e 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,8 +7,10 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.33.0] - 2024-03-26 + - Add `IsEnum` constraint for `FieldWriter`s (fix `variant` safety) -- Make field writer `bits` always `unsafe` add `set` for safe writing +- Make field writer `bits` always `unsafe`, add `set` for safe writing - Fix bit writer type for `ModifiedWriteValues::ZeroToSet` ## [v0.32.0] - 2024-02-26 @@ -877,7 +879,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.32.0...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.33.0...HEAD +[v0.33.0]: https://github.com/rust-embedded/svd2rust/compare/v0.32.0...v0.33.0 [v0.32.0]: https://github.com/rust-embedded/svd2rust/compare/v0.31.5...v0.32.0 [v0.31.5]: https://github.com/rust-embedded/svd2rust/compare/v0.31.4...v0.31.5 [v0.31.4]: https://github.com/rust-embedded/svd2rust/compare/v0.31.3...v0.31.4 diff --git a/Cargo.lock b/Cargo.lock index 0bc69f84..9a0e07ec 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1220,7 +1220,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.32.0" +version = "0.33.0" dependencies = [ "anyhow", "clap", diff --git a/Cargo.toml b/Cargo.toml index e9526ae8..08b3c2fb 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.32.0" +version = "0.33.0" readme = "README.md" rust-version = "1.74" From ff15953270d32fafffa63033bf0eef675b2f8d39 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 16 Apr 2024 18:44:24 +0300 Subject: [PATCH 240/319] field::set with range assert --- CHANGELOG.md | 2 ++ src/generate/generic.rs | 60 ++++++++++++++++++++++++++++++++++++++++ src/generate/register.rs | 49 ++++++++++++++++++-------------- 3 files changed, 90 insertions(+), 21 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index bbeae62e..953772ed 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Add checked `set` for not full safe fields + ## [v0.33.0] - 2024-03-26 - Add `IsEnum` constraint for `FieldWriter`s (fix `variant` safety) diff --git a/src/generate/generic.rs b/src/generate/generic.rs index 563065eb..d1b0ca0c 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -476,6 +476,12 @@ impl BitReader { pub struct Safe; /// You should check that value is allowed to pass to register/field writer marked with this pub struct Unsafe; +/// Marker for field writers are safe to write in specified inclusive range +pub struct Range; +/// Marker for field writers are safe to write in specified inclusive range +pub struct RangeFrom; +/// Marker for field writers are safe to write in specified inclusive range +pub struct RangeTo; /// Write field Proxy pub type FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> = raw::FieldWriter<'a, REG, WI, FI, Safety>; @@ -533,6 +539,60 @@ where } } +impl<'a, REG, const WI: u8, FI, const MIN: u64, const MAX: u64> FieldWriter<'a, REG, WI, FI, Range> +where + REG: Writable + RegisterSpec, + FI: FieldSpec, + REG::Ux: From, + u64: From, +{ + /// Writes raw bits to the field + #[inline(always)] + pub fn set(self, value: FI::Ux) -> &'a mut W { + { + let value = u64::from(value); + assert!(value >= MIN && value <= MAX); + } + unsafe { self.bits(value) } + } +} + +impl<'a, REG, const WI: u8, FI, const MIN: u64> FieldWriter<'a, REG, WI, FI, RangeFrom> +where + REG: Writable + RegisterSpec, + FI: FieldSpec, + REG::Ux: From, + u64: From, +{ + /// Writes raw bits to the field + #[inline(always)] + pub fn set(self, value: FI::Ux) -> &'a mut W { + { + let value = u64::from(value); + assert!(value >= MIN); + } + unsafe { self.bits(value) } + } +} + +impl<'a, REG, const WI: u8, FI, const MAX: u64> FieldWriter<'a, REG, WI, FI, RangeTo> +where + REG: Writable + RegisterSpec, + FI: FieldSpec, + REG::Ux: From, + u64: From, +{ + /// Writes raw bits to the field + #[inline(always)] + pub fn set(self, value: FI::Ux) -> &'a mut W { + { + let value = u64::from(value); + assert!(value <= MAX); + } + unsafe { self.bits(value) } + } +} + impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety> where REG: Writable + RegisterSpec, diff --git a/src/generate/register.rs b/src/generate/register.rs index 614d3c21..5305d7a8 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -1,6 +1,7 @@ use crate::svd::{ self, Access, BitRange, DimElement, EnumeratedValue, EnumeratedValues, Field, MaybeArray, ModifiedWriteValues, ReadAction, Register, RegisterProperties, Usage, WriteConstraint, + WriteConstraintRange, }; use core::u64; use log::warn; @@ -408,7 +409,7 @@ pub fn render_register_mod( } else { Safety::Unsafe }; - let safe_ty = safe_ty.ident(span); + let safe_ty = safe_ty.ident(rsize); let doc = format!("`write(|w| ..)` method takes [`{mod_ty}::W`](W) writer structure",); @@ -1138,17 +1139,14 @@ pub fn fields( .map(|v| Variant::from_value(v, def, config)) }) .transpose()?; + // if the write structure is finite, it can be safely written. if variants.len() == 1 << width { + safety = Safety::Safe; } else if let Some(def) = def.take() { variants.push(def); safety = Safety::Safe; } - // if the write structure is finite, it can be safely written. - if variants.len() == 1 << width { - safety = Safety::Safe; - } - // generate write value structure and From conversation if we can't reuse read value structure. if rwenum.generate_write_enum() { if variants.is_empty() { @@ -1241,14 +1239,14 @@ pub fn fields( } } else { let wproxy = Ident::new("FieldWriter", span); - let width = &unsuffixed(width); + let uwidth = &unsuffixed(width); if value_write_ty == "u8" && safety != Safety::Safe { - quote! { crate::#wproxy<'a, REG, #width> } + quote! { crate::#wproxy<'a, REG, #uwidth> } } else if safety != Safety::Safe { - quote! { crate::#wproxy<'a, REG, #width, #value_write_ty> } + quote! { crate::#wproxy<'a, REG, #uwidth, #value_write_ty> } } else { - let safe_ty = safety.ident(span); - quote! { crate::#wproxy<'a, REG, #width, #value_write_ty, crate::#safe_ty> } + let safe_ty = safety.ident(width); + quote! { crate::#wproxy<'a, REG, #uwidth, #value_write_ty, crate::#safe_ty> } } }; mod_items.extend(quote! { @@ -1371,9 +1369,10 @@ pub fn fields( )) } -#[derive(Clone, Debug, PartialEq, Eq)] +#[derive(Clone, Copy, Debug, PartialEq, Eq)] enum Safety { Unsafe, + Range(WriteConstraintRange), Safe, } @@ -1393,18 +1392,26 @@ impl Safety { // if a writeConstraint exists then respect it Self::Safe } + Some(&WriteConstraint::Range(range)) => Self::Range(range), _ => Self::Unsafe, } } - fn ident(&self, span: Span) -> Ident { - Ident::new( - if let Self::Safe = self { - "Safe" - } else { - "Unsafe" - }, - span, - ) + fn ident(&self, width: u32) -> TokenStream { + match self { + Self::Safe => quote!(Safe), + Self::Unsafe => quote!(Unsafe), + Self::Range(range) => { + let min = unsuffixed(range.min); + let max = unsuffixed(range.max); + if range.min == 0 { + quote!(RangeTo<#max>) + } else if range.max == u64::MAX >> (64 - width) { + quote!(RangeFrom<#min>) + } else { + quote!(Range<#min, #max>) + } + } + } } } From b541402a1a42121e761ad844455204d265ad5624 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 20 Apr 2024 16:35:26 +0300 Subject: [PATCH 241/319] release 0.33.1 --- CHANGELOG.md | 5 ++++- Cargo.lock | 2 +- Cargo.toml | 2 +- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 953772ed..cf61c4b4 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.33.1] - 2024-04-20 + - Add checked `set` for not full safe fields ## [v0.33.0] - 2024-03-26 @@ -881,7 +883,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.33.0...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.33.1...HEAD +[v0.33.1]: https://github.com/rust-embedded/svd2rust/compare/v0.33.0...v0.33.1 [v0.33.0]: https://github.com/rust-embedded/svd2rust/compare/v0.32.0...v0.33.0 [v0.32.0]: https://github.com/rust-embedded/svd2rust/compare/v0.31.5...v0.32.0 [v0.31.5]: https://github.com/rust-embedded/svd2rust/compare/v0.31.4...v0.31.5 diff --git a/Cargo.lock b/Cargo.lock index 9a0e07ec..4778935c 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1220,7 +1220,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.33.0" +version = "0.33.1" dependencies = [ "anyhow", "clap", diff --git a/Cargo.toml b/Cargo.toml index 08b3c2fb..198e3edd 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.33.0" +version = "0.33.1" readme = "README.md" rust-version = "1.74" From 305fcd749bf711d9974500b7c745f7e940a2c26b Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 3 May 2024 07:43:20 +0300 Subject: [PATCH 242/319] Debug impl cleanups --- CHANGELOG.md | 2 ++ src/generate/register.rs | 4 ++-- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index cf61c4b4..e13e62cd 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Remove unneeded `format_args` in register `Debug` impl + ## [v0.33.1] - 2024-04-20 - Add checked `set` for not full safe fields diff --git a/src/generate/register.rs b/src/generate/register.rs index 5305d7a8..b40d8a60 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -476,7 +476,7 @@ fn render_register_mod_debug( let f_name_n = field_accessor(&f.name.expand_dim(&suffix), config, span); let f_name_n_s = format!("{f_name_n}"); r_debug_impl.extend(quote! { - .field(#f_name_n_s, &format_args!("{}", self.#f_name_n().#bit_or_bits())) + .field(#f_name_n_s, &self.#f_name_n().#bit_or_bits()) }); } } else { @@ -484,7 +484,7 @@ fn render_register_mod_debug( let f_name = field_accessor(&f_name, config, span); let f_name_s = format!("{f_name}"); r_debug_impl.extend(quote! { - .field(#f_name_s, &format_args!("{}", self.#f_name().#bit_or_bits())) + .field(#f_name_s, &self.#f_name().#bit_or_bits()) }); } } From d77dea8430ce23bd93675c79c87db4f8c4decb1f Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 7 May 2024 05:33:43 +0300 Subject: [PATCH 243/319] release 0.33.2 --- CHANGELOG.md | 5 ++++- Cargo.lock | 2 +- Cargo.toml | 2 +- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index e13e62cd..54a911bf 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.33.2] - 2024-05-07 + - Remove unneeded `format_args` in register `Debug` impl ## [v0.33.1] - 2024-04-20 @@ -885,7 +887,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.33.1...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.33.2...HEAD +[v0.33.2]: https://github.com/rust-embedded/svd2rust/compare/v0.33.1...v0.33.2 [v0.33.1]: https://github.com/rust-embedded/svd2rust/compare/v0.33.0...v0.33.1 [v0.33.0]: https://github.com/rust-embedded/svd2rust/compare/v0.32.0...v0.33.0 [v0.32.0]: https://github.com/rust-embedded/svd2rust/compare/v0.31.5...v0.32.0 diff --git a/Cargo.lock b/Cargo.lock index 4778935c..7ae4fb73 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1220,7 +1220,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.33.1" +version = "0.33.2" dependencies = [ "anyhow", "clap", diff --git a/Cargo.toml b/Cargo.toml index 198e3edd..500a61c1 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.33.1" +version = "0.33.2" readme = "README.md" rust-version = "1.74" From ae239a242f729bb55a1cbc482afaca90540ea671 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 10 May 2024 11:46:16 +0300 Subject: [PATCH 244/319] implement Debug for Field/BitReader --- CHANGELOG.md | 2 ++ src/generate/generic.rs | 14 +++++++++++++- src/generate/register.rs | 6 ++---- 3 files changed, 17 insertions(+), 5 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 54a911bf..ca83e615 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Yet more clean field `Debug` + ## [v0.33.2] - 2024-05-07 - Remove unneeded `format_args` in register `Debug` impl diff --git a/src/generate/generic.rs b/src/generate/generic.rs index d1b0ca0c..df2913a4 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -53,7 +53,7 @@ pub trait RegisterSpec { /// Raw field type pub trait FieldSpec: Sized { /// Raw field type (`u8`, `u16`, `u32`, ...). - type Ux: Copy + PartialEq + From; + type Ux: Copy + core::fmt::Debug + PartialEq + From; } /// Marker for fields with fixed values @@ -433,6 +433,12 @@ impl FieldReader { } } +impl core::fmt::Debug for FieldReader { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + core::fmt::Debug::fmt(&self.bits, f) + } +} + impl PartialEq for FieldReader where FI: FieldSpec + Copy, @@ -472,6 +478,12 @@ impl BitReader { } } +impl core::fmt::Debug for BitReader { + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + core::fmt::Debug::fmt(&self.bits, f) + } +} + /// Marker for register/field writers which can take any value of specified width pub struct Safe; /// You should check that value is allowed to pass to register/field writer marked with this diff --git a/src/generate/register.rs b/src/generate/register.rs index b40d8a60..9ff29340 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -467,8 +467,6 @@ fn render_register_mod_debug( Some(a) => a, None => access, }; - let bit_or_bits = if f.bit_width() > 1 { "bits" } else { "bit" }; - let bit_or_bits = syn::Ident::new(bit_or_bits, span); log::debug!("register={} field={}", name, f.name); if field_access.can_read() && f.read_action.is_none() { if let Field::Array(_, de) = &f { @@ -476,7 +474,7 @@ fn render_register_mod_debug( let f_name_n = field_accessor(&f.name.expand_dim(&suffix), config, span); let f_name_n_s = format!("{f_name_n}"); r_debug_impl.extend(quote! { - .field(#f_name_n_s, &self.#f_name_n().#bit_or_bits()) + .field(#f_name_n_s, &self.#f_name_n()) }); } } else { @@ -484,7 +482,7 @@ fn render_register_mod_debug( let f_name = field_accessor(&f_name, config, span); let f_name_s = format!("{f_name}"); r_debug_impl.extend(quote! { - .field(#f_name_s, &self.#f_name().#bit_or_bits()) + .field(#f_name_s, &self.#f_name()) }); } } From 05bc3536f20e1351620f175514a11c8ffd2e6c2b Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 10 May 2024 12:50:33 +0300 Subject: [PATCH 245/319] generic register Debug --- CHANGELOG.md | 2 +- src/generate/generic.rs | 9 +++++++++ src/generate/register.rs | 14 -------------- 3 files changed, 10 insertions(+), 15 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index ca83e615..abf6b827 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,7 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] -- Yet more clean field `Debug` +- Yet more clean field & register `Debug` ## [v0.33.2] - 2024-05-07 diff --git a/src/generate/generic.rs b/src/generate/generic.rs index df2913a4..6921b5ab 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -258,6 +258,15 @@ impl Reg { } } +impl core::fmt::Debug for crate::generic::Reg +where + R: core::fmt::Debug +{ + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + core::fmt::Debug::fmt(&self.read(), f) + } +} + #[doc(hidden)] pub mod raw { use super::{marker, BitM, FieldSpec, RegisterSpec, Unsafe, Writable}; diff --git a/src/generate/register.rs b/src/generate/register.rs index 9ff29340..20f749a3 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -331,12 +331,6 @@ pub fn render_register_mod( write!(f, "{}", self.bits()) } } - #debug_feature - impl core::fmt::Debug for crate::generic::Reg<#regspec_ty> { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } - } }); } @@ -492,14 +486,6 @@ fn render_register_mod_debug( #close #close }); - r_debug_impl.extend(quote! { - #debug_feature - impl core::fmt::Debug for crate::generic::Reg<#regspec_ty> { - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } - } - }); } else if !access.can_read() || register.read_action.is_some() { r_debug_impl.extend(quote! { #debug_feature From b807632f6ece3646c77a4956a004e26a436f1c83 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 10 May 2024 17:13:11 +0300 Subject: [PATCH 246/319] release 0.33.3 --- CHANGELOG.md | 5 ++++- Cargo.lock | 2 +- Cargo.toml | 2 +- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index abf6b827..98a8f44f 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.33.3] - 2024-05-10 + - Yet more clean field & register `Debug` ## [v0.33.2] - 2024-05-07 @@ -889,7 +891,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.33.2...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.33.3...HEAD +[v0.33.3]: https://github.com/rust-embedded/svd2rust/compare/v0.33.2...v0.33.3 [v0.33.2]: https://github.com/rust-embedded/svd2rust/compare/v0.33.1...v0.33.2 [v0.33.1]: https://github.com/rust-embedded/svd2rust/compare/v0.33.0...v0.33.1 [v0.33.0]: https://github.com/rust-embedded/svd2rust/compare/v0.32.0...v0.33.0 diff --git a/Cargo.lock b/Cargo.lock index 7ae4fb73..ddd7927c 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1220,7 +1220,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.33.2" +version = "0.33.3" dependencies = [ "anyhow", "clap", diff --git a/Cargo.toml b/Cargo.toml index 500a61c1..38fb5b1b 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -23,7 +23,7 @@ keywords = [ license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.33.2" +version = "0.33.3" readme = "README.md" rust-version = "1.74" From 1a1204c10fe87aa038f3044f266f97a34ccc4991 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 17 May 2024 19:30:01 +0300 Subject: [PATCH 247/319] refactor-accessors --- src/generate/peripheral.rs | 118 ++++++------ src/generate/peripheral/accessor.rs | 273 ++++++++++------------------ 2 files changed, 149 insertions(+), 242 deletions(-) diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 382b3436..f7ea1520 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -294,7 +294,7 @@ struct RegisterBlockField { syn_field: syn::Field, offset: u32, size: u32, - accessors: Vec, + accessors: Vec, } #[derive(Clone, Debug)] @@ -1003,17 +1003,18 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result { @@ -1059,28 +1060,18 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result::with_capacity((array_info.dim + 1) as _); - accessors.push(if array_convertible { - ArrayAccessor { - doc, - name: accessor_name.clone(), - ty: ty.clone(), - offset: unsuffixed(info.address_offset), - dim: unsuffixed(array_info.dim), - increment: unsuffixed(array_info.dim_increment), - } - .into() - } else { - RawArrayAccessor { + let mut accessors = Vec::with_capacity((array_info.dim + 1) as _); + accessors.push( + Accessor::Array(ArrayAccessor { doc, name: accessor_name.clone(), ty: ty.clone(), offset: unsuffixed(info.address_offset), dim: unsuffixed(array_info.dim), increment: unsuffixed(array_info.dim_increment), - } - .into() - }); + }) + .raw_if(!array_convertible), + ); if !sequential_indexes_from0 || !ends_with_index { for (i, ci) in svd::cluster::expand(info, array_info).enumerate() { let idx_name = ident(&ci.name, config, "cluster_accessor", span); @@ -1091,14 +1082,14 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result Result { @@ -1250,28 +1243,18 @@ fn expand_register( info.address_offset, &description, ); - let mut accessors = Vec::::with_capacity((array_info.dim + 1) as _); - accessors.push(if array_convertible { - ArrayAccessor { - doc, - name: accessor_name.clone(), - ty: ty.clone(), - offset: unsuffixed(info.address_offset), - dim: unsuffixed(array_info.dim), - increment: unsuffixed(array_info.dim_increment), - } - .into() - } else { - RawArrayAccessor { + let mut accessors = Vec::with_capacity((array_info.dim + 1) as _); + accessors.push( + Accessor::Array(ArrayAccessor { doc, name: accessor_name.clone(), ty: ty.clone(), offset: unsuffixed(info.address_offset), dim: unsuffixed(array_info.dim), increment: unsuffixed(array_info.dim_increment), - } - .into() - }); + }) + .raw_if(!array_convertible), + ); if !sequential_indexes_from0 || !ends_with_index { for (i, ri) in svd::register::expand(info, array_info).enumerate() { let idx_name = ident( @@ -1287,14 +1270,14 @@ fn expand_register( ); let i = unsuffixed(i as u64); accessors.push( - ArrayElemAccessor { + Accessor::ArrayElem(ArrayElemAccessor { doc, name: idx_name, ty: ty.clone(), basename: accessor_name.clone(), i, - } - .into(), + }) + .raw_if(false), ); } }; @@ -1324,17 +1307,18 @@ fn expand_register( let name = ident(&ri.name, config, "register_accessor", span); let syn_field = new_syn_field(name.clone(), ty.clone()); + let accessor = Accessor::Reg(RegAccessor { + doc, + name, + ty: ty.clone(), + offset: unsuffixed(info.address_offset), + }) + .raw_if(false); register_expanded.push(RegisterBlockField { syn_field, offset: ri.address_offset, size: register_size, - accessors: vec![RegAccessor { - doc, - name, - ty: ty.clone(), - offset: unsuffixed(info.address_offset), - } - .into()], + accessors: vec![accessor], }); } } diff --git a/src/generate/peripheral/accessor.rs b/src/generate/peripheral/accessor.rs index d074117b..d30576c0 100644 --- a/src/generate/peripheral/accessor.rs +++ b/src/generate/peripheral/accessor.rs @@ -4,121 +4,118 @@ use quote::{quote, ToTokens}; #[derive(Clone, Debug)] pub enum Accessor { Reg(RegAccessor), - RawReg(RawRegAccessor), Array(ArrayAccessor), - RawArray(RawArrayAccessor), ArrayElem(ArrayElemAccessor), } +#[derive(Clone, Debug)] +pub enum AccessType { + Ref(Accessor), + RawRef(Accessor), +} + impl Accessor { - pub fn raw(self) -> Self { - match self { - Self::RawReg(_) | Self::RawArray(_) | Self::ArrayElem(_) => self, - Self::Reg(a) => RawRegAccessor { - doc: a.doc, - name: a.name, - ty: a.ty, - offset: a.offset, - } - .into(), - Self::Array(a) => RawArrayAccessor { - doc: a.doc, - name: a.name, - ty: a.ty, - offset: a.offset, - dim: a.dim, - increment: a.increment, - } - .into(), + pub fn raw_if(self, flag: bool) -> AccessType { + if flag { + AccessType::RawRef(self) + } else { + AccessType::Ref(self) } } } -impl ToTokens for Accessor { - fn to_tokens(&self, tokens: &mut TokenStream) { +impl AccessType { + pub fn raw(self) -> Self { match self { - Self::Reg(a) => a.to_tokens(tokens), - Self::RawReg(a) => a.to_tokens(tokens), - Self::Array(a) => a.to_tokens(tokens), - Self::RawArray(a) => a.to_tokens(tokens), - Self::ArrayElem(a) => a.to_tokens(tokens), + Self::RawRef(_) => self, + Self::Ref(a) => Self::RawRef(a), } } } -impl From for Accessor { - fn from(value: RegAccessor) -> Self { - Self::Reg(value) - } -} - -impl From for Accessor { - fn from(value: RawRegAccessor) -> Self { - Self::RawReg(value) - } -} - -impl From for Accessor { - fn from(value: ArrayAccessor) -> Self { - Self::Array(value) - } -} - -impl From for Accessor { - fn from(value: RawArrayAccessor) -> Self { - Self::RawArray(value) - } -} - -impl From for Accessor { - fn from(value: ArrayElemAccessor) -> Self { - Self::ArrayElem(value) - } -} - -#[derive(Clone, Debug)] -pub struct RegAccessor { - pub doc: String, - pub name: Ident, - pub ty: syn::Type, - pub offset: syn::LitInt, -} - -impl ToTokens for RegAccessor { +impl ToTokens for AccessType { fn to_tokens(&self, tokens: &mut TokenStream) { - let Self { doc, name, ty, .. } = self; - quote! { - #[doc = #doc] - #[inline(always)] - pub const fn #name(&self) -> &#ty { - &self.#name + match self { + Self::Ref(Accessor::Reg(RegAccessor { doc, name, ty, .. })) => { + quote! { + #[doc = #doc] + #[inline(always)] + pub const fn #name(&self) -> &#ty { + &self.#name + } + } } - } - .to_tokens(tokens); - } -} - -#[derive(Clone, Debug)] -pub struct RawRegAccessor { - pub doc: String, - pub name: Ident, - pub ty: syn::Type, - pub offset: syn::LitInt, -} - -impl ToTokens for RawRegAccessor { - fn to_tokens(&self, tokens: &mut TokenStream) { - let Self { - doc, - name, - ty, - offset, - } = self; - quote! { - #[doc = #doc] - #[inline(always)] - pub const fn #name(&self) -> &#ty { - unsafe { &*(self as *const Self).cast::().add(#offset).cast() } + Self::RawRef(Accessor::Reg(RegAccessor { + doc, + name, + ty, + offset, + })) => { + quote! { + #[doc = #doc] + #[inline(always)] + pub const fn #name(&self) -> &#ty { + unsafe { &*(self as *const Self).cast::().add(#offset).cast() } + } + } + } + Self::Ref(Accessor::Array(ArrayAccessor { doc, name, ty, .. })) => { + let name_iter = Ident::new(&format!("{name}_iter"), Span::call_site()); + quote! { + #[doc = #doc] + #[inline(always)] + pub const fn #name(&self, n: usize) -> &#ty { + &self.#name[n] + } + #[doc = "Iterator for array of:"] + #[doc = #doc] + #[inline(always)] + pub fn #name_iter(&self) -> impl Iterator { + self.#name.iter() + } + } + } + Self::RawRef(Accessor::Array(ArrayAccessor { + doc, + name, + ty, + offset, + dim, + increment, + })) => { + let name_iter = Ident::new(&format!("{name}_iter"), Span::call_site()); + let cast = quote! { unsafe { &*(self as *const Self).cast::().add(#offset).add(#increment * n).cast() } }; + quote! { + #[doc = #doc] + #[inline(always)] + pub const fn #name(&self, n: usize) -> &#ty { + #[allow(clippy::no_effect)] + [(); #dim][n]; + #cast + } + #[doc = "Iterator for array of:"] + #[doc = #doc] + #[inline(always)] + pub fn #name_iter(&self) -> impl Iterator { + (0..#dim).map(move |n| #cast) + } + } + } + Self::RawRef(Accessor::ArrayElem(elem)) | Self::Ref(Accessor::ArrayElem(elem)) => { + let ArrayElemAccessor { + doc, + name, + ty, + basename, + i, + } = elem; + quote! { + #[doc = #doc] + #[inline(always)] + pub const fn #name(&self) -> &#ty { + self.#basename(#i) + } + } } } .to_tokens(tokens); @@ -126,38 +123,15 @@ impl ToTokens for RawRegAccessor { } #[derive(Clone, Debug)] -pub struct ArrayAccessor { +pub struct RegAccessor { pub doc: String, pub name: Ident, pub ty: syn::Type, pub offset: syn::LitInt, - pub dim: syn::LitInt, - pub increment: syn::LitInt, -} - -impl ToTokens for ArrayAccessor { - fn to_tokens(&self, tokens: &mut TokenStream) { - let Self { doc, name, ty, .. } = self; - let name_iter = Ident::new(&format!("{name}_iter"), Span::call_site()); - quote! { - #[doc = #doc] - #[inline(always)] - pub const fn #name(&self, n: usize) -> &#ty { - &self.#name[n] - } - #[doc = "Iterator for array of:"] - #[doc = #doc] - #[inline(always)] - pub fn #name_iter(&self) -> impl Iterator { - self.#name.iter() - } - } - .to_tokens(tokens); - } } #[derive(Clone, Debug)] -pub struct RawArrayAccessor { +pub struct ArrayAccessor { pub doc: String, pub name: Ident, pub ty: syn::Type, @@ -166,37 +140,6 @@ pub struct RawArrayAccessor { pub increment: syn::LitInt, } -impl ToTokens for RawArrayAccessor { - fn to_tokens(&self, tokens: &mut TokenStream) { - let Self { - doc, - name, - ty, - offset, - dim, - increment, - } = self; - let name_iter = Ident::new(&format!("{name}_iter"), Span::call_site()); - let cast = quote! { unsafe { &*(self as *const Self).cast::().add(#offset).add(#increment * n).cast() } }; - quote! { - #[doc = #doc] - #[inline(always)] - pub const fn #name(&self, n: usize) -> &#ty { - #[allow(clippy::no_effect)] - [(); #dim][n]; - #cast - } - #[doc = "Iterator for array of:"] - #[doc = #doc] - #[inline(always)] - pub fn #name_iter(&self) -> impl Iterator { - (0..#dim).map(move |n| #cast) - } - } - .to_tokens(tokens); - } -} - #[derive(Clone, Debug)] pub struct ArrayElemAccessor { pub doc: String, @@ -205,23 +148,3 @@ pub struct ArrayElemAccessor { pub basename: Ident, pub i: syn::LitInt, } - -impl ToTokens for ArrayElemAccessor { - fn to_tokens(&self, tokens: &mut TokenStream) { - let Self { - doc, - name, - ty, - basename, - i, - } = &self; - quote! { - #[doc = #doc] - #[inline(always)] - pub const fn #name(&self) -> &#ty { - self.#basename(#i) - } - } - .to_tokens(tokens); - } -} From 62bb3be033ade3b16f0072fe9bcfa3d72dfc3b47 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 18 May 2024 10:20:54 +0300 Subject: [PATCH 248/319] changelog --- CHANGELOG.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 98a8f44f..878d2f1f 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Refactor `Accessor` + ## [v0.33.3] - 2024-05-10 - Yet more clean field & register `Debug` From 90ea9f1fb05ca54d16d673b7199e4c39c9f294ac Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 29 May 2024 21:24:26 +0300 Subject: [PATCH 249/319] little cleanups --- src/generate/register.rs | 40 ++++++++++++++++++---------------------- src/util.rs | 20 +++++--------------- 2 files changed, 23 insertions(+), 37 deletions(-) diff --git a/src/generate/register.rs b/src/generate/register.rs index 20f749a3..b547139c 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -119,11 +119,9 @@ pub fn render( register.read_action, )? ); - if mod_ty != "cfg" { - alias_doc += - format!("\n\nFor information about available fields see [`mod@{mod_ty}`] module") - .as_str(); - } + alias_doc += + format!("\n\nFor information about available fields see [`mod@{mod_ty}`] module") + .as_str(); let mut out = TokenStream::new(); out.extend(quote! { #[doc = #alias_doc] @@ -158,7 +156,7 @@ fn api_docs( read_action: Option, ) -> Result { fn method(s: &str) -> String { - format!("[`{s}`](crate::generic::Reg::{s})") + format!("[`{s}`](crate::Reg::{s})") } let mut doc = String::new(); @@ -166,13 +164,13 @@ fn api_docs( if can_read { write!( doc, - "You can {} this register and get [`{module}::R`]{}. ", + "You can {} this register and get [`{module}::R`]{}.", method("read"), if inmodule { "(R)" } else { "" }, )?; if let Some(action) = read_action { - doc.push_str("WARN: "); + doc.push_str(" WARN: "); doc.push_str(match action { ReadAction::Clear => "The register is **cleared** (set to zero) following a read operation.", ReadAction::Set => "The register is **set** (set to ones) following a read operation.", @@ -203,7 +201,7 @@ fn api_docs( } if can_read && can_write { - write!(doc, "You can also {} this register. ", method("modify"),)?; + write!(doc, "You can also {} this register. ", method("modify"))?; } doc.push_str("See [API](https://docs.rs/svd2rust/#read--modify--write-api)."); @@ -220,12 +218,13 @@ pub fn render_register_mod( ) -> Result { let properties = ®ister.properties; let name = util::name_of(register, config.ignore_groups); + let rname = ®ister.name; let span = Span::call_site(); let regspec_ty = regspec(&name, config, span); let mod_ty = ident(&name, config, "register_mod", span); let rsize = properties .size - .ok_or_else(|| anyhow!("Register {} has no `size` field", register.name))?; + .ok_or_else(|| anyhow!("Register {rname} has no `size` field"))?; let rsize = if rsize < 8 { 8 } else if rsize.is_power_of_two() { @@ -236,7 +235,7 @@ pub fn render_register_mod( let rty = rsize.to_ty()?; let description = util::escape_special_chars( util::respace(®ister.description.clone().unwrap_or_else(|| { - warn!("Missing description for register {}", register.name); + warn!("Missing description for register {rname}"); Default::default() })) .as_ref(), @@ -249,7 +248,7 @@ pub fn render_register_mod( let can_reset = properties.reset_value.is_some(); if can_read { - let desc = format!("Register `{}` reader", register.name); + let desc = format!("Register `{rname}` reader"); mod_items.extend(quote! { #[doc = #desc] pub type R = crate::R<#regspec_ty>; @@ -257,7 +256,7 @@ pub fn render_register_mod( } if can_write { - let desc = format!("Register `{}` writer", register.name); + let desc = format!("Register `{rname}` writer"); mod_items.extend(quote! { #[doc = #desc] pub type W = crate::W<#regspec_ty>; @@ -663,15 +662,11 @@ pub fn fields( let rv = properties.reset_value.map(|rv| (rv >> offset) & mask); let fty = width.to_ty()?; - let use_mask; - let use_cast; - if let Some(size) = properties.size { + let (use_cast, use_mask) = if let Some(size) = properties.size { let size = size.to_ty_width()?; - use_cast = size != width.to_ty_width()?; - use_mask = size != width; + (size != width.to_ty_width()?, size != width) } else { - use_cast = true; - use_mask = true; + (true, true) }; let mut lookup_results = Vec::new(); @@ -724,7 +719,8 @@ pub fn fields( let brief_suffix = if let Field::Array(_, de) = &f { if let Some(range) = de.indexes_as_range() { - format!("({}-{})", *range.start(), *range.end()) + let (start, end) = range.into_inner(); + format!("({start}-{end})") } else { let suffixes: Vec<_> = de.indexes().collect(); format!("({})", suffixes.join(",")) @@ -1420,7 +1416,7 @@ impl Variant { .ok_or_else(|| anyhow!("EnumeratedValue {} has no `` entry", ev.name))?; Self::from_value(value, ev, config) }) - .collect::>>() + .collect() } fn from_value(value: u64, ev: &EnumeratedValue, config: &Config) -> Result { let span = Span::call_site(); diff --git a/src/util.rs b/src/util.rs index 4910e6a7..6f72a30b 100644 --- a/src/util.rs +++ b/src/util.rs @@ -356,12 +356,7 @@ impl U32Ext for u32 { 16 => "u16", 32 => "u32", 64 => "u64", - _ => { - return Err(anyhow!( - "can't convert {} bits into register size type", - *self - )) - } + _ => return Err(anyhow!("can't convert {self} bits into register size type")), }) } fn to_ty(&self) -> Result { @@ -374,8 +369,7 @@ impl U32Ext for u32 { 33..=64 => "u64", _ => { return Err(anyhow!( - "can't convert {} bits into a Rust integral type", - *self + "can't convert {self} bits into a Rust integral type" )) } }, @@ -392,8 +386,7 @@ impl U32Ext for u32 { 33..=64 => 64, _ => { return Err(anyhow!( - "can't convert {} bits into a Rust integral type width", - *self + "can't convert {self} bits into a Rust integral type width" )) } }) @@ -437,11 +430,8 @@ pub trait DimSuffix { impl DimSuffix for str { fn expand_dim(&self, suffix: &str) -> Cow { if self.contains("%s") { - if self.contains("[%s]") { - self.replace("[%s]", suffix).into() - } else { - self.replace("%s", suffix).into() - } + self.replace(if self.contains("[%s]") { "[%s]" } else { "%s" }, suffix) + .into() } else { self.into() } From e7ee5235cdab849214e060c3822415ae8ca25231 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 2 Jun 2024 06:54:27 +0300 Subject: [PATCH 250/319] readAction warning --- CHANGELOG.md | 1 + src/generate/register.rs | 69 ++++++++++++++++++++-------------------- 2 files changed, 36 insertions(+), 34 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 878d2f1f..f365da9d 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Use `warning` class in docs - Refactor `Accessor` ## [v0.33.3] - 2024-05-10 diff --git a/src/generate/register.rs b/src/generate/register.rs index b547139c..1c1c6512 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -109,15 +109,15 @@ pub fn render( }; let mut alias_doc = format!( - "{name} ({accs}) register accessor: {description}\n\n{}", + "{name} ({accs}) register accessor: {description}{}{}", api_docs( access.can_read(), access.can_write(), register.properties.reset_value.is_some(), &mod_ty, false, - register.read_action, - )? + )?, + read_action_docs(access.can_read(), register.read_action), ); alias_doc += format!("\n\nFor information about available fields see [`mod@{mod_ty}`] module") @@ -147,38 +147,43 @@ pub fn render( } } +fn read_action_docs(can_read: bool, read_action: Option) -> String { + let mut doc = String::new(); + if can_read { + if let Some(action) = read_action { + doc.push_str("\n\n
"); + doc.push_str(match action { + ReadAction::Clear => "The register is cleared (set to zero) following a read operation.", + ReadAction::Set => "The register is set (set to ones) following a read operation.", + ReadAction::Modify => "The register is modified in some way after a read operation.", + ReadAction::ModifyExternal => "One or more dependent resources other than the current register are immediately affected by a read operation.", + }); + doc.push_str("
"); + } + } + doc +} + fn api_docs( can_read: bool, can_write: bool, can_reset: bool, module: &Ident, inmodule: bool, - read_action: Option, ) -> Result { fn method(s: &str) -> String { format!("[`{s}`](crate::Reg::{s})") } - let mut doc = String::new(); + let mut doc = String::from("\n\n"); if can_read { write!( doc, - "You can {} this register and get [`{module}::R`]{}.", + "You can {} this register and get [`{module}::R`]{}. ", method("read"), if inmodule { "(R)" } else { "" }, )?; - - if let Some(action) = read_action { - doc.push_str(" WARN: "); - doc.push_str(match action { - ReadAction::Clear => "The register is **cleared** (set to zero) following a read operation.", - ReadAction::Set => "The register is **set** (set to ones) following a read operation.", - ReadAction::Modify => "The register is **modified** in some way after a read operation.", - ReadAction::ModifyExternal => "One or more dependent resources other than the current register are immediately affected by a read operation.", - }); - } - doc.push(' '); } if can_write { @@ -355,15 +360,9 @@ pub fn render_register_mod( } let doc = format!( - "{description}\n\n{}", - api_docs( - can_read, - can_write, - can_reset, - &mod_ty, - true, - register.read_action, - )? + "{description}{}{}", + api_docs(can_read, can_write, can_reset, &mod_ty, true)?, + read_action_docs(access.can_read(), register.read_action), ); mod_items.extend(quote! { @@ -951,12 +950,14 @@ pub fn fields( }; let mut readerdoc = field_reader_brief.clone(); if let Some(action) = f.read_action { - readerdoc += match action { - ReadAction::Clear => "\n\nThe field is **cleared** (set to zero) following a read operation.", - ReadAction::Set => "\n\nThe field is **set** (set to ones) following a read operation.", - ReadAction::Modify => "\n\nThe field is **modified** in some way after a read operation.", - ReadAction::ModifyExternal => "\n\nOne or more dependent resources other than the current field are immediately affected by a read operation.", - }; + readerdoc.push_str("\n\n
"); + readerdoc.push_str(match action { + ReadAction::Clear => "The field is cleared (set to zero) following a read operation.", + ReadAction::Set => "The field is set (set to ones) following a read operation.", + ReadAction::Modify => "The field is modified in some way after a read operation.", + ReadAction::ModifyExternal => "One or more dependent resources other than the current field are immediately affected by a read operation.", + }); + readerdoc.push_str("
"); } mod_items.extend(quote! { #[doc = #readerdoc] @@ -992,7 +993,7 @@ pub fn fields( let increment = de.dim_increment; let doc = description.expand_dim(&brief_suffix); let first_name = svd::array::names(f, de).next().unwrap(); - let note = format!("NOTE: `n` is number of field in register. `n == 0` corresponds to `{first_name}` field"); + let note = format!("
`n` is number of field in register. `n == 0` corresponds to `{first_name}` field.
"); let offset_calc = calculate_offset(increment, offset, true); let value = quote! { ((self.bits >> #offset_calc) & #hexmask) #cast }; let dim = unsuffixed(de.dim); @@ -1279,7 +1280,7 @@ pub fn fields( let offset_calc = calculate_offset(increment, offset, false); let doc = &description.expand_dim(&brief_suffix); let first_name = svd::array::names(f, de).next().unwrap(); - let note = format!("NOTE: `n` is number of field in register. `n == 0` corresponds to `{first_name}` field"); + let note = format!("
`n` is number of field in register. `n == 0` corresponds to `{first_name}` field.
"); let dim = unsuffixed(de.dim); w_impl_items.extend(quote! { #[doc = #doc] From 57e8adfd7f4162874f0a15a806e6691d14e29b35 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 3 Jun 2024 22:04:57 +0300 Subject: [PATCH 251/319] Move Reg in separate file --- CHANGELOG.md | 1 + src/generate/device.rs | 11 +- src/generate/generic.rs | 172 ------------------------------ src/generate/generic_reg_vcell.rs | 171 +++++++++++++++++++++++++++++ 4 files changed, 177 insertions(+), 178 deletions(-) create mode 100644 src/generate/generic_reg_vcell.rs diff --git a/CHANGELOG.md b/CHANGELOG.md index f365da9d..503ac041 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Move `Reg` in separate file - Use `warning` class in docs - Refactor `Accessor` diff --git a/src/generate/device.rs b/src/generate/device.rs index 25d6bdd2..dd601ada 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -140,6 +140,7 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Result Result Result { for p_name in names(p, dim_element) { @@ -263,9 +264,7 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result { - register: vcell::VolatileCell, - _marker: marker::PhantomData, -} - -unsafe impl Send for Reg where REG::Ux: Send {} - -impl Reg { - /// Returns the underlying memory address of register. - /// - /// ```ignore - /// let reg_ptr = periph.reg.as_ptr(); - /// ``` - #[inline(always)] - pub fn as_ptr(&self) -> *mut REG::Ux { - self.register.as_ptr() - } -} - -impl Reg { - /// Reads the contents of a `Readable` register. - /// - /// You can read the raw contents of a register by using `bits`: - /// ```ignore - /// let bits = periph.reg.read().bits(); - /// ``` - /// or get the content of a particular field of a register: - /// ```ignore - /// let reader = periph.reg.read(); - /// let bits = reader.field1().bits(); - /// let flag = reader.field2().bit_is_set(); - /// ``` - #[inline(always)] - pub fn read(&self) -> R { - R { - bits: self.register.get(), - _reg: marker::PhantomData, - } - } -} - -impl Reg { - /// Writes the reset value to `Writable` register. - /// - /// Resets the register to its initial state. - #[inline(always)] - pub fn reset(&self) { - self.register.set(REG::RESET_VALUE) - } - - /// Writes bits to a `Writable` register. - /// - /// You can write raw bits into a register: - /// ```ignore - /// periph.reg.write(|w| unsafe { w.bits(rawbits) }); - /// ``` - /// or write only the fields you need: - /// ```ignore - /// periph.reg.write(|w| w - /// .field1().bits(newfield1bits) - /// .field2().set_bit() - /// .field3().variant(VARIANT) - /// ); - /// ``` - /// or an alternative way of saying the same: - /// ```ignore - /// periph.reg.write(|w| { - /// w.field1().bits(newfield1bits); - /// w.field2().set_bit(); - /// w.field3().variant(VARIANT) - /// }); - /// ``` - /// In the latter case, other fields will be set to their reset value. - #[inline(always)] - pub fn write(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - self.register.set( - f(&mut W { - bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP - | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, - _reg: marker::PhantomData, - }) - .bits, - ); - } -} - -impl Reg { - /// Writes 0 to a `Writable` register. - /// - /// Similar to `write`, but unused bits will contain 0. - /// - /// # Safety - /// - /// Unsafe to use with registers which don't allow to write 0. - #[inline(always)] - pub unsafe fn write_with_zero(&self, f: F) - where - F: FnOnce(&mut W) -> &mut W, - { - self.register.set( - f(&mut W { - bits: REG::Ux::default(), - _reg: marker::PhantomData, - }) - .bits, - ); - } -} - -impl Reg { - /// Modifies the contents of the register by reading and then writing it. - /// - /// E.g. to do a read-modify-write sequence to change parts of a register: - /// ```ignore - /// periph.reg.modify(|r, w| unsafe { w.bits( - /// r.bits() | 3 - /// ) }); - /// ``` - /// or - /// ```ignore - /// periph.reg.modify(|_, w| w - /// .field1().bits(newfield1bits) - /// .field2().set_bit() - /// .field3().variant(VARIANT) - /// ); - /// ``` - /// or an alternative way of saying the same: - /// ```ignore - /// periph.reg.modify(|_, w| { - /// w.field1().bits(newfield1bits); - /// w.field2().set_bit(); - /// w.field3().variant(VARIANT) - /// }); - /// ``` - /// Other fields will have the value they had before the call to `modify`. - #[inline(always)] - pub fn modify(&self, f: F) - where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, - { - let bits = self.register.get(); - self.register.set( - f( - &R { - bits, - _reg: marker::PhantomData, - }, - &mut W { - bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP - | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, - _reg: marker::PhantomData, - }, - ) - .bits, - ); - } -} - -impl core::fmt::Debug for crate::generic::Reg -where - R: core::fmt::Debug -{ - fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { - core::fmt::Debug::fmt(&self.read(), f) - } -} - #[doc(hidden)] pub mod raw { use super::{marker, BitM, FieldSpec, RegisterSpec, Unsafe, Writable}; diff --git a/src/generate/generic_reg_vcell.rs b/src/generate/generic_reg_vcell.rs new file mode 100644 index 00000000..5081ae20 --- /dev/null +++ b/src/generate/generic_reg_vcell.rs @@ -0,0 +1,171 @@ +/// This structure provides volatile access to registers. +#[repr(transparent)] +pub struct Reg { + register: vcell::VolatileCell, + _marker: marker::PhantomData, +} + +unsafe impl Send for Reg where REG::Ux: Send {} + +impl Reg { + /// Returns the underlying memory address of register. + /// + /// ```ignore + /// let reg_ptr = periph.reg.as_ptr(); + /// ``` + #[inline(always)] + pub fn as_ptr(&self) -> *mut REG::Ux { + self.register.as_ptr() + } +} + +impl Reg { + /// Reads the contents of a `Readable` register. + /// + /// You can read the raw contents of a register by using `bits`: + /// ```ignore + /// let bits = periph.reg.read().bits(); + /// ``` + /// or get the content of a particular field of a register: + /// ```ignore + /// let reader = periph.reg.read(); + /// let bits = reader.field1().bits(); + /// let flag = reader.field2().bit_is_set(); + /// ``` + #[inline(always)] + pub fn read(&self) -> R { + R { + bits: self.register.get(), + _reg: marker::PhantomData, + } + } +} + +impl Reg { + /// Writes the reset value to `Writable` register. + /// + /// Resets the register to its initial state. + #[inline(always)] + pub fn reset(&self) { + self.register.set(REG::RESET_VALUE) + } + + /// Writes bits to a `Writable` register. + /// + /// You can write raw bits into a register: + /// ```ignore + /// periph.reg.write(|w| unsafe { w.bits(rawbits) }); + /// ``` + /// or write only the fields you need: + /// ```ignore + /// periph.reg.write(|w| w + /// .field1().bits(newfield1bits) + /// .field2().set_bit() + /// .field3().variant(VARIANT) + /// ); + /// ``` + /// or an alternative way of saying the same: + /// ```ignore + /// periph.reg.write(|w| { + /// w.field1().bits(newfield1bits); + /// w.field2().set_bit(); + /// w.field3().variant(VARIANT) + /// }); + /// ``` + /// In the latter case, other fields will be set to their reset value. + #[inline(always)] + pub fn write(&self, f: F) + where + F: FnOnce(&mut W) -> &mut W, + { + self.register.set( + f(&mut W { + bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP + | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, + _reg: marker::PhantomData, + }) + .bits, + ); + } +} + +impl Reg { + /// Writes 0 to a `Writable` register. + /// + /// Similar to `write`, but unused bits will contain 0. + /// + /// # Safety + /// + /// Unsafe to use with registers which don't allow to write 0. + #[inline(always)] + pub unsafe fn write_with_zero(&self, f: F) + where + F: FnOnce(&mut W) -> &mut W, + { + self.register.set( + f(&mut W { + bits: REG::Ux::default(), + _reg: marker::PhantomData, + }) + .bits, + ); + } +} + +impl Reg { + /// Modifies the contents of the register by reading and then writing it. + /// + /// E.g. to do a read-modify-write sequence to change parts of a register: + /// ```ignore + /// periph.reg.modify(|r, w| unsafe { w.bits( + /// r.bits() | 3 + /// ) }); + /// ``` + /// or + /// ```ignore + /// periph.reg.modify(|_, w| w + /// .field1().bits(newfield1bits) + /// .field2().set_bit() + /// .field3().variant(VARIANT) + /// ); + /// ``` + /// or an alternative way of saying the same: + /// ```ignore + /// periph.reg.modify(|_, w| { + /// w.field1().bits(newfield1bits); + /// w.field2().set_bit(); + /// w.field3().variant(VARIANT) + /// }); + /// ``` + /// Other fields will have the value they had before the call to `modify`. + #[inline(always)] + pub fn modify(&self, f: F) + where + for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, + { + let bits = self.register.get(); + self.register.set( + f( + &R { + bits, + _reg: marker::PhantomData, + }, + &mut W { + bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP + | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, + _reg: marker::PhantomData, + }, + ) + .bits, + ); + } +} + +impl core::fmt::Debug for crate::generic::Reg +where + R: core::fmt::Debug +{ + fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { + core::fmt::Debug::fmt(&self.read(), f) + } +} From 4a1847c6f474cb0944263b23a91412f4d5b329ef Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 9 Jun 2024 17:09:44 +0300 Subject: [PATCH 252/319] peripheral to tokens closure --- src/generate/peripheral.rs | 144 +++++++++++++++++-------------------- 1 file changed, 65 insertions(+), 79 deletions(-) diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index f7ea1520..23bf309e 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -5,6 +5,7 @@ use std::fmt; use svd_parser::expand::{ derive_cluster, derive_peripheral, derive_register, BlockPath, Index, RegisterPath, }; +use syn::LitInt; use crate::config::Config; use crate::svd::{ @@ -80,6 +81,54 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result } }; + let per_to_tokens = |out: &mut TokenStream, + feature_attribute: &TokenStream, + description: &str, + p_ty: &Ident, + doc_alias: Option, + address: LitInt| { + out.extend(quote! { + #[doc = #description] + #doc_alias + #feature_attribute + pub struct #p_ty { _marker: PhantomData<*const ()> } + + #feature_attribute + unsafe impl Send for #p_ty {} + + #feature_attribute + impl #p_ty { + ///Pointer to the register block + pub const PTR: *const #base::RegisterBlock = #address as *const _; + + ///Return the pointer to the register block + #[inline(always)] + pub const fn ptr() -> *const #base::RegisterBlock { + Self::PTR + } + + #steal_fn + } + + #feature_attribute + impl Deref for #p_ty { + type Target = #base::RegisterBlock; + + #[inline(always)] + fn deref(&self) -> &Self::Target { + unsafe { &*Self::PTR } + } + } + + #feature_attribute + impl core::fmt::Debug for #p_ty { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { + f.debug_struct(#name_str).finish() + } + } + }); + }; + match &p { Peripheral::Array(p, dim) => { let mut feature_names = Vec::with_capacity(dim.dim as _); @@ -97,46 +146,14 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result feature_attribute_n.extend(quote! { #[cfg(feature = #p_feature)] }) }; // Insert the peripherals structure - out.extend(quote! { - #[doc = #description] - #doc_alias - #feature_attribute_n - pub struct #p_ty { _marker: PhantomData<*const ()> } - - #feature_attribute_n - unsafe impl Send for #p_ty {} - - #feature_attribute_n - impl #p_ty { - ///Pointer to the register block - pub const PTR: *const #base::RegisterBlock = #address as *const _; - - ///Return the pointer to the register block - #[inline(always)] - pub const fn ptr() -> *const #base::RegisterBlock { - Self::PTR - } - - #steal_fn - } - - #feature_attribute_n - impl Deref for #p_ty { - type Target = #base::RegisterBlock; - - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } - } - - #feature_attribute_n - impl core::fmt::Debug for #p_ty { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct(#name_str).finish() - } - } - }); + per_to_tokens( + &mut out, + &feature_attribute_n, + description, + &p_ty, + doc_alias, + address, + ); } let feature_any_attribute = quote! {#[cfg(any(#(feature = #feature_names),*))]}; @@ -159,45 +176,14 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result feature_attribute.extend(quote! { #[cfg(feature = #p_feature)] }) }; // Insert the peripheral structure - out.extend(quote! { - #[doc = #description] - #feature_attribute - pub struct #p_ty { _marker: PhantomData<*const ()> } - - #feature_attribute - unsafe impl Send for #p_ty {} - - #feature_attribute - impl #p_ty { - ///Pointer to the register block - pub const PTR: *const #base::RegisterBlock = #address as *const _; - - ///Return the pointer to the register block - #[inline(always)] - pub const fn ptr() -> *const #base::RegisterBlock { - Self::PTR - } - - #steal_fn - } - - #feature_attribute - impl Deref for #p_ty { - type Target = #base::RegisterBlock; - - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } - } - - #feature_attribute - impl core::fmt::Debug for #p_ty { - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { - f.debug_struct(#name_str).finish() - } - } - }); + per_to_tokens( + &mut out, + &feature_attribute, + &description, + &p_ty, + None, + address, + ); // Derived peripherals may not require re-implementation, and will instead // use a single definition of the non-derived version. From 68d69b637ba45072e39e24695e90c05cfbdb3c24 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 9 Jun 2024 19:03:15 +0300 Subject: [PATCH 253/319] html-url --- CHANGELOG.md | 1 + Cargo.lock | 2 ++ Cargo.toml | 1 + src/config.rs | 1 + src/generate/peripheral.rs | 6 ++++++ src/generate/register.rs | 43 +++++++++++++++++++++++++++++--------- src/main.rs | 8 +++++++ 7 files changed, 52 insertions(+), 10 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 503ac041..4c35b266 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Add `html-url` option to access `svdtools html` files from docs - Move `Reg` in separate file - Use `warning` class in docs - Refactor `Accessor` diff --git a/Cargo.lock b/Cargo.lock index ddd7927c..109572a1 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1239,6 +1239,7 @@ dependencies = [ "svd-rs", "syn 2.0.42", "thiserror", + "url", ] [[package]] @@ -1547,6 +1548,7 @@ dependencies = [ "form_urlencoded", "idna", "percent-encoding", + "serde", ] [[package]] diff --git a/Cargo.toml b/Cargo.toml index 38fb5b1b..790bf34e 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -57,6 +57,7 @@ serde_json = { version = "1.0.85", optional = true } serde_yaml = { version = "0.9.11", optional = true } regex = "1.10.0" html-escape = "0.2" +url = { version = "2.5", features = ["serde"] } [dependencies.svd-parser] features = ["expand"] diff --git a/src/config.rs b/src/config.rs index e53a2e33..79522ecd 100644 --- a/src/config.rs +++ b/src/config.rs @@ -35,6 +35,7 @@ pub struct Config { pub ident_formats_theme: Option, pub field_names_for_enums: bool, pub base_address_shift: u64, + pub html_url: Option, } #[allow(clippy::upper_case_acronyms)] diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 23bf309e..27c54bbe 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -81,6 +81,11 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result } }; + let phtml = config.html_url.as_ref().map(|url| { + let doc = format!("See peripheral [structure]({url}#{})", &path.peripheral); + quote!(#[doc = ""] #[doc = #doc]) + }); + let per_to_tokens = |out: &mut TokenStream, feature_attribute: &TokenStream, description: &str, @@ -89,6 +94,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result address: LitInt| { out.extend(quote! { #[doc = #description] + #phtml #doc_alias #feature_attribute pub struct #p_ty { _marker: PhantomData<*const ()> } diff --git a/src/generate/register.rs b/src/generate/register.rs index 1c1c6512..569454cb 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -108,6 +108,7 @@ pub fn render( return Err(anyhow!("Incorrect access of register {}", register.name)); }; + let rpath = path.new_register(®ister.name); let mut alias_doc = format!( "{name} ({accs}) register accessor: {description}{}{}", api_docs( @@ -116,6 +117,9 @@ pub fn render( register.properties.reset_value.is_some(), &mod_ty, false, + ®ister, + &rpath, + config, )?, read_action_docs(access.can_read(), register.read_action), ); @@ -128,13 +132,7 @@ pub fn render( #doc_alias pub type #reg_ty = crate::Reg<#mod_ty::#regspec_ty>; }); - let mod_items = render_register_mod( - register, - access, - &path.new_register(®ister.name), - index, - config, - )?; + let mod_items = render_register_mod(register, access, &rpath, index, config)?; out.extend(quote! { #[doc = #description] @@ -170,6 +168,9 @@ fn api_docs( can_reset: bool, module: &Ident, inmodule: bool, + register: &Register, + rpath: &RegisterPath, + config: &Config, ) -> Result { fn method(s: &str) -> String { format!("[`{s}`](crate::Reg::{s})") @@ -211,13 +212,35 @@ fn api_docs( doc.push_str("See [API](https://docs.rs/svd2rust/#read--modify--write-api)."); + if let Some(url) = config.html_url.as_ref() { + let first_idx = if let Register::Array(_, dim) = ®ister { + dim.indexes().next() + } else { + None + }; + let rname = if let Some(idx) = first_idx { + let idx = format!("[{idx}]"); + rpath.name.replace("[%s]", &idx).replace("%s", &idx) + } else { + rpath.name.to_string() + }; + // TODO: support html_urls for registers in cluster + if rpath.block.path.is_empty() { + doc.push_str(&format!( + "\n\nSee register [structure]({url}#{}:{})", + rpath.peripheral(), + rname + )); + } + } + Ok(doc) } pub fn render_register_mod( register: &Register, access: Access, - path: &RegisterPath, + rpath: &RegisterPath, index: &Index, config: &Config, ) -> Result { @@ -312,7 +335,7 @@ pub fn render_register_mod( access, properties, &mut mod_items, - path, + rpath, index, config, )?; @@ -361,7 +384,7 @@ pub fn render_register_mod( let doc = format!( "{description}{}{}", - api_docs(can_read, can_write, can_reset, &mod_ty, true)?, + api_docs(can_read, can_write, can_reset, &mod_ty, true, register, rpath, config)?, read_action_docs(access.can_read(), register.read_action), ); diff --git a/src/main.rs b/src/main.rs index be54cbb3..aabec8f6 100755 --- a/src/main.rs +++ b/src/main.rs @@ -267,6 +267,14 @@ Allowed cases are `unchanged` (''), `pascal` ('p'), `constant` ('c') and `snake` Useful for soft-cores where the peripheral address range isn't necessarily fixed. Ignore this option if you are not building your own FPGA based soft-cores."), ) + .arg( + Arg::new("html_url") + .long("html-url") + .alias("html_url") + .help("Path to chip HTML generated by svdtools") + .action(ArgAction::Set) + .value_name("URL"), + ) .arg( Arg::new("log_level") .long("log") From f6b6da63014206564c46aa1c8963b0fbc0f973fd Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 16 Jun 2024 07:25:06 +0300 Subject: [PATCH 254/319] release 0.33.4 --- CHANGELOG.md | 5 ++++- Cargo.lock | 2 +- Cargo.toml | 19 ++++++++----------- 3 files changed, 13 insertions(+), 13 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 4c35b266..58e212da 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.33.4] - 2024-06-16 + - Add `html-url` option to access `svdtools html` files from docs - Move `Reg` in separate file - Use `warning` class in docs @@ -896,7 +898,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.33.3...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.33.4...HEAD +[v0.33.4]: https://github.com/rust-embedded/svd2rust/compare/v0.33.3...v0.33.4 [v0.33.3]: https://github.com/rust-embedded/svd2rust/compare/v0.33.2...v0.33.3 [v0.33.2]: https://github.com/rust-embedded/svd2rust/compare/v0.33.1...v0.33.2 [v0.33.1]: https://github.com/rust-embedded/svd2rust/compare/v0.33.0...v0.33.1 diff --git a/Cargo.lock b/Cargo.lock index 109572a1..91c5d200 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1220,7 +1220,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.33.3" +version = "0.33.4" dependencies = [ "anyhow", "clap", diff --git a/Cargo.toml b/Cargo.toml index 790bf34e..d1cce330 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -13,17 +13,11 @@ categories = [ ] description = "Generate Rust register maps (`struct`s) from SVD files" documentation = "https://docs.rs/svd2rust" -keywords = [ - "svd", - "embedded", - "register", - "map", - "generator", -] +keywords = ["svd", "embedded", "register", "map", "generator"] license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.33.3" +version = "0.33.4" readme = "README.md" rust-version = "1.74" @@ -44,7 +38,10 @@ yaml = ["dep:serde_yaml"] [dependencies] clap = { version = "4.0", optional = true } -irx-config = { version = "=3.3.0", features = ["cmd", "toml-parser"], optional = true } +irx-config = { version = "=3.3.0", features = [ + "cmd", + "toml-parser", +], optional = true } env_logger = { version = "0.11", optional = true } inflections = "1.1" log = { version = "~0.4", features = ["std"] } @@ -69,7 +66,7 @@ version = "0.14.8" [dependencies.syn] version = "2.0" -features = ["full","extra-traits"] +features = ["full", "extra-traits"] [workspace] members = ["ci/svd2rust-regress"] @@ -79,5 +76,5 @@ exclude = [ # workaround for https://github.com/rust-lang/cargo/pull/12779, doesn't work for output though # see https://github.com/rust-lang/cargo/issues/6009#issuecomment-1925445245 "output/baseline/**", - "output/current/**" + "output/current/**", ] From f703c0fe219cc635c5ad9eb379c0850b898d9ca5 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 18 Jun 2024 09:02:06 +0300 Subject: [PATCH 255/319] fix enumeratedValues with isDefault only --- CHANGELOG.md | 2 ++ src/generate/register.rs | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 58e212da..4ca2152d 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Fix `enumeratedValues` with `isDefault` only + ## [v0.33.4] - 2024-06-16 - Add `html-url` option to access `svdtools html` files from docs diff --git a/src/generate/register.rs b/src/generate/register.rs index 569454cb..37d39d92 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -805,7 +805,7 @@ pub fn fields( // if there's no variant defined in enumeratedValues, generate enumeratedValues with new-type // wrapper struct, and generate From conversation only. // else, generate enumeratedValues into a Rust enum with functions for each variant. - if variants.is_empty() { + if variants.is_empty() && def.is_none() { // generate struct VALUE_READ_TY_A(fty) and From for VALUE_READ_TY_A. add_with_no_variants( mod_items, From 1ef222c05424a57ed3ef480f4027955448b028e2 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 25 Sep 2024 08:05:24 +0300 Subject: [PATCH 256/319] Fix STM32-patched CI --- CHANGELOG.md | 1 + ci/script.sh | 11 ++++++++++- ci/svd2rust-regress/tests.yml | 2 +- 3 files changed, 12 insertions(+), 2 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 4ca2152d..62b03688 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Fix STM32-patched CI - Fix `enumeratedValues` with `isDefault` only ## [v0.33.4] - 2024-06-16 diff --git a/ci/script.sh b/ci/script.sh index fcb1199e..9474a753 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -503,7 +503,7 @@ main() { echo '[dependencies.riscv-rt]' >> $td/Cargo.toml echo 'version = "0.8.0"' >> $td/Cargo.toml - test_svd_for_target riscv https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x.svd + test_svd_for_target riscv https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x/e310x.svd test_svd_for_target riscv https://raw.githubusercontent.com/riscv-rust/k210-pac/master/k210.svd test_svd_for_target riscv https://raw.githubusercontent.com/riscv-rust/fu540-pac/master/fu540.svd ;; @@ -572,6 +572,15 @@ main() { ;; STM32-patched) + echo '[dependencies.critical-section]' >> $td/Cargo.toml + echo 'version = "1.0"' >> $td/Cargo.toml + echo 'optional = true' >> $td/Cargo.toml + + echo '[features]' >> $td/Cargo.toml + echo 'default = ["critical-section", "rt"]' >> $td/Cargo.toml + echo 'rt = ["cortex-m-rt/device"]' >> $td/Cargo.toml + echo 'atomics = []' >> $td/Cargo.toml + # OK test_patched_stm32 stm32f0x2 test_patched_stm32 stm32f103 diff --git a/ci/svd2rust-regress/tests.yml b/ci/svd2rust-regress/tests.yml index a1dadb4a..6ed7ebbe 100644 --- a/ci/svd2rust-regress/tests.yml +++ b/ci/svd2rust-regress/tests.yml @@ -2102,7 +2102,7 @@ - arch: riscv mfgr: SiFive chip: E310x - svd_url: https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x.svd + svd_url: https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x/e310x.svd should_pass: false run_when: never - arch: msp430 From f5bd09f9b29261fd596debd65949e9dae2bc15db Mon Sep 17 00:00:00 2001 From: rmsyn Date: Thu, 10 Oct 2024 01:23:13 +0000 Subject: [PATCH 257/319] generate: use groups for delimited tokens Uses `proc_macro2::Group` for token streams delimited with braces. Resolves: #863 Authored-by: rmsyn Co-authored-by: Jan Niehusmann --- CHANGELOG.md | 1 + src/generate/peripheral.rs | 15 ++++++------- src/generate/register.rs | 45 +++++++++++++++++--------------------- 3 files changed, 28 insertions(+), 33 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 62b03688..be3cfad2 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Fix STM32-patched CI - Fix `enumeratedValues` with `isDefault` only +- Fix invalid `Punct` error from `proc_macro2` ## [v0.33.4] - 2024-06-16 diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 27c54bbe..e58a61ec 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -12,7 +12,7 @@ use crate::svd::{ self, Cluster, ClusterInfo, MaybeArray, Peripheral, Register, RegisterCluster, RegisterInfo, }; use log::{debug, trace, warn}; -use proc_macro2::{Ident, Punct, Spacing, Span, TokenStream}; +use proc_macro2::{Delimiter, Group, Ident, Punct, Spacing, Span, TokenStream}; use quote::{quote, ToTokens}; use syn::{punctuated::Punctuated, Token}; @@ -245,19 +245,18 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result let reg_block = register_or_cluster_block(&ercs, &derive_infos, None, "Register block", None, config)?; - let open = Punct::new('{', Spacing::Alone); - let close = Punct::new('}', Spacing::Alone); - out.extend(quote! { #[doc = #description] #feature_attribute - pub mod #mod_ty #open + pub mod #mod_ty }); - out.extend(reg_block); - out.extend(mod_items); + let mut out_items = TokenStream::new(); + out_items.extend(reg_block); + out_items.extend(mod_items); - close.to_tokens(&mut out); + let out_group = Group::new(Delimiter::Brace, out_items); + out.extend(quote! { #out_group }); p.registers = Some(ercs); diff --git a/src/generate/register.rs b/src/generate/register.rs index 37d39d92..be5fc5b2 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -5,8 +5,8 @@ use crate::svd::{ }; use core::u64; use log::warn; -use proc_macro2::{Ident, Punct, Spacing, Span, TokenStream}; -use quote::{quote, ToTokens}; +use proc_macro2::{Delimiter, Group, Ident, Span, TokenStream}; +use quote::quote; use std::collections::HashSet; use std::fmt::Write; use std::{borrow::Cow, collections::BTreeMap}; @@ -297,9 +297,6 @@ pub fn render_register_mod( let mut zero_to_modify_fields_bitmap = 0; let mut one_to_modify_fields_bitmap = 0; - let open = Punct::new('{', Spacing::Alone); - let close = Punct::new('}', Spacing::Alone); - let debug_feature = config .impl_debug_feature .as_ref() @@ -362,24 +359,16 @@ pub fn render_register_mod( } if can_read && !r_impl_items.is_empty() { - mod_items.extend(quote! { - impl R #open #r_impl_items #close - }); + mod_items.extend(quote! { impl R { #r_impl_items }}); } if !r_debug_impl.is_empty() { - mod_items.extend(quote! { - #r_debug_impl - }); + mod_items.extend(quote! { #r_debug_impl }); } if can_write { mod_items.extend(quote! { - impl W #open + impl W { #w_impl_items } }); - - mod_items.extend(w_impl_items); - - close.to_tokens(&mut mod_items); } let doc = format!( @@ -461,8 +450,6 @@ fn render_register_mod_debug( let name = util::name_of(register, config.ignore_groups); let span = Span::call_site(); let regspec_ty = regspec(&name, config, span); - let open = Punct::new('{', Spacing::Alone); - let close = Punct::new('}', Spacing::Alone); let mut r_debug_impl = TokenStream::new(); let debug_feature = config .impl_debug_feature @@ -473,8 +460,14 @@ fn render_register_mod_debug( if access.can_read() && register.read_action.is_none() { r_debug_impl.extend(quote! { #debug_feature - impl core::fmt::Debug for R #open - fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result #open + impl core::fmt::Debug for R + }); + let mut fmt_outer_impl = TokenStream::new(); + fmt_outer_impl.extend(quote! { + fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result + }); + let mut fmt_inner_impl = TokenStream::new(); + fmt_inner_impl.extend(quote! { f.debug_struct(#name) }); for &f in cur_fields.iter() { @@ -488,7 +481,7 @@ fn render_register_mod_debug( for suffix in de.indexes() { let f_name_n = field_accessor(&f.name.expand_dim(&suffix), config, span); let f_name_n_s = format!("{f_name_n}"); - r_debug_impl.extend(quote! { + fmt_inner_impl.extend(quote! { .field(#f_name_n_s, &self.#f_name_n()) }); } @@ -496,17 +489,19 @@ fn render_register_mod_debug( let f_name = f.name.remove_dim(); let f_name = field_accessor(&f_name, config, span); let f_name_s = format!("{f_name}"); - r_debug_impl.extend(quote! { + fmt_inner_impl.extend(quote! { .field(#f_name_s, &self.#f_name()) }); } } } - r_debug_impl.extend(quote! { + fmt_inner_impl.extend(quote! { .finish() - #close - #close }); + let fmt_inner_group = Group::new(Delimiter::Brace, fmt_inner_impl); + fmt_outer_impl.extend(quote! { #fmt_inner_group }); + let fmt_outer_group = Group::new(Delimiter::Brace, fmt_outer_impl); + r_debug_impl.extend(quote! { #fmt_outer_group }); } else if !access.can_read() || register.read_action.is_some() { r_debug_impl.extend(quote! { #debug_feature From 06c975143760abafb26e132e6c11ce8bf0479359 Mon Sep 17 00:00:00 2001 From: Jan Niehusmann Date: Wed, 9 Oct 2024 16:04:39 +0000 Subject: [PATCH 258/319] Run espressif tests on nightly-2024-09-25 Workaround for incompatibility of latest nightly with `asm!` in naked functions. --- .github/workflows/ci.yml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 3e9807ac..e63e963a 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -89,8 +89,8 @@ jobs: - { rust: nightly, vendor: MSP430, options: "--atomics" } - { rust: nightly, vendor: MSP430, options: "" } # Workaround for _1token0 - - { rust: nightly, vendor: Espressif, options: "--atomics --ident-formats-theme legacy" } - - { rust: nightly, vendor: Espressif, options: "--ident-format register:::Reg" } + - { rust: nightly-2024-09-25, vendor: Espressif, options: "--atomics --ident-formats-theme legacy" } + - { rust: nightly-2024-09-25, vendor: Espressif, options: "--ident-format register:::Reg" } steps: - uses: actions/checkout@v4 From fc3388018c19ec3ae03f53baaeb39a025da24d7d Mon Sep 17 00:00:00 2001 From: Jan Niehusmann Date: Wed, 9 Oct 2024 16:09:06 +0000 Subject: [PATCH 259/319] Update CHANGELOG.md --- CHANGELOG.md | 1 + 1 file changed, 1 insertion(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index be3cfad2..35fca8c2 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -10,6 +10,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Fix STM32-patched CI - Fix `enumeratedValues` with `isDefault` only - Fix invalid `Punct` error from `proc_macro2` +- Run espressif tests on nightly-2024-09-25 to workaround CI failures ## [v0.33.4] - 2024-06-16 From 00b701cd3bfe0588d013fe7cf5af24bf762a7917 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 12 Oct 2024 13:34:46 +0300 Subject: [PATCH 260/319] release 0.33.5 --- CHANGELOG.md | 5 ++++- Cargo.lock | 14 +++++++------- Cargo.toml | 6 +++--- 3 files changed, 14 insertions(+), 11 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 35fca8c2..8eac3f99 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.33.5] - 2024-10-12 + - Fix STM32-patched CI - Fix `enumeratedValues` with `isDefault` only - Fix invalid `Punct` error from `proc_macro2` @@ -903,7 +905,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.33.4...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.33.5...HEAD +[v0.33.5]: https://github.com/rust-embedded/svd2rust/compare/v0.33.4...v0.33.5 [v0.33.4]: https://github.com/rust-embedded/svd2rust/compare/v0.33.3...v0.33.4 [v0.33.3]: https://github.com/rust-embedded/svd2rust/compare/v0.33.2...v0.33.3 [v0.33.2]: https://github.com/rust-embedded/svd2rust/compare/v0.33.1...v0.33.2 diff --git a/Cargo.lock b/Cargo.lock index 91c5d200..aa09d2cd 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1022,9 +1022,9 @@ dependencies = [ [[package]] name = "roxmltree" -version = "0.19.0" +version = "0.20.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3cd14fd5e3b777a7422cca79358c57a8f6e3a703d9ac187448d0daf220c2407f" +checksum = "6c20b6793b5c2fa6553b250154b78d6d0db37e72700ae35fad9387a46f487c97" [[package]] name = "rustc-demangle" @@ -1196,9 +1196,9 @@ checksum = "73473c0e59e6d5812c5dfe2a064a6444949f089e20eec9a2e5506596494e4623" [[package]] name = "svd-parser" -version = "0.14.5" +version = "0.14.7" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3d17a2c2ef5aa450e80d714232a5932e7d8a39cac092e9e9ef8411bc833de3c4" +checksum = "39ba83b8a290ee3a180051e10a043691bb91d1b6be2053a570936fbdbec5ee2b" dependencies = [ "anyhow", "roxmltree", @@ -1208,9 +1208,9 @@ dependencies = [ [[package]] name = "svd-rs" -version = "0.14.8" +version = "0.14.9" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6aea8090314157cc490b559da0c66f2228c066b56154f0321ad83b459a0a8278" +checksum = "3e49a90f3c4d03d81687e81d41b00f349fd44ccf9c26e0185ee926968de093bb" dependencies = [ "once_cell", "regex", @@ -1220,7 +1220,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.33.4" +version = "0.33.5" dependencies = [ "anyhow", "clap", diff --git a/Cargo.toml b/Cargo.toml index d1cce330..dbeceb60 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -17,7 +17,7 @@ keywords = ["svd", "embedded", "register", "map", "generator"] license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.33.4" +version = "0.33.5" readme = "README.md" rust-version = "1.74" @@ -58,11 +58,11 @@ url = { version = "2.5", features = ["serde"] } [dependencies.svd-parser] features = ["expand"] -version = "0.14.5" +version = "0.14.7" [dependencies.svd-rs] features = ["serde"] -version = "0.14.8" +version = "0.14.9" [dependencies.syn] version = "2.0" From 4d48e4f9430cb7d26734fb3d1eb258c9eb0700ea Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 16 Oct 2024 20:10:22 +0300 Subject: [PATCH 261/319] move must_use from methods to generic type --- CHANGELOG.md | 2 ++ src/generate/generic.rs | 2 ++ src/generate/register.rs | 3 --- 3 files changed, 4 insertions(+), 3 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 8eac3f99..bffc3bce 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- move `must_use` from methods to generic type + ## [v0.33.5] - 2024-10-12 - Fix STM32-patched CI diff --git a/src/generate/generic.rs b/src/generate/generic.rs index 2f8d6f7b..706b7e12 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -147,6 +147,7 @@ pub mod raw { } } + #[must_use = "after creating `FieldWriter` you need to call field value setting method"] pub struct FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> where REG: Writable + RegisterSpec, @@ -174,6 +175,7 @@ pub mod raw { } } + #[must_use = "after creating `BitWriter` you need to call bit setting method"] pub struct BitWriter<'a, REG, FI = bool, M = BitM> where REG: Writable + RegisterSpec, diff --git a/src/generate/register.rs b/src/generate/register.rs index be5fc5b2..84ea9e07 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -1305,7 +1305,6 @@ pub fn fields( #[doc = ""] #[doc = #note] #inline - #[must_use] pub fn #name_snake_case(&mut self, n: u8) -> #writer_ty<#regspec_ty> { #[allow(clippy::no_effect)] [(); #dim][n as usize]; @@ -1326,7 +1325,6 @@ pub fn fields( w_impl_items.extend(quote! { #[doc = #doc] #inline - #[must_use] pub fn #name_snake_case_n(&mut self) -> #writer_ty<#regspec_ty> { #writer_ty::new(self, #sub_offset) } @@ -1338,7 +1336,6 @@ pub fn fields( w_impl_items.extend(quote! { #[doc = #doc] #inline - #[must_use] pub fn #name_snake_case(&mut self) -> #writer_ty<#regspec_ty> { #writer_ty::new(self, #offset) } From f682b0b509cc78fa9c38ac81076bc16db10eaf8a Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 28 Feb 2024 08:21:34 +0300 Subject: [PATCH 262/319] use core::ptr::from_ref --- .github/workflows/ci.yml | 2 +- CHANGELOG.md | 5 ++--- README.md | 4 ++-- src/generate/peripheral/accessor.rs | 4 ++-- 4 files changed, 7 insertions(+), 8 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index e63e963a..d6dec204 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -84,7 +84,7 @@ jobs: - { rust: stable, vendor: Toshiba, options: all } - { rust: stable, vendor: Toshiba, options: "" } # Test MSRV - - { rust: 1.74.0, vendor: Nordic, options: "" } + - { rust: 1.76.0, vendor: Nordic, options: "" } # Use nightly for architectures which don't support stable - { rust: nightly, vendor: MSP430, options: "--atomics" } - { rust: nightly, vendor: MSP430, options: "" } diff --git a/CHANGELOG.md b/CHANGELOG.md index bffc3bce..6cfe7b61 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Bump MSRV of generated code to 1.76 - move `must_use` from methods to generic type ## [v0.33.5] - 2024-10-12 @@ -907,9 +908,7 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.33.5...HEAD -[v0.33.5]: https://github.com/rust-embedded/svd2rust/compare/v0.33.4...v0.33.5 -[v0.33.4]: https://github.com/rust-embedded/svd2rust/compare/v0.33.3...v0.33.4 +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.33.3...HEAD [v0.33.3]: https://github.com/rust-embedded/svd2rust/compare/v0.33.2...v0.33.3 [v0.33.2]: https://github.com/rust-embedded/svd2rust/compare/v0.33.1...v0.33.2 [v0.33.1]: https://github.com/rust-embedded/svd2rust/compare/v0.33.0...v0.33.1 diff --git a/README.md b/README.md index f1f02e9e..d0bf6fb5 100644 --- a/README.md +++ b/README.md @@ -17,9 +17,9 @@ This project is developed and maintained by the [Tools team][team]. ## Minimum Supported Rust Version (MSRV) -The **generated code** is guaranteed to compile on stable Rust 1.65.0 and up. +The **generated code** is guaranteed to compile on stable Rust 1.76.0 and up. -If you encounter compilation errors on any stable version newer than 1.65.0, please open an issue. +If you encounter compilation errors on any stable version newer than 1.76.0, please open an issue. # Testing Locally diff --git a/src/generate/peripheral/accessor.rs b/src/generate/peripheral/accessor.rs index d30576c0..11897be0 100644 --- a/src/generate/peripheral/accessor.rs +++ b/src/generate/peripheral/accessor.rs @@ -55,7 +55,7 @@ impl ToTokens for AccessType { #[doc = #doc] #[inline(always)] pub const fn #name(&self) -> &#ty { - unsafe { &*(self as *const Self).cast::().add(#offset).cast() } + unsafe { &*core::ptr::from_ref(self).cast::().add(#offset).cast() } } } } @@ -84,7 +84,7 @@ impl ToTokens for AccessType { increment, })) => { let name_iter = Ident::new(&format!("{name}_iter"), Span::call_site()); - let cast = quote! { unsafe { &*(self as *const Self).cast::().add(#offset).add(#increment * n).cast() } }; + let cast = quote! { unsafe { &*core::ptr::from_ref(self).cast::().add(#offset).add(#increment * n).cast() } }; quote! { #[doc = #doc] #[inline(always)] From 228bfc4ae962c4fba6e430cd8f793ca8a5de7f18 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 18 Oct 2024 19:46:51 +0300 Subject: [PATCH 263/319] rm repeated traits --- src/generate/generic_atomic.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/generate/generic_atomic.rs b/src/generate/generic_atomic.rs index f0c436f6..54c491c3 100644 --- a/src/generate/generic_atomic.rs +++ b/src/generate/generic_atomic.rs @@ -39,7 +39,7 @@ mod atomic { impl Reg where - REG::Ux: AtomicOperations + Default + core::ops::Not, + REG::Ux: AtomicOperations { /// Set high every bit in the register that was set in the write proxy. Leave other bits /// untouched. The write is done in a single atomic instruction. From cb66cd423646e684f7cd01b0b313241788a91dca Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 18 Oct 2024 21:52:16 +0300 Subject: [PATCH 264/319] clippy --- src/generate/register.rs | 4 ++-- src/lib.rs | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/generate/register.rs b/src/generate/register.rs index 84ea9e07..b4600dc7 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -3,7 +3,6 @@ use crate::svd::{ ModifiedWriteValues, ReadAction, Register, RegisterProperties, Usage, WriteConstraint, WriteConstraintRange, }; -use core::u64; use log::warn; use proc_macro2::{Delimiter, Group, Ident, Span, TokenStream}; use quote::quote; @@ -117,7 +116,7 @@ pub fn render( register.properties.reset_value.is_some(), &mod_ty, false, - ®ister, + register, &rpath, config, )?, @@ -162,6 +161,7 @@ fn read_action_docs(can_read: bool, read_action: Option) -> String { doc } +#[allow(clippy::too_many_arguments)] fn api_docs( can_read: bool, can_write: bool, diff --git a/src/lib.rs b/src/lib.rs index 6a0b754f..ec574c98 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -37,7 +37,7 @@ //! //! - `build.rs`, build script that places `device.x` somewhere the linker can find. //! - `device.x`, linker script that weakly aliases all the interrupt handlers to the default -//! exception handler (`DefaultHandler`). +//! exception handler (`DefaultHandler`). //! - `lib.rs`, the generated code. //! //! All these files must be included in the same device crate. The `lib.rs` file contains several @@ -95,7 +95,7 @@ //! //! - `build.rs`, build script that places `device.x` somewhere the linker can find. //! - `device.x`, linker script that weakly aliases all the interrupt handlers to the default -//! exception handler (`DefaultHandler`). +//! exception handler (`DefaultHandler`). //! - `lib.rs`, the generated code. //! //! All these files must be included in the same device crate. The `lib.rs` file contains several From dbd8734071d577b77fa08cb77a06808cdb83c9ae Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 19 Oct 2024 10:13:28 +0300 Subject: [PATCH 265/319] clean accessors --- CHANGELOG.md | 1 + src/generate/peripheral.rs | 22 ++++++++++------------ src/generate/peripheral/accessor.rs | 21 ++++++++++++++------- 3 files changed, 25 insertions(+), 19 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 6cfe7b61..cbe26557 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Skip generating `.add(0)` and `1 *` in accessors - Bump MSRV of generated code to 1.76 - move `must_use` from methods to generic type diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index e58a61ec..65ca041a 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -998,7 +998,7 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result Result Result Result { + let offset = (*offset != 0).then(|| unsuffixed(*offset)).map(|o| quote!(.add(#o))); quote! { #[doc = #doc] #[inline(always)] pub const fn #name(&self) -> &#ty { - unsafe { &*core::ptr::from_ref(self).cast::().add(#offset).cast() } + unsafe { &*core::ptr::from_ref(self).cast::() #offset .cast() } } } } @@ -84,7 +87,10 @@ impl ToTokens for AccessType { increment, })) => { let name_iter = Ident::new(&format!("{name}_iter"), Span::call_site()); - let cast = quote! { unsafe { &*core::ptr::from_ref(self).cast::().add(#offset).add(#increment * n).cast() } }; + let offset = (*offset != 0).then(|| unsuffixed(*offset)).map(|o| quote!(.add(#o))); + let dim = unsuffixed(*dim); + let increment = (*increment != 1).then(|| unsuffixed(*increment)).map(|i| quote!(#i *)); + let cast = quote! { unsafe { &*core::ptr::from_ref(self).cast::() #offset .add(#increment n).cast() } }; quote! { #[doc = #doc] #[inline(always)] @@ -109,6 +115,7 @@ impl ToTokens for AccessType { basename, i, } = elem; + let i = unsuffixed(*i as u64); quote! { #[doc = #doc] #[inline(always)] @@ -127,7 +134,7 @@ pub struct RegAccessor { pub doc: String, pub name: Ident, pub ty: syn::Type, - pub offset: syn::LitInt, + pub offset: u32, } #[derive(Clone, Debug)] @@ -135,9 +142,9 @@ pub struct ArrayAccessor { pub doc: String, pub name: Ident, pub ty: syn::Type, - pub offset: syn::LitInt, - pub dim: syn::LitInt, - pub increment: syn::LitInt, + pub offset: u32, + pub dim: u32, + pub increment: u32, } #[derive(Clone, Debug)] @@ -146,5 +153,5 @@ pub struct ArrayElemAccessor { pub name: Ident, pub ty: syn::Type, pub basename: Ident, - pub i: syn::LitInt, + pub i: usize, } From c13b87d2cbc20c878096aa7ae5780ddfd8e55b26 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 19 Oct 2024 13:06:09 +0300 Subject: [PATCH 266/319] strings --- src/generate/interrupt.rs | 8 ++++---- src/generate/peripheral.rs | 10 +++++----- src/generate/register.rs | 2 +- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/src/generate/interrupt.rs b/src/generate/interrupt.rs index 10d9bdde..7417c382 100644 --- a/src/generate/interrupt.rs +++ b/src/generate/interrupt.rs @@ -62,10 +62,10 @@ pub fn render( interrupt .0 .description - .as_ref() - .map(|s| util::respace(s)) - .as_ref() - .map(|s| util::escape_special_chars(s)) + .as_deref() + .map(util::respace) + .as_deref() + .map(util::escape_special_chars) .unwrap_or_else(|| interrupt.0.name.clone()) ); diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 65ca041a..6a183557 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -305,7 +305,7 @@ impl Region { let mut idents: Vec<_> = self .rbfs .iter() - .filter_map(|f| f.syn_field.ident.as_ref().map(|ident| ident.to_string())) + .filter_map(|f| f.syn_field.ident.as_ref().map(ToString::to_string)) .collect(); if idents.is_empty() { return None; @@ -343,7 +343,7 @@ impl Region { let idents: Vec<_> = self .rbfs .iter() - .filter_map(|f| f.syn_field.ident.as_ref().map(|ident| ident.to_string())) + .filter_map(|f| f.syn_field.ident.as_ref().map(ToString::to_string)) .collect(); if idents.is_empty() { @@ -726,7 +726,7 @@ fn check_erc_derive_infos( }; match register { Register::Single(_) => { - let ty_name = info_name.to_string(); + let ty_name = info_name.clone(); *derive_info = match explicit_rpath { None => { match compare_this_against_prev( @@ -758,7 +758,7 @@ fn check_erc_derive_infos( let re = Regex::new(format!("^{re_string}$").as_str()).map_err(|_| { anyhow!("Error creating regex for register {}", register.name) })?; - let ty_name = info_name.to_string(); // keep suffix for regex matching + let ty_name = info_name.clone(); // keep suffix for regex matching *derive_info = match explicit_rpath { None => { match compare_this_against_prev( @@ -787,7 +787,7 @@ fn check_erc_derive_infos( } RegisterCluster::Cluster(cluster) => { *derive_info = DeriveInfo::Cluster; - ercs_type_info.push((cluster.name.to_string(), None, erc, derive_info)); + ercs_type_info.push((cluster.name.clone(), None, erc, derive_info)); } }; } diff --git a/src/generate/register.rs b/src/generate/register.rs index b4600dc7..0747b9a4 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -222,7 +222,7 @@ fn api_docs( let idx = format!("[{idx}]"); rpath.name.replace("[%s]", &idx).replace("%s", &idx) } else { - rpath.name.to_string() + rpath.name.clone() }; // TODO: support html_urls for registers in cluster if rpath.block.path.is_empty() { From 8aadb82fe81a5db9481ea91ccca6d77315417345 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 19 Oct 2024 13:25:56 +0300 Subject: [PATCH 267/319] Add warning about indexing register arrays --- CHANGELOG.md | 1 + src/generate/peripheral.rs | 10 ++++++++++ src/generate/peripheral/accessor.rs | 14 +++++++++++++- 3 files changed, 24 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index cbe26557..6eb4b26b 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Add warning about indexing register arrays - Skip generating `.add(0)` and `1 *` in accessors - Bump MSRV of generated code to 1.76 - move `must_use` from methods to generic type diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 6a183557..9e3101ec 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -1052,6 +1052,10 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result`n` is the index of {0} in the array. `n == 0` corresponds to `{first_name}` {0}.", "cluster") + ); accessors.push( Accessor::Array(ArrayAccessor { doc, @@ -1060,6 +1064,7 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result`n` is the index of {0} in the array. `n == 0` corresponds to `{first_name}` {0}.", "register") + ); accessors.push( Accessor::Array(ArrayAccessor { doc, @@ -1242,6 +1251,7 @@ fn expand_register( offset: info.address_offset, dim: array_info.dim, increment: array_info.dim_increment, + note, }) .raw_if(!array_convertible), ); diff --git a/src/generate/peripheral/accessor.rs b/src/generate/peripheral/accessor.rs index 85f663d4..5bb91718 100644 --- a/src/generate/peripheral/accessor.rs +++ b/src/generate/peripheral/accessor.rs @@ -62,10 +62,15 @@ impl ToTokens for AccessType { } } } - Self::Ref(Accessor::Array(ArrayAccessor { doc, name, ty, .. })) => { + Self::Ref(Accessor::Array(ArrayAccessor { doc, name, ty, note, .. })) => { let name_iter = Ident::new(&format!("{name}_iter"), Span::call_site()); + let note = note.as_ref().map(|note| quote! { + #[doc = ""] + #[doc = #note] + }); quote! { #[doc = #doc] + #note #[inline(always)] pub const fn #name(&self, n: usize) -> &#ty { &self.#name[n] @@ -85,14 +90,20 @@ impl ToTokens for AccessType { offset, dim, increment, + note, })) => { let name_iter = Ident::new(&format!("{name}_iter"), Span::call_site()); let offset = (*offset != 0).then(|| unsuffixed(*offset)).map(|o| quote!(.add(#o))); let dim = unsuffixed(*dim); let increment = (*increment != 1).then(|| unsuffixed(*increment)).map(|i| quote!(#i *)); + let note = note.as_ref().map(|note| quote! { + #[doc = ""] + #[doc = #note] + }); let cast = quote! { unsafe { &*core::ptr::from_ref(self).cast::() #offset .add(#increment n).cast() } }; quote! { #[doc = #doc] + #note #[inline(always)] pub const fn #name(&self, n: usize) -> &#ty { #[allow(clippy::no_effect)] @@ -145,6 +156,7 @@ pub struct ArrayAccessor { pub offset: u32, pub dim: u32, pub increment: u32, + pub note: Option, } #[derive(Clone, Debug)] From 90ef2a6988b8ad15120bf93d2b22c6110c8996f4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rom=C3=A1n=20C=C3=A1rdenas=20Rodr=C3=ADguez?= Date: Mon, 1 Jul 2024 09:14:43 +0200 Subject: [PATCH 268/319] settings.yaml file for target-specific configurations. We use setting.yaml to support riscv 0.12.0 and riscv-rt 0.13.0 This feature also allows RISC-V targets to use standard peripheral implementations with the riscv-peripheral crate. --- CHANGELOG.md | 4 + Cargo.lock | 623 +++++++++++++++++++++-------------------- Cargo.toml | 1 + src/config.rs | 13 + src/config/riscv.rs | 48 ++++ src/generate/device.rs | 38 ++- src/generate/mod.rs | 1 + src/generate/riscv.rs | 306 ++++++++++++++++++++ src/lib.rs | 18 +- src/main.rs | 13 +- 10 files changed, 744 insertions(+), 321 deletions(-) create mode 100644 src/config/riscv.rs create mode 100644 src/generate/riscv.rs diff --git a/CHANGELOG.md b/CHANGELOG.md index 6eb4b26b..25439d50 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,10 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Compatibility with `riscv` 0.12 and `riscv-rt` 0.13 +- Add `riscv_config` section in `settings.yaml` + It uses `riscv-pac` traits and standard `riscv-peripheral` peripherals. +- Add `settings.yaml` file for target-specific settings. - Add warning about indexing register arrays - Skip generating `.add(0)` and `1 *` in accessors - Bump MSRV of generated code to 1.76 diff --git a/Cargo.lock b/Cargo.lock index aa09d2cd..6f55c94c 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -4,9 +4,9 @@ version = 3 [[package]] name = "addr2line" -version = "0.21.0" +version = "0.22.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8a30b2e23b9e17a9f90641c7ab1549cd9b44f296d3ccbf309d2863cfe398a0cb" +checksum = "6e4503c46a5c0c7844e948c9a4d6acd9f50cccb4de1c48eb9e291ea17470c678" dependencies = [ "gimli", ] @@ -19,56 +19,57 @@ checksum = "f26201604c87b1e01bd3d98f8d5d9a8fcbb815e8cedb41ffccbeb4bf593a35fe" [[package]] name = "aho-corasick" -version = "1.1.2" +version = "1.1.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b2969dcb958b36655471fc61f7e416fa76033bdd4bfed0678d8fee1e2d07a1f0" +checksum = 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"c75ac65da39e5fe5ab759307499ddad880d724eed2f6ce5b5e8a26f4f387928c" +checksum = "eb47de1e80c2b463c735db5b217a0ddc39d612e7ac9e2e96a5aed1f57616c1cb" dependencies = [ "utf8parse", ] [[package]] name = "anstyle-query" -version = "1.0.2" +version = "1.1.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e28923312444cdd728e4738b3f9c9cac739500909bb3d3c94b43551b16517648" +checksum = "6d36fc52c7f6c869915e99412912f22093507da8d9e942ceaf66fe4b7c14422a" dependencies = [ "windows-sys 0.52.0", ] [[package]] name = "anstyle-wincon" -version = "3.0.2" +version = "3.0.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1cd54b81ec8d6180e24654d0b371ad22fc3dd083b6ff8ba325b72e00c87660a7" +checksum = "5bf74e1b6e971609db8ca7a9ce79fd5768ab6ae46441c572e46cf596f59e57f8" dependencies = [ "anstyle", "windows-sys 0.52.0", @@ -76,33 +77,33 @@ dependencies = [ [[package]] name = "anyhow" -version = "1.0.76" +version = "1.0.86" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "59d2a3357dde987206219e78ecfbbb6e8dad06cbb65292758d3270e6254f7355" +checksum = "b3d1d046238990b9cf5bcde22a3fb3584ee5cf65fb2765f454ed428c7a0063da" [[package]] name = "arrayref" -version = "0.3.7" +version = "0.3.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6b4930d2cb77ce62f89ee5d5289b4ac049559b1c45539271f5ed4fdc7db34545" +checksum = "9d151e35f61089500b617991b791fc8bfd237ae50cd5950803758a179b41e67a" [[package]] name = "arrayvec" -version = "0.7.4" +version = "0.7.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "96d30a06541fbafbc7f82ed10c06164cfbd2c401138f6addd8404629c4b16711" +checksum = "7c02d123df017efcdfbd739ef81735b36c5ba83ec3c59c80a9d7ecc718f92e50" [[package]] name = "autocfg" -version = "1.1.0" +version = "1.3.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d468802bab17cbc0cc575e9b053f41e72aa36bfa6b7f55e3529ffa43161b97fa" +checksum = "0c4b4d0bd25bd0b74681c0ad21497610ce1b7c91b1022cd21c80c6fbdd9476b0" [[package]] name = "backtrace" -version = "0.3.69" +version = "0.3.73" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "2089b7e3f35b9dd2d0ed921ead4f6d318c27680d4a5bd167b3ee120edb105837" +checksum = "5cc23269a4f8976d0a4d2e7109211a419fe30e8d88d677cd60b6bc79c5732e0a" dependencies = [ "addr2line", "cc", @@ -115,9 +116,9 @@ dependencies = [ [[package]] name = "base64" -version = "0.21.5" +version = "0.21.7" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "35636a1494ede3b646cc98f74f8e62c773a38a659ebc777a2cf26b9b74171df9" +checksum = "9d297deb1925b89f2ccc13d7635fa0714f12c87adce1c75356b39ca9b7178567" [[package]] name = "bitflags" @@ -127,9 +128,9 @@ checksum = "bef38d45163c2f1dde094a7dfd33ccf595c92905c8f8f4fdc18d06fb1037718a" [[package]] name = "bitflags" -version = "2.4.1" +version = "2.6.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "327762f6e5a765692301e5bb513e0d9fef63be86bbc14528052b1cd3e6f03e07" +checksum = "b048fb63fd8b5923fc5aa7b340d8e156aec7ec02f0c78fa8a6ddc2613f6f71de" [[package]] name = "blake2b_simd" @@ -144,23 +145,23 @@ dependencies = [ [[package]] name = "bumpalo" -version = "3.14.0" +version = "3.16.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7f30e7476521f6f8af1a1c4c0b8cc94f0bee37d91763d0ca2665f299b6cd8aec" +checksum = "79296716171880943b8470b5f8d03aa55eb2e645a4874bdbb28adb49162e012c" [[package]] name = "bytes" -version = "1.5.0" +version = "1.7.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a2bd12c1caf447e69cd4528f47f94d203fd2582878ecb9e9465484c4148a8223" +checksum = "8318a53db07bb3f8dca91a600466bdb3f2eaadeedfdbcf02e1accbad9271ba50" [[package]] name = "cc" -version = "1.0.83" +version = "1.1.13" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f1174fb0b6ec23863f8b971027804a42614e347eafb0a95bf0b12cdae21fc4d0" +checksum = "72db2f7947ecee9b03b510377e8bb9077afa27176fdbff55c51027e976fdcc48" dependencies = [ - "libc", + "shlex", ] [[package]] @@ -171,9 +172,9 @@ checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd" [[package]] name = "clap" -version = "4.4.11" +version = "4.5.16" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "bfaff671f6b22ca62406885ece523383b9b64022e341e53e009a62ebc47a45f2" +checksum = "ed6719fffa43d0d87e5fd8caeab59be1554fb028cd30edc88fc4369b17971019" dependencies = [ "clap_builder", "clap_derive", @@ -181,39 +182,39 @@ dependencies = [ [[package]] name = "clap_builder" -version = "4.4.11" +version = "4.5.15" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a216b506622bb1d316cd51328dce24e07bdff4a6128a47c7e7fad11878d5adbb" +checksum = "216aec2b177652e3846684cbfe25c9964d18ec45234f0f5da5157b207ed1aab6" dependencies = [ "anstream", "anstyle", "clap_lex", - "strsim", + "strsim 0.11.1", ] [[package]] name = "clap_derive" -version = "4.4.7" +version = "4.5.13" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "cf9804afaaf59a91e75b022a30fb7229a7901f60c755489cc61c9b423b836442" +checksum = "501d359d5f3dcaf6ecdeee48833ae73ec6e42723a1e52419c79abf9507eec0a0" dependencies = [ "heck", "proc-macro2", "quote", - "syn 2.0.42", + "syn 2.0.75", ] [[package]] name = "clap_lex" -version = "0.6.0" +version = "0.7.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "702fc72eb24e5a1e48ce58027a675bc24edd52096d5397d4aea7c6dd9eca0bd1" +checksum = "1462739cb27611015575c0c11df5df7601141071f07518d56fcc1be504cbec97" [[package]] name = "colorchoice" -version = "1.0.0" +version = "1.0.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = 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"registry+https://github.com/rust-lang/crates.io-index" -checksum = "2d2fe95351b870527a5d09bf563ed3c97c0cffb87cf1c78a591bf48bb218d9aa" +checksum = "5b82ac4a3c2ca9c3460964f020e1402edd5753411d7737aa39c3714ad1b5420e" dependencies = [ - "autocfg", - "cfg-if", "crossbeam-utils", - "memoffset", ] [[package]] name = "crossbeam-utils" -version = "0.8.17" +version = "0.8.20" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c06d96137f14f244c37f989d9fff8f95e6c18b918e71f36638f8c49112e4c78f" -dependencies = [ - "cfg-if", -] +checksum = "22ec99545bb0ed0ea7bb9b8e1e9122ea386ff8a48c0922e43f36d45ab09e0e80" [[package]] name = "darling" @@ -289,7 +283,7 @@ dependencies = [ "ident_case", "proc-macro2", "quote", - "strsim", + "strsim 0.10.0", "syn 1.0.109", ] @@ -337,24 +331,24 @@ dependencies = [ [[package]] name = "either" -version = "1.9.0" +version = "1.13.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = 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"6c012a26a7f605efc424dd53697843a72be7dc86ad2d01f7814337794a12231d" +checksum = "e13fa619b91fb2381732789fc5de83b45675e882f66623b7d8cb4f643017018d" dependencies = [ "anstream", "anstyle", @@ -381,9 +375,9 @@ checksum = "5443807d6dff69373d433ab9ef5378ad8df50ca6298caf15de6e52e24aaf54d5" [[package]] name = "errno" -version = "0.3.8" +version = "0.3.9" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a258e46cdc063eb8519c00b9fc845fc47bcfca4130e2f08e88665ceda8474245" +checksum = "534c5cf6194dfab3db3242765c03bbe257cf92f22b38f6bc0c58d59108a820ba" dependencies = [ "libc", "windows-sys 0.52.0", @@ -391,9 +385,9 @@ dependencies = [ [[package]] name = "fastrand" -version = "2.0.1" +version = "2.1.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "25cbce373ec4653f1a01a31e8a5e5ec0c622dc27ff9c4e6606eefef5cbbed4a5" +checksum = "9fc0510504f03c51ada170672ac806f1f105a88aa97a5281117e1ddc3368e51a" [[package]] name = "fnv" @@ -427,42 +421,42 @@ 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+checksum = "fbc91545643bcf3a0bbb6569265615222618bdf33ce4ffbbd13c4bbd4c093534" dependencies = [ - "windows-sys 0.48.0", + "windows-sys 0.52.0", ] [[package]] name = "security-framework" -version = "2.9.2" +version = "2.11.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "05b64fb303737d99b81884b2c63433e9ae28abebe5eb5045dcdd175dc2ecf4de" +checksum = "897b2245f0b511c87893af39b033e5ca9cce68824c4d7e7630b5a1d339658d02" dependencies = [ - "bitflags 1.3.2", + "bitflags 2.6.0", "core-foundation", "core-foundation-sys", "libc", @@ -1075,9 +1058,9 @@ dependencies = [ [[package]] name = "security-framework-sys" -version = "2.9.1" +version = "2.11.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e932934257d3b408ed8f30db49d85ea163bfe74961f017f405b025af298f0c7a" +checksum = "75da29fe9b9b08fe9d6b22b5b4bcbc75d8db3aa31e639aa56bb62e9d46bfceaf" dependencies = [ "core-foundation-sys", "libc", @@ -1085,40 +1068,41 @@ dependencies = [ [[package]] name = "serde" -version = "1.0.193" +version = "1.0.208" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "25dd9975e68d0cb5aa1120c288333fc98731bd1dd12f561e468ea4728c042b89" +checksum = "cff085d2cb684faa248efb494c39b68e522822ac0de72ccf08109abde717cfb2" dependencies = [ "serde_derive", ] [[package]] name = "serde_derive" -version = "1.0.193" +version = "1.0.208" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "43576ca501357b9b071ac53cdc7da8ef0cbd9493d8df094cd821777ea6e894d3" +checksum = "24008e81ff7613ed8e5ba0cfaf24e2c2f1e5b8a0495711e44fcd4882fca62bcf" dependencies = [ "proc-macro2", "quote", - "syn 2.0.42", + "syn 2.0.75", ] [[package]] name = "serde_json" -version = "1.0.108" +version = "1.0.125" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3d1c7e3eac408d115102c4c24ad393e0821bb3a5df4d506a80f85f7a742a526b" +checksum = "83c8e735a073ccf5be70aa8066aa984eaf2fa000db6c8d0100ae605b366d31ed" dependencies = [ "itoa", + "memchr", "ryu", "serde", ] [[package]] name = "serde_spanned" -version = "0.6.5" +version = "0.6.7" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "eb3622f419d1296904700073ea6cc23ad690adbd66f13ea683df73298736f0c1" +checksum = "eb5b1b31579f3811bf615c144393417496f152e12ac8b7663bf664f4a815306d" dependencies = [ "serde", ] @@ -1137,9 +1121,9 @@ dependencies = [ [[package]] name = "serde_yaml" -version = "0.9.29" +version = "0.9.34+deprecated" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a15e0ef66bf939a7c890a0bf6d5a733c70202225f9888a89ed5c62298b019129" +checksum = "6a8b1a1a2ebf674015cc02edccce75287f1a0130d394307b36743c2f5d504b47" dependencies = [ "indexmap", "itoa", @@ -1163,6 +1147,12 @@ version = "1.1.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "24188a676b6ae68c3b2cb3a01be17fbf7240ce009799bb56d5b1409051e78fde" +[[package]] +name = "shlex" +version = "1.3.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0fda2ff0d084019ba4d7c6f371c95d8fd75ce3524c3cb8fb653a3023f6323e64" + [[package]] name = "slab" version = "0.4.9" @@ -1174,18 +1164,18 @@ dependencies = [ [[package]] name = "smallvec" -version = "1.11.2" +version = "1.13.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4dccd0940a2dcdf68d092b8cbab7dc0ad8fa938bf95787e1b916b0e3d0e8e970" +checksum = "3c5e1a9a646d36c3599cd173a41282daf47c44583ad367b8e6837255952e5c67" [[package]] name = "socket2" -version = "0.5.5" +version = "0.5.7" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7b5fac59a5cb5dd637972e5fca70daf0523c9067fcdc4842f053dae04a18f8e9" +checksum = "ce305eb0b4296696835b71df73eb912e0f1ffd2556a501fcede6e0c50349191c" dependencies = [ "libc", - "windows-sys 0.48.0", + "windows-sys 0.52.0", ] [[package]] @@ -1194,6 +1184,12 @@ version = "0.10.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "73473c0e59e6d5812c5dfe2a064a6444949f089e20eec9a2e5506596494e4623" +[[package]] +name = "strsim" +version = "0.11.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "7da8b5736845d9f2fcb837ea5d9e2628564b3b043a70948a3f0b778838c5fb4f" + [[package]] name = "svd-parser" version = "0.14.7" @@ -1237,7 +1233,7 @@ dependencies = [ "serde_yaml", "svd-parser", "svd-rs", - "syn 2.0.42", + "syn 2.0.75", "thiserror", "url", ] @@ -1256,7 +1252,7 @@ dependencies = [ "serde_yaml", "shell-words", "svd2rust", - "syn 2.0.42", + "syn 2.0.75", "thiserror", "tracing", "tracing-subscriber", @@ -1277,15 +1273,21 @@ dependencies = [ [[package]] name = "syn" -version = "2.0.42" +version = "2.0.75" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5b7d0a2c048d661a1a59fcd7355baa232f7ed34e0ee4df2eef3c1c1c0d3852d8" +checksum = "f6af063034fc1935ede7be0122941bafa9bacb949334d090b77ca98b5817c7d9" dependencies = [ "proc-macro2", "quote", "unicode-ident", ] +[[package]] +name = "sync_wrapper" +version = "0.1.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "2047c6ded9c721764247e62cd3b03c09ffc529b2ba5b10ec482ae507a4a70160" + [[package]] name = "system-configuration" version = "0.5.1" @@ -1309,42 +1311,42 @@ dependencies = [ [[package]] name = "tempfile" -version = "3.8.1" +version = "3.12.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7ef1adac450ad7f4b3c28589471ade84f25f731a7a0fe30d71dfa9f60fd808e5" +checksum = "04cbcdd0c794ebb0d4cf35e88edd2f7d2c4c3e9a5a6dab322839b321c6a87a64" dependencies = [ "cfg-if", "fastrand", - "redox_syscall", + "once_cell", "rustix", - "windows-sys 0.48.0", + "windows-sys 0.59.0", ] [[package]] name = "thiserror" -version = "1.0.51" +version = "1.0.63" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f11c217e1416d6f036b870f14e0413d480dbf28edbee1f877abaf0206af43bb7" +checksum = "c0342370b38b6a11b6cc11d6a805569958d54cfa061a29969c3b5ce2ea405724" dependencies = [ "thiserror-impl", ] [[package]] name = "thiserror-impl" -version = "1.0.51" +version = "1.0.63" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "01742297787513b79cf8e29d1056ede1313e2420b7b3b15d0a768b4921f549df" +checksum = "a4558b58466b9ad7ca0f102865eccc95938dca1a74a856f2b57b6629050da261" dependencies = [ "proc-macro2", "quote", - "syn 2.0.42", + "syn 2.0.75", ] [[package]] name = "thread_local" -version = "1.1.7" +version = "1.1.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3fdd6f064ccff2d6567adcb3873ca630700f00b5ad3f060c25b5dcfd9a4ce152" +checksum = "8b9ef9bad013ada3808854ceac7b46812a6465ba368859a37e2100283d2d719c" dependencies = [ "cfg-if", "once_cell", @@ -1352,9 +1354,9 @@ dependencies = [ [[package]] name = "tinyvec" -version = "1.6.0" +version = "1.8.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "87cc5ceb3875bb20c2890005a4e226a4651264a5c75edb2421b52861a0a0cb50" +checksum = "445e881f4f6d382d5f27c034e25eb92edd7c784ceab92a0937db7f2e9471b938" dependencies = [ "tinyvec_macros", ] @@ -1367,18 +1369,17 @@ checksum = "1f3ccbac311fea05f86f61904b462b55fb3df8837a366dfc601a0161d0532f20" [[package]] name = "tokio" -version = "1.35.1" +version = "1.39.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c89b4efa943be685f629b149f53829423f8f5531ea21249408e8e2f8671ec104" +checksum = "9babc99b9923bfa4804bd74722ff02c0381021eafa4db9949217e3be8e84fff5" dependencies = [ "backtrace", "bytes", "libc", "mio", - "num_cpus", "pin-project-lite", "socket2", - "windows-sys 0.48.0", + "windows-sys 0.52.0", ] [[package]] @@ -1393,16 +1394,15 @@ dependencies = [ [[package]] name = "tokio-util" -version = "0.7.10" +version = "0.7.11" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5419f34732d9eb6ee4c3578b7989078579b7f039cbbb9ca2c4da015749371e15" +checksum = "9cf6b47b3771c49ac75ad09a6162f53ad4b8088b76ac60e8ec1455b31a189fe1" dependencies = [ "bytes", "futures-core", "futures-sink", "pin-project-lite", "tokio", - "tracing", ] [[package]] @@ -1419,9 +1419,9 @@ dependencies = [ [[package]] name = "toml_datetime" -version = "0.6.5" +version = "0.6.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3550f4e9685620ac18a50ed434eb3aec30db8ba93b0287467bca5826ea25baf1" +checksum = "0dd7358ecb8fc2f8d014bf86f6f638ce72ba252a2c3a2572f2a795f1d23efb41" dependencies = [ "serde", ] @@ -1441,9 +1441,9 @@ dependencies = [ [[package]] name = "tower-service" -version = "0.3.2" +version = "0.3.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b6bc1c9ce2b5135ac7f93c72918fc37feb872bdc6a5533a8b85eb4b86bfdae52" +checksum = "8df9b6e13f2d32c91b9bd719c00d1958837bc7dec474d94952798cc8e69eeec3" [[package]] name = "tracing" @@ -1464,7 +1464,7 @@ checksum = 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dependencies = [ "tinyvec", ] [[package]] name = "unsafe-libyaml" -version = "0.2.10" +version = "0.2.11" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ab4c90930b95a82d00dc9e9ac071b4991924390d46cbd0dfe566148667605e4b" +checksum = "673aac59facbab8a9007c7f6108d11f63b603f7cabff99fabf650fea5c32b861" [[package]] name = "url" -version = "2.5.0" +version = "2.5.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "31e6302e3bb753d46e83516cae55ae196fc0c309407cf11ab35cc51a4c2a4633" +checksum = "22784dbdf76fdde8af1aeda5622b546b422b6fc585325248a2bf9f5e41e94d6c" dependencies = [ "form_urlencoded", "idna", @@ -1559,9 +1559,9 @@ checksum = "86bd8d4e895da8537e5315b8254664e6b769c4ff3db18321b297a1e7004392e3" [[package]] name = "utf8parse" -version = "0.2.1" +version = "0.2.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "711b9620af191e0cdc7468a8d14e709c3dcdb115b36f838e601583af800a370a" +checksum = "06abde3611657adf66d383f00b093d7faecc7fa57071cce2578660c9f1010821" [[package]] name = "valuable" @@ -1592,34 +1592,35 @@ checksum = "9c8d87e72b64a3b4db28d11ce29237c246188f4f51057d65a7eab63b7987e423" [[package]] name = "wasm-bindgen" -version = "0.2.89" +version = "0.2.93" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0ed0d4f68a3015cc185aff4db9506a015f4b96f95303897bfa23f846db54064e" +checksum = "a82edfc16a6c469f5f44dc7b571814045d60404b55a0ee849f9bcfa2e63dd9b5" dependencies = [ "cfg-if", + "once_cell", "wasm-bindgen-macro", ] [[package]] name = "wasm-bindgen-backend" -version = "0.2.89" +version = "0.2.93" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1b56f625e64f3a1084ded111c4d5f477df9f8c92df113852fa5a374dbda78826" +checksum = "9de396da306523044d3302746f1208fa71d7532227f15e347e2d93e4145dd77b" dependencies = [ "bumpalo", "log", "once_cell", "proc-macro2", "quote", - "syn 2.0.42", + "syn 2.0.75", "wasm-bindgen-shared", ] [[package]] name = "wasm-bindgen-futures" -version = "0.4.39" +version = "0.4.43" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ac36a15a220124ac510204aec1c3e5db8a22ab06fd6706d881dc6149f8ed9a12" +checksum = "61e9300f63a621e96ed275155c108eb6f843b6a26d053f122ab69724559dc8ed" dependencies = [ "cfg-if", "js-sys", @@ -1629,9 +1630,9 @@ dependencies = [ [[package]] name = "wasm-bindgen-macro" -version = "0.2.89" +version = "0.2.93" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0162dbf37223cd2afce98f3d0785506dcb8d266223983e4b5b525859e6e182b2" +checksum = "585c4c91a46b072c92e908d99cb1dcdf95c5218eeb6f3bf1efa991ee7a68cccf" dependencies = [ "quote", "wasm-bindgen-macro-support", @@ -1639,28 +1640,28 @@ dependencies = [ [[package]] name = "wasm-bindgen-macro-support" -version = "0.2.89" +version = "0.2.93" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = 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"8a18201040b24831fbb9e4eb208f8892e1f50a37feb53cc7ff887feb8f50e7cd" +checksum = "9b724f72796e036ab90c1021d4780d4d3d648aca59e491e6b98e725b84e99973" dependencies = [ - "windows_aarch64_gnullvm 0.52.0", - "windows_aarch64_msvc 0.52.0", - "windows_i686_gnu 0.52.0", - "windows_i686_msvc 0.52.0", - "windows_x86_64_gnu 0.52.0", - "windows_x86_64_gnullvm 0.52.0", - "windows_x86_64_msvc 0.52.0", + "windows_aarch64_gnullvm 0.52.6", + "windows_aarch64_msvc 0.52.6", + "windows_i686_gnu 0.52.6", + "windows_i686_gnullvm", + "windows_i686_msvc 0.52.6", + "windows_x86_64_gnu 0.52.6", + "windows_x86_64_gnullvm 0.52.6", + "windows_x86_64_msvc 0.52.6", ] [[package]] @@ -1763,9 +1774,9 @@ checksum = "2b38e32f0abccf9987a4e3079dfb67dcd799fb61361e53e2882c3cbaf0d905d8" [[package]] name = "windows_aarch64_gnullvm" -version = "0.52.0" +version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "cb7764e35d4db8a7921e09562a0304bf2f93e0a51bfccee0bd0bb0b666b015ea" +checksum = "32a4622180e7a0ec044bb555404c800bc9fd9ec262ec147edd5989ccd0c02cd3" [[package]] name = "windows_aarch64_msvc" @@ -1775,9 +1786,9 @@ checksum = "dc35310971f3b2dbbf3f0690a219f40e2d9afcf64f9ab7cc1be722937c26b4bc" [[package]] name = "windows_aarch64_msvc" -version = "0.52.0" +version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "bbaa0368d4f1d2aaefc55b6fcfee13f41544ddf36801e793edbbfd7d7df075ef" +checksum = "09ec2a7bb152e2252b53fa7803150007879548bc709c039df7627cabbd05d469" [[package]] name = "windows_i686_gnu" @@ -1787,9 +1798,15 @@ checksum = "a75915e7def60c94dcef72200b9a8e58e5091744960da64ec734a6c6e9b3743e" [[package]] name = "windows_i686_gnu" -version = "0.52.0" +version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a28637cb1fa3560a16915793afb20081aba2c92ee8af57b4d5f28e4b3e7df313" +checksum = "8e9b5ad5ab802e97eb8e295ac6720e509ee4c243f69d781394014ebfe8bbfa0b" + +[[package]] +name = "windows_i686_gnullvm" +version = "0.52.6" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0eee52d38c090b3caa76c563b86c3a4bd71ef1a819287c19d586d7334ae8ed66" [[package]] name = "windows_i686_msvc" @@ -1799,9 +1816,9 @@ checksum = "8f55c233f70c4b27f66c523580f78f1004e8b5a8b659e05a4eb49d4166cca406" [[package]] name = "windows_i686_msvc" -version = "0.52.0" +version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ffe5e8e31046ce6230cc7215707b816e339ff4d4d67c65dffa206fd0f7aa7b9a" +checksum = "240948bc05c5e7c6dabba28bf89d89ffce3e303022809e73deaefe4f6ec56c66" [[package]] name = "windows_x86_64_gnu" @@ -1811,9 +1828,9 @@ checksum = "53d40abd2583d23e4718fddf1ebec84dbff8381c07cae67ff7768bbf19c6718e" [[package]] name = "windows_x86_64_gnu" -version = "0.52.0" +version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3d6fa32db2bc4a2f5abeacf2b69f7992cd09dca97498da74a151a3132c26befd" +checksum = "147a5c80aabfbf0c7d901cb5895d1de30ef2907eb21fbbab29ca94c5b08b1a78" [[package]] name = "windows_x86_64_gnullvm" @@ -1823,9 +1840,9 @@ checksum = "0b7b52767868a23d5bab768e390dc5f5c55825b6d30b86c844ff2dc7414044cc" [[package]] name = "windows_x86_64_gnullvm" -version = "0.52.0" +version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1a657e1e9d3f514745a572a6846d3c7aa7dbe1658c056ed9c3344c4109a6949e" +checksum = "24d5b23dc417412679681396f2b49f3de8c1473deb516bd34410872eff51ed0d" [[package]] name = "windows_x86_64_msvc" @@ -1835,15 +1852,15 @@ checksum = "ed94fce61571a4006852b7389a063ab983c02eb1bb37b47f8272ce92d06d9538" [[package]] name = "windows_x86_64_msvc" -version = "0.52.0" +version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "dff9641d1cd4be8d1a070daf9e3773c5f67e78b4d9d42263020c057706765c04" +checksum = "589f6da84c646204747d1270a2a5661ea66ed1cced2631d546fdfb155959f9ec" [[package]] name = "winnow" -version = "0.5.30" +version = "0.5.40" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "9b5c3db89721d50d0e2a673f5043fc4722f76dcc352d7b1ab8b8288bed4ed2c5" +checksum = "f593a95398737aeed53e489c785df13f3618e41dbcd6718c6addbf1395aa6876" dependencies = [ "memchr", ] diff --git a/Cargo.toml b/Cargo.toml index dbeceb60..cd408230 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -41,6 +41,7 @@ clap = { version = "4.0", optional = true } irx-config = { version = "=3.3.0", features = [ "cmd", "toml-parser", + "yaml", ], optional = true } env_logger = { version = "0.11", optional = true } inflections = "1.1" diff --git a/src/config.rs b/src/config.rs index 79522ecd..5a48105c 100644 --- a/src/config.rs +++ b/src/config.rs @@ -36,6 +36,8 @@ pub struct Config { pub field_names_for_enums: bool, pub base_address_shift: u64, pub html_url: Option, + /// Path to YAML file with chip-specific settings + pub settings: Option, } #[allow(clippy::upper_case_acronyms)] @@ -312,3 +314,14 @@ impl DerefMut for IdentFormats { pub enum IdentFormatsTheme { Legacy, } + +#[cfg_attr(feature = "serde", derive(serde::Deserialize), serde(default))] +#[derive(Clone, PartialEq, Eq, Debug, Default)] +#[non_exhaustive] +/// Chip-specific settings +pub struct Settings { + /// RISC-V specific settings + pub riscv_config: Option, +} + +pub mod riscv; diff --git a/src/config/riscv.rs b/src/config/riscv.rs new file mode 100644 index 00000000..2091bc2f --- /dev/null +++ b/src/config/riscv.rs @@ -0,0 +1,48 @@ +#[cfg_attr(feature = "serde", derive(serde::Deserialize), serde(default))] +#[derive(Clone, PartialEq, Eq, Debug, Default)] +#[non_exhaustive] +pub struct RiscvConfig { + pub core_interrupts: Vec, + pub exceptions: Vec, + pub priorities: Vec, + pub harts: Vec, + pub clint: Option, + pub plic: Option, +} + +#[cfg_attr(feature = "serde", derive(serde::Deserialize), serde(default))] +#[derive(Clone, PartialEq, Eq, Debug, Default)] +#[non_exhaustive] +pub struct RiscvEnumItem { + pub name: String, + pub value: usize, + pub description: Option, +} + +impl RiscvEnumItem { + pub fn description(&self) -> String { + let description = match &self.description { + Some(d) => d, + None => &self.name, + }; + format!("{} - {}", self.value, description) + } +} + +#[cfg_attr(feature = "serde", derive(serde::Deserialize), serde(default))] +#[derive(Clone, PartialEq, Eq, Debug, Default)] +#[non_exhaustive] +pub struct RiscvClintConfig { + pub name: String, + pub freq: Option, + pub async_delay: bool, +} + +#[cfg_attr(feature = "serde", derive(serde::Deserialize), serde(default))] +#[derive(Clone, PartialEq, Eq, Debug, Default)] +#[non_exhaustive] +pub struct RiscvPlicConfig { + pub name: String, + pub core_interrupt: Option, + pub hart_id: Option, +} diff --git a/src/generate/device.rs b/src/generate/device.rs index dd601ada..64ced875 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -7,11 +7,11 @@ use std::fs::File; use std::io::Write; use std::path::Path; -use crate::config::{Config, Target}; +use crate::config::{Config, Settings, Target}; use crate::util::{self, ident}; use anyhow::{Context, Result}; -use crate::generate::{interrupt, peripheral}; +use crate::generate::{interrupt, peripheral, riscv}; /// Whole device generation pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result { @@ -28,6 +28,14 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result { + let file = std::fs::read_to_string(settings).context("could not read settings file")?; + serde_yaml::from_str(&file).context("could not parse settings file")? + } + None => Settings::default(), + }; + if config.target == Target::Msp430 { out.extend(quote! { #![feature(abi_msp430_interrupt)] @@ -187,13 +195,21 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result { + debug!("Rendering RISC-V specific code"); + out.extend(riscv::render(&d.peripherals, device_x, &settings)?); + } + _ => { + debug!("Rendering interrupts"); + out.extend(interrupt::render( + config.target, + &d.peripherals, + device_x, + config, + )?); + } + } let feature_format = config.ident_formats.get("peripheral_feature").unwrap(); for p in &d.peripherals { @@ -203,6 +219,10 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result bool { + // TODO cleaner implementation of this + match &s.riscv_config { + Some(c) => { + c.clint.as_ref().is_some_and(|clint| clint.name == p.name) + || c.plic.as_ref().is_some_and(|plic| plic.name == p.name) + } + _ => false, + } +} + +/// Whole RISC-V generation +pub fn render( + peripherals: &[Peripheral], + device_x: &mut String, + settings: &Settings, +) -> Result { + let mut mod_items = TokenStream::new(); + + if let Some(c) = settings.riscv_config.as_ref() { + if !c.core_interrupts.is_empty() { + debug!("Rendering target-specific core interrupts"); + writeln!(device_x, "/* Core interrupt sources and trap handlers */")?; + let mut interrupts = vec![]; + for interrupt in c.core_interrupts.iter() { + let name = TokenStream::from_str(&interrupt.name).unwrap(); + let value = TokenStream::from_str(&format!("{}", interrupt.value)).unwrap(); + let description = interrupt.description(); + + writeln!(device_x, "PROVIDE({name} = DefaultHandler);")?; + writeln!( + device_x, + "PROVIDE(_start_{name}_trap = _start_DefaultHandler_trap);" + )?; + + interrupts.push(quote! { + #[doc = #description] + #name = #value, + }); + } + mod_items.extend(quote! { + /// Core interrupts. These interrupts are handled by the core itself. + #[riscv::pac_enum(unsafe CoreInterruptNumber)] + #[derive(Debug, Clone, Copy, PartialEq, Eq)] + pub enum CoreInterrupt { + #(#interrupts)* + } + }); + } else { + // when no interrupts are defined, we re-export the standard riscv interrupts + mod_items.extend(quote! {pub use riscv::interrupt::Interrupt as CoreInterrupt;}); + } + + if !c.exceptions.is_empty() { + debug!("Rendering target-specific exceptions"); + writeln!(device_x, "/* Exception sources */")?; + let mut exceptions = vec![]; + for exception in c.exceptions.iter() { + let name = TokenStream::from_str(&exception.name).unwrap(); + let value = TokenStream::from_str(&format!("{}", exception.value)).unwrap(); + let description = exception.description(); + + writeln!(device_x, "PROVIDE({name} = ExceptionHandler);")?; + + exceptions.push(quote! { + #[doc = #description] + #name = #value, + }); + } + mod_items.extend(quote! { + /// Exception sources in the device. + #[riscv::pac_enum(unsafe ExceptionNumber)] + #[derive(Debug, Clone, Copy, PartialEq, Eq)] + pub enum Exception { + #(#exceptions)* + } + }); + } else { + // when no exceptions are defined, we re-export the standard riscv exceptions + mod_items.extend(quote! { pub use riscv::interrupt::Exception; }); + } + + if !c.priorities.is_empty() { + debug!("Rendering target-specific priority levels"); + let priorities = c.priorities.iter().map(|priority| { + let name = TokenStream::from_str(&priority.name).unwrap(); + let value = TokenStream::from_str(&format!("{}", priority.value)).unwrap(); + let description = priority.description(); + + quote! { + #[doc = #description] + #name = #value, + } + }); + mod_items.extend(quote! { + /// Priority levels in the device + #[riscv::pac_enum(unsafe PriorityNumber)] + #[derive(Debug, Clone, Copy, PartialEq, Eq)] + pub enum Priority { + #(#priorities)* + } + }); + } + + if !c.harts.is_empty() { + debug!("Rendering target-specific HART IDs"); + let harts = c.harts.iter().map(|hart| { + let name = TokenStream::from_str(&hart.name).unwrap(); + let value = TokenStream::from_str(&format!("{}", hart.value)).unwrap(); + let description = hart.description(); + + quote! { + #[doc = #description] + #name = #value, + } + }); + mod_items.extend(quote! { + /// HARTs in the device + #[riscv::pac_enum(unsafe HartIdNumber)] + #[derive(Debug, Clone, Copy, PartialEq, Eq)] + pub enum Hart { + #(#harts)* + } + }); + } + } else { + // when no riscv block is defined, we re-export the standard riscv interrupt and exception enums + mod_items.extend(quote! { + pub use riscv::interrupt::{Interrupt as CoreInterrupt, Exception}; + }); + } + + mod_items.extend(quote! { + pub use riscv::{ + InterruptNumber, ExceptionNumber, PriorityNumber, HartIdNumber, + interrupt::{enable, disable, free, nested} + }; + + pub type Trap = riscv::interrupt::Trap; + + /// Retrieves the cause of a trap in the current hart. + /// + /// If the raw cause is not a valid interrupt or exception for the target, it returns an error. + #[inline] + pub fn try_cause() -> riscv::result::Result { + riscv::interrupt::try_cause() + } + + /// Retrieves the cause of a trap in the current hart (machine mode). + /// + /// If the raw cause is not a valid interrupt or exception for the target, it panics. + #[inline] + pub fn cause() -> Trap { + try_cause().unwrap() + } + }); + + let external_interrupts = peripherals + .iter() + .flat_map(|p| p.interrupt.iter()) + .map(|i| (i.value, i)) + .collect::>(); + let mut external_interrupts = external_interrupts.into_values().collect::>(); + external_interrupts.sort_by_key(|i| i.value); + if !external_interrupts.is_empty() { + debug!("Rendering target-specific external interrupts"); + writeln!(device_x, "/* External interrupt sources */")?; + let mut interrupts = vec![]; + for i in external_interrupts.iter() { + let name = TokenStream::from_str(&i.name).unwrap(); + let value = TokenStream::from_str(&format!("{}", i.value)).unwrap(); + let description = format!( + "{} - {}", + i.value, + i.description + .as_ref() + .map(|s| util::respace(s)) + .as_ref() + .map(|s| util::escape_special_chars(s)) + .unwrap_or_else(|| i.name.clone()) + ); + + writeln!(device_x, "PROVIDE({name} = DefaultHandler);")?; + + interrupts.push(quote! { + #[doc = #description] + #name = #value, + }) + } + mod_items.extend(quote! { + /// External interrupts. These interrupts are handled by the external peripherals. + #[riscv::pac_enum(unsafe ExternalInterruptNumber)] + #[derive(Debug, Clone, Copy, PartialEq, Eq)] + pub enum ExternalInterrupt { + #(#interrupts)* + } + }); + } + + let mut riscv_peripherals = TokenStream::new(); + if let Some(c) = &settings.riscv_config { + let harts = match c.harts.is_empty() { + true => vec![], + false => c + .harts + .iter() + .map(|h| (TokenStream::from_str(&h.name).unwrap(), h.value)) + .collect::>(), + }; + if let Some(clint) = &c.clint { + let p = peripherals.iter().find(|&p| p.name == clint.name).unwrap(); + let base = TokenStream::from_str(&format!("base 0x{:X},", p.base_address)).unwrap(); + let freq = match clint.freq { + Some(clk) => match clint.async_delay { + true => TokenStream::from_str(&format!("freq {clk}, async_delay,")).unwrap(), + false => TokenStream::from_str(&format!("freq {clk},")).unwrap(), + }, + None => quote! {}, + }; + let mtimecmps = harts + .iter() + .map(|(name, value)| { + let mtimecmp_name = TokenStream::from_str(&format!("mtimecmp{value}")).unwrap(); + let doc = format!("[{value}](crate::interrupt::Hart::{name})"); + quote! {#mtimecmp_name = (crate::interrupt::Hart::#name, #doc)} + }) + .collect::>(); + let mtimecmps = match mtimecmps.len() { + 0 => quote! {}, + _ => quote! {mtimecmps [ #(#mtimecmps),* ],}, + }; + let msips = harts + .iter() + .map(|(name, value)| { + let msip_name = TokenStream::from_str(&format!("msip{value}")).unwrap(); + let doc = format!("[{value}](crate::interrupt::Hart::{name})"); + quote! {#msip_name = (crate::interrupt::Hart::#name, #doc)} + }) + .collect::>(); + let msips = match msips.len() { + 0 => quote! {}, + _ => quote! {msips [ #(#msips),* ],}, + }; + + riscv_peripherals.extend(quote! { + riscv_peripheral::clint_codegen!(#base #freq #mtimecmps #msips); + }); + } + if let Some(plic) = &c.plic { + let p = peripherals.iter().find(|&p| p.name == plic.name).unwrap(); + let base = TokenStream::from_str(&format!("base 0x{:X},", p.base_address)).unwrap(); + let ctxs = harts + .iter() + .map(|(name, value)| { + let ctx_name = TokenStream::from_str(&format!("ctx{value}")).unwrap(); + let doc = format!("[{value}](crate::interrupt::Hart::{name})"); + quote! {#ctx_name = (crate::interrupt::Hart::#name, #doc)} + }) + .collect::>(); + let ctxs = match ctxs.len() { + 0 => quote! {}, + _ => quote! {ctxs [ #(#ctxs),* ],}, + }; + + riscv_peripherals.extend(quote! { + riscv_peripheral::plic_codegen!(#base #ctxs); + }); + + if let Some(core_interrupt) = &plic.core_interrupt { + let core_interrupt = TokenStream::from_str(core_interrupt).unwrap(); + let ctx = match &plic.hart_id { + Some(hart_id) => { + TokenStream::from_str(&format!("ctx(Hart::{hart_id})")).unwrap() + } + None => quote! { ctx_mhartid() }, + }; + mod_items.extend(quote! { + #[cfg(feature = "rt")] + #[riscv_rt::core_interrupt(CoreInterrupt::#core_interrupt)] + fn plic_handler() { + let claim = crate::PLIC::#ctx.claim(); + if let Some(s) = claim.claim::() { + unsafe { _dispatch_external_interrupt(s.number()) } + claim.complete(s); + } + } + }); + } + } + } + + Ok(quote! { + /// Interrupt numbers, priority levels, and HART IDs. + pub mod interrupt { + #mod_items + } + #riscv_peripherals + }) +} diff --git a/src/lib.rs b/src/lib.rs index ec574c98..edec886e 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -149,22 +149,26 @@ //! The resulting crate must provide an opt-in `rt` feature and depend on these crates: //! //! - [`critical-section`](https://crates.io/crates/critical-section) v1.x -//! - [`riscv`](https://crates.io/crates/riscv) v0.9.x (if target is RISC-V) -//! - [`riscv-rt`](https://crates.io/crates/riscv-rt) v0.9.x (if target is RISC-V) +//! - [`riscv`](https://crates.io/crates/riscv) v0.12.x (if target is RISC-V) +//! - [`riscv-peripheral`](https://crates.io/crates/riscv-peripheral) v0.2.x (if target is RISC-V and has standard peripherals) +//! - [`riscv-rt`](https://crates.io/crates/riscv-rt) v0.13.x (if target is RISC-V) //! - [`vcell`](https://crates.io/crates/vcell) v0.1.x //! -//! The `*-rt` dependencies must be optional only enabled when the `rt` feature is enabled. The -//! `Cargo.toml` of the device crate will look like this for a RISC-V target: +//! The `*-rt` dependencies must be optional only enabled when the `rt` feature is enabled. +//! If target is RISC-V and supports vectored mode, you must include a feature `v-trap` to activate `riscv-rt/v-trap`. +//! The `Cargo.toml` of the device crate will look like this for a RISC-V target: //! //! ``` toml //! [dependencies] //! critical-section = { version = "1.0", optional = true } -//! riscv = "0.9.0" -//! riscv-rt = { version = "0.9.0", optional = true } +//! riscv = "0.12.1" +//! riscv-peripheral = "0.2.0" +//! riscv-rt = { version = "0.13.0", optional = true } //! vcell = "0.1.0" //! //! [features] //! rt = ["riscv-rt"] +//! v-trap = ["rt", "riscv-rt/v-trap"] //! ``` //! //! # Peripheral API @@ -593,7 +597,7 @@ pub mod config; pub mod generate; pub mod util; -pub use config::{Config, Target}; +pub use config::{Config, Settings, Target}; #[non_exhaustive] pub struct Generation { diff --git a/src/main.rs b/src/main.rs index aabec8f6..880bb4ab 100755 --- a/src/main.rs +++ b/src/main.rs @@ -29,10 +29,12 @@ fn parse_configs(app: Command) -> Result { .path_option("config") .ignore_missing_file(true) .build()?, - ) - .load()?; + ); + + let irxconfig = irxconfig.load()?; let mut config: Config = irxconfig.get()?; + let mut idf = match config.ident_formats_theme { Some(IdentFormatsTheme::Legacy) => IdentFormats::legacy_theme(), _ => IdentFormats::default_theme(), @@ -98,6 +100,13 @@ fn run() -> Result<()> { .action(ArgAction::Set) .value_name("TOML_FILE"), ) + .arg( + Arg::new("settings") + .long("settings") + .help("Target-specific settings YAML file") + .action(ArgAction::Set) + .value_name("YAML_FILE"), + ) .arg( Arg::new("target") .long("target") From 7468bd60b848313c68d1f3558e7aa514c1c0a966 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rom=C3=A1n=20C=C3=A1rdenas=20Rodr=C3=ADguez?= Date: Mon, 21 Oct 2024 17:24:32 +0200 Subject: [PATCH 269/319] Update riscv CI to 0.12.1 --- ci/script.sh | 4 ++-- ci/svd2rust-regress/src/svd_test.rs | 2 +- src/generate/device.rs | 32 ++++++++++++++++++++++------- 3 files changed, 28 insertions(+), 10 deletions(-) diff --git a/ci/script.sh b/ci/script.sh index 9474a753..b0da0e4b 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -498,10 +498,10 @@ main() { echo 'version = "1.0.0"' >> $td/Cargo.toml echo '[dependencies.riscv]' >> $td/Cargo.toml - echo 'version = "0.6.0"' >> $td/Cargo.toml + echo 'version = "0.12.1"' >> $td/Cargo.toml echo '[dependencies.riscv-rt]' >> $td/Cargo.toml - echo 'version = "0.8.0"' >> $td/Cargo.toml + echo 'version = "0.13.0"' >> $td/Cargo.toml test_svd_for_target riscv https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x/e310x.svd test_svd_for_target riscv https://raw.githubusercontent.com/riscv-rust/k210-pac/master/k210.svd diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 1ea01f2e..30033dbd 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -16,7 +16,7 @@ const CRATES_MSP430: &[&str] = &["msp430 = \"0.4.0\"", "msp430-rt = \"0.4.0\""]; const CRATES_ATOMICS: &[&str] = &["portable-atomic = { version = \"0.3.16\", default-features = false }"]; const CRATES_CORTEX_M: &[&str] = &["cortex-m = \"0.7.6\"", "cortex-m-rt = \"0.6.13\""]; -const CRATES_RISCV: &[&str] = &["riscv = \"0.9.0\"", "riscv-rt = \"0.9.0\""]; +const CRATES_RISCV: &[&str] = &["riscv = \"0.12.1\"", "riscv-rt = \"0.13.0\""]; const CRATES_XTENSALX: &[&str] = &["xtensa-lx-rt = \"0.9.0\"", "xtensa-lx = \"0.6.0\""]; const CRATES_MIPS: &[&str] = &["mips-mcu = \"0.1.0\""]; const PROFILE_ALL: &[&str] = &["[profile.dev]", "incremental = false"]; diff --git a/src/generate/device.rs b/src/generate/device.rs index 64ced875..9f0ff909 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -2,12 +2,12 @@ use crate::svd::{array::names, Device, Peripheral}; use proc_macro2::{Span, TokenStream}; use quote::{quote, ToTokens}; -use log::debug; +use log::{debug, warn}; use std::fs::File; use std::io::Write; use std::path::Path; -use crate::config::{Config, Settings, Target}; +use crate::config::{Config, Target}; use crate::util::{self, ident}; use anyhow::{Context, Result}; @@ -31,9 +31,9 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result { let file = std::fs::read_to_string(settings).context("could not read settings file")?; - serde_yaml::from_str(&file).context("could not parse settings file")? + Some(serde_yaml::from_str(&file).context("could not parse settings file")?) } - None => Settings::default(), + None => None, }; if config.target == Target::Msp430 { @@ -197,8 +197,23 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result { - debug!("Rendering RISC-V specific code"); - out.extend(riscv::render(&d.peripherals, device_x, &settings)?); + if settings.is_none() { + warn!("No settings file provided for RISC-V target. Using legacy interrupts rendering"); + warn!("Please, consider migrating your PAC to riscv 0.12.0 or later"); + out.extend(interrupt::render( + config.target, + &d.peripherals, + device_x, + config, + )?); + } else { + debug!("Rendering RISC-V specific code"); + out.extend(riscv::render( + &d.peripherals, + device_x, + settings.as_ref().unwrap(), + )?); + } } _ => { debug!("Rendering interrupts"); @@ -219,7 +234,10 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Date: Tue, 22 Oct 2024 08:24:09 -0700 Subject: [PATCH 270/319] arbitrary return type for register modifiers --- src/generate/generic_reg_vcell.rs | 78 +++++++++++++++++-------------- 1 file changed, 43 insertions(+), 35 deletions(-) diff --git a/src/generate/generic_reg_vcell.rs b/src/generate/generic_reg_vcell.rs index 5081ae20..04289050 100644 --- a/src/generate/generic_reg_vcell.rs +++ b/src/generate/generic_reg_vcell.rs @@ -74,18 +74,20 @@ impl Reg { /// ``` /// In the latter case, other fields will be set to their reset value. #[inline(always)] - pub fn write(&self, f: F) + pub fn write(&self, f: F) -> T where - F: FnOnce(&mut W) -> &mut W, + F: FnOnce(&mut W) -> T, { - self.register.set( - f(&mut W { - bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP - | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, - _reg: marker::PhantomData, - }) - .bits, - ); + let mut writer = W { + bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP + | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, + _reg: marker::PhantomData, + }; + let result = f(&mut writer); + + self.register.set(writer.bits); + + result } } @@ -98,17 +100,20 @@ impl Reg { /// /// Unsafe to use with registers which don't allow to write 0. #[inline(always)] - pub unsafe fn write_with_zero(&self, f: F) + pub unsafe fn write_with_zero(&self, f: F) -> T where - F: FnOnce(&mut W) -> &mut W, + F: FnOnce(&mut W) -> T, { - self.register.set( - f(&mut W { - bits: REG::Ux::default(), - _reg: marker::PhantomData, - }) - .bits, - ); + let mut writer = W { + bits: REG::Ux::default(), + _reg: marker::PhantomData, + }; + + let result = f(&mut writer); + + self.register.set(writer.bits); + + result } } @@ -139,31 +144,34 @@ impl Reg { /// ``` /// Other fields will have the value they had before the call to `modify`. #[inline(always)] - pub fn modify(&self, f: F) + pub fn modify(&self, f: F) -> T where - for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, + for<'w> F: FnOnce(&R, &'w mut W) -> T, { let bits = self.register.get(); - self.register.set( - f( - &R { - bits, - _reg: marker::PhantomData, - }, - &mut W { - bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP - | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, - _reg: marker::PhantomData, - }, - ) - .bits, + + let mut writer = W { + bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, + _reg: marker::PhantomData, + }; + + let result = f( + &R { + bits, + _reg: marker::PhantomData, + }, + &mut writer, ); + + self.register.set(writer.bits); + + result } } impl core::fmt::Debug for crate::generic::Reg where - R: core::fmt::Debug + R: core::fmt::Debug, { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { core::fmt::Debug::fmt(&self.read(), f) From 294e211054b3150c42a2abd97b7962d6354dce45 Mon Sep 17 00:00:00 2001 From: Adin Ackerman Date: Tue, 22 Oct 2024 08:35:47 -0700 Subject: [PATCH 271/319] Revert "arbitrary return type for register modifiers" This reverts commit 456ce21563fa289b726285d820cf6ea0b4d76dd3. --- src/generate/generic_reg_vcell.rs | 78 ++++++++++++++----------------- 1 file changed, 35 insertions(+), 43 deletions(-) diff --git a/src/generate/generic_reg_vcell.rs b/src/generate/generic_reg_vcell.rs index 04289050..5081ae20 100644 --- a/src/generate/generic_reg_vcell.rs +++ b/src/generate/generic_reg_vcell.rs @@ -74,20 +74,18 @@ impl Reg { /// ``` /// In the latter case, other fields will be set to their reset value. #[inline(always)] - pub fn write(&self, f: F) -> T + pub fn write(&self, f: F) where - F: FnOnce(&mut W) -> T, + F: FnOnce(&mut W) -> &mut W, { - let mut writer = W { - bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP - | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, - _reg: marker::PhantomData, - }; - let result = f(&mut writer); - - self.register.set(writer.bits); - - result + self.register.set( + f(&mut W { + bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP + | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, + _reg: marker::PhantomData, + }) + .bits, + ); } } @@ -100,20 +98,17 @@ impl Reg { /// /// Unsafe to use with registers which don't allow to write 0. #[inline(always)] - pub unsafe fn write_with_zero(&self, f: F) -> T + pub unsafe fn write_with_zero(&self, f: F) where - F: FnOnce(&mut W) -> T, + F: FnOnce(&mut W) -> &mut W, { - let mut writer = W { - bits: REG::Ux::default(), - _reg: marker::PhantomData, - }; - - let result = f(&mut writer); - - self.register.set(writer.bits); - - result + self.register.set( + f(&mut W { + bits: REG::Ux::default(), + _reg: marker::PhantomData, + }) + .bits, + ); } } @@ -144,34 +139,31 @@ impl Reg { /// ``` /// Other fields will have the value they had before the call to `modify`. #[inline(always)] - pub fn modify(&self, f: F) -> T + pub fn modify(&self, f: F) where - for<'w> F: FnOnce(&R, &'w mut W) -> T, + for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, { let bits = self.register.get(); - - let mut writer = W { - bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, - _reg: marker::PhantomData, - }; - - let result = f( - &R { - bits, - _reg: marker::PhantomData, - }, - &mut writer, + self.register.set( + f( + &R { + bits, + _reg: marker::PhantomData, + }, + &mut W { + bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP + | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, + _reg: marker::PhantomData, + }, + ) + .bits, ); - - self.register.set(writer.bits); - - result } } impl core::fmt::Debug for crate::generic::Reg where - R: core::fmt::Debug, + R: core::fmt::Debug { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { core::fmt::Debug::fmt(&self.read(), f) From 6cd9ead15fef820c1f03cce307c8f90c7c89246c Mon Sep 17 00:00:00 2001 From: Adin Ackerman Date: Tue, 22 Oct 2024 08:45:11 -0700 Subject: [PATCH 272/319] add `write_and`, `write_with_zero_and`, and `modify_and` --- src/generate/generic_reg_vcell.rs | 127 +++++++++++++++++++++++++++++- 1 file changed, 126 insertions(+), 1 deletion(-) diff --git a/src/generate/generic_reg_vcell.rs b/src/generate/generic_reg_vcell.rs index 5081ae20..dc6445f0 100644 --- a/src/generate/generic_reg_vcell.rs +++ b/src/generate/generic_reg_vcell.rs @@ -87,6 +87,51 @@ impl Reg { .bits, ); } + + /// Writes bits to a `Writable` register and produce a value. + /// + /// You can write raw bits into a register: + /// ```ignore + /// periph.reg.write_and(|w| unsafe { w.bits(rawbits); }); + /// ``` + /// or write only the fields you need: + /// ```ignore + /// periph.reg.write_and(|w| { + /// w.field1().bits(newfield1bits) + /// .field2().set_bit() + /// .field3().variant(VARIANT); + /// }); + /// ``` + /// or an alternative way of saying the same: + /// ```ignore + /// periph.reg.write_and(|w| { + /// w.field1().bits(newfield1bits); + /// w.field2().set_bit(); + /// w.field3().variant(VARIANT); + /// }); + /// ``` + /// In the latter case, other fields will be set to their reset value. + /// + /// Values can be returned from the closure: + /// ```ignore + /// let state = periph.reg.write_and(|w| State::set(w.field1())); + /// ``` + #[inline(always)] + pub fn write_and(&self, f: F) -> T + where + F: FnOnce(&mut W) -> T, + { + let mut writer = W { + bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP + | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, + _reg: marker::PhantomData, + }; + let result = f(&mut writer); + + self.register.set(writer.bits); + + result + } } impl Reg { @@ -110,6 +155,30 @@ impl Reg { .bits, ); } + + /// Writes 0 to a `Writable` register and produces a value. + /// + /// Similar to `write`, but unused bits will contain 0. + /// + /// # Safety + /// + /// Unsafe to use with registers which don't allow to write 0. + #[inline(always)] + pub unsafe fn write_with_zero(&self, f: F) -> T + where + F: FnOnce(&mut W) -> T, + { + let mut writer = W { + bits: REG::Ux::default(), + _reg: marker::PhantomData, + }; + + let result = f(&mut writer); + + self.register.set(writer.bits); + + result + } } impl Reg { @@ -159,11 +228,67 @@ impl Reg { .bits, ); } + + /// Modifies the contents of the register by reading and then writing it + /// and produces a value. + /// + /// E.g. to do a read-modify-write sequence to change parts of a register: + /// ```ignore + /// let bits = periph.reg.modify(|r, w| { + /// let new_bits = r.bits() | 3; + /// unsafe { + /// w.bits(new_bits); + /// } + /// + /// new_bits + /// }); + /// ``` + /// or + /// ```ignore + /// periph.reg.modify(|_, w| { + /// w.field1().bits(newfield1bits) + /// .field2().set_bit() + /// .field3().variant(VARIANT); + /// }); + /// ``` + /// or an alternative way of saying the same: + /// ```ignore + /// periph.reg.modify(|_, w| { + /// w.field1().bits(newfield1bits); + /// w.field2().set_bit(); + /// w.field3().variant(VARIANT); + /// }); + /// ``` + /// Other fields will have the value they had before the call to `modify`. + #[inline(always)] + pub fn modify_and(&self, f: F) -> T + where + for<'w> F: FnOnce(&R, &'w mut W) -> T, + { + let bits = self.register.get(); + + let mut writer = W { + bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, + _reg: marker::PhantomData, + }; + + let result = f( + &R { + bits, + _reg: marker::PhantomData, + }, + &mut writer, + ); + + self.register.set(writer.bits); + + result + } } impl core::fmt::Debug for crate::generic::Reg where - R: core::fmt::Debug + R: core::fmt::Debug, { fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result { core::fmt::Debug::fmt(&self.read(), f) From d0739ece626f32f8b70390715720398580d29c97 Mon Sep 17 00:00:00 2001 From: Adin Ackerman Date: Tue, 22 Oct 2024 08:53:05 -0700 Subject: [PATCH 273/319] Update CHANGELOG.md --- CHANGELOG.md | 1 + 1 file changed, 1 insertion(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 25439d50..13974e2b 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -15,6 +15,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Skip generating `.add(0)` and `1 *` in accessors - Bump MSRV of generated code to 1.76 - move `must_use` from methods to generic type +- Add `write_and`, `write_with_zero_and`, and `modify_and` register modifiers ## [v0.33.5] - 2024-10-12 From 8b2cab5c1c4966d8f571ac4579b003293ff0d9c0 Mon Sep 17 00:00:00 2001 From: Adin Ackerman Date: Tue, 22 Oct 2024 08:59:30 -0700 Subject: [PATCH 274/319] fix typo --- src/generate/generic_reg_vcell.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/generate/generic_reg_vcell.rs b/src/generate/generic_reg_vcell.rs index dc6445f0..36148635 100644 --- a/src/generate/generic_reg_vcell.rs +++ b/src/generate/generic_reg_vcell.rs @@ -164,7 +164,7 @@ impl Reg { /// /// Unsafe to use with registers which don't allow to write 0. #[inline(always)] - pub unsafe fn write_with_zero(&self, f: F) -> T + pub unsafe fn write_with_zero_and(&self, f: F) -> T where F: FnOnce(&mut W) -> T, { From 69f2444886a8dde437909dcba953a89f8a802441 Mon Sep 17 00:00:00 2001 From: Adin Ackerman Date: Tue, 22 Oct 2024 12:33:33 -0700 Subject: [PATCH 275/319] change names --- src/generate/generic_reg_vcell.rs | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/generate/generic_reg_vcell.rs b/src/generate/generic_reg_vcell.rs index 36148635..585c6e0c 100644 --- a/src/generate/generic_reg_vcell.rs +++ b/src/generate/generic_reg_vcell.rs @@ -117,7 +117,7 @@ impl Reg { /// let state = periph.reg.write_and(|w| State::set(w.field1())); /// ``` #[inline(always)] - pub fn write_and(&self, f: F) -> T + pub fn from_write(&self, f: F) -> T where F: FnOnce(&mut W) -> T, { @@ -164,7 +164,7 @@ impl Reg { /// /// Unsafe to use with registers which don't allow to write 0. #[inline(always)] - pub unsafe fn write_with_zero_and(&self, f: F) -> T + pub unsafe fn from_write_with_zero(&self, f: F) -> T where F: FnOnce(&mut W) -> T, { @@ -261,7 +261,7 @@ impl Reg { /// ``` /// Other fields will have the value they had before the call to `modify`. #[inline(always)] - pub fn modify_and(&self, f: F) -> T + pub fn from_modify(&self, f: F) -> T where for<'w> F: FnOnce(&R, &'w mut W) -> T, { From a0e833cc556f52890b16f4f3cb1d7e989f0f28f5 Mon Sep 17 00:00:00 2001 From: Jan Niehusmann Date: Wed, 23 Oct 2024 15:59:24 +0000 Subject: [PATCH 276/319] Fix building without yaml feature --- CHANGELOG.md | 1 + src/generate/device.rs | 7 ++++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 25439d50..942676c8 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Fix building without `yaml` feature - Compatibility with `riscv` 0.12 and `riscv-rt` 0.13 - Add `riscv_config` section in `settings.yaml` It uses `riscv-pac` traits and standard `riscv-peripheral` peripherals. diff --git a/src/generate/device.rs b/src/generate/device.rs index 9f0ff909..4acf6609 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -9,7 +9,7 @@ use std::path::Path; use crate::config::{Config, Target}; use crate::util::{self, ident}; -use anyhow::{Context, Result}; +use anyhow::{anyhow, Context, Result}; use crate::generate::{interrupt, peripheral, riscv}; @@ -29,10 +29,15 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result { let file = std::fs::read_to_string(settings).context("could not read settings file")?; Some(serde_yaml::from_str(&file).context("could not parse settings file")?) } + #[cfg(not(feature = "yaml"))] + Some(_) => { + return Err(anyhow!("Support for yaml config files is not available because svd2rust was compiled without the yaml feature")); + } None => None, }; From dfb10b1b2fbaab5a19ea1835b0890c9dded8869b Mon Sep 17 00:00:00 2001 From: Jan Niehusmann Date: Wed, 23 Oct 2024 16:12:58 +0000 Subject: [PATCH 277/319] Fix warning about unused import --- src/generate/device.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/generate/device.rs b/src/generate/device.rs index 4acf6609..fdecb54b 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -9,7 +9,7 @@ use std::path::Path; use crate::config::{Config, Target}; use crate::util::{self, ident}; -use anyhow::{anyhow, Context, Result}; +use anyhow::{Context, Result}; use crate::generate::{interrupt, peripheral, riscv}; @@ -36,7 +36,7 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result { - return Err(anyhow!("Support for yaml config files is not available because svd2rust was compiled without the yaml feature")); + return Err(anyhow::anyhow!("Support for yaml config files is not available because svd2rust was compiled without the yaml feature")); } None => None, }; From 224fc9de84040b03d9b98c93125a3cbe8f67069a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Emil=20Gardstr=C3=B6m?= Date: Wed, 23 Oct 2024 16:18:34 +0000 Subject: [PATCH 278/319] check compilation with no features --- .github/workflows/ci.yml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index d6dec204..a7ec6239 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -42,6 +42,9 @@ jobs: with: key: ${{ matrix.TARGET }} + - run: cargo check --target ${{ matrix.TARGET }} --no-default-features + env: + RUSTFLAGS: -D warnings - run: cargo check --target ${{ matrix.TARGET }} env: RUSTFLAGS: -D warnings From 5572cbd2746d7a2c9707fd78cdd7cf67fcad0db6 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Thu, 24 Oct 2024 08:29:42 +0300 Subject: [PATCH 279/319] Fix calculating mwv bitmasks with field arrays --- CHANGELOG.md | 1 + src/generate/register.rs | 26 +++++++++++++++++--------- 2 files changed, 18 insertions(+), 9 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 34f493f6..5947100d 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Fix calculating `modifiedWriteValues` bitmasks with field arrays - Fix building without `yaml` feature - Compatibility with `riscv` 0.12 and `riscv-rt` 0.13 - Add `riscv_config` section in `settings.yaml` diff --git a/src/generate/register.rs b/src/generate/register.rs index 0747b9a4..62984d3a 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -1343,15 +1343,23 @@ pub fn fields( } // Update register modify bit masks - let bitmask = (u64::MAX >> (64 - width)) << offset; - use ModifiedWriteValues::*; - match mwv { - Modify | Set | Clear => {} - OneToSet | OneToClear | OneToToggle => { - one_to_modify_fields_bitmap |= bitmask; - } - ZeroToClear | ZeroToSet | ZeroToToggle => { - zero_to_modify_fields_bitmap |= bitmask; + let offsets = match f { + MaybeArray::Array(info, dim) => (0..dim.dim) + .map(|i| i * dim.dim_increment + info.bit_offset()) + .collect(), + MaybeArray::Single(info) => vec![info.bit_offset()], + }; + for o in offsets { + let bitmask = (u64::MAX >> (64 - width)) << o; + use ModifiedWriteValues::*; + match mwv { + Modify | Set | Clear => {} + OneToSet | OneToClear | OneToToggle => { + one_to_modify_fields_bitmap |= bitmask; + } + ZeroToClear | ZeroToSet | ZeroToToggle => { + zero_to_modify_fields_bitmap |= bitmask; + } } } } From aebd7dce57d58ecb19f094567b79d854b2e59db7 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 20 Oct 2024 12:40:44 +0300 Subject: [PATCH 280/319] rm html_escape --- CHANGELOG.md | 1 + Cargo.lock | 16 ---------------- Cargo.toml | 1 - src/generate/interrupt.rs | 2 +- src/generate/peripheral.rs | 17 +++++++++-------- src/generate/register.rs | 36 ++++++++++++++++++------------------ src/generate/riscv.rs | 2 +- src/util.rs | 10 ++++++---- 8 files changed, 36 insertions(+), 49 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 5947100d..7b2d3295 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Revert #711 - Fix calculating `modifiedWriteValues` bitmasks with field arrays - Fix building without `yaml` feature - Compatibility with `riscv` 0.12 and `riscv-rt` 0.13 diff --git a/Cargo.lock b/Cargo.lock index 6f55c94c..3c834cc6 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -519,15 +519,6 @@ dependencies = [ "windows-sys 0.52.0", ] -[[package]] -name = "html-escape" -version = "0.2.13" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6d1ad449764d627e22bfd7cd5e8868264fc9236e07c752972b4080cd351cb476" -dependencies = [ - "utf8-width", -] - [[package]] name = "http" version = "0.2.12" @@ -1221,7 +1212,6 @@ dependencies = [ "anyhow", "clap", "env_logger", - "html-escape", "inflections", "irx-config", "log", @@ -1551,12 +1541,6 @@ dependencies = [ "serde", ] -[[package]] -name = "utf8-width" -version = "0.1.7" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "86bd8d4e895da8537e5315b8254664e6b769c4ff3db18321b297a1e7004392e3" - [[package]] name = "utf8parse" version = "0.2.2" diff --git a/Cargo.toml b/Cargo.toml index cd408230..897e6848 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -54,7 +54,6 @@ serde = { version = "1.0", optional = true } serde_json = { version = "1.0.85", optional = true } serde_yaml = { version = "0.9.11", optional = true } regex = "1.10.0" -html-escape = "0.2" url = { version = "2.5", features = ["serde"] } [dependencies.svd-parser] diff --git a/src/generate/interrupt.rs b/src/generate/interrupt.rs index 7417c382..2b8e59de 100644 --- a/src/generate/interrupt.rs +++ b/src/generate/interrupt.rs @@ -66,7 +66,7 @@ pub fn render( .map(util::respace) .as_deref() .map(util::escape_special_chars) - .unwrap_or_else(|| interrupt.0.name.clone()) + .unwrap_or_else(|| interrupt.0.name.as_str().into()) ); let value = util::unsuffixed(interrupt.0.value); diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 9e3101ec..407415f9 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -205,8 +205,8 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result } } - let description = - util::escape_special_chars(util::respace(p.description.as_ref().unwrap_or(&name)).as_ref()); + let description = util::respace(p.description.as_ref().unwrap_or(&name)); + let description = util::escape_special_chars(&description); // Build up an alternate erc list by expanding any derived registers/clusters // erc: *E*ither *R*egister or *C*luster @@ -511,7 +511,8 @@ impl FieldRegions { } fn make_comment(size: u32, offset: u32, description: &str) -> String { - let desc = util::escape_special_chars(&util::respace(description)); + let desc = util::respace(description); + let desc = util::escape_special_chars(&desc); if size > 32 { let end = offset + size / 8; format!("0x{offset:02x}..0x{end:02x} - {desc}") @@ -1149,7 +1150,7 @@ fn expand_register( .properties .size .ok_or_else(|| anyhow!("Register {} has no `size` field", register.name))?; - let description = register.description.clone().unwrap_or_default(); + let description = register.description.as_deref().unwrap_or_default(); let info_name = register.fullname(config.ignore_groups); let mut ty_name = if register.is_single() { @@ -1161,7 +1162,7 @@ fn expand_register( match register { Register::Single(info) => { - let doc = make_comment(register_size, info.address_offset, &description); + let doc = make_comment(register_size, info.address_offset, description); let span = Span::call_site(); let ty = name_to_ty(ident(&ty_str, config, "register", span)); let name: Ident = ident(&ty_name, config, "register_accessor", span); @@ -1236,7 +1237,7 @@ fn expand_register( let doc = make_comment( register_size * array_info.dim, info.address_offset, - &description, + description, ); let mut accessors = Vec::with_capacity((array_info.dim + 1) as _); let first_name = svd::array::names(info, array_info).next().unwrap(); @@ -1380,8 +1381,8 @@ fn cluster_block( index: &Index, config: &Config, ) -> Result { - let description = - util::escape_special_chars(&util::respace(c.description.as_ref().unwrap_or(&c.name))); + let description = util::respace(c.description.as_ref().unwrap_or(&c.name)); + let description = util::escape_special_chars(&description); let mod_name = c.name.remove_dim().to_string(); // name_snake_case needs to take into account array type. diff --git a/src/generate/register.rs b/src/generate/register.rs index 62984d3a..8ab2eeb3 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -65,13 +65,11 @@ pub fn render( let reg_ty = ident(&name, config, "register", span); let doc_alias = (reg_ty.to_string().as_str() != name).then(|| quote!(#[doc(alias = #name)])); let mod_ty = ident(&name, config, "register_mod", span); - let description = util::escape_special_chars( - util::respace(®ister.description.clone().unwrap_or_else(|| { - warn!("Missing description for register {}", register.name); - Default::default() - })) - .as_ref(), - ); + let description = util::respace(register.description.as_deref().unwrap_or_else(|| { + warn!("Missing description for register {}", register.name); + "" + })); + let description = util::escape_special_chars(&description); if let Some(dpath) = dpath.as_ref() { let mut derived = if &dpath.block == path { @@ -261,13 +259,11 @@ pub fn render_register_mod( rsize.next_power_of_two() }; let rty = rsize.to_ty()?; - let description = util::escape_special_chars( - util::respace(®ister.description.clone().unwrap_or_else(|| { - warn!("Missing description for register {rname}"); - Default::default() - })) - .as_ref(), - ); + let description = util::respace(®ister.description.as_deref().unwrap_or_else(|| { + warn!("Missing description for register {rname}"); + "" + })); + let description = util::escape_special_chars(&description); let mut mod_items = TokenStream::new(); @@ -898,7 +894,8 @@ pub fn fields( let pc = &v.pc; let is_variant = &v.is_sc; - let doc = util::escape_special_chars(&util::respace(&v.doc)); + let doc = util::respace(&v.doc); + let doc = util::escape_special_chars(&doc); enum_items.extend(quote! { #[doc = #doc] #inline @@ -911,7 +908,8 @@ pub fn fields( let pc = &v.pc; let is_variant = &v.is_sc; - let doc = util::escape_special_chars(&util::respace(&v.doc)); + let doc = util::respace(&v.doc); + let doc = util::escape_special_chars(&doc); enum_items.extend(quote! { #[doc = #doc] #inline @@ -1174,7 +1172,8 @@ pub fn fields( for v in &variants { let pc = &v.pc; let sc = &v.sc; - let doc = util::escape_special_chars(&util::respace(&v.doc)); + let doc = util::respace(&v.doc); + let doc = util::escape_special_chars(&doc); proxy_items.extend(quote! { #[doc = #doc] #inline @@ -1545,7 +1544,8 @@ fn add_from_variants<'a>( let mut vars = TokenStream::new(); for v in variants.map(|v| { - let desc = util::escape_special_chars(&util::respace(&format!("{}: {}", v.value, v.doc))); + let desc = util::respace(&format!("{}: {}", v.value, v.doc)); + let desc = util::escape_special_chars(&desc); let pcv = &v.pc; let pcval = &unsuffixed(v.value); quote! { diff --git a/src/generate/riscv.rs b/src/generate/riscv.rs index 9c834117..6911d76f 100644 --- a/src/generate/riscv.rs +++ b/src/generate/riscv.rs @@ -184,7 +184,7 @@ pub fn render( .map(|s| util::respace(s)) .as_ref() .map(|s| util::escape_special_chars(s)) - .unwrap_or_else(|| i.name.clone()) + .unwrap_or_else(|| i.name.as_str().into()) ); writeln!(device_x, "PROVIDE({name} = DefaultHandler);")?; diff --git a/src/util.rs b/src/util.rs index 6f72a30b..3520bcf3 100644 --- a/src/util.rs +++ b/src/util.rs @@ -5,7 +5,6 @@ use crate::{ svd::{Access, Device, Field, RegisterInfo, RegisterProperties}, Config, }; -use html_escape::encode_text_minimal; use inflections::Inflect; use proc_macro2::{Ident, Span, TokenStream}; use quote::quote; @@ -179,9 +178,12 @@ pub fn escape_brackets(s: &str) -> String { } /// Escape basic html tags and brackets -pub fn escape_special_chars(s: &str) -> String { - let html_escaped = encode_text_minimal(s); - escape_brackets(&html_escaped) +pub fn escape_special_chars(s: &str) -> Cow<'_, str> { + if s.contains('[') { + escape_brackets(&s).into() + } else { + s.into() + } } pub fn name_of(maybe_array: &MaybeArray, ignore_group: bool) -> String { From 607e4b8125cb79066ab53b7487771126ee35e53f Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 20 Oct 2024 13:29:40 +0300 Subject: [PATCH 281/319] return raw value from write/modify --- CHANGELOG.md | 4 +- src/generate/generic_reg_vcell.rs | 63 +++++++++++++++---------------- 2 files changed, 34 insertions(+), 33 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 7b2d3295..88adc971 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -18,7 +18,9 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Skip generating `.add(0)` and `1 *` in accessors - Bump MSRV of generated code to 1.76 - move `must_use` from methods to generic type -- Add `write_and`, `write_with_zero_and`, and `modify_and` register modifiers +- *breaking change* Return raw writtened value +- Add `from_write`, `from_write_with_zero`, and `from_modify` register modifiers + with generic return value ## [v0.33.5] - 2024-10-12 diff --git a/src/generate/generic_reg_vcell.rs b/src/generate/generic_reg_vcell.rs index 585c6e0c..b0ca0d5e 100644 --- a/src/generate/generic_reg_vcell.rs +++ b/src/generate/generic_reg_vcell.rs @@ -74,18 +74,18 @@ impl Reg { /// ``` /// In the latter case, other fields will be set to their reset value. #[inline(always)] - pub fn write(&self, f: F) + pub fn write(&self, f: F) -> REG::Ux where F: FnOnce(&mut W) -> &mut W, { - self.register.set( - f(&mut W { - bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP - | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, - _reg: marker::PhantomData, - }) - .bits, - ); + let value = f(&mut W { + bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP + | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, + _reg: marker::PhantomData, + }) + .bits; + self.register.set(value); + value } /// Writes bits to a `Writable` register and produce a value. @@ -143,17 +143,17 @@ impl Reg { /// /// Unsafe to use with registers which don't allow to write 0. #[inline(always)] - pub unsafe fn write_with_zero(&self, f: F) + pub unsafe fn write_with_zero(&self, f: F) -> REG::Ux where F: FnOnce(&mut W) -> &mut W, { - self.register.set( - f(&mut W { - bits: REG::Ux::default(), - _reg: marker::PhantomData, - }) - .bits, - ); + let value = f(&mut W { + bits: REG::Ux::default(), + _reg: marker::PhantomData, + }) + .bits; + self.register.set(value); + value } /// Writes 0 to a `Writable` register and produces a value. @@ -208,25 +208,24 @@ impl Reg { /// ``` /// Other fields will have the value they had before the call to `modify`. #[inline(always)] - pub fn modify(&self, f: F) + pub fn modify(&self, f: F) -> REG::Ux where for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W, { let bits = self.register.get(); - self.register.set( - f( - &R { - bits, - _reg: marker::PhantomData, - }, - &mut W { - bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP - | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, - _reg: marker::PhantomData, - }, - ) - .bits, - ); + let value = f( + &R { + bits, + _reg: marker::PhantomData, + }, + &mut W { + bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP, + _reg: marker::PhantomData, + }, + ) + .bits; + self.register.set(value); + value } /// Modifies the contents of the register by reading and then writing it From 394a38907efc3f74e7fae23e3735ea1a787271f6 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 3 Nov 2024 11:10:51 +0300 Subject: [PATCH 282/319] broken link --- ci/script.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ci/script.sh b/ci/script.sh index b0da0e4b..9f634458 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -589,7 +589,7 @@ main() { test_patched_stm32 stm32f7x3 test_patched_stm32 stm32g070 test_patched_stm32 stm32g473 - test_patched_stm32 stm32h753 + test_patched_stm32 stm32h743 test_patched_stm32 stm32l0x3 test_patched_stm32 stm32l162 test_patched_stm32 stm32l4x6 From df9ae4da6b649187e1195fd7b729da82d1ccb5a2 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 3 Nov 2024 09:57:28 +0300 Subject: [PATCH 283/319] add missing defmt impls --- CHANGELOG.md | 1 + src/generate/device.rs | 1 + src/generate/interrupt.rs | 2 ++ src/generate/riscv.rs | 13 ++++++++++++- 4 files changed, 16 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 88adc971..db74a328 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -8,6 +8,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] - Revert #711 +- Add `defmt` impls for `TryFromInterruptError`, riscv interrupt enums - Fix calculating `modifiedWriteValues` bitmasks with field arrays - Fix building without `yaml` feature - Compatibility with `riscv` 0.12 and `riscv-rt` 0.13 diff --git a/src/generate/device.rs b/src/generate/device.rs index fdecb54b..ec2ef6c6 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -217,6 +217,7 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Result { let mut mod_items = TokenStream::new(); + let defmt = config + .impl_defmt + .as_ref() + .map(|feature| quote!(#[cfg_attr(feature = #feature, derive(defmt::Format))])); + if let Some(c) = settings.riscv_config.as_ref() { if !c.core_interrupts.is_empty() { debug!("Rendering target-specific core interrupts"); @@ -48,6 +54,7 @@ pub fn render( mod_items.extend(quote! { /// Core interrupts. These interrupts are handled by the core itself. #[riscv::pac_enum(unsafe CoreInterruptNumber)] + #defmt #[derive(Debug, Clone, Copy, PartialEq, Eq)] pub enum CoreInterrupt { #(#interrupts)* @@ -77,6 +84,7 @@ pub fn render( mod_items.extend(quote! { /// Exception sources in the device. #[riscv::pac_enum(unsafe ExceptionNumber)] + #defmt #[derive(Debug, Clone, Copy, PartialEq, Eq)] pub enum Exception { #(#exceptions)* @@ -102,6 +110,7 @@ pub fn render( mod_items.extend(quote! { /// Priority levels in the device #[riscv::pac_enum(unsafe PriorityNumber)] + #defmt #[derive(Debug, Clone, Copy, PartialEq, Eq)] pub enum Priority { #(#priorities)* @@ -124,6 +133,7 @@ pub fn render( mod_items.extend(quote! { /// HARTs in the device #[riscv::pac_enum(unsafe HartIdNumber)] + #defmt #[derive(Debug, Clone, Copy, PartialEq, Eq)] pub enum Hart { #(#harts)* @@ -197,6 +207,7 @@ pub fn render( mod_items.extend(quote! { /// External interrupts. These interrupts are handled by the external peripherals. #[riscv::pac_enum(unsafe ExternalInterruptNumber)] + #defmt #[derive(Debug, Clone, Copy, PartialEq, Eq)] pub enum ExternalInterrupt { #(#interrupts)* From bfe48e24926ad1444b08b8dd2cf573f6c18013d3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?D=C3=A1niel=20Buga?= Date: Tue, 5 Nov 2024 14:28:33 +0100 Subject: [PATCH 284/319] Do not implement InterruptNumber for XtensaLx --- CHANGELOG.md | 1 + src/generate/interrupt.rs | 7 ------- 2 files changed, 1 insertion(+), 7 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index db74a328..6fdad6f3 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -22,6 +22,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - *breaking change* Return raw writtened value - Add `from_write`, `from_write_with_zero`, and `from_modify` register modifiers with generic return value +- `InterruptNumber` is no longer implemented for Xtensa peripheral interrupts ## [v0.33.5] - 2024-10-12 diff --git a/src/generate/interrupt.rs b/src/generate/interrupt.rs index eb5cb711..498bdece 100644 --- a/src/generate/interrupt.rs +++ b/src/generate/interrupt.rs @@ -308,13 +308,6 @@ pub fn render( root.extend(quote! { #interrupt_enum - unsafe impl xtensa_lx::interrupt::InterruptNumber for Interrupt { - #[inline(always)] - fn number(#self_token) -> u16 { - #nr_expr - } - } - /// TryFromInterruptError #defmt #[derive(Debug, Copy, Clone)] From 8b2f7addb26410ccfa4c3f1bcf5f508b26815902 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?D=C3=A1niel=20Buga?= Date: Tue, 5 Nov 2024 17:56:28 +0100 Subject: [PATCH 285/319] Remove unnecessary Espressif dependencies --- ci/script.sh | 17 ----------------- 1 file changed, 17 deletions(-) diff --git a/ci/script.sh b/ci/script.sh index 9f634458..3d71b080 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -613,23 +613,6 @@ main() { ;; Espressif) - echo '[dependencies.bare-metal]' >> $td/Cargo.toml - echo 'version = "1.0.0"' >> $td/Cargo.toml - - echo '[dependencies.riscv]' >> $td/Cargo.toml - echo 'version = "0.6.0"' >> $td/Cargo.toml - - echo '[dependencies.riscv-rt]' >> $td/Cargo.toml - echo 'version = "0.8.0"' >> $td/Cargo.toml - - echo '[dependencies.xtensa-lx]' >> $td/Cargo.toml - echo 'version = "0.6.0"' >> $td/Cargo.toml - echo 'features = ["esp32"]' >> $td/Cargo.toml - - echo '[dependencies.xtensa-lx-rt]' >> $td/Cargo.toml - echo 'version = "0.9.0"' >> $td/Cargo.toml - echo 'features = ["esp32"]' >> $td/Cargo.toml - test_svd_for_target riscv https://raw.githubusercontent.com/espressif/svd/main/svd/esp32c3.svd test_svd_for_target xtensa-lx https://raw.githubusercontent.com/espressif/svd/main/svd/esp32.svd From ae753d0eab2c494246fbda4a1d34fe5f1e2e92b0 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 3 Nov 2024 19:03:05 +0300 Subject: [PATCH 286/319] release 0.34.0 --- .github/workflows/ci.yml | 4 ++-- CHANGELOG.md | 7 ++++++- Cargo.lock | 2 +- Cargo.toml | 2 +- 4 files changed, 10 insertions(+), 5 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index a7ec6239..bfde64b9 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -153,11 +153,11 @@ jobs: - name: Cache uses: Swatinem/rust-cache@v2 with: - key: svdtools-0.2.3 + key: svdtools-0.3.19 - name: Install svdtools run: | - cargo install svdtools --version 0.2.3 --target-dir target + cargo install svdtools --version 0.3.19 --target-dir target - name: Run CI script run: | diff --git a/CHANGELOG.md b/CHANGELOG.md index 6fdad6f3..64475b5a 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.34.0] - 2024-11-05 + - Revert #711 - Add `defmt` impls for `TryFromInterruptError`, riscv interrupt enums - Fix calculating `modifiedWriteValues` bitmasks with field arrays @@ -922,7 +924,10 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.33.3...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.34.0...HEAD +[v0.34.0]: https://github.com/rust-embedded/svd2rust/compare/v0.33.5...v0.34.0 +[v0.33.5]: https://github.com/rust-embedded/svd2rust/compare/v0.33.4...v0.33.5 +[v0.33.4]: https://github.com/rust-embedded/svd2rust/compare/v0.33.3...v0.33.4 [v0.33.3]: https://github.com/rust-embedded/svd2rust/compare/v0.33.2...v0.33.3 [v0.33.2]: https://github.com/rust-embedded/svd2rust/compare/v0.33.1...v0.33.2 [v0.33.1]: https://github.com/rust-embedded/svd2rust/compare/v0.33.0...v0.33.1 diff --git a/Cargo.lock b/Cargo.lock index 3c834cc6..f235d118 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1207,7 +1207,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.33.5" +version = "0.34.0" dependencies = [ "anyhow", "clap", diff --git a/Cargo.toml b/Cargo.toml index 897e6848..1d3e1a93 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -17,7 +17,7 @@ keywords = ["svd", "embedded", "register", "map", "generator"] license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.33.5" +version = "0.34.0" readme = "README.md" rust-version = "1.74" From a371c1e4b939a60b8c3e60652eb86bd839919a27 Mon Sep 17 00:00:00 2001 From: "William D. Jones" Date: Mon, 11 Nov 2024 01:25:54 -0500 Subject: [PATCH 287/319] Do not emit inner attributes for MSP430 with make_mod option active. --- CHANGELOG.md | 2 ++ src/generate/device.rs | 3 ++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 64475b5a..56d6f7e9 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Fix MSP430 PAC inner attribute generation when used with the `-m` switch. + ## [v0.34.0] - 2024-11-05 - Revert #711 diff --git a/src/generate/device.rs b/src/generate/device.rs index ec2ef6c6..677b7e8d 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -41,7 +41,8 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result None, }; - if config.target == Target::Msp430 { + // make_mod option explicitly disables inner attributes. + if config.target == Target::Msp430 && !config.make_mod { out.extend(quote! { #![feature(abi_msp430_interrupt)] }); From dc9db51dae0d938f675648a3b6726ec1b0ae972a Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 11 Nov 2024 17:40:48 +0300 Subject: [PATCH 288/319] inline Settings into Config --- CHANGELOG.md | 1 + src/config.rs | 18 ++++++++++++++++-- src/generate/device.rs | 27 +++------------------------ src/generate/peripheral.rs | 2 +- src/generate/register.rs | 2 +- src/generate/riscv.rs | 5 ++--- src/lib.rs | 16 ++++++++++++++++ src/main.rs | 25 ++++++++++++++++--------- 8 files changed, 56 insertions(+), 40 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 56d6f7e9..2da11759 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Inline `Settings` into `Config`, add `settings_file` - Fix MSP430 PAC inner attribute generation when used with the `-m` switch. ## [v0.34.0] - 2024-11-05 diff --git a/src/config.rs b/src/config.rs index 5a48105c..b206d075 100644 --- a/src/config.rs +++ b/src/config.rs @@ -35,9 +35,10 @@ pub struct Config { pub ident_formats_theme: Option, pub field_names_for_enums: bool, pub base_address_shift: u64, - pub html_url: Option, /// Path to YAML file with chip-specific settings - pub settings: Option, + pub settings_file: Option, + /// Chip-specific settings + pub settings: Settings, } #[allow(clippy::upper_case_acronyms)] @@ -320,8 +321,21 @@ pub enum IdentFormatsTheme { #[non_exhaustive] /// Chip-specific settings pub struct Settings { + /// Path to chip HTML generated by svdtools + pub html_url: Option, /// RISC-V specific settings pub riscv_config: Option, } +impl Settings { + pub fn update_from(&mut self, source: Self) { + if source.html_url.is_some() { + self.html_url = source.html_url; + } + if source.riscv_config.is_some() { + self.riscv_config = source.riscv_config; + } + } +} + pub mod riscv; diff --git a/src/generate/device.rs b/src/generate/device.rs index 677b7e8d..d2b3ee9c 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -28,19 +28,6 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result { - let file = std::fs::read_to_string(settings).context("could not read settings file")?; - Some(serde_yaml::from_str(&file).context("could not parse settings file")?) - } - #[cfg(not(feature = "yaml"))] - Some(_) => { - return Err(anyhow::anyhow!("Support for yaml config files is not available because svd2rust was compiled without the yaml feature")); - } - None => None, - }; - // make_mod option explicitly disables inner attributes. if config.target == Target::Msp430 && !config.make_mod { out.extend(quote! { @@ -203,7 +190,7 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result { - if settings.is_none() { + if config.settings.riscv_config.is_none() { warn!("No settings file provided for RISC-V target. Using legacy interrupts rendering"); warn!("Please, consider migrating your PAC to riscv 0.12.0 or later"); out.extend(interrupt::render( @@ -214,12 +201,7 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result { @@ -241,10 +223,7 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Result } }; - let phtml = config.html_url.as_ref().map(|url| { + let phtml = config.settings.html_url.as_ref().map(|url| { let doc = format!("See peripheral [structure]({url}#{})", &path.peripheral); quote!(#[doc = ""] #[doc = #doc]) }); diff --git a/src/generate/register.rs b/src/generate/register.rs index 8ab2eeb3..f5abfa65 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -210,7 +210,7 @@ fn api_docs( doc.push_str("See [API](https://docs.rs/svd2rust/#read--modify--write-api)."); - if let Some(url) = config.html_url.as_ref() { + if let Some(url) = config.settings.html_url.as_ref() { let first_idx = if let Register::Array(_, dim) = ®ister { dim.indexes().next() } else { diff --git a/src/generate/riscv.rs b/src/generate/riscv.rs index 9436ef9d..fff9e970 100644 --- a/src/generate/riscv.rs +++ b/src/generate/riscv.rs @@ -20,7 +20,6 @@ pub fn is_riscv_peripheral(p: &Peripheral, s: &Settings) -> bool { pub fn render( peripherals: &[Peripheral], device_x: &mut String, - settings: &Settings, config: &Config, ) -> Result { let mut mod_items = TokenStream::new(); @@ -30,7 +29,7 @@ pub fn render( .as_ref() .map(|feature| quote!(#[cfg_attr(feature = #feature, derive(defmt::Format))])); - if let Some(c) = settings.riscv_config.as_ref() { + if let Some(c) = config.settings.riscv_config.as_ref() { if !c.core_interrupts.is_empty() { debug!("Rendering target-specific core interrupts"); writeln!(device_x, "/* Core interrupt sources and trap handlers */")?; @@ -216,7 +215,7 @@ pub fn render( } let mut riscv_peripherals = TokenStream::new(); - if let Some(c) = &settings.riscv_config { + if let Some(c) = config.settings.riscv_config.as_ref() { let harts = match c.harts.is_empty() { true => vec![], false => c diff --git a/src/lib.rs b/src/lib.rs index edec886e..b5d5c4ab 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -628,6 +628,22 @@ pub fn generate(input: &str, config: &Config) -> Result { use std::fmt::Write; let mut config = config.clone(); + + match config.settings_file.as_ref() { + #[cfg(feature = "yaml")] + Some(settings) => { + let file = std::fs::read_to_string(settings).context("could not read settings file")?; + config + .settings + .update_from(serde_yaml::from_str(&file).context("could not parse settings file")?) + } + #[cfg(not(feature = "yaml"))] + Some(_) => { + return Err(anyhow::anyhow!("Support for yaml config files is not available because svd2rust was compiled without the yaml feature")); + } + None => {} + }; + let mut ident_formats = match config.ident_formats_theme { Some(IdentFormatsTheme::Legacy) => IdentFormats::legacy_theme(), _ => IdentFormats::default_theme(), diff --git a/src/main.rs b/src/main.rs index 880bb4ab..27607bfc 100755 --- a/src/main.rs +++ b/src/main.rs @@ -101,7 +101,7 @@ fn run() -> Result<()> { .value_name("TOML_FILE"), ) .arg( - Arg::new("settings") + Arg::new("settings_file") .long("settings") .help("Target-specific settings YAML file") .action(ArgAction::Set) @@ -276,14 +276,6 @@ Allowed cases are `unchanged` (''), `pascal` ('p'), `constant` ('c') and `snake` Useful for soft-cores where the peripheral address range isn't necessarily fixed. Ignore this option if you are not building your own FPGA based soft-cores."), ) - .arg( - Arg::new("html_url") - .long("html-url") - .alias("html_url") - .help("Path to chip HTML generated by svdtools") - .action(ArgAction::Set) - .value_name("URL"), - ) .arg( Arg::new("log_level") .long("log") @@ -330,6 +322,21 @@ Ignore this option if you are not building your own FPGA based soft-cores."), } } + match config.settings_file.as_ref() { + #[cfg(feature = "yaml")] + Some(settings) => { + let file = std::fs::read_to_string(settings).context("could not read settings file")?; + config + .settings + .update_from(serde_yaml::from_str(&file).context("could not parse settings file")?) + } + #[cfg(not(feature = "yaml"))] + Some(_) => { + return Err(anyhow::anyhow!("Support for yaml config files is not available because svd2rust was compiled without the yaml feature")); + } + None => {} + }; + if let Some(file) = config.input.as_ref() { config.source_type = SourceType::from_path(file) } From 8776231b9de4a42fe929609b9d8c9a34379a9ba9 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 11 Nov 2024 18:51:21 +0300 Subject: [PATCH 289/319] crate_path --- CHANGELOG.md | 1 + src/config.rs | 41 +++++++++++++++++++++++++++++++++++++++++ src/util.rs | 10 +++++----- 3 files changed, 47 insertions(+), 5 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 2da11759..ceff291e 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Add `crate_path` setting - Inline `Settings` into `Config`, add `settings_file` - Fix MSP430 PAC inner attribute generation when used with the `-m` switch. diff --git a/src/config.rs b/src/config.rs index b206d075..dc4d0803 100644 --- a/src/config.rs +++ b/src/config.rs @@ -1,9 +1,14 @@ use anyhow::{bail, Result}; +use proc_macro2::Span; use std::{ collections::HashMap, ops::{Deref, DerefMut}, path::{Path, PathBuf}, + str::FromStr, }; +use syn::{punctuated::Punctuated, Ident}; + +use crate::util::path_segment; #[cfg_attr(feature = "serde", derive(serde::Deserialize), serde(default))] #[derive(Clone, PartialEq, Eq, Debug, Default)] @@ -323,6 +328,7 @@ pub enum IdentFormatsTheme { pub struct Settings { /// Path to chip HTML generated by svdtools pub html_url: Option, + pub crate_path: Option, /// RISC-V specific settings pub riscv_config: Option, } @@ -332,10 +338,45 @@ impl Settings { if source.html_url.is_some() { self.html_url = source.html_url; } + if source.crate_path.is_some() { + self.crate_path = source.crate_path; + } if source.riscv_config.is_some() { self.riscv_config = source.riscv_config; } } } +#[derive(Clone, PartialEq, Eq, Debug)] +pub struct CratePath(pub syn::Path); + +impl Default for CratePath { + fn default() -> Self { + let mut segments = Punctuated::new(); + segments.push(path_segment(Ident::new("crate", Span::call_site()))); + Self(syn::Path { + leading_colon: None, + segments, + }) + } +} + +#[cfg(feature = "serde")] +impl<'de> serde::Deserialize<'de> for CratePath { + fn deserialize(deserializer: D) -> std::result::Result + where + D: serde::Deserializer<'de>, + { + let s = String::deserialize(deserializer)?; + Ok(Self::from_str(&s).unwrap()) + } +} + +impl FromStr for CratePath { + type Err = syn::Error; + fn from_str(s: &str) -> std::result::Result { + syn::parse_str(&s).map(Self) + } +} + pub mod riscv; diff --git a/src/util.rs b/src/util.rs index 3520bcf3..b1d7ee45 100644 --- a/src/util.rs +++ b/src/util.rs @@ -293,18 +293,18 @@ pub fn block_path_to_ty( config: &Config, span: Span, ) -> TypePath { - let mut segments = Punctuated::new(); - segments.push(path_segment(Ident::new("crate", span))); - segments.push(path_segment(ident( + let mut path = config.settings.crate_path.clone().unwrap_or_default().0; + path.segments.push(path_segment(ident( &bpath.peripheral, config, "peripheral_mod", span, ))); for ps in &bpath.path { - segments.push(path_segment(ident(ps, config, "cluster_mod", span))); + path.segments + .push(path_segment(ident(ps, config, "cluster_mod", span))); } - type_path(segments) + TypePath { qself: None, path } } pub fn register_path_to_ty( From 5da48b9759f7acb57111194e9ae4993c77b34a2c Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Tue, 12 Nov 2024 16:50:18 +0300 Subject: [PATCH 290/319] release 0.35.0 --- CHANGELOG.md | 5 +- Cargo.lock | 612 +++++++++++++++++++++++++++------------ Cargo.toml | 2 +- src/config.rs | 2 +- src/generate/register.rs | 2 +- src/util.rs | 2 +- 6 files changed, 431 insertions(+), 194 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index ceff291e..1eb5bc5c 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.35.0] - 2024-11-12 + - Add `crate_path` setting - Inline `Settings` into `Config`, add `settings_file` - Fix MSP430 PAC inner attribute generation when used with the `-m` switch. @@ -928,7 +930,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.34.0...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.35.0...HEAD +[v0.35.0]: https://github.com/rust-embedded/svd2rust/compare/v0.34.0...v0.35.0 [v0.34.0]: https://github.com/rust-embedded/svd2rust/compare/v0.33.5...v0.34.0 [v0.33.5]: https://github.com/rust-embedded/svd2rust/compare/v0.33.4...v0.33.5 [v0.33.4]: https://github.com/rust-embedded/svd2rust/compare/v0.33.3...v0.33.4 diff --git a/Cargo.lock b/Cargo.lock index f235d118..9dc97544 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -4,18 +4,18 @@ version = 3 [[package]] name = "addr2line" -version = "0.22.0" +version = "0.24.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6e4503c46a5c0c7844e948c9a4d6acd9f50cccb4de1c48eb9e291ea17470c678" +checksum = "dfbe277e56a376000877090da837660b4427aad530e3028d44e0bffe4f89a1c1" dependencies = [ "gimli", ] [[package]] -name = "adler" -version = "1.0.2" +name = "adler2" +version = "2.0.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f26201604c87b1e01bd3d98f8d5d9a8fcbb815e8cedb41ffccbeb4bf593a35fe" +checksum = "512761e0bb2578dd7380c6baaa0f4ce03e84f95e960231d1dec8bf4d7d6e2627" [[package]] name = "aho-corasick" @@ -28,9 +28,9 @@ dependencies = [ [[package]] name = "anstream" -version = "0.6.15" +version = "0.6.18" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "64e15c1ab1f89faffbf04a634d5e1962e9074f2741eef6d97f3c4e322426d526" +checksum = "8acc5369981196006228e28809f761875c0327210a891e941f4c683b3a99529b" dependencies = [ "anstyle", "anstyle-parse", @@ -43,49 +43,49 @@ dependencies = [ [[package]] name = "anstyle" -version = "1.0.8" +version = "1.0.10" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = 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source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0c4b4d0bd25bd0b74681c0ad21497610ce1b7c91b1022cd21c80c6fbdd9476b0" +checksum = "ace50bade8e6234aa140d9a2f552bbee1db4d353f69b8217bc503490fc1a9f26" [[package]] name = "backtrace" -version = "0.3.73" +version = "0.3.74" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5cc23269a4f8976d0a4d2e7109211a419fe30e8d88d677cd60b6bc79c5732e0a" +checksum = "8d82cb332cdfaed17ae235a638438ac4d4839913cc2af585c3c6746e8f8bee1a" dependencies = [ "addr2line", - "cc", "cfg-if", "libc", "miniz_oxide", "object", "rustc-demangle", + "windows-targets 0.52.6", ] [[package]] @@ -151,15 +151,15 @@ checksum = "79296716171880943b8470b5f8d03aa55eb2e645a4874bdbb28adb49162e012c" [[package]] name = "bytes" -version = "1.7.1" +version = "1.8.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8318a53db07bb3f8dca91a600466bdb3f2eaadeedfdbcf02e1accbad9271ba50" +checksum = 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-checksum = "216aec2b177652e3846684cbfe25c9964d18ec45234f0f5da5157b207ed1aab6" +checksum = "19bc80abd44e4bed93ca373a0704ccbd1b710dc5749406201bb018272808dc54" dependencies = [ "anstream", "anstyle", @@ -194,14 +194,14 @@ dependencies = [ [[package]] name = "clap_derive" -version = "4.5.13" +version = "4.5.18" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "501d359d5f3dcaf6ecdeee48833ae73ec6e42723a1e52419c79abf9507eec0a0" +checksum = "4ac6a0c7b1a9e9a5186361f67dfa1b88213572f427fb9ab038efb2bd8c582dab" dependencies = [ "heck", "proc-macro2", "quote", - "syn 2.0.75", + "syn 2.0.87", ] [[package]] @@ -212,15 +212,15 @@ checksum = "1462739cb27611015575c0c11df5df7601141071f07518d56fcc1be504cbec97" [[package]] name = "colorchoice" -version = "1.0.2" +version = "1.0.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d3fd119d74b830634cea2a0f58bbd0d54540518a14397557951e79340abc28c0" +checksum = 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source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5f12335488a2f3b0a83b14edad48dca9879ce89b2edd10e80237e4e852dd645e" +checksum = "64d1ec885c64d0457d564db4ec299b2dae3f9c02808b8ad9c3a089c591b18033" dependencies = [ "proc-macro2", - "syn 2.0.75", + "syn 2.0.87", ] [[package]] name = "proc-macro2" -version = "1.0.86" +version = "1.0.89" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5e719e8df665df0d1c8fbfd238015744736151d4445ec0836b8e628aae103b77" +checksum = "f139b0662de085916d1fb67d2b4169d1addddda1919e696f3252b740b629986e" dependencies = [ "unicode-ident", ] [[package]] name = "quote" -version = "1.0.36" +version = "1.0.37" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0fa76aaf39101c457836aec0ce2316dbdc3ab723cdda1c6bd4e6ad4208acaca7" +checksum = "b5b9d34b8991d19d98081b46eacdd8eb58c6f2b201139f7c5f643cc155a633af" dependencies = [ "proc-macro2", ] @@ -903,14 +1049,14 @@ dependencies = [ [[package]] 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name = "serde_derive" -version = "1.0.208" +version = "1.0.215" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "24008e81ff7613ed8e5ba0cfaf24e2c2f1e5b8a0495711e44fcd4882fca62bcf" +checksum = "ad1e866f866923f252f05c889987993144fb74e722403468a4ebd70c3cd756c0" dependencies = [ "proc-macro2", "quote", - "syn 2.0.75", + "syn 2.0.87", ] [[package]] name = "serde_json" -version = "1.0.125" +version = "1.0.132" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "83c8e735a073ccf5be70aa8066aa984eaf2fa000db6c8d0100ae605b366d31ed" +checksum = "d726bfaff4b320266d395898905d0eba0345aae23b54aee3a737e260fd46db03" dependencies = [ "itoa", "memchr", @@ -1091,9 +1237,9 @@ dependencies = [ [[package]] name = "serde_spanned" -version = "0.6.7" +version = "0.6.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "eb5b1b31579f3811bf615c144393417496f152e12ac8b7663bf664f4a815306d" +checksum = "87607cb1398ed59d48732e575a4c28a7a8ebf2454b964fe3f224f2afc07909e1" dependencies = [ "serde", ] @@ -1169,6 +1315,12 @@ dependencies = [ "windows-sys 0.52.0", ] +[[package]] +name = "stable_deref_trait" +version = "1.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "a8f112729512f8e442d81f95a8a7ddf2b7c6b8a1a6f509a95864142b30cab2d3" + [[package]] name = "strsim" version = "0.10.0" @@ -1207,7 +1359,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.34.0" +version = "0.35.0" dependencies = [ "anyhow", "clap", @@ -1223,7 +1375,7 @@ dependencies = [ "serde_yaml", "svd-parser", "svd-rs", - "syn 2.0.75", + "syn 2.0.87", "thiserror", "url", ] @@ -1242,7 +1394,7 @@ dependencies = [ "serde_yaml", "shell-words", "svd2rust", - "syn 2.0.75", + "syn 2.0.87", "thiserror", "tracing", "tracing-subscriber", @@ -1263,9 +1415,9 @@ dependencies = [ [[package]] name = "syn" -version = "2.0.75" +version = "2.0.87" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f6af063034fc1935ede7be0122941bafa9bacb949334d090b77ca98b5817c7d9" +checksum = "25aa4ce346d03a6dcd68dd8b4010bcb74e54e62c90c573f394c46eae99aba32d" dependencies = [ "proc-macro2", "quote", @@ -1278,6 +1430,17 @@ version = "0.1.2" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "2047c6ded9c721764247e62cd3b03c09ffc529b2ba5b10ec482ae507a4a70160" +[[package]] +name = "synstructure" +version = "0.13.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c8af7666ab7b6390ab78131fb5b0fce11d6b7a6951602017c35fa82800708971" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.87", +] + [[package]] name = "system-configuration" version = "0.5.1" @@ -1301,9 +1464,9 @@ dependencies = [ [[package]] name = "tempfile" -version = "3.12.0" +version = "3.14.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "04cbcdd0c794ebb0d4cf35e88edd2f7d2c4c3e9a5a6dab322839b321c6a87a64" +checksum = "28cce251fcbc87fac86a866eeb0d6c2d536fc16d06f184bb61aeae11aa4cee0c" dependencies = [ "cfg-if", "fastrand", @@ -1314,22 +1477,22 @@ dependencies = [ [[package]] name = "thiserror" -version = "1.0.63" +version = "1.0.69" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c0342370b38b6a11b6cc11d6a805569958d54cfa061a29969c3b5ce2ea405724" +checksum = "b6aaf5339b578ea85b50e080feb250a3e8ae8cfcdff9a461c9ec2904bc923f52" dependencies = [ "thiserror-impl", ] [[package]] name = "thiserror-impl" -version = "1.0.63" +version = "1.0.69" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a4558b58466b9ad7ca0f102865eccc95938dca1a74a856f2b57b6629050da261" +checksum = "4fee6c4efc90059e10f81e6d42c60a18f76588c3d74cb83a0b242a2b6c7504c1" dependencies = [ "proc-macro2", "quote", - "syn 2.0.75", + "syn 2.0.87", ] [[package]] @@ -1343,25 +1506,20 @@ dependencies = [ ] [[package]] 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"registry+https://github.com/rust-lang/crates.io-index" +checksum = "c8232dd3cdaed5356e0f716d285e4b40b932ac434100fe9b7e0e8e935b9e6246" + +[[package]] +name = "utf8_iter" +version = "1.0.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b6c140620e7ffbb22c2dee59cafe6084a59b5ffc27a8859a5f0d494b5d52b6be" + [[package]] name = "utf8parse" version = "0.2.2" @@ -1576,9 +1731,9 @@ checksum = "9c8d87e72b64a3b4db28d11ce29237c246188f4f51057d65a7eab63b7987e423" [[package]] name = "wasm-bindgen" -version = "0.2.93" +version = "0.2.95" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a82edfc16a6c469f5f44dc7b571814045d60404b55a0ee849f9bcfa2e63dd9b5" +checksum = "128d1e363af62632b8eb57219c8fd7877144af57558fb2ef0368d0087bddeb2e" dependencies = [ "cfg-if", "once_cell", @@ -1587,24 +1742,24 @@ dependencies = [ [[package]] name = "wasm-bindgen-backend" -version = "0.2.93" +version = "0.2.95" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "9de396da306523044d3302746f1208fa71d7532227f15e347e2d93e4145dd77b" +checksum = "cb6dd4d3ca0ddffd1dd1c9c04f94b868c37ff5fac97c30b97cff2d74fce3a358" dependencies = [ "bumpalo", "log", "once_cell", "proc-macro2", "quote", - "syn 2.0.75", + "syn 2.0.87", "wasm-bindgen-shared", ] [[package]] name = "wasm-bindgen-futures" -version = "0.4.43" +version = "0.4.45" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "61e9300f63a621e96ed275155c108eb6f843b6a26d053f122ab69724559dc8ed" +checksum = "cc7ec4f8827a71586374db3e87abdb5a2bb3a15afed140221307c3ec06b1f63b" dependencies = [ "cfg-if", "js-sys", @@ -1614,9 +1769,9 @@ dependencies = [ [[package]] name = "wasm-bindgen-macro" -version = "0.2.93" +version = "0.2.95" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "585c4c91a46b072c92e908d99cb1dcdf95c5218eeb6f3bf1efa991ee7a68cccf" +checksum = "e79384be7f8f5a9dd5d7167216f022090cf1f9ec128e6e6a482a2cb5c5422c56" dependencies = [ "quote", "wasm-bindgen-macro-support", @@ -1624,28 +1779,28 @@ dependencies = [ [[package]] name = "wasm-bindgen-macro-support" -version = "0.2.93" +version = "0.2.95" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "afc340c74d9005395cf9dd098506f7f44e38f2b4a21c6aaacf9a105ea5e1e836" +checksum = "26c6ab57572f7a24a4985830b120de1594465e5d500f24afe89e16b4e833ef68" dependencies = [ "proc-macro2", "quote", - "syn 2.0.75", + "syn 2.0.87", "wasm-bindgen-backend", "wasm-bindgen-shared", ] [[package]] name = "wasm-bindgen-shared" -version = "0.2.93" +version = "0.2.95" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c62a0a307cb4a311d3a07867860911ca130c3494e8c2719593806c08bc5d0484" +checksum = "65fc09f10666a9f147042251e0dda9c18f166ff7de300607007e96bdebc1068d" [[package]] name = "web-sys" -version = "0.3.70" +version = "0.3.72" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "26fdeaafd9bd129f65e7c031593c24d62186301e0c72c8978fa1678be7d532c0" +checksum = "f6488b90108c040df0fe62fa815cbdee25124641df01814dd7282749234c6112" dependencies = [ "js-sys", "wasm-bindgen", @@ -1666,9 +1821,9 @@ dependencies = [ [[package]] name = "wildmatch" -version = "2.3.4" +version = "2.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3928939971918220fed093266b809d1ee4ec6c1a2d72692ff6876898f3b16c19" +checksum = "68ce1ab1f8c62655ebe1350f589c61e505cf94d385bc6a12899442d9081e71fd" [[package]] name = "winapi" @@ -1858,3 +2013,82 @@ dependencies = [ "cfg-if", "windows-sys 0.48.0", ] + +[[package]] +name = "write16" +version = "1.0.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d1890f4022759daae28ed4fe62859b1236caebfc61ede2f63ed4e695f3f6d936" + +[[package]] +name = "writeable" +version = "0.5.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1e9df38ee2d2c3c5948ea468a8406ff0db0b29ae1ffde1bcf20ef305bcc95c51" + +[[package]] +name = "yoke" +version = "0.7.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "6c5b1314b079b0930c31e3af543d8ee1757b1951ae1e1565ec704403a7240ca5" +dependencies = [ + "serde", + "stable_deref_trait", + "yoke-derive", + "zerofrom", +] + +[[package]] +name = "yoke-derive" +version = "0.7.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "28cc31741b18cb6f1d5ff12f5b7523e3d6eb0852bbbad19d73905511d9849b95" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.87", + "synstructure", +] + +[[package]] +name = "zerofrom" +version = "0.1.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "91ec111ce797d0e0784a1116d0ddcdbea84322cd79e5d5ad173daeba4f93ab55" +dependencies = [ + "zerofrom-derive", +] + +[[package]] +name = "zerofrom-derive" +version = "0.1.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0ea7b4a3637ea8669cedf0f1fd5c286a17f3de97b8dd5a70a6c167a1730e63a5" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.87", + "synstructure", +] + +[[package]] +name = "zerovec" +version = "0.10.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "aa2b893d79df23bfb12d5461018d408ea19dfafe76c2c7ef6d4eba614f8ff079" +dependencies = [ + "yoke", + "zerofrom", + "zerovec-derive", +] + +[[package]] +name = "zerovec-derive" +version = "0.10.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "6eafa6dfb17584ea3e2bd6e76e0cc15ad7af12b09abdd1ca55961bed9b1063c6" +dependencies = [ + "proc-macro2", + "quote", + "syn 2.0.87", +] diff --git a/Cargo.toml b/Cargo.toml index 1d3e1a93..0acbc255 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -17,7 +17,7 @@ keywords = ["svd", "embedded", "register", "map", "generator"] license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.34.0" +version = "0.35.0" readme = "README.md" rust-version = "1.74" diff --git a/src/config.rs b/src/config.rs index dc4d0803..ca6ced37 100644 --- a/src/config.rs +++ b/src/config.rs @@ -375,7 +375,7 @@ impl<'de> serde::Deserialize<'de> for CratePath { impl FromStr for CratePath { type Err = syn::Error; fn from_str(s: &str) -> std::result::Result { - syn::parse_str(&s).map(Self) + syn::parse_str(s).map(Self) } } diff --git a/src/generate/register.rs b/src/generate/register.rs index f5abfa65..92322ebe 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -259,7 +259,7 @@ pub fn render_register_mod( rsize.next_power_of_two() }; let rty = rsize.to_ty()?; - let description = util::respace(®ister.description.as_deref().unwrap_or_else(|| { + let description = util::respace(register.description.as_deref().unwrap_or_else(|| { warn!("Missing description for register {rname}"); "" })); diff --git a/src/util.rs b/src/util.rs index b1d7ee45..5c56f3c3 100644 --- a/src/util.rs +++ b/src/util.rs @@ -180,7 +180,7 @@ pub fn escape_brackets(s: &str) -> String { /// Escape basic html tags and brackets pub fn escape_special_chars(s: &str) -> Cow<'_, str> { if s.contains('[') { - escape_brackets(&s).into() + escape_brackets(s).into() } else { s.into() } From ca77c0c0e2beff4d5f16362b5a7f9b6905e24b7d Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Wed, 11 Dec 2024 23:52:25 +0300 Subject: [PATCH 291/319] edition=2021 --- ci/script.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ci/script.sh b/ci/script.sh index 3d71b080..6524bb60 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -39,7 +39,7 @@ main() { esac # test crate - cargo init --lib --name foo $td + cargo init --lib --name foo --edition 2021 $td echo 'cortex-m = "0.7.7"' >> $td/Cargo.toml echo 'cortex-m-rt = "0.7.3"' >> $td/Cargo.toml echo 'vcell = "0.1.3"' >> $td/Cargo.toml From 8dec06c55ea84791f208fd84fea7428c4c6f3eb2 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 14 Dec 2024 19:57:43 +0300 Subject: [PATCH 292/319] changelog --- CHANGELOG.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 1eb5bc5c..9ee8ba46 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Force using rust edition 2021 in CI + ## [v0.35.0] - 2024-11-12 - Add `crate_path` setting From a25d22c57afcaee4cba4ce9691b3418c2e16f2aa Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Mon, 13 Jan 2025 12:48:19 +0100 Subject: [PATCH 293/319] lifetime ellision for FieldWriter to fix clippy warning --- src/generate/generic.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/generate/generic.rs b/src/generate/generic.rs index 706b7e12..19c8230b 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -337,7 +337,7 @@ pub struct RangeTo; /// Write field Proxy pub type FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> = raw::FieldWriter<'a, REG, WI, FI, Safety>; -impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety> +impl FieldWriter<'_, REG, WI, FI, Safety> where REG: Writable + RegisterSpec, FI: FieldSpec, From 0aa3310904fb5015672cd5381e618319cc7f0506 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Mon, 13 Jan 2025 18:11:27 +0300 Subject: [PATCH 294/319] fix F723 url --- ci/script.sh | 2 +- ci/svd2rust-regress/tests.yml | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/ci/script.sh b/ci/script.sh index 6524bb60..01c05a89 100755 --- a/ci/script.sh +++ b/ci/script.sh @@ -586,7 +586,7 @@ main() { test_patched_stm32 stm32f103 test_patched_stm32 stm32f411 test_patched_stm32 stm32f469 - test_patched_stm32 stm32f7x3 + test_patched_stm32 stm32f723 test_patched_stm32 stm32g070 test_patched_stm32 stm32g473 test_patched_stm32 stm32h743 diff --git a/ci/svd2rust-regress/tests.yml b/ci/svd2rust-regress/tests.yml index 6ed7ebbe..06501c71 100644 --- a/ci/svd2rust-regress/tests.yml +++ b/ci/svd2rust-regress/tests.yml @@ -1863,8 +1863,8 @@ svd_url: https://stm32-rs.github.io/stm32-rs/stm32f469.svd.patched - arch: cortex-m mfgr: STMicro - chip: STM32F7x3 - svd_url: https://stm32-rs.github.io/stm32-rs/stm32f7x3.svd.patched + chip: STM32F723 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f723.svd.patched - arch: cortex-m mfgr: STMicro chip: STM32G070 From 2ad6e0cb33c794ce99701520cbbeb3f470f5fdc9 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Tue, 14 Jan 2025 18:05:17 +0100 Subject: [PATCH 295/319] changelog --- CHANGELOG.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 9ee8ba46..c07b8cae 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -8,6 +8,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] - Force using rust edition 2021 in CI +- Added lifetime ellision for `FieldWriter` where the explicit lifetimes are not necessary, which + fixes the `clippy::needless_lifetimes` warning on rustc 1.84 ## [v0.35.0] - 2024-11-12 From f08aadf80114742df192ff63eafd9bc87458a36b Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Mon, 13 Jan 2025 12:46:44 +0100 Subject: [PATCH 296/319] svd2rust-regress fixes and update of its docs --- CHANGELOG.md | 1 + ci/svd2rust-regress/README.md | 49 ++++------------------------- ci/svd2rust-regress/src/diff.rs | 6 ++-- ci/svd2rust-regress/src/main.rs | 2 +- ci/svd2rust-regress/src/svd_test.rs | 15 ++++++--- 5 files changed, 22 insertions(+), 51 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index c07b8cae..89cbd574 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -10,6 +10,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Force using rust edition 2021 in CI - Added lifetime ellision for `FieldWriter` where the explicit lifetimes are not necessary, which fixes the `clippy::needless_lifetimes` warning on rustc 1.84 +- Some fixes for the `svd2rust-regress` tool and update of its documentation ## [v0.35.0] - 2024-11-12 diff --git a/ci/svd2rust-regress/README.md b/ci/svd2rust-regress/README.md index 5c623cc7..e4f8da17 100644 --- a/ci/svd2rust-regress/README.md +++ b/ci/svd2rust-regress/README.md @@ -40,36 +40,11 @@ If all test cases passed, the return code will be `0`. If any test cases failed, ### Options -Here are the options for running `svd2rust-regress`: - +You can display options for `svd2rust-regress` by running: ```text -svd2rust-regress 0.1.0 -James Munns :The svd2rust developers - -USAGE: - svd2rust-regress [FLAGS] [OPTIONS] - -FLAGS: - -b, --bad-tests Include tests expected to fail (will cause a non-zero return code) - -f, --format Enable formatting with `rustfmt` - -h, --help Prints help information - -l, --long-test Run a long test (it's very long) - -V, --version Prints version information - -v, --verbose Use verbose output - -OPTIONS: - -a, --architecture - Filter by architecture, case sensitive, may be combined with other filters Options are: "CortexM", "RiscV", "Msp430", "Mips" and "XtensaLX" - -p, --svd2rust-path - Path to an `svd2rust` binary, relative or absolute. Defaults to `target/release/svd2rust[.exe]` of this - repository (which must be already built) - -c, --chip Filter by chip name, case sensitive, may be combined with other filters - -m, --manufacturer - Filter by manufacturer, case sensitive, may be combined with other filters - - --rustfmt_bin_path - Path to an `rustfmt` binary, relative or absolute. Defaults to `$(rustup which rustfmt)` +# in the ci/svd2rust-regress folder +cargo regress help ``` ### Filters @@ -80,28 +55,16 @@ For example, to run all `RiscV` tests: ```bash # in the ci/svd2rust-regress folder -cargo run --release -- -a RiscV - Finished release [optimized] target(s) in 0.0 secs - Running `target/release/svd2rust-regress -a RiscV` -Passed: si_five_e310x - 7 seconds +cargo regress tests --architecture riscv ``` To run against any chip named `MB9AF12xK`: ```bash -cargo run --release -- --long-test -c MB9AF12xK - Finished release [optimized] target(s) in 0.0 secs - Running `target/release/svd2rust-regress --long-test -c MB9AF12xK` -Passed: spansion_mb9af12x_k - 23 seconds -Passed: fujitsu_mb9af12x_k - 25 seconds +cargo regress test -c MB9AF12xK ``` To run against specifically the `Fujitsu` `MB9AF12xK`: ```bash -cargo run --release -- --long-test -c MB9AF12xK -m Fujitsu - Finished release [optimized] target(s) in 0.0 secs - Running `target/release/svd2rust-regress --long-test -c MB9AF12xK -m Fujitsu` -Passed: fujitsu_mb9af12x_k - 19 seconds +cargo regress test -c MB9AF12xK -m Fujitsu ``` - -Note that you may have to pass `--long-test` to enable some chips as they are known to take a long time to compile. diff --git a/ci/svd2rust-regress/src/diff.rs b/ci/svd2rust-regress/src/diff.rs index 3220157f..d155c56a 100644 --- a/ci/svd2rust-regress/src/diff.rs +++ b/ci/svd2rust-regress/src/diff.rs @@ -257,8 +257,8 @@ impl Diffing { Ok([baseline, current]) } - fn get_source_and_command<'s>(&'s self) -> [Option<(Source, Command)>; 2] { - let split = |s: &'s str| -> (Source, Command) { + fn get_source_and_command(&self) -> [Option<(Source, Command)>; 2] { + fn split(s: &str) -> (Source, Command) { if let Some(s) = s.strip_prefix('@') { if let Some((source, cmd)) = s.split_once(' ') { (Some(source), Some(cmd.trim())) @@ -268,7 +268,7 @@ impl Diffing { } else { (None, Some(s.trim())) } - }; + } let baseline = self.baseline.as_deref().map(split); diff --git a/ci/svd2rust-regress/src/main.rs b/ci/svd2rust-regress/src/main.rs index 4d32f1ac..4d0fdf77 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/ci/svd2rust-regress/src/main.rs @@ -138,7 +138,7 @@ pub struct Test { #[arg(long = "svd", group = "svd_source")] /// Path to SVD file to test pub svd_file: Option, - #[arg(long, group = "svd_source")] + #[arg(short = 'c', long, group = "svd_source")] /// Chip to use, use `--url` or `--svd-file` for another way to specify svd pub chip: Option, diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 30033dbd..97de00da 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -11,17 +11,22 @@ use std::{ path::Path, }; -const CRATES_ALL: &[&str] = &["critical-section = \"1.0\"", "vcell = \"0.1.2\""]; +const CRATES_ALL: &[&str] = &[ + "critical-section = {version = \"1.0\", optional = true}", + "vcell = \"0.1.2\"", +]; const CRATES_MSP430: &[&str] = &["msp430 = \"0.4.0\"", "msp430-rt = \"0.4.0\""]; const CRATES_ATOMICS: &[&str] = &["portable-atomic = { version = \"0.3.16\", default-features = false }"]; -const CRATES_CORTEX_M: &[&str] = &["cortex-m = \"0.7.6\"", "cortex-m-rt = \"0.6.13\""]; +const CRATES_CORTEX_M: &[&str] = &["cortex-m = \"0.7.6\"", "cortex-m-rt = \"0.7\""]; const CRATES_RISCV: &[&str] = &["riscv = \"0.12.1\"", "riscv-rt = \"0.13.0\""]; const CRATES_XTENSALX: &[&str] = &["xtensa-lx-rt = \"0.9.0\"", "xtensa-lx = \"0.6.0\""]; const CRATES_MIPS: &[&str] = &["mips-mcu = \"0.1.0\""]; const PROFILE_ALL: &[&str] = &["[profile.dev]", "incremental = false"]; const FEATURES_ALL: &[&str] = &["[features]"]; +const FEATURES_CORTEX_M: &[&str] = &["rt = [\"cortex-m-rt/device\"]"]; const FEATURES_XTENSALX: &[&str] = &["default = [\"xtensa-lx/esp32\", \"xtensa-lx-rt/esp32\"]"]; +const WORKSPACE_EXCLUDE: &[&str] = &["[workspace]"]; fn path_helper_base(base: &Path, input: &[&str]) -> PathBuf { input @@ -210,10 +215,10 @@ impl TestCase { let svd_toml = path_helper_base(&chip_dir, &["Cargo.toml"]); let mut file = OpenOptions::new() - .write(true) .append(true) .open(svd_toml) .with_context(|| "Failed to open Cargo.toml for appending")?; + let crates = CRATES_ALL .iter() .chain(match &self.arch { @@ -233,8 +238,10 @@ impl TestCase { .chain(FEATURES_ALL.iter()) .chain(match &self.arch { Target::XtensaLX => FEATURES_XTENSALX.iter(), + Target::CortexM => FEATURES_CORTEX_M.iter(), _ => [].iter(), - }); + }) + .chain(WORKSPACE_EXCLUDE.iter()); for c in crates { writeln!(file, "{}", c).with_context(|| "Failed to append to file!")?; } From 40dc8caff952f3027d7d7de0074af121a285af09 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Wed, 15 Jan 2025 17:19:45 +0100 Subject: [PATCH 297/319] more clippy fixes --- CHANGELOG.md | 2 ++ ci/svd2rust-regress/src/github.rs | 2 +- src/generate/peripheral.rs | 2 +- src/generate/register.rs | 2 +- 4 files changed, 5 insertions(+), 3 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 89cbd574..91612ace 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -11,6 +11,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Added lifetime ellision for `FieldWriter` where the explicit lifetimes are not necessary, which fixes the `clippy::needless_lifetimes` warning on rustc 1.84 - Some fixes for the `svd2rust-regress` tool and update of its documentation +- Other internal clippy fixes for `clippy::manual_div_ceil`, `clippy::nonminimal_bool` and + `clippy::needless_lifetimes` ## [v0.35.0] - 2024-11-12 diff --git a/ci/svd2rust-regress/src/github.rs b/ci/svd2rust-regress/src/github.rs index 1a5b0ecb..5dc68508 100644 --- a/ci/svd2rust-regress/src/github.rs +++ b/ci/svd2rust-regress/src/github.rs @@ -93,7 +93,7 @@ fn find_executable(dir: &Path, begins: &str) -> Result, anyhow:: .path() .extension() .is_some_and(|s| s == std::env::consts::EXE_EXTENSION)) - && !entry.path().extension().is_some_and(|s| s == "gz") + && entry.path().extension().is_none_or(|s| s != "gz") { Ok(Some(entry.path())) } else { diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 40372906..5fd01178 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -411,7 +411,7 @@ impl FieldRegions { let mut indices = Vec::new(); let rbf_start = rbf.offset; - let rbf_end = rbf_start + (rbf.size + BITS_PER_BYTE - 1) / BITS_PER_BYTE; + let rbf_end = rbf_start + rbf.size.div_ceil(BITS_PER_BYTE); // The region that we're going to insert let mut new_region = Region { diff --git a/src/generate/register.rs b/src/generate/register.rs index 92322ebe..56e72472 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -519,7 +519,7 @@ pub enum EV<'a> { Derived(&'a EnumeratedValues, &'a EnumPath), } -impl<'a> EV<'a> { +impl EV<'_> { fn values(&self) -> &EnumeratedValues { match self { Self::New(e) | Self::Derived(e, _) => e, From cc1bffbb0c2af8b031295d5bea3c11cc18170f50 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 31 Jan 2025 09:57:34 +0300 Subject: [PATCH 298/319] normalize paths --- .github/workflows/ci.yml | 4 ++-- .github/workflows/release.yml | 6 +++--- CHANGELOG.md | 1 + src/util.rs | 12 ++++++++---- 4 files changed, 14 insertions(+), 9 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index bfde64b9..0244ff3b 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -197,7 +197,7 @@ jobs: runs-on: windows-latest suffix: .exe steps: - - uses: actions/checkout@v3 + - uses: actions/checkout@v4 - uses: dtolnay/rust-toolchain@master with: @@ -213,7 +213,7 @@ jobs: - run: mv target/${{ matrix.target }}/release/svd2rust${{ matrix.suffix || '' }} svd2rust-${{ matrix.target }}-$(git rev-parse --short HEAD)${{ matrix.suffix || '' }} - name: Upload artifact - uses: actions/upload-artifact@v3 + uses: actions/upload-artifact@v4 with: name: artifact-svd2rust-${{ matrix.target }} path: svd2rust-${{ matrix.target }}* diff --git a/.github/workflows/release.yml b/.github/workflows/release.yml index 77ebdd1b..c9ce19be 100644 --- a/.github/workflows/release.yml +++ b/.github/workflows/release.yml @@ -52,7 +52,7 @@ jobs: if: ${{ matrix.os == 'windows-latest' }} run: mv target/${{ matrix.target }}/release/svd2rust${{ matrix.suffix }} svd2rust-${{ matrix.target }}${{ matrix.suffix }} - - uses: actions/upload-artifact@v3 + - uses: actions/upload-artifact@v4 with: name: svd2rust-${{ matrix.target }} path: svd2rust-${{ matrix.target }}${{ matrix.suffix }} @@ -63,7 +63,7 @@ jobs: needs: [build] steps: - uses: actions/checkout@v4 - - uses: actions/download-artifact@v3 + - uses: actions/download-artifact@v4 with: path: artifacts - run: ls -R ./artifacts @@ -76,7 +76,7 @@ jobs: with: version: ${{ (github.ref_type == 'tag' && github.ref_name) || 'Unreleased' }} - - uses: softprops/action-gh-release@v1 + - uses: softprops/action-gh-release@v2 with: tag_name: ${{ steps.changelog-reader.outputs.version }} name: ${{ (github.ref_type == 'tag' && steps.changelog-reader.outputs.version) || format('Prereleased {0}', env.CURRENT_DATE) }} diff --git a/CHANGELOG.md b/CHANGELOG.md index 91612ace..312c949a 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Fix reexport path when "%s" inside "derivedFrom" - Force using rust edition 2021 in CI - Added lifetime ellision for `FieldWriter` where the explicit lifetimes are not necessary, which fixes the `clippy::needless_lifetimes` warning on rustc 1.84 diff --git a/src/util.rs b/src/util.rs index 5c56f3c3..f97cb378 100644 --- a/src/util.rs +++ b/src/util.rs @@ -295,14 +295,18 @@ pub fn block_path_to_ty( ) -> TypePath { let mut path = config.settings.crate_path.clone().unwrap_or_default().0; path.segments.push(path_segment(ident( - &bpath.peripheral, + &bpath.peripheral.remove_dim(), config, "peripheral_mod", span, ))); for ps in &bpath.path { - path.segments - .push(path_segment(ident(ps, config, "cluster_mod", span))); + path.segments.push(path_segment(ident( + &ps.remove_dim(), + config, + "cluster_mod", + span, + ))); } TypePath { qself: None, path } } @@ -314,7 +318,7 @@ pub fn register_path_to_ty( ) -> TypePath { let mut p = block_path_to_ty(&rpath.block, config, span); p.path.segments.push(path_segment(ident( - &rpath.name, + &rpath.name.remove_dim(), config, "register_mod", span, From 17c74f36eceaed33af5fadf16e2c83d0b573fd75 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Sun, 2 Feb 2025 12:43:47 +0100 Subject: [PATCH 299/319] Update cargo regress tool and move CI - CI now uses the svd2rust-regress tool instead of a bash script - Fixed a bug where the workspace TOML file was still updated and changed when running the regression tool - Upgrade `portable-atomic` version for CI checks to 1. - Introduce MSRV v1.82.0 for the regress tool. - Allow passing multiple passthrough options to the regress tool. - Allow passing options using the test YAML file using the `opts` key - Allow specifying a suffix for test cases inside the YAML file using the `suffix` key. This can be used to resolve name duplications. - Allow skipping the `cargo check` for test cases with a `skip_check` key inside the YAML file --- .github/workflows/ci.yml | 102 +- ci/svd2rust-regress/Cargo.toml | 1 + ci/svd2rust-regress/all-tests.yml | 2139 ++++++++++++++++++++++++++ ci/svd2rust-regress/src/diff.rs | 13 +- ci/svd2rust-regress/src/main.rs | 38 +- ci/svd2rust-regress/src/svd_test.rs | 298 ++-- ci/svd2rust-regress/src/tests.rs | 13 +- ci/svd2rust-regress/tests.yml | 2202 +++++---------------------- src/util.rs | 2 +- 9 files changed, 2810 insertions(+), 1998 deletions(-) create mode 100644 ci/svd2rust-regress/all-tests.yml diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 0244ff3b..c7e7756e 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -54,53 +54,47 @@ jobs: runs-on: ubuntu-latest needs: [check] strategy: + fail-fast: false matrix: - # Options are all, none, strict and const include: - - { rust: stable, vendor: Atmel, options: all } - - { rust: stable, vendor: Atmel, options: "" } - - { rust: stable, vendor: Freescale, options: all } - - { rust: stable, vendor: Freescale, options: "" } - - { rust: stable, vendor: Fujitsu, options: "" } - - { rust: stable, vendor: Fujitsu, options: "--atomics" } - - { rust: stable, vendor: GD32, options: all } - - { rust: stable, vendor: GD32, options: "" } - - { rust: stable, vendor: Holtek, options: all } - - { rust: stable, vendor: Holtek, options: "" } - - { rust: stable, vendor: Microchip, options: "" } - - { rust: stable, vendor: Microchip, options: "--atomics" } - - { rust: stable, vendor: Nordic, options: all } - - { rust: stable, vendor: Nordic, options: "" } - - { rust: stable, vendor: Nuvoton, options: "" } - - { rust: stable, vendor: Nuvoton, options: "--atomics" } - - { rust: stable, vendor: NXP, options: all } - - { rust: stable, vendor: NXP, options: "" } - - { rust: stable, vendor: RISC-V, options: "" } - - { rust: stable, vendor: RISC-V, options: "--atomics" } - - { rust: stable, vendor: SiliconLabs, options: all } - - { rust: stable, vendor: SiliconLabs, options: "" } - - { rust: stable, vendor: Spansion, options: "" } - - { rust: stable, vendor: Spansion, options: "--atomics" } - - { rust: stable, vendor: STMicro, options: "" } - - { rust: stable, vendor: STMicro, options: "--atomics" } - - { rust: stable, vendor: STM32-patched, options: "--strict -f enum_value::p: --max-cluster-size --atomics --atomics-feature atomics --impl-debug --impl-defmt defmt" } - - { rust: stable, vendor: Toshiba, options: all } - - { rust: stable, vendor: Toshiba, options: "" } - # Test MSRV - - { rust: 1.76.0, vendor: Nordic, options: "" } - # Use nightly for architectures which don't support stable - - { rust: nightly, vendor: MSP430, options: "--atomics" } - - { rust: nightly, vendor: MSP430, options: "" } - # Workaround for _1token0 - - { rust: nightly-2024-09-25, vendor: Espressif, options: "--atomics --ident-formats-theme legacy" } - - { rust: nightly-2024-09-25, vendor: Espressif, options: "--ident-format register:::Reg" } + - { vendor: Atmel } + - { vendor: Atmel, options: "-- --strict --atomics" } + - { vendor: Freescale } + - { vendor: Freescale, options: "-- --strict --atomics" } + - { vendor: Fujitsu } + - { vendor: Fujitsu, options: "-- --atomics" } + - { vendor: Holtek } + - { vendor: Holtek, options: "-- --strict --atomics" } + - { vendor: Atmel } + - { vendor: Atmel, options: "-- --strict --atomics" } + - { vendor: Microchip } + - { vendor: Microchip, options: "-- --atomics" } + - { vendor: Nordic } + - { vendor: Nordic, options: "-- --strict --atomics" } + - { vendor: Nuvoton } + - { vendor: Nuvoton, options: "-- --atomics" } + - { vendor: NXP } + - { vendor: NXP, options: "-- --strict --atomics" } + - { vendor: SiFive } + - { vendor: SiFive, options: "-- --atomics" } + - { vendor: SiliconLabs, options: "" } + - { vendor: SiliconLabs, options: "-- --strict --atomics" } + - { vendor: Spansion } + - { vendor: Spansion, options: "-- --atomics" } + - { vendor: STMicro } + - { vendor: STMicro, options: "-- --atomics" } + - { vendor: STMicro, options: "-- --strict -f enum_value::p: --max-cluster-size --atomics --atomics-feature atomics --impl-debug --impl-defmt defmt" } + - { vendor: Toshiba } + - { vendor: Toshiba, options: "-- --strict --atomics" } + - { vendor: TexasInstruments } + - { vendor: TexasInstruments, options: "-- --atomics" } + - { vendor: Espressif } + - { vendor: Espressif, options: "-- --atomics" } steps: - uses: actions/checkout@v4 - - uses: dtolnay/rust-toolchain@master - with: - toolchain: ${{ matrix.rust }} + - uses: dtolnay/rust-toolchain@stable - name: Cache uses: Swatinem/rust-cache@v2 @@ -109,13 +103,25 @@ jobs: run: | cargo install svd2rust --path . - - name: Run CI script for `${{ matrix.vendor }}` under rust `${{ matrix.rust }}` with options=`${{ matrix.options }}` - env: - VENDOR: ${{ matrix.vendor }} - OPTIONS: ${{ matrix.options }} - COMMAND: check - RUST_TOOLCHAIN: ${{ matrix.rust }} - run: bash ci/script.sh + - name: Run regression tool + run: cargo regress tests -m ${{ matrix.vendor }} ${{ matrix.options }} + + ci-msrv-check: + runs-on: ubuntu-latest + needs: [check] + steps: + - uses: actions/checkout@v4 + + - name: Self install + run: | + cargo install svd2rust --path . + + # Install the MSRV toolchain + - uses: dtolnay/rust-toolchain@1.76.0 + - name: Run reression tool with MSRV + # The MSRV only applies to the generated crate. The regress tool should still be run with + # stable. + run: cargo +stable regress tests --toolchain 1.76.0 -m Nordic -- --strict --atomics ci-clippy: runs-on: ubuntu-latest diff --git a/ci/svd2rust-regress/Cargo.toml b/ci/svd2rust-regress/Cargo.toml index 3b882db7..bd32d497 100644 --- a/ci/svd2rust-regress/Cargo.toml +++ b/ci/svd2rust-regress/Cargo.toml @@ -3,6 +3,7 @@ edition = "2021" name = "svd2rust-regress" version = "0.1.0" authors = ["James Munns ", "The svd2rust developers"] +rust-version = "1.82.0" [dependencies] clap = { version = "4.1", features = ["color", "derive", "string", "env"] } diff --git a/ci/svd2rust-regress/all-tests.yml b/ci/svd2rust-regress/all-tests.yml new file mode 100644 index 00000000..06501c71 --- /dev/null +++ b/ci/svd2rust-regress/all-tests.yml @@ -0,0 +1,2139 @@ +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9CN11 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9CN12 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9G09 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9G15 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9G20 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9G25 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9G35 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9M10 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9M11 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9N12 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9X25 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: AT91SAM9X35 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3A4C + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3A8C + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N00A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N00B + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N0A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N0B + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N0C + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N1A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N1B + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N1C + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N2A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N2B + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N2C + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N4A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N4B + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3N4C + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S1A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S1B + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S1C + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S2A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S2B + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S2C + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S4A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S4B + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S4C + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S8B + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3S8C + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3SD8B + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3SD8C + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3U1C + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3U1E + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3U2C + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3U2E + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3U4C + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3U4E + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3X4C + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3X4E + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3X8C + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM3X8E + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM4S16B + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM4S16C + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM4S8B + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM4S8C + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM4SD32B + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAM4SD32C + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMA5D31 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMA5D33 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMA5D34 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMA5D35 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21E15A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21E16A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21E17A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21E18A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21G16A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21G17A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21G18A + svd_url: https://raw.githubusercontent.com/wez/atsamd21-rs/master/svd/ATSAMD21G18A.svd + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21J16A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21J17A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMD21J18A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMR21E16A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMR21E17A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMR21E18A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMR21G16A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMR21G17A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Atmel + chip: ATSAMR21G18A + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Freescale + chip: MKV56F20 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Freescale + chip: MKV56F22 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Freescale + chip: MKV56F24 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Freescale + chip: MKV58F20 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Freescale + chip: MKV58F22 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Freescale + chip: MKV58F24 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Freescale + chip: MK61F15 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Freescale + chip: MK61F15WS + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Freescale + chip: MK70F12 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Freescale + chip: MK70F15 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Freescale + chip: MK70F15WS + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Freescale + chip: MK02F12810 +- arch: cortex-m + mfgr: Freescale + chip: MK10D10 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK10D5 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK10D7 +- arch: cortex-m + mfgr: Freescale + chip: MK10DZ10 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK10F12 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK11D5 +- arch: cortex-m + mfgr: Freescale + chip: MK11D5WS + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK11DA5 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK12D5 +- arch: cortex-m + mfgr: Freescale + chip: MK20D10 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK20D5 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK20D7 +- arch: cortex-m + mfgr: Freescale + chip: MK20DZ10 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK20F12 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK21D5 +- arch: cortex-m + mfgr: Freescale + chip: MK21D5WS + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK21DA5 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK21F12 +- arch: cortex-m + mfgr: Freescale + chip: MK21FA12 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK22D5 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK22F12 +- arch: cortex-m + mfgr: Freescale + chip: MK22F12810 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK22F25612 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK22F51212 +- arch: cortex-m + mfgr: Freescale + chip: MK22FA12 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK24F12 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK24F25612 +- arch: cortex-m + mfgr: Freescale + chip: MK26F18 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK30D10 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK30D7 +- arch: cortex-m + mfgr: Freescale + chip: MK30DZ10 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK40D10 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK40D7 +- arch: cortex-m + mfgr: Freescale + chip: MK40DZ10 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK50D10 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK50D7 +- arch: cortex-m + mfgr: Freescale + chip: MK50DZ10 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK51D10 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK51D7 +- arch: cortex-m + mfgr: Freescale + chip: MK51DZ10 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK52D10 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK52DZ10 +- arch: cortex-m + mfgr: Freescale + chip: MK53D10 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK53DZ10 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK60D10 +- arch: cortex-m + mfgr: Freescale + chip: MK60DZ10 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK60F15 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK63F12 +- arch: cortex-m + mfgr: Freescale + chip: MK64F12 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK65F18 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK66F18 +- arch: cortex-m + mfgr: Freescale + chip: MK80F25615 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK81F25615 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MK82F25615 +- arch: cortex-m + mfgr: Freescale + chip: MKE14F16 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKE14Z7 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKE15Z7 +- arch: cortex-m + mfgr: Freescale + chip: MKE16F16 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKE18F16 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKL28T7_CORE0 +- arch: cortex-m + mfgr: Freescale + chip: MKL28T7_CORE1 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKL28Z7 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKL81Z7 +- arch: cortex-m + mfgr: Freescale + chip: MKL82Z7 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKS22F12 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKV10Z1287 +- arch: cortex-m + mfgr: Freescale + chip: MKV10Z7 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKV11Z7 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKV30F12810 +- arch: cortex-m + mfgr: Freescale + chip: MKV31F12810 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKV31F25612 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKV31F51212 +- arch: cortex-m + mfgr: Freescale + chip: MKV40F15 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKV42F16 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKV43F15 +- arch: cortex-m + mfgr: Freescale + chip: MKV44F15 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKV44F16 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKV45F15 +- arch: cortex-m + mfgr: Freescale + chip: MKV46F15 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKV46F16 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKW20Z4 +- arch: cortex-m + mfgr: Freescale + chip: MKW21D5 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKW21Z4 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKW22D5 +- arch: cortex-m + mfgr: Freescale + chip: MKW24D5 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKW30Z4 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKW31Z4 +- arch: cortex-m + mfgr: Freescale + chip: MKW40Z4 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKW41Z4 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKE02Z4 +- arch: cortex-m + mfgr: Freescale + chip: MKE04Z1284 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKE04Z4 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKE06Z4 +- arch: cortex-m + mfgr: Freescale + chip: MKE14D7 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKE15D7 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKL02Z4 +- arch: cortex-m + mfgr: Freescale + chip: MKL03Z4 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKL04Z4 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKL05Z4 +- arch: cortex-m + mfgr: Freescale + chip: MKL13Z644 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKL14Z4 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKL15Z4 +- arch: cortex-m + mfgr: Freescale + chip: MKL16Z4 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKL17Z4 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKL17Z644 +- arch: cortex-m + mfgr: Freescale + chip: MKL24Z4 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKL25Z4 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKL26Z4 +- arch: cortex-m + mfgr: Freescale + chip: MKL27Z4 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKL27Z644 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKL33Z4 +- arch: cortex-m + mfgr: Freescale + chip: MKL33Z644 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKL34Z4 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKL36Z4 +- arch: cortex-m + mfgr: Freescale + chip: MKL43Z4 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKL46Z4 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKM14ZA5 +- arch: cortex-m + mfgr: Freescale + chip: MKM33ZA5 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKM34Z7 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: MKM34ZA5 +- arch: cortex-m + mfgr: Freescale + chip: MKW01Z4 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: SKEAZ1284 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Freescale + chip: SKEAZN642 +- arch: cortex-m + mfgr: Freescale + chip: SKEAZN84 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF10xN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF10xR +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF11xK +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF11xL +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF11xM +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF11xN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF12xK +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF12xL +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF13xK +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF13xL +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF13xM +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF13xN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF14xL +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF14xM +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF14xN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF15xM +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF15xN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF15xR +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF1AxL +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF1AxM +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF1AxN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF31xK +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF31xL +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF31xM +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF31xN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF34xL +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF34xM +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF34xN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF42xK +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF42xL +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFA3xL +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFA3xM +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFA3xN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFA4xL +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFA4xM +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFA4xN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFAAxL +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFAAxM +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFAAxN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFB4xL +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFB4xM +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFB4xN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B160L +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B160R +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B360L +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B360R +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B460L +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B460R +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B560L +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B560R +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF10xN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF10xR +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF11xN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF11xR +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF11xS +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF11xT +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF12xJ +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF12xK +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF12xL +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF12xM +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF12xS +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF12xT +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF21xS +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF21xT +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF30xN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF30xR +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF31xN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF31xR +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF31xS +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF31xT +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF32xK +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF32xL +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF32xM +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF32xS +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF32xT +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF40xN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF40xR +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF41xN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF41xR +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF41xS +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF41xT +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF42xS +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF42xT +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF50xN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF50xR +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF51xN +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF51xR +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF51xS +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF51xT +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF52xK +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF52xL +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF52xM +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF52xS +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF52xT +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF61xS +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF61xT +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BFD1xS +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BFD1xT +- arch: cortex-m + mfgr: Fujitsu + chip: S6E1A1 +- arch: cortex-m + mfgr: Fujitsu + chip: S6E2CC +- arch: cortex-m + mfgr: Holtek + chip: ht32f125x +- arch: cortex-m + mfgr: Holtek + chip: ht32f175x +- arch: cortex-m + mfgr: Holtek + chip: ht32f275x +- arch: cortex-m + mfgr: Nordic + chip: nrf51 +- arch: cortex-m + mfgr: Nordic + chip: nrf52 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Nuvoton + chip: M051_Series + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Nuvoton + chip: NUC100_Series + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC11Exx_v5 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC11Uxx_v7 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC11xx_v6a + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC11xx_v6 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC13Uxx_v1 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC15xx_v0.7 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC800_v0.3 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC11E6x_v0.8 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC176x5x_v0.2 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC11Cxx_v9 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC178x_7x + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC178x_7x_v0.8 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC408x_7x_v0.7 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC11Axxv0.6 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC11D14_svd_v4 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC13xx_svd_v1 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC18xx_svd_v18 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC43xx_43Sxx + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC1102_4_v4 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: LPC5410x_v0.4 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: NXP + chip: MK22F25612 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: NXP + chip: MK22F51212 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: NXP + chip: MKW41Z4 + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3C1x4_SVD + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3C1x6_SVD + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3C1x7_SVD + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3L1x4_SVD + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3L1x6_SVD + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3L1x7_SVD + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3U1x4_SVD + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3U1x6_SVD + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3U1x7_SVD + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3L1x8_SVD + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Spansion + chip: MB9AF12xK + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AF12xL + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AF42xK + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AF42xL + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF12xJ + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF12xS + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF12xT + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF16xx + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF32xS + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF32xT + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF36xx + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF42xS + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF42xT + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF46xx + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF52xS + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF52xT + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF56xx + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AF10xN + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AF10xR +- arch: cortex-m + mfgr: Spansion + chip: MB9AF11xK + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AF11xL +- arch: cortex-m + mfgr: Spansion + chip: MB9AF11xM + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AF11xN +- arch: cortex-m + mfgr: Spansion + chip: MB9AF13xK + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AF13xL +- arch: cortex-m + mfgr: Spansion + chip: MB9AF13xM + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AF13xN +- arch: cortex-m + mfgr: Spansion + chip: MB9AF14xL + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AF14xM +- arch: cortex-m + mfgr: Spansion + chip: MB9AF14xN + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AF15xM +- arch: cortex-m + mfgr: Spansion + chip: MB9AF15xN + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AF15xR +- arch: cortex-m + mfgr: Spansion + chip: MB9AF31xK + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AF31xL +- arch: cortex-m + mfgr: Spansion + chip: MB9AF31xM + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AF31xN +- arch: cortex-m + mfgr: Spansion + chip: MB9AF34xL + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AF34xM +- arch: cortex-m + mfgr: Spansion + chip: MB9AF34xN + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AFA3xL +- arch: cortex-m + mfgr: Spansion + chip: MB9AFA3xM + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AFA3xN +- arch: cortex-m + mfgr: Spansion + chip: MB9AFA4xL + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AFA4xM +- arch: cortex-m + mfgr: Spansion + chip: MB9AFA4xN + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AFB4xL +- arch: cortex-m + mfgr: Spansion + chip: MB9AFB4xM + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9AFB4xN +- arch: cortex-m + mfgr: Spansion + chip: MB9BF10xN + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF10xR +- arch: cortex-m + mfgr: Spansion + chip: MB9BF11xN + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF11xR +- arch: cortex-m + mfgr: Spansion + chip: MB9BF11xS + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF11xT +- arch: cortex-m + mfgr: Spansion + chip: MB9BF12xK + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF12xL +- arch: cortex-m + mfgr: Spansion + chip: MB9BF12xM + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF21xS +- arch: cortex-m + mfgr: Spansion + chip: MB9BF21xT + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF30xN +- arch: cortex-m + mfgr: Spansion + chip: MB9BF30xR + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF31xN +- arch: cortex-m + mfgr: Spansion + chip: MB9BF31xR + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF31xS +- arch: cortex-m + mfgr: Spansion + chip: MB9BF31xT + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF32xK +- arch: cortex-m + mfgr: Spansion + chip: MB9BF32xL + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF32xM +- arch: cortex-m + mfgr: Spansion + chip: MB9BF40xN + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF40xR +- arch: cortex-m + mfgr: Spansion + chip: MB9BF41xN + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF41xR +- arch: cortex-m + mfgr: Spansion + chip: MB9BF41xS + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF41xT +- arch: cortex-m + mfgr: Spansion + chip: MB9BF50xN + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF50xR +- arch: cortex-m + mfgr: Spansion + chip: MB9BF51xN + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF51xR +- arch: cortex-m + mfgr: Spansion + chip: MB9BF51xS + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF51xT +- arch: cortex-m + mfgr: Spansion + chip: MB9BF52xK + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF52xL +- arch: cortex-m + mfgr: Spansion + chip: MB9BF52xM + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BF61xS +- arch: cortex-m + mfgr: Spansion + chip: MB9BF61xT + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: Spansion + chip: MB9BFD1xS +- arch: cortex-m + mfgr: Spansion + chip: MB9BFD1xT + should_pass: true + run_when: not-short +- arch: cortex-m + mfgr: STMicro + chip: STM32F030 +- arch: cortex-m + mfgr: STMicro + chip: STM32F0x2 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f0x2.svd.patched +- arch: cortex-m + mfgr: STMicro + chip: STM32F103 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f103.svd.patched +- arch: cortex-m + mfgr: STMicro + chip: STM32F411 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f411.svd.patched +- arch: cortex-m + mfgr: STMicro + chip: STM32F469 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f469.svd.patched +- arch: cortex-m + mfgr: STMicro + chip: STM32F723 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f723.svd.patched +- arch: cortex-m + mfgr: STMicro + chip: STM32G070 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32g070.svd.patched +- arch: cortex-m + mfgr: STMicro + chip: STM32G473 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32g473.svd.patched +- arch: cortex-m + mfgr: STMicro + chip: STM32H753 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32h753.svd.patched +- arch: cortex-m + mfgr: STMicro + chip: STM32L0x3 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32l0x3.svd.patched +- arch: cortex-m + mfgr: STMicro + chip: STM32L162 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32l162.svd.patched +- arch: cortex-m + mfgr: STMicro + chip: STM32L4x6 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32l4x6.svd.patched +- arch: cortex-m + mfgr: STMicro + chip: STM32L562 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32l562.svd.patched +- arch: cortex-m + mfgr: STMicro + chip: STM32MP157 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32mp157.svd.patched +- arch: cortex-m + mfgr: STMicro + chip: STM32WB55 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32wb55.svd.patched +- arch: cortex-m + mfgr: STMicro + chip: STM32WLE5 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32wle5.svd.patched +- arch: cortex-m + mfgr: STMicro + chip: STM32C011 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32c011.svd.patched +- arch: cortex-m + mfgr: STMicro + chip: STM32F031x +- arch: cortex-m + mfgr: STMicro + chip: STM32F042x +- arch: cortex-m + mfgr: STMicro + chip: STM32F072x +- arch: cortex-m + mfgr: STMicro + chip: STM32F091x +- arch: cortex-m + mfgr: STMicro + chip: STM32F0xx +- arch: cortex-m + mfgr: STMicro + chip: STM32F100xx +- arch: cortex-m + mfgr: STMicro + chip: STM32F101xx +- arch: cortex-m + mfgr: STMicro + chip: STM32F102xx +- arch: cortex-m + mfgr: STMicro + chip: STM32F105xx +- arch: cortex-m + mfgr: STMicro + chip: STM32F107xx +- arch: cortex-m + mfgr: STMicro + chip: STM32F20x +- arch: cortex-m + mfgr: STMicro + chip: STM32F21x +- arch: cortex-m + mfgr: STMicro + chip: STM32F301 +- arch: cortex-m + mfgr: STMicro + chip: STM32F302 +- arch: cortex-m + mfgr: STMicro + chip: STM32F303 +- arch: cortex-m + mfgr: STMicro + chip: STM32F3x4 +- arch: cortex-m + mfgr: STMicro + chip: STM32F373 +- arch: cortex-m + mfgr: STMicro + chip: STM32F401 +- arch: cortex-m + mfgr: STMicro + chip: STM32F405 +- arch: cortex-m + mfgr: STMicro + chip: STM32F407 +- arch: cortex-m + mfgr: STMicro + chip: STM32F410 +- arch: cortex-m + mfgr: STMicro + chip: STM32F412 +- arch: cortex-m + mfgr: STMicro + chip: STM32F413 +- arch: cortex-m + mfgr: STMicro + chip: STM32F427 +- arch: cortex-m + mfgr: STMicro + chip: STM32F429 +- arch: cortex-m + mfgr: STMicro + chip: STM32F446 +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x2 +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x5 +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x6 +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x7 +- arch: cortex-m + mfgr: STMicro + chip: STM32F7x9 +- arch: cortex-m + mfgr: STMicro + chip: STM32G07x + should_pass: false + run_when: never +- arch: cortex-m + mfgr: STMicro + chip: STM32G431xx +- arch: cortex-m + mfgr: STMicro + chip: STM32G441xx +- arch: cortex-m + mfgr: STMicro + chip: STM32G471xx +- arch: cortex-m + mfgr: STMicro + chip: STM32G474xx +- arch: cortex-m + mfgr: STMicro + chip: STM32G483xx +- arch: cortex-m + mfgr: STMicro + chip: STM32G484xx +- arch: cortex-m + mfgr: STMicro + chip: STM32L100 +- arch: cortex-m + mfgr: STMicro + chip: STM32L15xC +- arch: cortex-m + mfgr: STMicro + chip: STM32L15xxE +- arch: cortex-m + mfgr: STMicro + chip: STM32L15xxxA +- arch: cortex-m + mfgr: STMicro + chip: STM32L1xx +- arch: cortex-m + mfgr: STMicro + chip: STM32W108 +- arch: cortex-m + mfgr: STMicro + chip: STM32L051x + should_pass: false + run_when: never +- arch: cortex-m + mfgr: STMicro + chip: STM32L052x + should_pass: false + run_when: never +- arch: cortex-m + mfgr: STMicro + chip: STM32L053x + should_pass: false + run_when: never +- arch: cortex-m + mfgr: STMicro + chip: STM32L062x + should_pass: false + run_when: never +- arch: cortex-m + mfgr: STMicro + chip: STM32L063x + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Toshiba + chip: M365 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Toshiba + chip: M367 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Toshiba + chip: M368 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Toshiba + chip: M369 + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Toshiba + chip: M36B + should_pass: false + run_when: never +- arch: cortex-m + mfgr: Toshiba + chip: M061 +- arch: riscv + mfgr: SiFive + chip: E310x + svd_url: https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x/e310x.svd + should_pass: false + run_when: never +- arch: msp430 + mfgr: TexasInstruments + chip: msp430g2553 + svd_url: https://github.com/pftbest/msp430g2553/raw/v0.1.3-svd/msp430g2553.svd +- arch: msp430 + mfgr: TexasInstruments + chip: msp430fr2355 + svd_url: https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/master/msp430fr2355.svd +- arch: xtensa-lx + mfgr: Espressif + chip: esp32 + svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32.svd +- arch: xtensa-lx + mfgr: Espressif + chip: esp32s2 + svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s2.svd +- arch: xtensa-lx + mfgr: Espressif + chip: esp32s3 + svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s3.svd +- arch: riscv + mfgr: Espressif + chip: esp32c3 + svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32c3.svd +- arch: mips + mfgr: Microchip + chip: pic32mx170f256b + svd_url: https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx1xxfxxxb/PIC32MX170F256B.svd.patched +- arch: mips + mfgr: Microchip + chip: pic32mx270f256b + svd_url: https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx2xxfxxxb/PIC32MX270F256B.svd.patched diff --git a/ci/svd2rust-regress/src/diff.rs b/ci/svd2rust-regress/src/diff.rs index d155c56a..de4d0d31 100644 --- a/ci/svd2rust-regress/src/diff.rs +++ b/ci/svd2rust-regress/src/diff.rs @@ -208,6 +208,9 @@ impl Diffing { .to_owned(), svd_url: Some(url.to_owned()), should_pass: true, + skip_check: false, + suffix: Default::default(), + opts: Default::default(), run_when: crate::tests::RunWhen::Always, }, _ => { @@ -232,10 +235,10 @@ impl Diffing { ) => last_args.as_deref(), None => None, }); - let join = |opt1: Option<&str>, opt2: Option<&str>| -> Option { + let join = |opt1: Option<&str>, opt2: Option<&str>| -> Option> { match (opt1, opt2) { - (Some(str1), Some(str2)) => Some(format!("{} {}", str1, str2)), - (Some(str), None) | (None, Some(str)) => Some(str.to_owned()), + (Some(str1), Some(str2)) => vec![str1.to_owned(), str2.to_owned()].into(), + (Some(str), None) | (None, Some(str)) => Some(vec![str.to_owned()]), (None, None) => None, } }; @@ -243,14 +246,14 @@ impl Diffing { .setup_case( &opts.output_dir.join("baseline"), &baseline_bin, - join(baseline_cmd, last_args).as_deref(), + &join(baseline_cmd, last_args), ) .with_context(|| "couldn't create head")?; let current = test .setup_case( &opts.output_dir.join("current"), ¤t_bin, - join(current_cmd, last_args).as_deref(), + &join(current_cmd, last_args), ) .with_context(|| "couldn't create base")?; diff --git a/ci/svd2rust-regress/src/main.rs b/ci/svd2rust-regress/src/main.rs index 4d0fdf77..22b03985 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/ci/svd2rust-regress/src/main.rs @@ -17,6 +17,7 @@ use std::path::PathBuf; use std::process::{exit, Command}; use std::sync::atomic::{AtomicBool, Ordering}; use std::time::Instant; +use svd_test::WorkspaceTomlGuard; use wildmatch::WildMatch; #[derive(Debug, serde::Deserialize)] @@ -61,20 +62,20 @@ pub struct TestAll { /// Filter by manufacturer, may be combined with other filters #[clap( - short = 'm', - long = "manufacturer", - ignore_case = true, - value_parser = manufacturers(), -)] + short = 'm', + long = "manufacturer", + ignore_case = true, + value_parser = manufacturers(), + )] pub mfgr: Option, /// Filter by architecture, may be combined with other filters #[clap( - short = 'a', - long = "architecture", - ignore_case = true, - value_parser = architectures(), -)] + short = 'a', + long = "architecture", + ignore_case = true, + value_parser = architectures(), + )] pub arch: Option, /// Include tests expected to fail (will cause a non-zero return code) @@ -99,7 +100,7 @@ pub struct TestAll { #[clap(short = 'p', long = "svd2rust-path", default_value = default_svd2rust())] pub current_bin_path: PathBuf, #[clap(last = true)] - pub command: Option, + pub passthrough_opts: Option>, // TODO: Specify smaller subset of tests? Maybe with tags? // TODO: Compile svd2rust? } @@ -148,7 +149,7 @@ pub struct Test { #[clap(short = 'p', long = "svd2rust-path", default_value = default_svd2rust())] pub current_bin_path: PathBuf, #[clap(last = true)] - pub command: Option, + pub passthrough_opts: Option>, } impl Test { @@ -161,6 +162,7 @@ impl Test { Self { chip: Some(_), .. } => {} _ => unreachable!("clap should not allow this"), } + let _toml_guard = WorkspaceTomlGuard::new()?; let test = if let (Some(url), Some(arch)) = (&self.url, &self.arch) { tests::TestCase { arch: svd2rust::Target::parse(arch)?, @@ -177,6 +179,9 @@ impl Test { .to_owned(), svd_url: Some(url.clone()), should_pass: true, + skip_check: false, + suffix: Default::default(), + opts: Default::default(), run_when: tests::RunWhen::default(), } } else { @@ -186,7 +191,7 @@ impl Test { .ok_or_else(|| anyhow::anyhow!("no test found for chip"))? .to_owned() }; - test.test(opts, &self.current_bin_path, self.command.as_deref())?; + test.test(opts, &self.current_bin_path, &self.passthrough_opts)?; Ok(()) } } @@ -235,11 +240,14 @@ impl TestAll { "No tests run, you might want to use `--bad-tests` and/or `--long-test`" ); } + + let toml_guard = WorkspaceTomlGuard::new()?; + let any_fails = AtomicBool::new(false); tests.par_iter().for_each(|t| { let start = Instant::now(); - match t.test(opt, &self.current_bin_path, self.command.as_deref()) { + match t.test(opt, &self.current_bin_path, &self.passthrough_opts) { Ok(s) => { if let Some(stderrs) = s { let mut buf = String::new(); @@ -293,6 +301,8 @@ impl TestAll { } } }); + drop(toml_guard); + if any_fails.load(Ordering::Acquire) { exit(1); } else { diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 97de00da..4801bd3e 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -17,15 +17,14 @@ const CRATES_ALL: &[&str] = &[ ]; const CRATES_MSP430: &[&str] = &["msp430 = \"0.4.0\"", "msp430-rt = \"0.4.0\""]; const CRATES_ATOMICS: &[&str] = - &["portable-atomic = { version = \"0.3.16\", default-features = false }"]; + &["portable-atomic = { version = \"1\", default-features = false }"]; const CRATES_CORTEX_M: &[&str] = &["cortex-m = \"0.7.6\"", "cortex-m-rt = \"0.7\""]; const CRATES_RISCV: &[&str] = &["riscv = \"0.12.1\"", "riscv-rt = \"0.13.0\""]; -const CRATES_XTENSALX: &[&str] = &["xtensa-lx-rt = \"0.9.0\"", "xtensa-lx = \"0.6.0\""]; const CRATES_MIPS: &[&str] = &["mips-mcu = \"0.1.0\""]; const PROFILE_ALL: &[&str] = &["[profile.dev]", "incremental = false"]; const FEATURES_ALL: &[&str] = &["[features]"]; const FEATURES_CORTEX_M: &[&str] = &["rt = [\"cortex-m-rt/device\"]"]; -const FEATURES_XTENSALX: &[&str] = &["default = [\"xtensa-lx/esp32\", \"xtensa-lx-rt/esp32\"]"]; +const FEATURES_XTENSA_LX: &[&str] = &["rt = []"]; const WORKSPACE_EXCLUDE: &[&str] = &["[workspace]"]; fn path_helper_base(base: &Path, input: &[&str]) -> PathBuf { @@ -143,25 +142,27 @@ impl TestCase { &self, opts: &Opts, bin_path: &Path, - command: Option<&str>, + cli_opts: &Option>, ) -> Result>, TestError> { let (chip_dir, mut process_stderr_paths) = self - .setup_case(&opts.output_dir, bin_path, command) + .setup_case(&opts.output_dir, bin_path, cli_opts) .with_context(|| anyhow!("when setting up case for {}", self.name()))?; // Run `cargo check`, capturing stderr to a log file - let cargo_check_err_file = path_helper_base(&chip_dir, &["cargo-check.err.log"]); - Command::new("cargo") - .arg("check") - .current_dir(&chip_dir) - .capture_outputs( - true, - "cargo check", - None, - Some(&cargo_check_err_file), - &process_stderr_paths, - ) - .with_context(|| "failed to check")?; - process_stderr_paths.push(cargo_check_err_file); + if !self.skip_check { + let cargo_check_err_file = path_helper_base(&chip_dir, &["cargo-check.err.log"]); + Command::new("cargo") + .arg("check") + .current_dir(&chip_dir) + .capture_outputs( + true, + "cargo check", + None, + Some(&cargo_check_err_file), + &process_stderr_paths, + ) + .with_context(|| "failed to check")?; + process_stderr_paths.push(cargo_check_err_file); + } Ok(if opts.verbose > 1 { Some(process_stderr_paths) } else { @@ -175,13 +176,15 @@ impl TestCase { &self, output_dir: &Path, svd2rust_bin_path: &Path, - command: Option<&str>, + command: &Option>, ) -> Result<(PathBuf, Vec), TestError> { let user = match std::env::var("USER") { Ok(val) => val, Err(_) => "rusttester".into(), }; - let chip_dir = output_dir.join(Case::Snake.sanitize(&self.name()).as_ref()); + let mut chip_name = self.name(); + chip_name = Case::Snake.cow_to_case(chip_name.into()).to_string(); + let chip_dir = output_dir.join(&chip_name); tracing::span::Span::current() .record("chip_dir", tracing::field::display(chip_dir.display())); if let Err(err) = fs::remove_dir_all(&chip_dir) { @@ -196,104 +199,34 @@ impl TestCase { self.name(), chip_dir.display() ); - // XXX: Workaround for https://github.com/rust-lang/cargo/issues/6009#issuecomment-1925445245 - let manifest_path = crate::get_cargo_workspace().join("Cargo.toml"); - let workspace_toml = - fs::read(&manifest_path).context("failed to read workspace Cargo.toml")?; + println!("chip_dir: {}", chip_dir.display()); Command::new("cargo") .env("USER", user) .arg("init") .arg("--name") - .arg(Case::Snake.sanitize(&self.name()).as_ref()) + .arg(chip_name) .arg("--vcs") .arg("none") + .arg("--lib") .arg(&chip_dir) .capture_outputs(true, "cargo init", None, None, &[]) .with_context(|| "Failed to cargo init")?; - std::fs::write(manifest_path, workspace_toml) - .context("failed to write workspace Cargo.toml")?; - - let svd_toml = path_helper_base(&chip_dir, &["Cargo.toml"]); - let mut file = OpenOptions::new() - .append(true) - .open(svd_toml) - .with_context(|| "Failed to open Cargo.toml for appending")?; - let crates = CRATES_ALL - .iter() - .chain(match &self.arch { - Target::CortexM => CRATES_CORTEX_M.iter(), - Target::RISCV => CRATES_RISCV.iter(), - Target::Mips => CRATES_MIPS.iter(), - Target::Msp430 => CRATES_MSP430.iter(), - Target::XtensaLX => CRATES_XTENSALX.iter(), - Target::None => unreachable!(), - }) - .chain(if command.unwrap_or_default().contains("--atomics") { - CRATES_ATOMICS.iter() - } else { - [].iter() - }) - .chain(PROFILE_ALL.iter()) - .chain(FEATURES_ALL.iter()) - .chain(match &self.arch { - Target::XtensaLX => FEATURES_XTENSALX.iter(), - Target::CortexM => FEATURES_CORTEX_M.iter(), - _ => [].iter(), - }) - .chain(WORKSPACE_EXCLUDE.iter()); - for c in crates { - writeln!(file, "{}", c).with_context(|| "Failed to append to file!")?; - } - tracing::info!("Downloading SVD"); - // FIXME: Avoid downloading multiple times, especially if we're using the diff command - let svd_url = &self.svd_url(); - let svd = reqwest::blocking::get(svd_url) - .with_context(|| format!("Failed to get svd URL: {svd_url}"))? - .error_for_status() - .with_context(|| anyhow!("Response is not ok for svd url"))? - .text() - .with_context(|| "SVD is bad text")?; + self.prepare_chip_test_toml(&chip_dir, command)?; + let chip_svd = self.prepare_svd_file(&chip_dir)?; + self.prepare_rust_toolchain_file(&chip_dir)?; - let chip_svd = format!("{}.svd", &self.chip); - let svd_file = path_helper_base(&chip_dir, &[&chip_svd]); - file_helper(&svd, &svd_file)?; let lib_rs_file = path_helper_base(&chip_dir, &["src", "lib.rs"]); let src_dir = path_helper_base(&chip_dir, &["src"]); let svd2rust_err_file = path_helper_base(&chip_dir, &["svd2rust.err.log"]); - let target = match self.arch { - Target::CortexM => "cortex-m", - Target::Msp430 => "msp430", - Target::Mips => "mips", - Target::RISCV => "riscv", - Target::XtensaLX => "xtensa-lx", - Target::None => unreachable!(), - }; - tracing::info!("Running svd2rust"); - let mut svd2rust_bin = Command::new(svd2rust_bin_path); - if let Some(command) = command { - if !command.is_empty() { - svd2rust_bin.args( - shell_words::split(command).context("unable to split command into args")?, - ); - } - } - svd2rust_bin - .args(["-i", &chip_svd]) - .args(["--target", target]) - .current_dir(&chip_dir) - .capture_outputs( - true, - "svd2rust", - Some(&lib_rs_file).filter(|_| { - !matches!( - self.arch, - Target::CortexM | Target::Msp430 | Target::XtensaLX - ) - }), - Some(&svd2rust_err_file), - &[], - )?; + self.run_svd2rust( + svd2rust_bin_path, + &chip_svd, + &chip_dir, + &lib_rs_file, + &svd2rust_err_file, + command, + )?; process_stderr_paths.push(svd2rust_err_file); match self.arch { Target::CortexM | Target::Mips | Target::Msp430 | Target::XtensaLX => { @@ -309,6 +242,7 @@ impl TestCase { .with_context(|| format!("couldn't parse {}", lib_rs_file.display()))?; File::options() .write(true) + .truncate(true) .open(&lib_rs_file) .with_context(|| format!("couldn't open {}", lib_rs_file.display()))? .write(prettyplease::unparse(&file).as_bytes()) @@ -370,6 +304,132 @@ impl TestCase { } Ok((chip_dir, process_stderr_paths)) } + + fn prepare_rust_toolchain_file(&self, chip_dir: &Path) -> Result<(), TestError> { + // Could be extended to let cargo install and use a specific toolchain. + let channel: Option = None; + + if let Some(channel) = channel { + let toolchain_file = path_helper_base(chip_dir, &["rust-toolchain.toml"]); + let mut file = OpenOptions::new() + .create(true) + .truncate(true) + .write(true) + .open(&toolchain_file) + .with_context(|| "failed to create toolchain file")?; + + writeln!(file, "[toolchain]\nchannel = \"{}\"", channel) + .with_context(|| "writing toolchain file failed")?; + } + + Ok(()) + } + + fn prepare_chip_test_toml( + &self, + chip_dir: &Path, + opts: &Option>, + ) -> Result<(), TestError> { + let svd_toml = path_helper_base(chip_dir, &["Cargo.toml"]); + let mut file = OpenOptions::new() + .append(true) + .open(svd_toml) + .with_context(|| "Failed to open Cargo.toml for appending")?; + + let cargo_toml_fragments = CRATES_ALL + .iter() + .chain(match &self.arch { + Target::CortexM => CRATES_CORTEX_M.iter(), + Target::RISCV => CRATES_RISCV.iter(), + Target::Mips => CRATES_MIPS.iter(), + Target::Msp430 => CRATES_MSP430.iter(), + Target::XtensaLX => [].iter(), + Target::None => unreachable!(), + }) + .chain(if let Some(opts) = opts { + if opts.iter().any(|v| v.contains("atomics")) { + CRATES_ATOMICS.iter() + } else { + [].iter() + } + } else { + [].iter() + }) + .chain(PROFILE_ALL.iter()) + .chain(FEATURES_ALL.iter()) + .chain(match &self.arch { + Target::CortexM => FEATURES_CORTEX_M.iter(), + Target::XtensaLX => FEATURES_XTENSA_LX.iter(), + _ => [].iter(), + }) + .chain(WORKSPACE_EXCLUDE.iter()); + for fragments in cargo_toml_fragments { + writeln!(file, "{}", fragments).with_context(|| "Failed to append to file!")?; + } + Ok(()) + } + + fn prepare_svd_file(&self, chip_dir: &Path) -> Result { + tracing::info!("Downloading SVD"); + // FIXME: Avoid downloading multiple times, especially if we're using the diff command + let svd_url = &self.svd_url(); + let svd = reqwest::blocking::get(svd_url) + .with_context(|| format!("Failed to get svd URL: {svd_url}"))? + .error_for_status() + .with_context(|| anyhow!("Response is not ok for svd url"))? + .text() + .with_context(|| "SVD is bad text")?; + + let chip_svd = format!("{}.svd", &self.chip); + let svd_file = path_helper_base(chip_dir, &[&chip_svd]); + file_helper(&svd, &svd_file)?; + Ok(chip_svd) + } + + fn run_svd2rust( + &self, + svd2rust_bin_path: &Path, + chip_svd: &str, + chip_dir: &Path, + lib_rs_file: &PathBuf, + svd2rust_err_file: &PathBuf, + cli_opts: &Option>, + ) -> Result<(), TestError> { + tracing::info!("Running svd2rust"); + + let target = match self.arch { + Target::CortexM => "cortex-m", + Target::Msp430 => "msp430", + Target::Mips => "mips", + Target::RISCV => "riscv", + Target::XtensaLX => "xtensa-lx", + Target::None => unreachable!(), + }; + let mut svd2rust_bin = Command::new(svd2rust_bin_path); + + let base_cmd = svd2rust_bin + .args(["-i", chip_svd]) + .args(["--target", target]); + if let Some(cli_opts) = cli_opts { + base_cmd.args(cli_opts); + } + if let Some(opts) = self.opts.as_ref() { + base_cmd.args(opts); + } + base_cmd.current_dir(chip_dir).capture_outputs( + true, + "svd2rust", + Some(lib_rs_file).filter(|_| { + !matches!( + self.arch, + Target::CortexM | Target::Msp430 | Target::XtensaLX + ) + }), + Some(svd2rust_err_file), + &[], + )?; + Ok(()) + } } fn visit_dirs(dir: &Path, cb: &mut dyn FnMut(&fs::DirEntry)) -> std::io::Result<()> { @@ -386,3 +446,33 @@ fn visit_dirs(dir: &Path, cb: &mut dyn FnMut(&fs::DirEntry)) -> std::io::Result< } Ok(()) } + +pub struct WorkspaceTomlGuard { + pub unmodified_toml: Vec, + pub manifest_path: PathBuf, +} + +impl WorkspaceTomlGuard { + pub fn new() -> Result { + // XXX: Workaround for + // https://github.com/rust-lang/cargo/issues/6009#issuecomment-1925445245 + // Calling cargo init will add the chip test directory to the workspace members, regardless + // of the exclude list. The unmodified manifest path is stored here and written + // back after cargo init. + let manifest_path = crate::get_cargo_workspace().join("Cargo.toml"); + let unmodified_toml = + fs::read(&manifest_path).with_context(|| "error reading manifest file")?; + Ok(Self { + unmodified_toml, + manifest_path, + }) + } +} + +impl Drop for WorkspaceTomlGuard { + fn drop(&mut self) { + if let Err(e) = std::fs::write(self.manifest_path.clone(), &self.unmodified_toml) { + tracing::error!("Failed to write back to manifest Cargo.toml: {}", e); + } + } +} diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index f1562a5d..4e40d4da 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -72,10 +72,16 @@ pub struct TestCase { pub mfgr: Manufacturer, pub chip: String, #[serde(default, skip_serializing_if = "Option::is_none")] + pub suffix: Option, + #[serde(default, skip_serializing_if = "Option::is_none")] + pub opts: Option>, + #[serde(default, skip_serializing_if = "Option::is_none")] pub svd_url: Option, #[serde(default = "true_")] pub should_pass: bool, #[serde(default)] + pub skip_check: bool, + #[serde(default)] pub run_when: RunWhen, } @@ -103,7 +109,12 @@ impl TestCase { } pub fn name(&self) -> String { - format!("{:?}-{}", self.mfgr, self.chip.replace('.', "_")) + let mut base_name = format!("{:?}-{}", self.mfgr, self.chip.replace('.', "_")); + if let Some(suffix) = &self.suffix { + base_name.push('-'); + base_name.push_str(suffix); + } + base_name } } diff --git a/ci/svd2rust-regress/tests.yml b/ci/svd2rust-regress/tests.yml index 06501c71..27e08a6d 100644 --- a/ci/svd2rust-regress/tests.yml +++ b/ci/svd2rust-regress/tests.yml @@ -1,1914 +1,506 @@ -- arch: cortex-m - mfgr: Atmel - chip: AT91SAM9CN11 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: AT91SAM9CN12 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: AT91SAM9G09 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: AT91SAM9G15 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: AT91SAM9G20 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: AT91SAM9G25 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: AT91SAM9G35 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: AT91SAM9M10 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: AT91SAM9M11 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: AT91SAM9N12 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: AT91SAM9X25 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: AT91SAM9X35 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3A4C - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3A8C - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3N00A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3N00B - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3N0A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3N0B - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3N0C - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3N1A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3N1B - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3N1C - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3N2A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3N2B - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3N2C - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3N4A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3N4B - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3N4C - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3S1A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3S1B - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3S1C - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3S2A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3S2B - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3S2C - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3S4A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3S4B - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3S4C - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3S8B - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3S8C - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3SD8B - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3SD8C - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3U1C - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3U1E - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3U2C - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3U2E - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3U4C - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3U4E - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3X4C - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3X4E - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3X8C - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM3X8E - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM4S16B - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM4S16C - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM4S8B - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM4S8C - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM4SD32B - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAM4SD32C - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAMA5D31 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAMA5D33 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAMA5D34 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAMA5D35 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAMD21E15A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAMD21E16A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAMD21E17A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAMD21E18A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAMD21G16A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAMD21G17A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAMD21G18A - svd_url: https://raw.githubusercontent.com/wez/atsamd21-rs/master/svd/ATSAMD21G18A.svd - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Atmel - chip: ATSAMD21J16A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAMD21J17A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAMD21J18A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAMR21E16A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAMR21E17A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAMR21E18A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAMR21G16A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAMR21G17A - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Atmel - chip: ATSAMR21G18A - should_pass: false - run_when: never +# Atmel - BAD-SVD missing resetValue + +# Freescale - arch: cortex-m mfgr: Freescale - chip: MKV56F20 - should_pass: false - run_when: never + chip: MK02F12810 - arch: cortex-m mfgr: Freescale - chip: MKV56F22 - should_pass: false - run_when: never + chip: MK10D7 - arch: cortex-m mfgr: Freescale - chip: MKV56F24 - should_pass: false - run_when: never + chip: MK12D5 - arch: cortex-m mfgr: Freescale - chip: MKV58F20 - should_pass: false - run_when: never + chip: MK21D5 - arch: cortex-m mfgr: Freescale - chip: MKV58F22 - should_pass: false - run_when: never + chip: MK21F12 - arch: cortex-m mfgr: Freescale - chip: MKV58F24 - should_pass: false - run_when: never + chip: MK30D7 - arch: cortex-m mfgr: Freescale - chip: MK61F15 - should_pass: false - run_when: never + chip: MK40D7 - arch: cortex-m mfgr: Freescale - chip: MK61F15WS - should_pass: false - run_when: never + chip: MK52DZ10 - arch: cortex-m mfgr: Freescale - chip: MK70F12 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Freescale - chip: MK70F15 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Freescale - chip: MK70F15WS - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Freescale - chip: MK02F12810 -- arch: cortex-m - mfgr: Freescale - chip: MK10D10 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK10D5 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK10D7 -- arch: cortex-m - mfgr: Freescale - chip: MK10DZ10 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK10F12 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK11D5 -- arch: cortex-m - mfgr: Freescale - chip: MK11D5WS - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK11DA5 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK12D5 -- arch: cortex-m - mfgr: Freescale - chip: MK20D10 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK20D5 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK20D7 -- arch: cortex-m - mfgr: Freescale - chip: MK20DZ10 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK20F12 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK21D5 -- arch: cortex-m - mfgr: Freescale - chip: MK21D5WS - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK21DA5 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK21F12 -- arch: cortex-m - mfgr: Freescale - chip: MK21FA12 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK22D5 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK22F12 -- arch: cortex-m - mfgr: Freescale - chip: MK22F12810 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK22F25612 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK22F51212 -- arch: cortex-m - mfgr: Freescale - chip: MK22FA12 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK24F12 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK24F25612 -- arch: cortex-m - mfgr: Freescale - chip: MK26F18 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK30D10 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK30D7 -- arch: cortex-m - mfgr: Freescale - chip: MK30DZ10 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK40D10 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK40D7 -- arch: cortex-m - mfgr: Freescale - chip: MK40DZ10 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK50D10 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK50D7 -- arch: cortex-m - mfgr: Freescale - chip: MK50DZ10 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK51D10 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK51D7 -- arch: cortex-m - mfgr: Freescale - chip: MK51DZ10 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK52D10 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK52DZ10 -- arch: cortex-m - mfgr: Freescale - chip: MK53D10 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK53DZ10 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK60D10 -- arch: cortex-m - mfgr: Freescale - chip: MK60DZ10 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK60F15 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK63F12 -- arch: cortex-m - mfgr: Freescale - chip: MK64F12 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK65F18 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK66F18 -- arch: cortex-m - mfgr: Freescale - chip: MK80F25615 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MK81F25615 - should_pass: true - run_when: not-short + chip: MK66F18 - arch: cortex-m mfgr: Freescale chip: MK82F25615 -- arch: cortex-m - mfgr: Freescale - chip: MKE14F16 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKE14Z7 - should_pass: true - run_when: not-short - arch: cortex-m mfgr: Freescale chip: MKE15Z7 - arch: cortex-m - mfgr: Freescale - chip: MKE16F16 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKE18F16 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKL28T7_CORE0 -- arch: cortex-m - mfgr: Freescale - chip: MKL28T7_CORE1 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKL28Z7 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKL81Z7 -- arch: cortex-m - mfgr: Freescale - chip: MKL82Z7 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKS22F12 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKV10Z1287 -- arch: cortex-m - mfgr: Freescale - chip: MKV10Z7 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKV11Z7 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKV30F12810 -- arch: cortex-m - mfgr: Freescale - chip: MKV31F12810 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKV31F25612 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKV31F51212 -- arch: cortex-m - mfgr: Freescale - chip: MKV40F15 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKV42F16 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKV43F15 -- arch: cortex-m - mfgr: Freescale - chip: MKV44F15 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKV44F16 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKV45F15 -- arch: cortex-m - mfgr: Freescale - chip: MKV46F15 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKV46F16 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKW20Z4 -- arch: cortex-m - mfgr: Freescale - chip: MKW21D5 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKW21Z4 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKW22D5 -- arch: cortex-m - mfgr: Freescale - chip: MKW24D5 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKW30Z4 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKW31Z4 -- arch: cortex-m - mfgr: Freescale - chip: MKW40Z4 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKW41Z4 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKE02Z4 -- arch: cortex-m - mfgr: Freescale - chip: MKE04Z1284 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKE04Z4 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKE06Z4 -- arch: cortex-m - mfgr: Freescale - chip: MKE14D7 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKE15D7 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKL02Z4 -- arch: cortex-m - mfgr: Freescale - chip: MKL03Z4 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKL04Z4 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKL05Z4 -- arch: cortex-m - mfgr: Freescale - chip: MKL13Z644 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKL14Z4 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKL15Z4 -- arch: cortex-m - mfgr: Freescale - chip: MKL16Z4 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKL17Z4 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKL17Z644 -- arch: cortex-m - mfgr: Freescale - chip: MKL24Z4 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKL25Z4 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKL26Z4 -- arch: cortex-m - mfgr: Freescale - chip: MKL27Z4 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKL27Z644 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKL33Z4 -- arch: cortex-m - mfgr: Freescale - chip: MKL33Z644 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKL34Z4 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKL36Z4 -- arch: cortex-m - mfgr: Freescale - chip: MKL43Z4 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKL46Z4 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKM14ZA5 -- arch: cortex-m - mfgr: Freescale - chip: MKM33ZA5 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKM34Z7 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: MKM34ZA5 -- arch: cortex-m - mfgr: Freescale - chip: MKW01Z4 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: SKEAZ1284 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Freescale - chip: SKEAZN642 -- arch: cortex-m - mfgr: Freescale - chip: SKEAZN84 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF10xN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF10xR -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF11xK -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF11xL -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF11xM -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF11xN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF12xK -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF12xL -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF13xK -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF13xL -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF13xM -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF13xN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF14xL -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF14xM -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF14xN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF15xM -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF15xN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF15xR -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF1AxL -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF1AxM -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF1AxN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF31xK -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF31xL -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF31xM -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF31xN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF34xL -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF34xM -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF34xN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF42xK -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AF42xL -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AFA3xL -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AFA3xM -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AFA3xN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AFA4xL -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AFA4xM -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AFA4xN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AFAAxL -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AFAAxM -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AFAAxN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AFB4xL -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AFB4xM -- arch: cortex-m - mfgr: Fujitsu - chip: MB9AFB4xN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9B160L -- arch: cortex-m - mfgr: Fujitsu - chip: MB9B160R -- arch: cortex-m - mfgr: Fujitsu - chip: MB9B360L -- arch: cortex-m - mfgr: Fujitsu - chip: MB9B360R -- arch: cortex-m - mfgr: Fujitsu - chip: MB9B460L -- arch: cortex-m - mfgr: Fujitsu - chip: MB9B460R -- arch: cortex-m - mfgr: Fujitsu - chip: MB9B560L -- arch: cortex-m - mfgr: Fujitsu - chip: MB9B560R -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF10xN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF10xR -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF11xN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF11xR -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF11xS -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF11xT -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF12xJ -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF12xK -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF12xL -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF12xM -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF12xS -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF12xT -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF21xS -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF21xT -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF30xN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF30xR -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF31xN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF31xR -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF31xS -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF31xT -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF32xK -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF32xL -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF32xM -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF32xS -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF32xT -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF40xN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF40xR -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF41xN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF41xR -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF41xS -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF41xT -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF42xS -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF42xT -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF50xN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF50xR -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF51xN -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF51xR -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF51xS -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF51xT -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF52xK -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF52xL -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF52xM -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF52xS -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF52xT -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF61xS -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BF61xT -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BFD1xS -- arch: cortex-m - mfgr: Fujitsu - chip: MB9BFD1xT -- arch: cortex-m - mfgr: Fujitsu - chip: S6E1A1 -- arch: cortex-m - mfgr: Fujitsu - chip: S6E2CC -- arch: cortex-m - mfgr: Holtek - chip: ht32f125x -- arch: cortex-m - mfgr: Holtek - chip: ht32f175x -- arch: cortex-m - mfgr: Holtek - chip: ht32f275x -- arch: cortex-m - mfgr: Nordic - chip: nrf51 -- arch: cortex-m - mfgr: Nordic - chip: nrf52 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Nuvoton - chip: M051_Series - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Nuvoton - chip: NUC100_Series - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC11Exx_v5 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC11Uxx_v7 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC11xx_v6a - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC11xx_v6 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC13Uxx_v1 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC15xx_v0.7 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC800_v0.3 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC11E6x_v0.8 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC176x5x_v0.2 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC11Cxx_v9 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC178x_7x - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC178x_7x_v0.8 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC408x_7x_v0.7 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC11Axxv0.6 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC11D14_svd_v4 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC13xx_svd_v1 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC18xx_svd_v18 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC43xx_43Sxx - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC1102_4_v4 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: LPC5410x_v0.4 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: NXP - chip: MK22F25612 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: NXP - chip: MK22F51212 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: NXP - chip: MKW41Z4 - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: SiliconLabs - chip: SIM3C1x4_SVD - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: SiliconLabs - chip: SIM3C1x6_SVD - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: SiliconLabs - chip: SIM3C1x7_SVD - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: SiliconLabs - chip: SIM3L1x4_SVD - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: SiliconLabs - chip: SIM3L1x6_SVD - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: SiliconLabs - chip: SIM3L1x7_SVD - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: SiliconLabs - chip: SIM3U1x4_SVD - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: SiliconLabs - chip: SIM3U1x6_SVD - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: SiliconLabs - chip: SIM3U1x7_SVD - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: SiliconLabs - chip: SIM3L1x8_SVD - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Spansion - chip: MB9AF12xK - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Spansion - chip: MB9AF12xL - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Spansion - chip: MB9AF42xK - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Spansion - chip: MB9AF42xL - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Spansion - chip: MB9BF12xJ - should_pass: true - run_when: not-short + mfgr: Freescale + chip: MKL28T7_CORE0 - arch: cortex-m - mfgr: Spansion - chip: MB9BF12xS - should_pass: true - run_when: not-short + mfgr: Freescale + chip: MKL81Z7 - arch: cortex-m - mfgr: Spansion - chip: MB9BF12xT - should_pass: true - run_when: not-short + mfgr: Freescale + chip: MKV10Z1287 - arch: cortex-m - mfgr: Spansion - chip: MB9BF16xx - should_pass: true - run_when: not-short + mfgr: Freescale + chip: MKV31F51212 - arch: cortex-m - mfgr: Spansion - chip: MB9BF32xS - should_pass: true - run_when: not-short + mfgr: Freescale + chip: MKV45F15 - arch: cortex-m - mfgr: Spansion - chip: MB9BF32xT - should_pass: true - run_when: not-short + mfgr: Freescale + chip: MKW22D5 - arch: cortex-m - mfgr: Spansion - chip: MB9BF36xx - should_pass: true - run_when: not-short + mfgr: Freescale + chip: MKE02Z4 - arch: cortex-m - mfgr: Spansion - chip: MB9BF42xS - should_pass: true - run_when: not-short + mfgr: Freescale + chip: MKE06Z4 - arch: cortex-m - mfgr: Spansion - chip: MB9BF42xT - should_pass: true - run_when: not-short + mfgr: Freescale + chip: MKL05Z4 - arch: cortex-m - mfgr: Spansion - chip: MB9BF46xx - should_pass: true - run_when: not-short + mfgr: Freescale + chip: MKL17Z644 - arch: cortex-m - mfgr: Spansion - chip: MB9BF52xS - should_pass: true - run_when: not-short + mfgr: Freescale + chip: MKL36Z4 - arch: cortex-m - mfgr: Spansion - chip: MB9BF52xT - should_pass: true - run_when: not-short + mfgr: Freescale + chip: MKM14ZA5 - arch: cortex-m - mfgr: Spansion - chip: MB9BF56xx - should_pass: true - run_when: not-short + mfgr: Freescale + chip: MKM34ZA5 - arch: cortex-m - mfgr: Spansion + mfgr: Freescale + chip: SKEAZN642 + +# Fujitsu +- arch: cortex-m + mfgr: Fujitsu chip: MB9AF10xN - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AF10xR - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AF11xK - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AF11xL - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AF11xM - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AF11xN - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu + chip: MB9AF12xK +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF12xL +- arch: cortex-m + mfgr: Fujitsu chip: MB9AF13xK - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AF13xL - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AF13xM - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AF13xN - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AF14xL - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AF14xM - arch: cortex-m - mfgr: Spansion - chip: MB9AF14xN - should_pass: true - run_when: not-short -- arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AF15xM - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AF15xN - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AF15xR - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu + chip: MB9AF1AxL +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF1AxM +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF1AxN +- arch: cortex-m + mfgr: Fujitsu chip: MB9AF31xK - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AF31xL - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AF31xM - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AF31xN - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AF34xL - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AF34xM - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AF34xN - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu + chip: MB9AF42xK +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AF42xL +- arch: cortex-m + mfgr: Fujitsu chip: MB9AFA3xL - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AFA3xM - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AFA3xN - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AFA4xL - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AFA4xM - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AFA4xN - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu + chip: MB9AFAAxL +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFAAxM +- arch: cortex-m + mfgr: Fujitsu + chip: MB9AFAAxN +- arch: cortex-m + mfgr: Fujitsu chip: MB9AFB4xL - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AFB4xM - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9AFB4xN - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu + chip: MB9B160L +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B160R +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B360L +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B360R +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B460L +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B460R +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B560L +- arch: cortex-m + mfgr: Fujitsu + chip: MB9B560R +- arch: cortex-m + mfgr: Fujitsu chip: MB9BF10xN - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF10xR - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF11xN - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF11xR - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF11xS - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF11xT - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu + chip: MB9BF12xJ +- arch: cortex-m + mfgr: Fujitsu chip: MB9BF12xK - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF12xL - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF12xM - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu + chip: MB9BF12xS +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF12xT +- arch: cortex-m + mfgr: Fujitsu chip: MB9BF21xS - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF21xT - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF30xN - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF30xR - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF31xN - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF31xR - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF31xS - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF31xT - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF32xK - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF32xL - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF32xM - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu + chip: MB9BF32xS +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF32xT +- arch: cortex-m + mfgr: Fujitsu chip: MB9BF40xN - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF40xR - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF41xN - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF41xR - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF41xS - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF41xT - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu + chip: MB9BF42xS +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF42xT +- arch: cortex-m + mfgr: Fujitsu chip: MB9BF50xN - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF50xR - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF51xN - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF51xR - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF51xS - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF51xT - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF52xK - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF52xL - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF52xM - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu + chip: MB9BF52xS +- arch: cortex-m + mfgr: Fujitsu + chip: MB9BF52xT +- arch: cortex-m + mfgr: Fujitsu chip: MB9BF61xS - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BF61xT - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BFD1xS - arch: cortex-m - mfgr: Spansion + mfgr: Fujitsu chip: MB9BFD1xT - should_pass: true - run_when: not-short - arch: cortex-m - mfgr: STMicro - chip: STM32F030 + mfgr: Fujitsu + chip: S6E1A1 + +# GD32 + +# Holtek - arch: cortex-m - mfgr: STMicro - chip: STM32F0x2 - svd_url: https://stm32-rs.github.io/stm32-rs/stm32f0x2.svd.patched + mfgr: Holtek + chip: ht32f125x - arch: cortex-m - mfgr: STMicro - chip: STM32F103 - svd_url: https://stm32-rs.github.io/stm32-rs/stm32f103.svd.patched + mfgr: Holtek + chip: ht32f175x - arch: cortex-m - mfgr: STMicro - chip: STM32F411 - svd_url: https://stm32-rs.github.io/stm32-rs/stm32f411.svd.patched + mfgr: Holtek + chip: ht32f275x + +# Microchip +- arch: mips + mfgr: Microchip + chip: pic32mx170f256b + svd_url: https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx1xxfxxxb/PIC32MX170F256B.svd.patched +- arch: mips + mfgr: Microchip + chip: pic32mx270f256b + svd_url: https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx2xxfxxxb/PIC32MX270F256B.svd.patched + +# Nordic - arch: cortex-m - mfgr: STMicro - chip: STM32F469 - svd_url: https://stm32-rs.github.io/stm32-rs/stm32f469.svd.patched + mfgr: Nordic + chip: nrf51 - arch: cortex-m - mfgr: STMicro - chip: STM32F723 - svd_url: https://stm32-rs.github.io/stm32-rs/stm32f723.svd.patched + mfgr: Nordic + chip: nrf52 + should_pass: false + run_when: never + +# Nuvoton - arch: cortex-m - mfgr: STMicro - chip: STM32G070 - svd_url: https://stm32-rs.github.io/stm32-rs/stm32g070.svd.patched + mfgr: Nuvoton + chip: NUC100_Series - arch: cortex-m - mfgr: STMicro - chip: STM32G473 - svd_url: https://stm32-rs.github.io/stm32-rs/stm32g473.svd.patched + mfgr: Nuvoton + chip: M051_Series + +# NXP - arch: cortex-m - mfgr: STMicro - chip: STM32H753 - svd_url: https://stm32-rs.github.io/stm32-rs/stm32h753.svd.patched + mfgr: NXP + chip: MK22F25612 - arch: cortex-m - mfgr: STMicro - chip: STM32L0x3 - svd_url: https://stm32-rs.github.io/stm32-rs/stm32l0x3.svd.patched + mfgr: NXP + chip: MKW41Z4 + +# MSP430 +- arch: msp430 + mfgr: TexasInstruments + chip: msp430g2553 + skip_check: true + svd_url: https://github.com/pftbest/msp430g2553/raw/v0.3.0-svd/msp430g2553.svd +- arch: msp430 + mfgr: TexasInstruments + chip: msp430fr2355 + skip_check: true + svd_url: https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/master/msp430fr2355.svd + +# RISC-V +- arch: riscv + mfgr: SiFive + chip: e310x + svd_url: https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x/e310x.svd +- arch: riscv + mfgr: SiFive + chip: fu540 + svd_url: https://raw.githubusercontent.com/riscv-rust/fu540-pac/master/fu540.svd + +# SiliconLabs - arch: cortex-m - mfgr: STMicro - chip: STM32L162 - svd_url: https://stm32-rs.github.io/stm32-rs/stm32l162.svd.patched + mfgr: SiliconLabs + chip: SIM3C1x4_SVD + svd_url: https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3C1x4.svd - arch: cortex-m - mfgr: STMicro - chip: STM32L4x6 - svd_url: https://stm32-rs.github.io/stm32-rs/stm32l4x6.svd.patched + mfgr: SiliconLabs + chip: SIM3C1x6_SVD + svd_url: https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3C1x6.svd - arch: cortex-m - mfgr: STMicro - chip: STM32L562 - svd_url: https://stm32-rs.github.io/stm32-rs/stm32l562.svd.patched + mfgr: SiliconLabs + chip: SIM3C1x7_SVD + svd_url: https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3C1x7.svd - arch: cortex-m - mfgr: STMicro - chip: STM32MP157 - svd_url: https://stm32-rs.github.io/stm32-rs/stm32mp157.svd.patched + mfgr: SiliconLabs + chip: SIM3L1x4_SVD + svd_url: https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3L1x4.svd - arch: cortex-m - mfgr: STMicro - chip: STM32WB55 - svd_url: https://stm32-rs.github.io/stm32-rs/stm32wb55.svd.patched + mfgr: SiliconLabs + chip: SIM3L1x6_SVD + svd_url: https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3L1x6.svd - arch: cortex-m - mfgr: STMicro - chip: STM32WLE5 - svd_url: https://stm32-rs.github.io/stm32-rs/stm32wle5.svd.patched + mfgr: SiliconLabs + chip: SIM3L1x7_SVD + svd_url: https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3L1x7.svd +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3U1x4_SVD + svd_url: https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3U1x4.svd +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3U1x6_SVD + svd_url: https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3U1x6.svd +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3U1x7_SVD + svd_url: https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3U1x7.svd +- arch: cortex-m + mfgr: SiliconLabs + chip: SIM3L1x8_SVD + svd_url: https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3L1x8.svd + +# Spansion +- arch: cortex-m + mfgr: Spansion + chip: MB9BF36xx +- arch: cortex-m + mfgr: Spansion + chip: MB9BF46xx +- arch: cortex-m + mfgr: Spansion + chip: MB9BF56xx + +# STMicro - arch: cortex-m mfgr: STMicro - chip: STM32C011 - svd_url: https://stm32-rs.github.io/stm32-rs/stm32c011.svd.patched + chip: STM32F030 - arch: cortex-m mfgr: STMicro chip: STM32F031x @@ -1929,13 +521,7 @@ chip: STM32F100xx - arch: cortex-m mfgr: STMicro - chip: STM32F101xx -- arch: cortex-m - mfgr: STMicro - chip: STM32F102xx -- arch: cortex-m - mfgr: STMicro - chip: STM32F105xx + chip: STM32F103xx - arch: cortex-m mfgr: STMicro chip: STM32F107xx @@ -1948,33 +534,18 @@ - arch: cortex-m mfgr: STMicro chip: STM32F301 -- arch: cortex-m - mfgr: STMicro - chip: STM32F302 - arch: cortex-m mfgr: STMicro chip: STM32F303 -- arch: cortex-m - mfgr: STMicro - chip: STM32F3x4 -- arch: cortex-m - mfgr: STMicro - chip: STM32F373 - arch: cortex-m mfgr: STMicro chip: STM32F401 -- arch: cortex-m - mfgr: STMicro - chip: STM32F405 - arch: cortex-m mfgr: STMicro chip: STM32F407 - arch: cortex-m mfgr: STMicro chip: STM32F410 -- arch: cortex-m - mfgr: STMicro - chip: STM32F412 - arch: cortex-m mfgr: STMicro chip: STM32F413 @@ -1989,151 +560,132 @@ chip: STM32F446 - arch: cortex-m mfgr: STMicro - chip: STM32F7x -- arch: cortex-m - mfgr: STMicro - chip: STM32F7x2 -- arch: cortex-m - mfgr: STMicro - chip: STM32F7x5 + chip: STM32L100 - arch: cortex-m mfgr: STMicro - chip: STM32F7x6 + chip: STM32L15xC - arch: cortex-m mfgr: STMicro - chip: STM32F7x7 + chip: STM32L15xxE - arch: cortex-m mfgr: STMicro - chip: STM32F7x9 + chip: STM32L15xxxA - arch: cortex-m mfgr: STMicro - chip: STM32G07x - should_pass: false - run_when: never + chip: STM32L1xx - arch: cortex-m mfgr: STMicro - chip: STM32G431xx + chip: STM32W108 +# Patched - arch: cortex-m mfgr: STMicro - chip: STM32G441xx + chip: STM32F0x2 + suffix: patched + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f0x2.svd.patched - arch: cortex-m mfgr: STMicro - chip: STM32G471xx + chip: STM32F103 + suffix: patched + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f103.svd.patched - arch: cortex-m mfgr: STMicro - chip: STM32G474xx + chip: STM32F411 + suffix: patched + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f411.svd.patched - arch: cortex-m mfgr: STMicro - chip: STM32G483xx + chip: STM32F469 + suffix: patched + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f469.svd.patched - arch: cortex-m mfgr: STMicro - chip: STM32G484xx + chip: STM32F723 + suffix: patched + svd_url: https://stm32-rs.github.io/stm32-rs/stm32f723.svd.patched - arch: cortex-m mfgr: STMicro - chip: STM32L100 + chip: STM32G070 + suffix: patched + svd_url: https://stm32-rs.github.io/stm32-rs/stm32g070.svd.patched - arch: cortex-m mfgr: STMicro - chip: STM32L15xC + chip: STM32G473 + suffix: patched + svd_url: https://stm32-rs.github.io/stm32-rs/stm32g473.svd.patched - arch: cortex-m mfgr: STMicro - chip: STM32L15xxE + chip: STM32H743 + suffix: patched + svd_url: https://stm32-rs.github.io/stm32-rs/stm32h743.svd.patched - arch: cortex-m mfgr: STMicro - chip: STM32L15xxxA + chip: STM32L0x3 + suffix: patched + svd_url: https://stm32-rs.github.io/stm32-rs/stm32l0x3.svd.patched - arch: cortex-m mfgr: STMicro - chip: STM32L1xx + chip: STM32L162 + suffix: patched + svd_url: https://stm32-rs.github.io/stm32-rs/stm32l162.svd.patched - arch: cortex-m mfgr: STMicro - chip: STM32W108 + chip: STM32L4x6 + suffix: patched + svd_url: https://stm32-rs.github.io/stm32-rs/stm32l4x6.svd.patched - arch: cortex-m mfgr: STMicro - chip: STM32L051x - should_pass: false - run_when: never + chip: STM32L562 + suffix: patched + svd_url: https://stm32-rs.github.io/stm32-rs/stm32l562.svd.patched - arch: cortex-m mfgr: STMicro - chip: STM32L052x - should_pass: false - run_when: never + chip: STM32MP157 + svd_url: https://stm32-rs.github.io/stm32-rs/stm32mp157.svd.patched - arch: cortex-m mfgr: STMicro - chip: STM32L053x - should_pass: false - run_when: never + chip: STM32WB55 + suffix: patched + svd_url: https://stm32-rs.github.io/stm32-rs/stm32wb55.svd.patched - arch: cortex-m mfgr: STMicro - chip: STM32L062x - should_pass: false - run_when: never + chip: STM32WLE5 + suffix: patched + svd_url: https://stm32-rs.github.io/stm32-rs/stm32wle5.svd.patched - arch: cortex-m mfgr: STMicro - chip: STM32L063x - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Toshiba - chip: M365 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Toshiba - chip: M367 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Toshiba - chip: M368 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Toshiba - chip: M369 - should_pass: false - run_when: never -- arch: cortex-m - mfgr: Toshiba - chip: M36B - should_pass: false - run_when: never + chip: STM32C011 + suffix: patched + svd_url: https://stm32-rs.github.io/stm32-rs/stm32c011.svd.patched + +# Toschiba - arch: cortex-m mfgr: Toshiba chip: M061 -- arch: riscv - mfgr: SiFive - chip: E310x - svd_url: https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x/e310x.svd - should_pass: false - run_when: never -- arch: msp430 - mfgr: TexasInstruments - chip: msp430g2553 - svd_url: https://github.com/pftbest/msp430g2553/raw/v0.1.3-svd/msp430g2553.svd -- arch: msp430 - mfgr: TexasInstruments - chip: msp430fr2355 - svd_url: https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/master/msp430fr2355.svd + +# Espressif +# Xtensa requires special LLVM fork and nightly compiler, so skip the checks for now. - arch: xtensa-lx mfgr: Espressif chip: esp32 + opts: + - --ident-formats-theme + - legacy svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32.svd - arch: xtensa-lx mfgr: Espressif chip: esp32s2 + opts: + - --ident-formats-theme + - legacy svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s2.svd - arch: xtensa-lx mfgr: Espressif chip: esp32s3 + opts: + - --ident-formats-theme + - legacy svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s3.svd - arch: riscv mfgr: Espressif chip: esp32c3 svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32c3.svd -- arch: mips - mfgr: Microchip - chip: pic32mx170f256b - svd_url: https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx1xxfxxxb/PIC32MX170F256B.svd.patched -- arch: mips - mfgr: Microchip - chip: pic32mx270f256b - svd_url: https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx2xxfxxxb/PIC32MX270F256B.svd.patched diff --git a/src/util.rs b/src/util.rs index f97cb378..fd7bb3c2 100644 --- a/src/util.rs +++ b/src/util.rs @@ -71,9 +71,9 @@ impl Case { }, } } + pub fn sanitize<'a>(&self, s: &'a str) -> Cow<'a, str> { let s = sanitize(s); - self.cow_to_case(s) } } From 3807ab428f0e504e7cfff660e70be9b96c75bfff Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 7 Feb 2025 12:16:10 +0300 Subject: [PATCH 300/319] fix cluster derive --- src/generate/peripheral.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 5fd01178..72450077 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -1410,8 +1410,8 @@ fn cluster_block( Ok(quote! { #[doc = #description] - pub use self::#derived as #block_ty; - pub use self::#mod_derived as #mod_ty; + pub use #derived as #block_ty; + pub use #mod_derived as #mod_ty; }) } else { let cpath = path.new_cluster(&c.name); From 0e17ebfa6839407c510e5ac1b22a93be0bbff386 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rom=C3=A1n=20C=C3=A1rdenas=20Rodr=C3=ADguez?= Date: Sat, 8 Feb 2025 12:20:13 +0100 Subject: [PATCH 301/319] Add mtvec_align for RISC-V --- CHANGELOG.md | 1 + src/config.rs | 12 +++++++++++- src/config/riscv.rs | 19 +++++++++++++++++++ src/lib.rs | 2 +- src/main.rs | 6 +++++- src/util.rs | 6 +++++- 6 files changed, 42 insertions(+), 4 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 312c949a..6604f511 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Add `mtvec_align` field to `riscv_config` to configure the byte alignment of interrupt vector table. - Fix reexport path when "%s" inside "derivedFrom" - Force using rust edition 2021 in CI - Added lifetime ellision for `FieldWriter` where the explicit lifetimes are not necessary, which diff --git a/src/config.rs b/src/config.rs index ca6ced37..024d8b78 100644 --- a/src/config.rs +++ b/src/config.rs @@ -1,5 +1,5 @@ use anyhow::{bail, Result}; -use proc_macro2::Span; +use proc_macro2::{Span, TokenStream}; use std::{ collections::HashMap, ops::{Deref, DerefMut}, @@ -46,6 +46,12 @@ pub struct Config { pub settings: Settings, } +impl Config { + pub fn extra_build(&self) -> Option { + self.settings.extra_build() + } +} + #[allow(clippy::upper_case_acronyms)] #[allow(non_camel_case_types)] #[cfg_attr(feature = "serde", derive(serde::Deserialize, serde::Serialize))] @@ -345,6 +351,10 @@ impl Settings { self.riscv_config = source.riscv_config; } } + + pub fn extra_build(&self) -> Option { + self.riscv_config.as_ref().and_then(|cfg| cfg.extra_build()) + } } #[derive(Clone, PartialEq, Eq, Debug)] diff --git a/src/config/riscv.rs b/src/config/riscv.rs index 2091bc2f..90100762 100644 --- a/src/config/riscv.rs +++ b/src/config/riscv.rs @@ -1,3 +1,6 @@ +use proc_macro2::TokenStream; +use quote::quote; + #[cfg_attr(feature = "serde", derive(serde::Deserialize), serde(default))] #[derive(Clone, PartialEq, Eq, Debug, Default)] #[non_exhaustive] @@ -8,6 +11,22 @@ pub struct RiscvConfig { pub harts: Vec, pub clint: Option, pub plic: Option, + pub mtvec_align: Option, +} + +impl RiscvConfig { + pub fn extra_build(&self) -> Option { + self.mtvec_align.map(|align| { + quote! { + // set environment variable RISCV_MTVEC_ALIGN enfoce correct byte alignment of interrupt vector. + println!( + "cargo:rustc-env=RISCV_MTVEC_ALIGN={}", + #align + ); + println!("cargo:rerun-if-env-changed=RISCV_MTVEC_ALIGN"); + } + }) + } } #[cfg_attr(feature = "serde", derive(serde::Deserialize), serde(default))] diff --git a/src/lib.rs b/src/lib.rs index b5d5c4ab..ce3779ad 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -671,7 +671,7 @@ pub fn generate(input: &str, config: &Config) -> Result { } else { Some(DeviceSpecific { device_x, - build_rs: util::build_rs().to_string(), + build_rs: util::build_rs(&config).to_string(), }) }; diff --git a/src/main.rs b/src/main.rs index 27607bfc..d1dc1f4a 100755 --- a/src/main.rs +++ b/src/main.rs @@ -366,7 +366,11 @@ Ignore this option if you are not building your own FPGA based soft-cores."), .contains(&config.target) { writeln!(File::create(path.join("device.x"))?, "{device_x}")?; - writeln!(File::create(path.join("build.rs"))?, "{}", build_rs())?; + writeln!( + File::create(path.join("build.rs"))?, + "{}", + build_rs(&config) + )?; } if config.feature_group || config.feature_peripheral { diff --git a/src/util.rs b/src/util.rs index fd7bb3c2..dbf0dde5 100644 --- a/src/util.rs +++ b/src/util.rs @@ -399,7 +399,9 @@ impl U32Ext for u32 { } } -pub fn build_rs() -> TokenStream { +pub fn build_rs(config: &Config) -> TokenStream { + let extra_build = config.extra_build(); + quote! { //! Builder file for Peripheral access crate generated by svd2rust tool @@ -419,6 +421,8 @@ pub fn build_rs() -> TokenStream { println!("cargo:rustc-link-search={}", out.display()); println!("cargo:rerun-if-changed=device.x"); + + #extra_build } println!("cargo:rerun-if-changed=build.rs"); From c27e1110f90568aaa1d9e863d50096631e570781 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Mon, 10 Feb 2025 09:52:32 +0100 Subject: [PATCH 302/319] add Vorago va108xx chip to CI --- .github/workflows/ci.yml | 2 ++ ci/svd2rust-regress/src/tests.rs | 2 ++ ci/svd2rust-regress/tests.yml | 6 ++++++ 3 files changed, 10 insertions(+) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index c7e7756e..c87e2126 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -90,6 +90,8 @@ jobs: - { vendor: TexasInstruments, options: "-- --atomics" } - { vendor: Espressif } - { vendor: Espressif, options: "-- --atomics" } + - { vendor: Vorago } + - { vendor: Vorago, options: "-- --strict --atomics" } steps: - uses: actions/checkout@v4 diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index 4e40d4da..e71accbd 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -22,6 +22,7 @@ pub enum Manufacturer { Toshiba, SiFive, TexasInstruments, + Vorago, Espressif, Unknown, } @@ -40,6 +41,7 @@ impl Manufacturer { NXP, SiliconLabs, Spansion, + Vorago, STMicro, Toshiba, SiFive, diff --git a/ci/svd2rust-regress/tests.yml b/ci/svd2rust-regress/tests.yml index 27e08a6d..5d26bbb1 100644 --- a/ci/svd2rust-regress/tests.yml +++ b/ci/svd2rust-regress/tests.yml @@ -689,3 +689,9 @@ mfgr: Espressif chip: esp32c3 svd_url: https://raw.githubusercontent.com/espressif/svd/main/svd/esp32c3.svd + +# Vorago +- arch: cortex-m + mfgr: Vorago + chip: va108xx + svd_url: https://raw.githubusercontent.com/us-irs/va108xx-rs/refs/heads/main/va108xx/svd/va108xx.svd.patched From 1cacf2502ab7fcd8d6ffc09f4b921124748c9ad7 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 8 Feb 2025 13:40:50 +0300 Subject: [PATCH 303/319] update to svd-rs 0.14.11 --- CHANGELOG.md | 1 + Cargo.lock | 8 ++++---- Cargo.toml | 4 ++-- src/generate/register.rs | 27 +++++++++------------------ 4 files changed, 16 insertions(+), 24 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 6604f511..d8c1c50e 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -15,6 +15,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Some fixes for the `svd2rust-regress` tool and update of its documentation - Other internal clippy fixes for `clippy::manual_div_ceil`, `clippy::nonminimal_bool` and `clippy::needless_lifetimes` +- Update `svd-rs` to 0.14.11 ## [v0.35.0] - 2024-11-12 diff --git a/Cargo.lock b/Cargo.lock index 9dc97544..049e0245 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1335,9 +1335,9 @@ checksum = "7da8b5736845d9f2fcb837ea5d9e2628564b3b043a70948a3f0b778838c5fb4f" [[package]] name = "svd-parser" -version = "0.14.7" +version = "0.14.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "39ba83b8a290ee3a180051e10a043691bb91d1b6be2053a570936fbdbec5ee2b" +checksum = "5ee7838c1b248b3418519826888d6ed2be881092ccd815bf350bd713b1d9f687" dependencies = [ "anyhow", "roxmltree", @@ -1347,9 +1347,9 @@ dependencies = [ [[package]] name = "svd-rs" -version = "0.14.9" +version = "0.14.11" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3e49a90f3c4d03d81687e81d41b00f349fd44ccf9c26e0185ee926968de093bb" +checksum = "1ec61cc12f8001859a87cca405aa84bfb2e5a083cfbf2eea804e5c23b6ad5a76" dependencies = [ "once_cell", "regex", diff --git a/Cargo.toml b/Cargo.toml index 0acbc255..c878da9a 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -58,11 +58,11 @@ url = { version = "2.5", features = ["serde"] } [dependencies.svd-parser] features = ["expand"] -version = "0.14.7" +version = "0.14.8" [dependencies.svd-rs] features = ["serde"] -version = "0.14.9" +version = "0.14.11" [dependencies.syn] version = "2.0" diff --git a/src/generate/register.rs b/src/generate/register.rs index 56e72472..7ff3c265 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -1341,24 +1341,15 @@ pub fn fields( }); } - // Update register modify bit masks - let offsets = match f { - MaybeArray::Array(info, dim) => (0..dim.dim) - .map(|i| i * dim.dim_increment + info.bit_offset()) - .collect(), - MaybeArray::Single(info) => vec![info.bit_offset()], - }; - for o in offsets { - let bitmask = (u64::MAX >> (64 - width)) << o; - use ModifiedWriteValues::*; - match mwv { - Modify | Set | Clear => {} - OneToSet | OneToClear | OneToToggle => { - one_to_modify_fields_bitmap |= bitmask; - } - ZeroToClear | ZeroToSet | ZeroToToggle => { - zero_to_modify_fields_bitmap |= bitmask; - } + let bitmask = f.bitmask(); + use ModifiedWriteValues::*; + match mwv { + Modify | Set | Clear => {} + OneToSet | OneToClear | OneToToggle => { + one_to_modify_fields_bitmap |= bitmask; + } + ZeroToClear | ZeroToSet | ZeroToToggle => { + zero_to_modify_fields_bitmap |= bitmask; } } } From 4b63081fbf797c4aea94e9b898e4b1ee278dd5a5 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Thu, 13 Feb 2025 11:57:35 +0100 Subject: [PATCH 304/319] try to display SVD URL for tracing --- ci/svd2rust-regress/src/svd_test.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index 4801bd3e..aa92752b 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -137,7 +137,7 @@ impl CommandHelper for Command { } impl TestCase { - #[tracing::instrument(skip(self, opts), fields(name = %self.name()))] + #[tracing::instrument(skip(self, opts), fields(name = %self.name(), svd=%self.svd_url()))] pub fn test( &self, opts: &Opts, From 977653183ec032b83603874f0dfe0318df1f8125 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Wed, 15 Jan 2025 17:48:35 +0100 Subject: [PATCH 305/319] improve docs of generated library --- CHANGELOG.md | 2 ++ src/generate/device.rs | 1 + src/lib.rs | 17 +++++++++++++++++ 3 files changed, 20 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index d8c1c50e..0c702336 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -16,6 +16,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Other internal clippy fixes for `clippy::manual_div_ceil`, `clippy::nonminimal_bool` and `clippy::needless_lifetimes` - Update `svd-rs` to 0.14.11 +- Added `#![cfg_attr(docsrs, feature(doc_auto_cfg))]` to the generated library code. This + adds a display of the feature gates in the documentation of the generated library ## [v0.35.0] - 2024-11-12 diff --git a/src/generate/device.rs b/src/generate/device.rs index d2b3ee9c..7092953a 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -59,6 +59,7 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result Date: Thu, 13 Feb 2025 12:02:28 +0100 Subject: [PATCH 306/319] Add Raspberry Pi to CI --- .github/workflows/ci.yml | 2 ++ ci/svd2rust-regress/src/tests.rs | 2 ++ ci/svd2rust-regress/tests.yml | 8 ++++++++ 3 files changed, 12 insertions(+) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index c87e2126..e92c4a31 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -92,6 +92,8 @@ jobs: - { vendor: Espressif, options: "-- --atomics" } - { vendor: Vorago } - { vendor: Vorago, options: "-- --strict --atomics" } + - { vendor: RaspberryPi } + - { vendor: RaspberryPi, options: "-- --atomics" } steps: - uses: actions/checkout@v4 diff --git a/ci/svd2rust-regress/src/tests.rs b/ci/svd2rust-regress/src/tests.rs index e71accbd..c7ebc083 100644 --- a/ci/svd2rust-regress/src/tests.rs +++ b/ci/svd2rust-regress/src/tests.rs @@ -24,6 +24,7 @@ pub enum Manufacturer { TexasInstruments, Vorago, Espressif, + RaspberryPi, Unknown, } @@ -45,6 +46,7 @@ impl Manufacturer { STMicro, Toshiba, SiFive, + RaspberryPi, TexasInstruments, Espressif, ] diff --git a/ci/svd2rust-regress/tests.yml b/ci/svd2rust-regress/tests.yml index 5d26bbb1..73a87549 100644 --- a/ci/svd2rust-regress/tests.yml +++ b/ci/svd2rust-regress/tests.yml @@ -695,3 +695,11 @@ mfgr: Vorago chip: va108xx svd_url: https://raw.githubusercontent.com/us-irs/va108xx-rs/refs/heads/main/va108xx/svd/va108xx.svd.patched + +# Raspberry Pi +- arch: cortex-m + mfgr: RaspberryPi + chip: rp2040 +- arch: cortex-m + mfgr: RaspberryPi + chip: rp2350 From 71f1c5e7322e6a29ffe7c1eccb3e93d1d54b83f8 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 2 Mar 2025 10:56:42 +0300 Subject: [PATCH 307/319] regress with edition 2021 --- Cargo.lock | 669 ++++++++++++++++++---------- ci/svd2rust-regress/Cargo.toml | 2 +- ci/svd2rust-regress/src/svd_test.rs | 1 + 3 files changed, 447 insertions(+), 225 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 049e0245..6caca339 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -67,19 +67,20 @@ dependencies = [ [[package]] name = "anstyle-wincon" -version = "3.0.6" +version = "3.0.7" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "2109dbce0e72be3ec00bed26e6a7479ca384ad226efdd66db8fa2e3a38c83125" +checksum = "ca3534e77181a9cc07539ad51f2141fe32f6c3ffd4df76db8ad92346b003ae4e" dependencies = [ "anstyle", + "once_cell", "windows-sys 0.59.0", ] [[package]] name = "anyhow" -version = "1.0.93" +version = "1.0.96" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4c95c10ba0b00a02636238b814946408b1322d5ac4760326e6fb8ec956d85775" +checksum = "6b964d184e89d9b6b67dd2715bc8e74cf3107fb2b529990c90cf517326150bf4" [[package]] name = "arrayref" @@ -93,6 +94,12 @@ version = "0.7.6" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "7c02d123df017efcdfbd739ef81735b36c5ba83ec3c59c80a9d7ecc718f92e50" +[[package]] +name = "atomic-waker" +version = "1.1.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1505bd5d3d116872e7271a6d4e16d81d0c8570876c8de68093a09ac269d8aac0" + [[package]] name = "autocfg" version = "1.4.0" @@ -116,27 +123,21 @@ dependencies = [ [[package]] name = "base64" -version = "0.21.7" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "9d297deb1925b89f2ccc13d7635fa0714f12c87adce1c75356b39ca9b7178567" - -[[package]] -name = "bitflags" -version = "1.3.2" +version = "0.22.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "bef38d45163c2f1dde094a7dfd33ccf595c92905c8f8f4fdc18d06fb1037718a" +checksum = "72b3254f16251a8381aa12e40e3c4d2f0199f8c6508fbecb9d91f575e0fbb8c6" [[package]] name = "bitflags" -version = "2.6.0" +version = "2.9.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b048fb63fd8b5923fc5aa7b340d8e156aec7ec02f0c78fa8a6ddc2613f6f71de" +checksum = "5c8214115b7bf84099f1309324e63141d4c5d7cc26862f97a0a857dbefe165bd" [[package]] name = "blake2b_simd" -version = "1.0.2" +version = "1.0.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "23285ad32269793932e830392f2fe2f83e26488fd3ec778883a93c8323735780" +checksum = "06e903a20b159e944f91ec8499fe1e55651480c541ea0a584f5d967c49ad9d99" dependencies = [ "arrayref", "arrayvec", @@ -145,21 +146,21 @@ dependencies = [ [[package]] name = "bumpalo" -version = "3.16.0" +version = "3.17.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "79296716171880943b8470b5f8d03aa55eb2e645a4874bdbb28adb49162e012c" +checksum = "1628fb46dfa0b37568d12e5edd512553eccf6a22a78e8bde00bb4aed84d5bdbf" [[package]] name = "bytes" -version = "1.8.0" +version = "1.10.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "9ac0150caa2ae65ca5bd83f25c7de183dea78d4d366469f148435e2acfbad0da" +checksum = "f61dac84819c6588b558454b194026eb1f09c293b9036ae9b159e74e73ab6cf9" [[package]] name = "cc" -version = "1.2.0" +version = "1.2.16" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1aeb932158bd710538c73702db6945cb68a8fb08c519e6e12706b94263b36db8" +checksum = "be714c154be609ec7f5dad223a33bf1482fff90472de28f7362806e6d4832b8c" dependencies = [ "shlex", ] @@ -172,9 +173,9 @@ checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd" [[package]] name = "clap" -version = "4.5.20" +version = "4.5.31" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b97f376d85a664d5837dbae44bf546e6477a679ff6610010f17276f686d867e8" +checksum = "027bb0d98429ae334a8698531da7077bdf906419543a35a55c2cb1b66437d767" dependencies = [ "clap_builder", "clap_derive", @@ -182,9 +183,9 @@ dependencies = [ [[package]] name = "clap_builder" -version = "4.5.20" +version = "4.5.31" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "19bc80abd44e4bed93ca373a0704ccbd1b710dc5749406201bb018272808dc54" +checksum = "5589e0cba072e0f3d23791efac0fd8627b49c829c196a492e88168e6a669d863" dependencies = [ "anstream", "anstyle", @@ -194,21 +195,21 @@ dependencies = [ [[package]] name = "clap_derive" -version = "4.5.18" +version = "4.5.28" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4ac6a0c7b1a9e9a5186361f67dfa1b88213572f427fb9ab038efb2bd8c582dab" +checksum = "bf4ced95c6f4a675af3da73304b9ac4ed991640c36374e4b46795c49e17cf1ed" dependencies = [ "heck", "proc-macro2", "quote", - "syn 2.0.87", + "syn 2.0.98", ] [[package]] name = "clap_lex" -version = "0.7.2" +version = "0.7.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1462739cb27611015575c0c11df5df7601141071f07518d56fcc1be504cbec97" +checksum = "f46ad14479a25103f283c0f10005961cf086d8dc42205bb44c46ac563475dca6" [[package]] name = "colorchoice" @@ -240,9 +241,9 @@ checksum = "773648b94d0e5d620f64f280777445740e61fe701025087ec8b57f45c791888b" [[package]] name = "crossbeam-deque" -version = "0.8.5" +version = "0.8.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "613f8cc01fe9cf1a3eb3d7f488fd2fa8388403e97039e2f73692932e291a770d" +checksum = "9dd111b7b7f7d55b72c0a6ae361660ee5853c9af73f70c3c2ef6858b950e2e51" dependencies = [ "crossbeam-epoch", "crossbeam-utils", @@ -259,9 +260,9 @@ dependencies = [ [[package]] name = "crossbeam-utils" -version = "0.8.20" +version = "0.8.21" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "22ec99545bb0ed0ea7bb9b8e1e9122ea386ff8a48c0922e43f36d45ab09e0e80" +checksum = "d0a5c400df2834b80a4c3327b3aad3a4c4cd4de0629063962b03235697506a28" [[package]] name = "darling" @@ -337,14 +338,14 @@ checksum = "97369cbbc041bc366949bc74d34658d6cda5621039731c6310521892a3a20ae0" dependencies = [ "proc-macro2", "quote", - "syn 2.0.87", + "syn 2.0.98", ] [[package]] name = "either" -version = "1.13.0" +version = "1.14.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "60b1af1c220855b6ceac025d3f6ecdd2b7c4894bfe9cd9bda4fbb4bc7c0d4cf0" +checksum = "b7914353092ddf589ad78f25c5c1c21b7f80b0ff8621e7c814c3485b5306da9d" [[package]] name = "encoding_rs" @@ -357,9 +358,9 @@ dependencies = [ [[package]] name = "env_filter" -version = "0.1.2" +version = "0.1.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4f2c92ceda6ceec50f43169f9ee8424fe2db276791afde7b2cd8bc084cb376ab" +checksum = "186e05a59d4c50738528153b83b0b0194d3a29507dfec16eccd4b342903397d0" dependencies = [ "log", "regex", @@ -367,9 +368,9 @@ dependencies = [ [[package]] name = "env_logger" -version = "0.11.5" +version = "0.11.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e13fa619b91fb2381732789fc5de83b45675e882f66623b7d8cb4f643017018d" +checksum = "dcaee3d8e3cfc3fd92428d477bc97fc29ec8716d180c0d74c643bb26166660e0" dependencies = [ "anstream", "anstyle", @@ -380,25 +381,25 @@ dependencies = [ [[package]] name = "equivalent" -version = "1.0.1" +version = "1.0.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5443807d6dff69373d433ab9ef5378ad8df50ca6298caf15de6e52e24aaf54d5" +checksum = "877a4ace8713b0bcf2a4e7eec82529c029f1d0619886d18145fea96c3ffe5c0f" [[package]] name = "errno" -version = "0.3.9" +version = "0.3.10" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "534c5cf6194dfab3db3242765c03bbe257cf92f22b38f6bc0c58d59108a820ba" +checksum = "33d852cb9b869c2a9b3df2f71a3074817f01e1844f839a144f5fcef059a4eb5d" dependencies = [ "libc", - "windows-sys 0.52.0", + "windows-sys 0.59.0", ] [[package]] name = "fastrand" -version = "2.2.0" +version = "2.3.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "486f806e73c5707928240ddc295403b1b93c96a02038563881c4a2fd84b81ac4" +checksum = "37909eebbb50d72f9059c3b6d82c0463f2ff062c9e95845c43a6c9c0355411be" [[package]] name = "fnv" @@ -437,6 +438,7 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "2dff15bf788c671c1934e366d07e30c1814a8ef514e1af724a602e8a2fbe1b10" dependencies = [ "futures-core", + "futures-sink", ] [[package]] @@ -471,6 +473,7 @@ checksum = "9fa08315bb612088cc391249efdc3bc77536f16c91f6cf495e6fbe85b20a4a81" dependencies = [ "futures-core", "futures-io", + "futures-sink", "futures-task", "memchr", "pin-project-lite", @@ -478,6 +481,29 @@ dependencies = [ "slab", ] +[[package]] +name = "getrandom" +version = "0.2.15" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c4567c8db10ae91089c99af84c68c38da3ec2f087c3f82960bcdbf3656b6f4d7" +dependencies = [ + "cfg-if", + "libc", + "wasi 0.11.0+wasi-snapshot-preview1", +] + +[[package]] +name = "getrandom" +version = "0.3.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "43a49c392881ce6d5c3b8cb70f98717b7c07aabbdff06687b9030dbfbe2725f8" +dependencies = [ + "cfg-if", + "libc", + "wasi 0.13.3+wasi-0.2.2", + "windows-targets 0.52.6", +] + [[package]] name = "gimli" version = "0.31.1" @@ -486,15 +512,15 @@ checksum = "07e28edb80900c19c28f1072f2e8aeca7fa06b23cd4169cefe1af5aa3260783f" [[package]] name = "h2" -version = "0.3.26" +version = "0.4.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "81fe527a889e1532da5c525686d96d4c2e74cdd345badf8dfef9f6b39dd5f5e8" +checksum = "5017294ff4bb30944501348f6f8e42e6ad28f42c8bbef7a74029aff064a4e3c2" dependencies = [ + "atomic-waker", "bytes", "fnv", "futures-core", "futures-sink", - "futures-util", "http", "indexmap", "slab", @@ -505,9 +531,9 @@ dependencies = [ [[package]] name = "hashbrown" -version = "0.15.1" +version = "0.15.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3a9bfc1af68b1726ea47d3d5109de126281def866b33970e10fbab11b5dafab3" +checksum = "bf151400ff0baff5465007dd2f3e717f3fe502074ca563069ce3a6629d07b289" [[package]] name = "heck" @@ -515,26 +541,20 @@ version = "0.5.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "2304e00983f87ffb38b55b444b5e3b60a884b5d30c0fca7d82fe33449bbe55ea" -[[package]] -name = "hermit-abi" -version = "0.3.9" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d231dfb89cfffdbc30e7fc41579ed6066ad03abda9e567ccafae602b97ec5024" - [[package]] name = "home" -version = "0.5.9" +version = "0.5.11" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e3d1354bf6b7235cb4a0576c2619fd4ed18183f689b12b006a0ee7329eeff9a5" +checksum = "589533453244b0995c858700322199b2becb13b627df2851f64a2775d024abcf" dependencies = [ - "windows-sys 0.52.0", + "windows-sys 0.59.0", ] [[package]] name = "http" -version = "0.2.12" +version = "1.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "601cbb57e577e2f5ef5be8e7b83f0f63994f25aa94d673e54a92d5c516d101f1" +checksum = "f16ca2af56261c99fba8bac40a10251ce8188205a4c448fbb745a2e4daa76fea" dependencies = [ "bytes", "fnv", @@ -543,26 +563,32 @@ dependencies = [ [[package]] name = "http-body" -version = "0.4.6" +version = "1.0.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7ceab25649e9960c0311ea418d17bee82c0dcec1bd053b5f9a66e265a693bed2" +checksum = "1efedce1fb8e6913f23e0c92de8e62cd5b772a67e7b3946df930a62566c93184" dependencies = [ "bytes", "http", - "pin-project-lite", ] [[package]] -name = "httparse" -version = "1.9.5" +name = "http-body-util" +version = "0.1.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7d71d3574edd2771538b901e6549113b4006ece66150fb69c0fb6d9a2adae946" +checksum = "793429d76616a256bcb62c2a2ec2bed781c8307e797e2598c50010f2bee2544f" +dependencies = [ + "bytes", + "futures-util", + "http", + "http-body", + "pin-project-lite", +] [[package]] -name = "httpdate" -version = "1.0.3" +name = "httparse" +version = "1.10.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "df3b46402a9d5adb4c86a0cf463f42e19994e3ee891101b1841f30a545cb49a9" +checksum = "f2d708df4e7140240a16cd6ab0ab65c972d7433ab77819ea693fde9c43811e2a" [[package]] name = "humantime" @@ -572,39 +598,74 @@ checksum = "9a3a5bfb195931eeb336b2a7b4d761daec841b97f947d34394601737a7bba5e4" [[package]] name = "hyper" -version = "0.14.31" +version = "1.6.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8c08302e8fa335b151b788c775ff56e7a03ae64ff85c548ee820fecb70356e85" +checksum = "cc2b571658e38e0c01b1fdca3bbbe93c00d3d71693ff2770043f8c29bc7d6f80" dependencies = [ "bytes", "futures-channel", - "futures-core", "futures-util", "h2", "http", "http-body", "httparse", - "httpdate", "itoa", "pin-project-lite", - "socket2", + "smallvec", "tokio", - "tower-service", - "tracing", "want", ] +[[package]] +name = "hyper-rustls" +version = "0.27.5" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "2d191583f3da1305256f22463b9bb0471acad48a4e534a5218b9963e9c1f59b2" +dependencies = [ + "futures-util", + "http", + "hyper", + "hyper-util", + "rustls", + "rustls-pki-types", + "tokio", + "tokio-rustls", + "tower-service", +] + [[package]] name = "hyper-tls" -version = "0.5.0" +version = "0.6.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d6183ddfa99b85da61a140bea0efc93fdf56ceaa041b37d553518030827f9905" +checksum = "70206fc6890eaca9fde8a0bf71caa2ddfc9fe045ac9e5c70df101a7dbde866e0" dependencies = [ "bytes", + "http-body-util", "hyper", + "hyper-util", "native-tls", "tokio", "tokio-native-tls", + "tower-service", +] + +[[package]] +name = "hyper-util" +version = "0.1.10" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "df2dcfbe0677734ab2f3ffa7fa7bfd4706bfdc1ef393f2ee30184aed67e631b4" +dependencies = [ + "bytes", + "futures-channel", + "futures-util", + "http", + "http-body", + "hyper", + "pin-project-lite", + "socket2", + "tokio", + "tower-service", + "tracing", ] [[package]] @@ -722,7 +783,7 @@ checksum = "1ec89e9337638ecdc08744df490b221a7399bf8d164eb52a665454e60e075ad6" dependencies = [ "proc-macro2", "quote", - "syn 2.0.87", + "syn 2.0.98", ] [[package]] @@ -754,9 +815,9 @@ dependencies = [ [[package]] name = "indexmap" -version = "2.6.0" +version = "2.7.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "707907fe3c25f5424cce2cb7e1cbcafee6bdbe735ca90ef77c29e84591e5b9da" +checksum = "8c9c992b02b5b4c94ea26e32fe5bccb7aa7d9f390ab5c1221ff895bc7ea8b652" dependencies = [ "equivalent", "hashbrown", @@ -770,9 +831,9 @@ checksum = "a257582fdcde896fd96463bf2d40eefea0580021c0712a0e2b028b60b47a837a" [[package]] name = "ipnet" -version = "2.10.1" +version = "2.11.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ddc24109865250148c2e0f3d25d4f0f479571723792d3802153c60922a4fb708" +checksum = "469fb0b9cefa57e3ef31275ee7cacb78f2fdca44e4765491884a2b119d4eb130" [[package]] name = "irx-config" @@ -798,16 +859,17 @@ checksum = "7943c866cc5cd64cbc25b2e01621d07fa8eb2a1a23160ee81ce38704e97b8ecf" [[package]] name = "itoa" -version = "1.0.11" +version = "1.0.14" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "49f1f14873335454500d59611f1cf4a4b0f786f9ac11f4312a78e4cf2566695b" +checksum = "d75a2a4b1b190afb6f5425f10f6a8f959d2ea0b9c2b1d79553551850539e4674" [[package]] name = "js-sys" -version = "0.3.72" +version = "0.3.77" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6a88f1bda2bd75b0452a14784937d796722fdebfe50df998aeb3f0b7603019a9" +checksum = "1cfaf33c695fc6e08064efbc1f72ec937429614f25eef83af942d0e227c3a28f" dependencies = [ + "once_cell", "wasm-bindgen", ] @@ -819,27 +881,27 @@ checksum = "bbd2bcb4c963f2ddae06a2efc7e9f3591312473c50c6685e1f298068316e66fe" [[package]] name = "libc" -version = "0.2.162" +version = "0.2.170" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "18d287de67fe55fd7e1581fe933d965a5a9477b38e949cfa9f8574ef01506398" +checksum = "875b3680cb2f8f71bdcf9a30f38d48282f5d3c95cbf9b3fa57269bb5d5c06828" [[package]] name = "linux-raw-sys" -version = "0.4.14" +version = "0.4.15" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "78b3ae25bc7c8c38cec158d1f2757ee79e9b3740fbc7ccf0e59e4b08d793fa89" +checksum = "d26c52dbd32dccf2d10cac7725f8eae5296885fb5703b261f7d0a0739ec807ab" [[package]] name = "litemap" -version = "0.7.3" +version = "0.7.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "643cb0b8d4fcc284004d5fd0d67ccf61dfffadb7f75e1e71bc420f4688a3a704" +checksum = "23fb14cb19457329c82206317a5663005a4d404783dc74f4252769b0d5f42856" [[package]] name = "log" -version = "0.4.22" +version = "0.4.26" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a7a70ba024b9dc04c27ea2f0c0548feb474ec5c54bba33a7f72f873a39d07b24" +checksum = "30bde2b3dc3671ae49d8e2e9f044c7c005836e7a023ee57cffa25ab82764bb9e" [[package]] name = "matchers" @@ -864,30 +926,29 @@ checksum = "6877bb514081ee2a7ff5ef9de3281f14a4dd4bceac4c09388074a6b5df8a139a" [[package]] name = "miniz_oxide" -version = "0.8.0" +version = "0.8.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e2d80299ef12ff69b16a84bb182e3b9df68b5a91574d3d4fa6e41b65deec4df1" +checksum = "8e3e04debbb59698c15bacbb6d93584a8c0ca9cc3213cb423d31f760d8843ce5" dependencies = [ "adler2", ] [[package]] name = "mio" -version = "1.0.2" +version = "1.0.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "80e04d1dcff3aae0704555fe5fee3bcfaf3d1fdf8a7e521d5b9d2b42acb52cec" +checksum = "2886843bf800fba2e3377cff24abf6379b4c4d5c6681eaf9ea5b0d15090450bd" dependencies = [ - "hermit-abi", "libc", - "wasi", + "wasi 0.11.0+wasi-snapshot-preview1", "windows-sys 0.52.0", ] [[package]] name = "native-tls" -version = "0.2.12" +version = "0.2.14" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a8614eb2c83d59d1c8cc974dd3f920198647674a0a035e1af1fa58707e317466" +checksum = "87de3442987e9dbec73158d5c715e7ad9072fda936bb03d19d7fa10e00520f0e" dependencies = [ "libc", "log", @@ -912,26 +973,26 @@ dependencies = [ [[package]] name = "object" -version = "0.36.5" +version = "0.36.7" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "aedf0a2d09c573ed1d8d85b30c119153926a2b36dce0ab28322c09a117a4683e" +checksum = "62948e14d923ea95ea2c7c86c71013138b66525b86bdc08d2dcc262bdb497b87" dependencies = [ "memchr", ] [[package]] name = "once_cell" -version = "1.20.2" +version = "1.20.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1261fe7e33c73b354eab43b1273a57c8f967d0391e80353e51f764ac02cf6775" +checksum = "945462a4b81e43c4e3ba96bd7b49d834c6f61198356aa858733bc4acf3cbe62e" [[package]] name = "openssl" -version = "0.10.68" +version = "0.10.71" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6174bc48f102d208783c2c84bf931bb75927a617866870de8a4ea85597f871f5" +checksum = "5e14130c6a98cd258fdcb0fb6d744152343ff729cbfcb28c656a9d12b999fbcd" dependencies = [ - "bitflags 2.6.0", + "bitflags", "cfg-if", "foreign-types", "libc", @@ -948,23 +1009,33 @@ checksum = "a948666b637a0f465e8564c73e89d4dde00d72d4d473cc972f390fc3dcee7d9c" dependencies = [ "proc-macro2", "quote", - "syn 2.0.87", + "syn 2.0.98", ] [[package]] name = "openssl-probe" -version = "0.1.5" +version = "0.1.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ff011a302c396a5197692431fc1948019154afc178baf7d8e37367442a4601cf" +checksum = "d05e27ee213611ffe7d6348b942e8f942b37114c00cc03cec254295a4a17852e" + +[[package]] +name = "openssl-src" +version = "300.4.2+3.4.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "168ce4e058f975fe43e89d9ccf78ca668601887ae736090aacc23ae353c298e2" +dependencies = [ + "cc", +] [[package]] name = "openssl-sys" -version = "0.9.104" +version = "0.9.106" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "45abf306cbf99debc8195b66b7346498d7b10c210de50418b5ccd7ceba08c741" +checksum = "8bb61ea9811cc39e3c2069f40b8b8e2e70d8569b361f879786cc7ed48b777cdd" dependencies = [ "cc", "libc", + "openssl-src", "pkg-config", "vcpkg", ] @@ -983,9 +1054,9 @@ checksum = "e3148f5046208a5d56bcfc03053e3ca6334e51da8dfb19b6cdc8b306fae3283e" [[package]] name = "pin-project-lite" -version = "0.2.15" +version = "0.2.16" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "915a1e146535de9163f3987b8944ed8cf49a18bb0056bcebcdcece385cece4ff" +checksum = "3b3cff922bd51709b605d9ead9aa71031d81447142d828eb4a6eba76fe619f9b" [[package]] name = "pin-utils" @@ -1001,28 +1072,28 @@ checksum = "953ec861398dccce10c670dfeaf3ec4911ca479e9c02154b3a215178c5f566f2" [[package]] name = "prettyplease" -version = "0.2.25" +version = "0.2.29" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "64d1ec885c64d0457d564db4ec299b2dae3f9c02808b8ad9c3a089c591b18033" +checksum = "6924ced06e1f7dfe3fa48d57b9f74f55d8915f5036121bef647ef4b204895fac" dependencies = [ "proc-macro2", - "syn 2.0.87", + "syn 2.0.98", ] [[package]] name = "proc-macro2" -version = "1.0.89" +version = "1.0.93" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f139b0662de085916d1fb67d2b4169d1addddda1919e696f3252b740b629986e" +checksum = "60946a68e5f9d28b0dc1c21bb8a97ee7d018a8b322fa57838ba31cc878e22d99" dependencies = [ "unicode-ident", ] [[package]] name = "quote" -version = "1.0.37" +version = "1.0.38" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b5b9d34b8991d19d98081b46eacdd8eb58c6f2b201139f7c5f643cc155a633af" +checksum = "0e4dccaaaf89514f546c693ddc140f729f958c247918a13380cccc6078391acc" dependencies = [ "proc-macro2", ] @@ -1093,20 +1164,24 @@ checksum = "2b15c43186be67a4fd63bee50d0303afffcef381492ebe2c5d87f324e1b8815c" [[package]] name = "reqwest" -version = "0.11.27" +version = "0.12.12" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "dd67538700a17451e7cba03ac727fb961abb7607553461627b97de0b89cf4a62" +checksum = "43e734407157c3c2034e0258f5e4473ddb361b1e85f95a66690d67264d7cd1da" dependencies = [ "base64", "bytes", "encoding_rs", + "futures-channel", "futures-core", "futures-util", "h2", "http", "http-body", + "http-body-util", "hyper", + "hyper-rustls", "hyper-tls", + "hyper-util", "ipnet", "js-sys", "log", @@ -1123,12 +1198,27 @@ dependencies = [ "system-configuration", "tokio", "tokio-native-tls", + "tower", "tower-service", "url", "wasm-bindgen", "wasm-bindgen-futures", "web-sys", - "winreg", + "windows-registry", +] + +[[package]] +name = "ring" +version = "0.17.11" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "da5349ae27d3887ca812fb375b45a4fbb36d8d12d2df394968cd86e35683fe73" +dependencies = [ + "cc", + "cfg-if", + "getrandom 0.2.15", + "libc", + "untrusted", + "windows-sys 0.52.0", ] [[package]] @@ -1145,37 +1235,73 @@ checksum = "719b953e2095829ee67db738b3bfa9fa368c94900df327b3f07fe6e794d2fe1f" [[package]] name = "rustix" -version = "0.38.40" +version = "0.38.44" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "99e4ea3e1cdc4b559b8e5650f9c8e5998e3e5c1343b4eaf034565f32318d63c0" +checksum = "fdb5bc1ae2baa591800df16c9ca78619bf65c0488b41b96ccec5d11220d8c154" dependencies = [ - "bitflags 2.6.0", + "bitflags", "errno", "libc", "linux-raw-sys", - "windows-sys 0.52.0", + "windows-sys 0.59.0", +] + +[[package]] +name = "rustls" +version = "0.23.23" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "47796c98c480fce5406ef69d1c76378375492c3b0a0de587be0c1d9feb12f395" +dependencies = [ + "once_cell", + "rustls-pki-types", + "rustls-webpki", + "subtle", + "zeroize", ] [[package]] name = "rustls-pemfile" -version = "1.0.4" +version = "2.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1c74cae0a4cf6ccbbf5f359f08efdf8ee7e1dc532573bf0db71968cb56b1448c" +checksum = "dce314e5fee3f39953d46bb63bb8a46d40c2f8fb7cc5a3b6cab2bde9721d6e50" dependencies = [ - "base64", + "rustls-pki-types", ] +[[package]] +name = "rustls-pki-types" +version = "1.11.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "917ce264624a4b4db1c364dcc35bfca9ded014d0a958cd47ad3e960e988ea51c" + +[[package]] +name = "rustls-webpki" +version = "0.102.8" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "64ca1bc8749bd4cf37b5ce386cc146580777b4e8572c7b97baf22c83f444bee9" +dependencies = [ + "ring", + "rustls-pki-types", + "untrusted", +] + +[[package]] +name = "rustversion" +version = "1.0.19" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f7c45b9784283f1b2e7fb61b42047c2fd678ef0960d4f6f1eba131594cc369d4" + [[package]] name = "ryu" -version = "1.0.18" +version = "1.0.19" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f3cb5ba0dc43242ce17de99c180e96db90b235b8a9fdc9543c96d2209116bd9f" +checksum = "6ea1a2d0a644769cc99faa24c3ad26b379b786fe7c36fd3c546254801650e6dd" [[package]] name = "schannel" -version = "0.1.26" +version = "0.1.27" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "01227be5826fa0690321a2ba6c5cd57a19cf3f6a09e76973b58e61de6ab9d1c1" +checksum = "1f29ebaa345f945cec9fbbc532eb307f0fdad8161f281b6369539c8d84876b3d" dependencies = [ "windows-sys 0.59.0", ] @@ -1186,7 +1312,7 @@ version = "2.11.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "897b2245f0b511c87893af39b033e5ca9cce68824c4d7e7630b5a1d339658d02" dependencies = [ - "bitflags 2.6.0", + "bitflags", "core-foundation", "core-foundation-sys", "libc", @@ -1195,9 +1321,9 @@ dependencies = [ [[package]] name = "security-framework-sys" -version = "2.12.1" +version = "2.14.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "fa39c7303dc58b5543c94d22c1766b0d31f2ee58306363ea622b10bbc075eaa2" +checksum = "49db231d56a190491cb4aeda9527f1ad45345af50b0851622a7adb8c03b01c32" dependencies = [ "core-foundation-sys", "libc", @@ -1205,29 +1331,29 @@ dependencies = [ [[package]] name = "serde" -version = "1.0.215" +version = "1.0.218" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6513c1ad0b11a9376da888e3e0baa0077f1aed55c17f50e7b2397136129fb88f" +checksum = "e8dfc9d19bdbf6d17e22319da49161d5d0108e4188e8b680aef6299eed22df60" dependencies = [ "serde_derive", ] [[package]] name = "serde_derive" -version = "1.0.215" +version = "1.0.218" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ad1e866f866923f252f05c889987993144fb74e722403468a4ebd70c3cd756c0" +checksum = "f09503e191f4e797cb8aac08e9a4a4695c5edf6a2e70e376d961ddd5c969f82b" dependencies = [ "proc-macro2", "quote", - "syn 2.0.87", + "syn 2.0.98", ] [[package]] name = "serde_json" -version = "1.0.132" +version = "1.0.139" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d726bfaff4b320266d395898905d0eba0345aae23b54aee3a737e260fd46db03" +checksum = "44f86c3acccc9c65b153fe1b85a3be07fe5515274ec9f0653b4a0875731c72a6" dependencies = [ "itoa", "memchr", @@ -1301,15 +1427,15 @@ dependencies = [ [[package]] name = "smallvec" -version = "1.13.2" +version = "1.14.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3c5e1a9a646d36c3599cd173a41282daf47c44583ad367b8e6837255952e5c67" +checksum = "7fcf8323ef1faaee30a44a340193b1ac6814fd9b7b4e88e9d4519a3e4abe1cfd" [[package]] name = "socket2" -version = "0.5.7" +version = "0.5.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ce305eb0b4296696835b71df73eb912e0f1ffd2556a501fcede6e0c50349191c" +checksum = "c970269d99b64e60ec3bd6ad27270092a5394c4e309314b18ae3fe575695fbe8" dependencies = [ "libc", "windows-sys 0.52.0", @@ -1333,6 +1459,12 @@ version = "0.11.1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "7da8b5736845d9f2fcb837ea5d9e2628564b3b043a70948a3f0b778838c5fb4f" +[[package]] +name = "subtle" +version = "2.6.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "13c2bddecc57b384dee18652358fb23172facb8a2c51ccc10d74c157bdea3292" + [[package]] name = "svd-parser" version = "0.14.8" @@ -1375,7 +1507,7 @@ dependencies = [ "serde_yaml", "svd-parser", "svd-rs", - "syn 2.0.87", + "syn 2.0.98", "thiserror", "url", ] @@ -1394,7 +1526,7 @@ dependencies = [ "serde_yaml", "shell-words", "svd2rust", - "syn 2.0.87", + "syn 2.0.98", "thiserror", "tracing", "tracing-subscriber", @@ -1415,9 +1547,9 @@ dependencies = [ [[package]] name = "syn" -version = "2.0.87" +version = "2.0.98" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "25aa4ce346d03a6dcd68dd8b4010bcb74e54e62c90c573f394c46eae99aba32d" +checksum = "36147f1a48ae0ec2b5b3bc5b537d267457555a10dc06f3dbc8cb11ba3006d3b1" dependencies = [ "proc-macro2", "quote", @@ -1426,9 +1558,12 @@ dependencies = [ [[package]] name = "sync_wrapper" -version = "0.1.2" +version = "1.0.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "2047c6ded9c721764247e62cd3b03c09ffc529b2ba5b10ec482ae507a4a70160" +checksum = "0bf256ce5efdfa370213c1dabab5935a12e49f2c58d15e9eac2870d3b4f27263" +dependencies = [ + "futures-core", +] [[package]] name = "synstructure" @@ -1438,25 +1573,25 @@ checksum = "c8af7666ab7b6390ab78131fb5b0fce11d6b7a6951602017c35fa82800708971" dependencies = [ "proc-macro2", "quote", - "syn 2.0.87", + "syn 2.0.98", ] [[package]] name = "system-configuration" -version = "0.5.1" +version = "0.6.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ba3a3adc5c275d719af8cb4272ea1c4a6d668a777f37e115f6d11ddbc1c8e0e7" +checksum = "3c879d448e9d986b661742763247d3693ed13609438cf3d006f51f5368a5ba6b" dependencies = [ - "bitflags 1.3.2", + "bitflags", "core-foundation", "system-configuration-sys", ] [[package]] name = "system-configuration-sys" -version = "0.5.0" +version = "0.6.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a75fb188eb626b924683e3b95e3a48e63551fcfb51949de2f06a9d91dbee93c9" +checksum = "8e1d1b10ced5ca923a1fcb8d03e96b8d3268065d724548c0211415ff6ac6bac4" dependencies = [ "core-foundation-sys", "libc", @@ -1464,12 +1599,13 @@ dependencies = [ [[package]] name = "tempfile" -version = "3.14.0" +version = "3.17.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "28cce251fcbc87fac86a866eeb0d6c2d536fc16d06f184bb61aeae11aa4cee0c" +checksum = "22e5a0acb1f3f55f65cc4a866c361b2fb2a0ff6366785ae6fbb5f85df07ba230" dependencies = [ "cfg-if", "fastrand", + "getrandom 0.3.1", "once_cell", "rustix", "windows-sys 0.59.0", @@ -1492,7 +1628,7 @@ checksum = "4fee6c4efc90059e10f81e6d42c60a18f76588c3d74cb83a0b242a2b6c7504c1" dependencies = [ "proc-macro2", "quote", - "syn 2.0.87", + "syn 2.0.98", ] [[package]] @@ -1517,9 +1653,9 @@ dependencies = [ [[package]] name = "tokio" -version = "1.41.1" +version = "1.43.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "22cfb5bee7a6a52939ca9224d6ac897bb669134078daa8735560897f69de4d33" +checksum = "3d61fa4ffa3de412bfea335c6ecff681de2b609ba3c77ef3e00e521813a9ed9e" dependencies = [ "backtrace", "bytes", @@ -1540,11 +1676,21 @@ dependencies = [ "tokio", ] +[[package]] +name = "tokio-rustls" +version = "0.26.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8e727b36a1a0e8b74c376ac2211e40c2c8af09fb4013c60d910495810f008e9b" +dependencies = [ + "rustls", + "tokio", +] + [[package]] name = "tokio-util" -version = "0.7.12" +version = "0.7.13" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "61e7c3654c13bcd040d4a03abee2c75b1d14a37b423cf5a813ceae1cc903ec6a" +checksum = "d7fcaa8d55a2bdd6b83ace262b016eca0d79ee02818c5c1bcdf0305114081078" dependencies = [ "bytes", "futures-core", @@ -1587,6 +1733,27 @@ dependencies = [ "winnow", ] +[[package]] +name = "tower" +version = "0.5.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d039ad9159c98b70ecfd540b2573b97f7f52c3e8d9f8ad57a24b916a536975f9" +dependencies = [ + "futures-core", + "futures-util", + "pin-project-lite", + "sync_wrapper", + "tokio", + "tower-layer", + "tower-service", +] + +[[package]] +name = "tower-layer" +version = "0.3.3" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "121c2a6cda46980bb0fcd1647ffaf6cd3fc79a013de288782836f6df9c48780e" + [[package]] name = "tower-service" version = "0.3.3" @@ -1595,9 +1762,9 @@ checksum = "8df9b6e13f2d32c91b9bd719c00d1958837bc7dec474d94952798cc8e69eeec3" [[package]] name = "tracing" -version = "0.1.40" +version = "0.1.41" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c3523ab5a71916ccf420eebdf5521fcef02141234bbc0b8a49f2fdc4544364ef" +checksum = "784e0ac535deb450455cbfa28a6f0df145ea1bb7ae51b821cf5e7927fdcfbdd0" dependencies = [ "pin-project-lite", "tracing-attributes", @@ -1606,20 +1773,20 @@ dependencies = [ [[package]] name = "tracing-attributes" -version = "0.1.27" +version = "0.1.28" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "34704c8d6ebcbc939824180af020566b01a7c01f80641264eba0999f6c2b6be7" +checksum = "395ae124c09f9e6918a2310af6038fba074bcf474ac352496d5910dd59a2226d" dependencies = [ "proc-macro2", "quote", - "syn 2.0.87", + "syn 2.0.98", ] [[package]] name = "tracing-core" -version = "0.1.32" +version = "0.1.33" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c06d3da6113f116aaee68e4d601191614c9053067f9ab7f6edbcb161237daa54" +checksum = "e672c95779cf947c5311f83787af4fa8fffd12fb27e4993211a84bdfd9610f9c" dependencies = [ "once_cell", "valuable", @@ -1638,9 +1805,9 @@ dependencies = [ [[package]] name = "tracing-subscriber" -version = "0.3.18" +version = "0.3.19" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ad0f048c97dbd9faa9b7df56362b8ebcaa52adb06b498c050d2f4e32f90a7a8b" +checksum = "e8189decb5ac0fa7bc8b96b7cb9b2701d60d48805aca84a238004d665fcc4008" dependencies = [ "matchers", "nu-ansi-term", @@ -1662,9 +1829,9 @@ checksum = "e421abadd41a4225275504ea4d6566923418b7f05506fbc9c0fe86ba7396114b" [[package]] name = "unicode-ident" -version = "1.0.13" +version = "1.0.17" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e91b56cd4cadaeb79bbf1a5645f6b4f8dc5bde8834ad5894a8db35fda9efa1fe" +checksum = "00e2473a93778eb0bad35909dff6a10d28e63f792f16ed15e404fca9d5eeedbe" [[package]] name = "unsafe-libyaml" @@ -1672,11 +1839,17 @@ version = "0.2.11" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "673aac59facbab8a9007c7f6108d11f63b603f7cabff99fabf650fea5c32b861" +[[package]] +name = "untrusted" +version = "0.9.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "8ecb6da28b8a351d773b68d5825ac39017e680750f980f3a1a85cd8dd28a47c1" + [[package]] name = "url" -version = "2.5.3" +version = "2.5.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8d157f1b96d14500ffdc1f10ba712e780825526c03d9a49b4d0324b0d9113ada" +checksum = "32f8b686cadd1473f4bd0117a5d28d36b1ade384ea9b5069a1c40aefed7fda60" dependencies = [ "form_urlencoded", "idna", @@ -1704,9 +1877,9 @@ checksum = "06abde3611657adf66d383f00b093d7faecc7fa57071cce2578660c9f1010821" [[package]] name = "valuable" -version = "0.1.0" +version = "0.1.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "830b7e5d4d90034032940e4ace0d9a9a057e7a45cd94e6c007832e39edb82f6d" +checksum = "ba73ea9cf16a25df0c8caa16c51acb937d5712a8429db78a3ee29d5dcacd3a65" [[package]] name = "vcpkg" @@ -1729,49 +1902,59 @@ version = "0.11.0+wasi-snapshot-preview1" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "9c8d87e72b64a3b4db28d11ce29237c246188f4f51057d65a7eab63b7987e423" +[[package]] +name = "wasi" +version = "0.13.3+wasi-0.2.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "26816d2e1a4a36a2940b96c5296ce403917633dff8f3440e9b236ed6f6bacad2" +dependencies = [ + "wit-bindgen-rt", +] + [[package]] name = "wasm-bindgen" -version = "0.2.95" +version = "0.2.100" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "128d1e363af62632b8eb57219c8fd7877144af57558fb2ef0368d0087bddeb2e" +checksum = "1edc8929d7499fc4e8f0be2262a241556cfc54a0bea223790e71446f2aab1ef5" dependencies = [ "cfg-if", "once_cell", + "rustversion", "wasm-bindgen-macro", ] [[package]] name = "wasm-bindgen-backend" -version = "0.2.95" +version = "0.2.100" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "cb6dd4d3ca0ddffd1dd1c9c04f94b868c37ff5fac97c30b97cff2d74fce3a358" +checksum = "2f0a0651a5c2bc21487bde11ee802ccaf4c51935d0d3d42a6101f98161700bc6" dependencies = [ "bumpalo", "log", - "once_cell", "proc-macro2", "quote", - "syn 2.0.87", + "syn 2.0.98", "wasm-bindgen-shared", ] [[package]] name = "wasm-bindgen-futures" -version = "0.4.45" +version = "0.4.50" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "cc7ec4f8827a71586374db3e87abdb5a2bb3a15afed140221307c3ec06b1f63b" +checksum = "555d470ec0bc3bb57890405e5d4322cc9ea83cebb085523ced7be4144dac1e61" dependencies = [ "cfg-if", "js-sys", + "once_cell", "wasm-bindgen", "web-sys", ] [[package]] name = "wasm-bindgen-macro" -version = "0.2.95" +version = "0.2.100" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e79384be7f8f5a9dd5d7167216f022090cf1f9ec128e6e6a482a2cb5c5422c56" +checksum = "7fe63fc6d09ed3792bd0897b314f53de8e16568c2b3f7982f468c0bf9bd0b407" dependencies = [ "quote", "wasm-bindgen-macro-support", @@ -1779,28 +1962,31 @@ dependencies = [ [[package]] name = "wasm-bindgen-macro-support" -version = "0.2.95" +version = "0.2.100" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "26c6ab57572f7a24a4985830b120de1594465e5d500f24afe89e16b4e833ef68" +checksum = "8ae87ea40c9f689fc23f209965b6fb8a99ad69aeeb0231408be24920604395de" dependencies = [ "proc-macro2", "quote", - "syn 2.0.87", + "syn 2.0.98", "wasm-bindgen-backend", "wasm-bindgen-shared", ] [[package]] name = "wasm-bindgen-shared" -version = "0.2.95" +version = "0.2.100" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "65fc09f10666a9f147042251e0dda9c18f166ff7de300607007e96bdebc1068d" +checksum = "1a05d73b933a847d6cccdda8f838a22ff101ad9bf93e33684f39c1f5f0eece3d" +dependencies = [ + "unicode-ident", +] [[package]] name = "web-sys" -version = "0.3.72" +version = "0.3.77" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f6488b90108c040df0fe62fa815cbdee25124641df01814dd7282749234c6112" +checksum = "33b6dd2ef9186f1f2072e409e99cd22a975331a6b3591b12c764e0e55c60d5d2" dependencies = [ "js-sys", "wasm-bindgen", @@ -1847,6 +2033,36 @@ version = "0.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "712e227841d057c1ee1cd2fb22fa7e5a5461ae8e48fa2ca79ec42cfc1931183f" +[[package]] +name = "windows-registry" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "e400001bb720a623c1c69032f8e3e4cf09984deec740f007dd2b03ec864804b0" +dependencies = [ + "windows-result", + "windows-strings", + "windows-targets 0.52.6", +] + +[[package]] +name = "windows-result" +version = "0.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "1d1043d8214f791817bab27572aaa8af63732e11bf84aa21a45a78d6c317ae0e" +dependencies = [ + "windows-targets 0.52.6", +] + +[[package]] +name = "windows-strings" +version = "0.1.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "4cd9b125c486025df0eabcb585e62173c6c9eddcec5d117d3b6e8c30e2ee4d10" +dependencies = [ + "windows-result", + "windows-targets 0.52.6", +] + [[package]] name = "windows-sys" version = "0.48.0" @@ -2005,13 +2221,12 @@ dependencies = [ ] [[package]] -name = "winreg" -version = "0.50.0" +name = "wit-bindgen-rt" +version = "0.33.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "524e57b2c537c0f9b1e69f1965311ec12182b4122e45035b1508cd24d2adadb1" +checksum = "3268f3d866458b787f390cf61f4bbb563b922d091359f9608842999eaee3943c" dependencies = [ - "cfg-if", - "windows-sys 0.48.0", + "bitflags", ] [[package]] @@ -2028,9 +2243,9 @@ checksum = "1e9df38ee2d2c3c5948ea468a8406ff0db0b29ae1ffde1bcf20ef305bcc95c51" [[package]] name = "yoke" -version = "0.7.4" +version = "0.7.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6c5b1314b079b0930c31e3af543d8ee1757b1951ae1e1565ec704403a7240ca5" +checksum = "120e6aef9aa629e3d4f52dc8cc43a015c7724194c97dfaf45180d2daf2b77f40" dependencies = [ "serde", "stable_deref_trait", @@ -2040,37 +2255,43 @@ dependencies = [ [[package]] name = "yoke-derive" -version = "0.7.4" +version = "0.7.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "28cc31741b18cb6f1d5ff12f5b7523e3d6eb0852bbbad19d73905511d9849b95" +checksum = "2380878cad4ac9aac1e2435f3eb4020e8374b5f13c296cb75b4620ff8e229154" dependencies = [ "proc-macro2", "quote", - "syn 2.0.87", + "syn 2.0.98", "synstructure", ] [[package]] name = "zerofrom" -version = "0.1.4" +version = "0.1.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "91ec111ce797d0e0784a1116d0ddcdbea84322cd79e5d5ad173daeba4f93ab55" +checksum = "50cc42e0333e05660c3587f3bf9d0478688e15d870fab3346451ce7f8c9fbea5" dependencies = [ "zerofrom-derive", ] [[package]] name = "zerofrom-derive" -version = "0.1.4" +version = "0.1.6" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0ea7b4a3637ea8669cedf0f1fd5c286a17f3de97b8dd5a70a6c167a1730e63a5" +checksum = "d71e5d6e06ab090c67b5e44993ec16b72dcbaabc526db883a360057678b48502" dependencies = [ "proc-macro2", "quote", - "syn 2.0.87", + "syn 2.0.98", "synstructure", ] +[[package]] +name = "zeroize" +version = "1.8.1" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "ced3678a2879b30306d323f4542626697a464a97c0a07c9aebf7ebca65cd4dde" + [[package]] name = "zerovec" version = "0.10.4" @@ -2090,5 +2311,5 @@ checksum = "6eafa6dfb17584ea3e2bd6e76e0cc15ad7af12b09abdd1ca55961bed9b1063c6" dependencies = [ "proc-macro2", "quote", - "syn 2.0.87", + "syn 2.0.98", ] diff --git a/ci/svd2rust-regress/Cargo.toml b/ci/svd2rust-regress/Cargo.toml index bd32d497..62f4cff4 100644 --- a/ci/svd2rust-regress/Cargo.toml +++ b/ci/svd2rust-regress/Cargo.toml @@ -8,7 +8,7 @@ rust-version = "1.82.0" [dependencies] clap = { version = "4.1", features = ["color", "derive", "string", "env"] } svd2rust = { path = "../../" } -reqwest = { version = "0.11", features = ["blocking"] } +reqwest = { version = "0.12", features = ["blocking", "native-tls-vendored"] } rayon = "1.4" anyhow = "1" thiserror = "1" diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index aa92752b..e376460a 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -203,6 +203,7 @@ impl TestCase { Command::new("cargo") .env("USER", user) .arg("init") + .args(["--edition", "2021"]) .arg("--name") .arg(chip_name) .arg("--vcs") From 63c851f9f76621b970c4c4e8b4c654448f4351a8 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 25 Oct 2024 17:38:41 +0300 Subject: [PATCH 308/319] disable respace --- CHANGELOG.md | 1 + src/generate/peripheral.rs | 43 ++++++++++++++++---------------------- 2 files changed, 19 insertions(+), 25 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index d8c1c50e..4eb79d85 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -15,6 +15,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Some fixes for the `svd2rust-regress` tool and update of its documentation - Other internal clippy fixes for `clippy::manual_div_ceil`, `clippy::nonminimal_bool` and `clippy::needless_lifetimes` +- Add missing `escape_special_chars` for peripheral description - Update `svd-rs` to 0.14.11 ## [v0.35.0] - 2024-11-12 diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 72450077..44f7594b 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -42,7 +42,8 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result let p_ty = ident(&name, config, "peripheral", span); let name_str = p_ty.to_string(); let address = util::hex(p.base_address + config.base_address_shift); - let description = util::respace(p.description.as_ref().unwrap_or(&p.name)); + let doc = util::respace(p.description.as_ref().unwrap_or(&name)); + let doc = util::escape_special_chars(&doc); let mod_ty = ident(&name, config, "peripheral_mod", span); let (derive_regs, base, path) = if let Some(path) = path { @@ -88,12 +89,12 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result let per_to_tokens = |out: &mut TokenStream, feature_attribute: &TokenStream, - description: &str, + doc: &str, p_ty: &Ident, doc_alias: Option, address: LitInt| { out.extend(quote! { - #[doc = #description] + #[doc = #doc] #phtml #doc_alias #feature_attribute @@ -140,7 +141,8 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result let mut feature_names = Vec::with_capacity(dim.dim as _); for pi in svd::peripheral::expand(p, dim) { let name = &pi.name; - let description = pi.description.as_deref().unwrap_or(&p.name); + let doc = util::respace(pi.description.as_ref().unwrap_or(&pi.name)); + let doc = util::escape_special_chars(&doc); let p_ty = ident(name, config, "peripheral", span); let name_str = p_ty.to_string(); let doc_alias = (&name_str != name).then(|| quote!(#[doc(alias = #name)])); @@ -155,7 +157,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result per_to_tokens( &mut out, &feature_attribute_n, - description, + &doc, &p_ty, doc_alias, address, @@ -169,7 +171,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result if derive_regs { // re-export the base module to allow deriveFrom this one out.extend(quote! { - #[doc = #description] + #[doc = #doc] #feature_any_attribute pub use self::#base as #mod_ty; }); @@ -182,21 +184,14 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result feature_attribute.extend(quote! { #[cfg(feature = #p_feature)] }) }; // Insert the peripheral structure - per_to_tokens( - &mut out, - &feature_attribute, - &description, - &p_ty, - None, - address, - ); + per_to_tokens(&mut out, &feature_attribute, &doc, &p_ty, None, address); // Derived peripherals may not require re-implementation, and will instead // use a single definition of the non-derived version. if derive_regs { // re-export the base module to allow deriveFrom this one out.extend(quote! { - #[doc = #description] + #[doc = #doc] #feature_attribute pub use self::#base as #mod_ty; }); @@ -205,9 +200,6 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result } } - let description = util::respace(p.description.as_ref().unwrap_or(&name)); - let description = util::escape_special_chars(&description); - // Build up an alternate erc list by expanding any derived registers/clusters // erc: *E*ither *R*egister or *C*luster let mut ercs = p.registers.take().unwrap_or_default(); @@ -246,7 +238,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result register_or_cluster_block(&ercs, &derive_infos, None, "Register block", None, config)?; out.extend(quote! { - #[doc = #description] + #[doc = #doc] #feature_attribute pub mod #mod_ty }); @@ -1381,8 +1373,9 @@ fn cluster_block( index: &Index, config: &Config, ) -> Result { - let description = util::respace(c.description.as_ref().unwrap_or(&c.name)); - let description = util::escape_special_chars(&description); + let doc = c.description.as_ref().unwrap_or(&c.name); + let doc = util::respace(doc); + let doc = util::escape_special_chars(&doc); let mod_name = c.name.remove_dim().to_string(); // name_snake_case needs to take into account array type. @@ -1409,7 +1402,7 @@ fn cluster_block( .push(path_segment(ident(&dname, config, "cluster_mod", span))); Ok(quote! { - #[doc = #description] + #[doc = #doc] pub use #derived as #block_ty; pub use #mod_derived as #mod_ty; }) @@ -1429,7 +1422,7 @@ fn cluster_block( &c.children, &mod_derive_infos, Some(&mod_name), - &description, + &doc, cluster_size, config, )?; @@ -1441,11 +1434,11 @@ fn cluster_block( }; Ok(quote! { - #[doc = #description] + #[doc = #doc] pub use self::#mod_ty::#block_ty; ///Cluster - #[doc = #description] + #[doc = #doc] pub mod #mod_ty { #mod_items } From 6b0e1ca1fd5a1f2b927ee4155c06ec2e1afcf302 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sun, 9 Feb 2025 21:29:42 +0300 Subject: [PATCH 309/319] use generics for peripherals too --- CHANGELOG.md | 1 + src/generate/device.rs | 5 ---- src/generate/generic.rs | 59 +++++++++++++++++++++++++++++++++++--- src/generate/peripheral.rs | 48 +------------------------------ 4 files changed, 57 insertions(+), 56 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 4eb79d85..56bf5aef 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Generic `Periph` - Add `mtvec_align` field to `riscv_config` to configure the byte alignment of interrupt vector table. - Fix reexport path when "%s" inside "derivedFrom" - Force using rust edition 2021 in CI diff --git a/src/generate/device.rs b/src/generate/device.rs index d2b3ee9c..16e2f195 100644 --- a/src/generate/device.rs +++ b/src/generate/device.rs @@ -62,11 +62,6 @@ pub fn render(d: &Device, config: &Config, device_x: &mut String) -> Result { + _marker: marker::PhantomData, +} + +unsafe impl Send for Periph {} + +impl Periph { + ///Pointer to the register block + pub const PTR: *const RB = A as *const _; + + ///Return the pointer to the register block + #[inline(always)] + pub const fn ptr() -> *const RB { + Self::PTR + } + + /// Steal an instance of this peripheral + /// + /// # Safety + /// + /// Ensure that the new instance of the peripheral cannot be used in a way + /// that may race with any existing instances, for example by only + /// accessing read-only or write-only registers, or by consuming the + /// original peripheral and using critical sections to coordinate + /// access between multiple new instances. + /// + /// Additionally, other software such as HALs may rely on only one + /// peripheral instance existing to ensure memory safety; ensure + /// no stolen instances are passed to such software. + pub unsafe fn steal() -> Self { + Self { + _marker: marker::PhantomData, + } + } +} + +impl core::ops::Deref for Periph { + type Target = RB; + + #[inline(always)] + fn deref(&self) -> &Self::Target { + unsafe { &*Self::PTR } + } +} + /// Raw register type (`u8`, `u16`, `u32`, ...) pub trait RawReg: Copy @@ -247,7 +293,10 @@ impl W { self } } -impl W where REG: Writable { +impl W +where + REG: Writable, +{ /// Writes raw bits to the register. #[inline(always)] pub fn set(&mut self, bits: REG::Ux) -> &mut Self { @@ -335,7 +384,8 @@ pub struct RangeFrom; pub struct RangeTo; /// Write field Proxy -pub type FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> = raw::FieldWriter<'a, REG, WI, FI, Safety>; +pub type FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> = + raw::FieldWriter<'a, REG, WI, FI, Safety>; impl FieldWriter<'_, REG, WI, FI, Safety> where @@ -390,7 +440,8 @@ where } } -impl<'a, REG, const WI: u8, FI, const MIN: u64, const MAX: u64> FieldWriter<'a, REG, WI, FI, Range> +impl<'a, REG, const WI: u8, FI, const MIN: u64, const MAX: u64> + FieldWriter<'a, REG, WI, FI, Range> where REG: Writable + RegisterSpec, FI: FieldSpec, @@ -478,7 +529,7 @@ macro_rules! bit_proxy { pub const fn width(&self) -> u8 { Self::WIDTH } - + /// Field offset #[inline(always)] pub const fn offset(&self) -> u8 { diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index 44f7594b..f5de3902 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -63,25 +63,6 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result feature_attribute.extend(quote! { #[cfg(feature = #feature_name)] }); }; - let steal_fn = quote! { - /// Steal an instance of this peripheral - /// - /// # Safety - /// - /// Ensure that the new instance of the peripheral cannot be used in a way - /// that may race with any existing instances, for example by only - /// accessing read-only or write-only registers, or by consuming the - /// original peripheral and using critical sections to coordinate - /// access between multiple new instances. - /// - /// Additionally, other software such as HALs may rely on only one - /// peripheral instance existing to ensure memory safety; ensure - /// no stolen instances are passed to such software. - pub unsafe fn steal() -> Self { - Self { _marker: PhantomData } - } - }; - let phtml = config.settings.html_url.as_ref().map(|url| { let doc = format!("See peripheral [structure]({url}#{})", &path.peripheral); quote!(#[doc = ""] #[doc = #doc]) @@ -98,34 +79,7 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result #phtml #doc_alias #feature_attribute - pub struct #p_ty { _marker: PhantomData<*const ()> } - - #feature_attribute - unsafe impl Send for #p_ty {} - - #feature_attribute - impl #p_ty { - ///Pointer to the register block - pub const PTR: *const #base::RegisterBlock = #address as *const _; - - ///Return the pointer to the register block - #[inline(always)] - pub const fn ptr() -> *const #base::RegisterBlock { - Self::PTR - } - - #steal_fn - } - - #feature_attribute - impl Deref for #p_ty { - type Target = #base::RegisterBlock; - - #[inline(always)] - fn deref(&self) -> &Self::Target { - unsafe { &*Self::PTR } - } - } + pub type #p_ty = crate::Periph<#base::RegisterBlock, #address>; #feature_attribute impl core::fmt::Debug for #p_ty { From c186174d64235d3518be031f23f288f38dc8d089 Mon Sep 17 00:00:00 2001 From: Robin Mueller Date: Wed, 5 Feb 2025 10:28:46 +0100 Subject: [PATCH 310/319] update CI to run clippy and docs --- .github/workflows/ci.yml | 35 ++++++--- ci/svd2rust-regress/src/command.rs | 10 ++- ci/svd2rust-regress/src/github.rs | 2 +- ci/svd2rust-regress/src/main.rs | 42 ++++++++++- ci/svd2rust-regress/src/svd_test.rs | 107 +++++++++++++++++++++++----- 5 files changed, 162 insertions(+), 34 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index e92c4a31..1c56f42d 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -10,7 +10,7 @@ jobs: ci: name: CI runs-on: ubuntu-latest - needs: [check, ci-linux, ci-clippy, ci-serde] + needs: [check, ci-linux, ci-docs-clippy, ci-serde] if: always() steps: - name: Done @@ -127,15 +127,32 @@ jobs: # stable. run: cargo +stable regress tests --toolchain 1.76.0 -m Nordic -- --strict --atomics - ci-clippy: + ci-docs-clippy: runs-on: ubuntu-latest needs: [check] + strategy: + fail-fast: false + matrix: + include: + # STMicro + - { chip: STM32F030 } + - { chip: STM32F410 } + - { chip: STM32L1xx } + # Espressif + - { chip: esp32c3 } + # Freescale + - { chip: MKW22D5 } + - { chip: MK02F12810 } + # Silicon Labs + - { chip: SIM3L1x8_SVD } + # Nordic chips + - { chip: nrf51, options: "-- -f register_mod::s:_mod" } + - { chip: nrf52, options: "-- -f register_mod::s:_mod" } steps: - uses: actions/checkout@v4 - - uses: dtolnay/rust-toolchain@master - with: - toolchain: stable + - uses: dtolnay/rust-toolchain@nightly + - uses: dtolnay/rust-toolchain@stable - name: Cache uses: Swatinem/rust-cache@v2 @@ -144,12 +161,8 @@ jobs: run: | cargo install svd2rust --path . - - name: Run CI script - env: - VENDOR: RISC-V - OPTIONS: "" - COMMAND: clippy - run: bash ci/script.sh + - name: Check docs and clippy on generated PACs + run: cargo regress test -c ${{ matrix.chip }} --docs-stable --docs-nightly --clippy ${{ matrix.options }} ci-serde: runs-on: ubuntu-latest diff --git a/ci/svd2rust-regress/src/command.rs b/ci/svd2rust-regress/src/command.rs index 2c873bb8..2786166c 100644 --- a/ci/svd2rust-regress/src/command.rs +++ b/ci/svd2rust-regress/src/command.rs @@ -7,7 +7,8 @@ pub trait CommandExt { fn run(&mut self, hide: bool) -> Result<(), anyhow::Error>; #[track_caller] - fn get_output(&mut self, can_fail: bool) -> Result; + fn run_and_get_output(&mut self, can_fail: bool) + -> Result; #[track_caller] fn get_output_string(&mut self) -> Result; @@ -33,7 +34,10 @@ impl CommandExt for Command { } #[track_caller] - fn get_output(&mut self, can_fail: bool) -> Result { + fn run_and_get_output( + &mut self, + can_fail: bool, + ) -> Result { let output = self .output() .with_context(|| format!("command `{}` couldn't be run", self.display()))?; @@ -51,7 +55,7 @@ impl CommandExt for Command { #[track_caller] fn get_output_string(&mut self) -> Result { - String::from_utf8(self.get_output(true)?.stdout).map_err(Into::into) + String::from_utf8(self.run_and_get_output(true)?.stdout).map_err(Into::into) } fn display(&self) -> String { diff --git a/ci/svd2rust-regress/src/github.rs b/ci/svd2rust-regress/src/github.rs index 5dc68508..5a9bbf2b 100644 --- a/ci/svd2rust-regress/src/github.rs +++ b/ci/svd2rust-regress/src/github.rs @@ -148,7 +148,7 @@ pub fn get_release_binary_artifact( Command::new("gzip") .arg("-d") .arg(output_dir.join(artifact)) - .get_output(false)?; + .run_and_get_output(false)?; } } _ => { diff --git a/ci/svd2rust-regress/src/main.rs b/ci/svd2rust-regress/src/main.rs index 22b03985..36dec528 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/ci/svd2rust-regress/src/main.rs @@ -90,6 +90,18 @@ pub struct TestAll { /// Enable splitting `lib.rs` with `form` pub form_lib: bool, + /// Check generated crates with clippy. + #[clap(long)] + pub clippy: bool, + + /// Check documentation build with stable. + #[clap(long)] + pub docs_stable: bool, + + /// Check documentation build with nightly settings (docs.rs equivalent). + #[clap(long)] + pub docs_nightly: bool, + /// Print all available test using the specified filters #[clap(long)] pub list: bool, @@ -143,6 +155,18 @@ pub struct Test { /// Chip to use, use `--url` or `--svd-file` for another way to specify svd pub chip: Option, + /// Check generated crate with clippy. + #[arg(long)] + pub clippy: bool, + + /// Check documentation build with stable. + #[clap(long)] + pub docs_stable: bool, + + /// Check documentation build with nightly settings (docs.rs equivalent). + #[clap(long)] + pub docs_nightly: bool, + /// Path to an `svd2rust` binary, relative or absolute. /// Defaults to `target/release/svd2rust[.exe]` of this repository /// (which must be already built) @@ -191,7 +215,14 @@ impl Test { .ok_or_else(|| anyhow::anyhow!("no test found for chip"))? .to_owned() }; - test.test(opts, &self.current_bin_path, &self.passthrough_opts)?; + test.test( + opts, + &self.current_bin_path, + self.clippy, + self.docs_stable, + self.docs_nightly, + &self.passthrough_opts, + )?; Ok(()) } } @@ -247,7 +278,14 @@ impl TestAll { tests.par_iter().for_each(|t| { let start = Instant::now(); - match t.test(opt, &self.current_bin_path, &self.passthrough_opts) { + match t.test( + opt, + &self.current_bin_path, + self.clippy, + self.docs_stable, + self.docs_nightly, + &self.passthrough_opts, + ) { Ok(s) => { if let Some(stderrs) = s { let mut buf = String::new(); diff --git a/ci/svd2rust-regress/src/svd_test.rs b/ci/svd2rust-regress/src/svd_test.rs index e376460a..534202c8 100644 --- a/ci/svd2rust-regress/src/svd_test.rs +++ b/ci/svd2rust-regress/src/svd_test.rs @@ -71,7 +71,7 @@ impl std::fmt::Debug for ProcessFailed { } trait CommandHelper { - fn capture_outputs( + fn run_and_capture_outputs( &mut self, cant_fail: bool, name: &str, @@ -79,11 +79,27 @@ trait CommandHelper { stderr: Option<&PathBuf>, previous_processes_stderr: &[PathBuf], ) -> Result<(), TestError>; + + fn run_and_capture_stderr( + &mut self, + cant_fail: bool, + name: &str, + stderr: &PathBuf, + previous_processes_stderr: &[PathBuf], + ) -> Result<(), TestError> { + self.run_and_capture_outputs( + cant_fail, + name, + None, + Some(stderr), + previous_processes_stderr, + ) + } } impl CommandHelper for Command { #[tracing::instrument(skip_all, fields(stdout = tracing::field::Empty, stderr = tracing::field::Empty))] - fn capture_outputs( + fn run_and_capture_outputs( &mut self, cant_fail: bool, name: &str, @@ -91,7 +107,7 @@ impl CommandHelper for Command { stderr: Option<&PathBuf>, previous_processes_stderr: &[PathBuf], ) -> Result<(), TestError> { - let output = self.get_output(true)?; + let output = self.run_and_get_output(true)?; let out_payload = String::from_utf8_lossy(&output.stdout); if let Some(out) = stdout { file_helper(&out_payload, out)?; @@ -142,10 +158,13 @@ impl TestCase { &self, opts: &Opts, bin_path: &Path, - cli_opts: &Option>, + run_clippy: bool, + run_docs_stable: bool, + run_docs_nightly: bool, + cli_passthrough_opts: &Option>, ) -> Result>, TestError> { let (chip_dir, mut process_stderr_paths) = self - .setup_case(&opts.output_dir, bin_path, cli_opts) + .setup_case(&opts.output_dir, bin_path, cli_passthrough_opts) .with_context(|| anyhow!("when setting up case for {}", self.name()))?; // Run `cargo check`, capturing stderr to a log file if !self.skip_check { @@ -153,16 +172,70 @@ impl TestCase { Command::new("cargo") .arg("check") .current_dir(&chip_dir) - .capture_outputs( + .run_and_capture_stderr( true, "cargo check", - None, - Some(&cargo_check_err_file), + &cargo_check_err_file, &process_stderr_paths, ) - .with_context(|| "failed to check")?; + .with_context(|| "failed to check with cargo check")?; process_stderr_paths.push(cargo_check_err_file); } + if run_docs_nightly { + tracing::info!("Checking docs build with nightly"); + let cargo_docs_err_file = path_helper_base(&chip_dir, &["cargo-docs-nightly.err.log"]); + // Docs are built like docs.rs would build them. Additionally, build with all features. + + // Set the RUSTDOCFLAGS environment variable + let rustdocflags = "--cfg docsrs --generate-link-to-definition -Z unstable-options"; + Command::new("cargo") + .arg("+nightly") + .arg("doc") + .arg("--all-features") + .env("RUSTDOCFLAGS", rustdocflags) // Set the environment variable + .current_dir(&chip_dir) + .run_and_capture_stderr( + true, + "cargo docs nightly", + &cargo_docs_err_file, + &process_stderr_paths, + ) + .with_context(|| "failed to generate docs with cargo docs")?; + } + if run_docs_stable { + tracing::info!("Checking docs build with stable"); + let cargo_docs_err_file = path_helper_base(&chip_dir, &["cargo-docs-stable.err.log"]); + // Docs are built like docs.rs would build them. Additionally, build with all features. + Command::new("cargo") + .arg("+stable") + .arg("doc") + .arg("--all-features") + .current_dir(&chip_dir) + .run_and_capture_stderr( + true, + "cargo docs stable", + &cargo_docs_err_file, + &process_stderr_paths, + ) + .with_context(|| "failed to generate docs with cargo docs")?; + } + if run_clippy { + tracing::info!("Checking with clippy"); + let cargo_clippy_err_file = path_helper_base(&chip_dir, &["cargo-clippy.err.log"]); + Command::new("cargo") + .arg("clippy") + .arg("--") + .arg("-D") + .arg("warnings") + .current_dir(&chip_dir) + .run_and_capture_stderr( + true, + "cargo clippy", + &cargo_clippy_err_file, + &process_stderr_paths, + ) + .with_context(|| "failed to check with cargo clippy")?; + } Ok(if opts.verbose > 1 { Some(process_stderr_paths) } else { @@ -170,13 +243,13 @@ impl TestCase { }) } - #[tracing::instrument(skip(self, output_dir, command), fields(name = %self.name(), chip_dir = tracing::field::Empty))] + #[tracing::instrument(skip(self, output_dir, passthrough_opts), fields(name = %self.name(), chip_dir = tracing::field::Empty))] pub fn setup_case( &self, output_dir: &Path, svd2rust_bin_path: &Path, - command: &Option>, + passthrough_opts: &Option>, ) -> Result<(PathBuf, Vec), TestError> { let user = match std::env::var("USER") { Ok(val) => val, @@ -210,10 +283,10 @@ impl TestCase { .arg("none") .arg("--lib") .arg(&chip_dir) - .capture_outputs(true, "cargo init", None, None, &[]) + .run_and_capture_outputs(true, "cargo init", None, None, &[]) .with_context(|| "Failed to cargo init")?; - self.prepare_chip_test_toml(&chip_dir, command)?; + self.prepare_chip_test_toml(&chip_dir, passthrough_opts)?; let chip_svd = self.prepare_svd_file(&chip_dir)?; self.prepare_rust_toolchain_file(&chip_dir)?; @@ -226,7 +299,7 @@ impl TestCase { &chip_dir, &lib_rs_file, &svd2rust_err_file, - command, + passthrough_opts, )?; process_stderr_paths.push(svd2rust_err_file); match self.arch { @@ -262,7 +335,7 @@ impl TestCase { .arg(&new_lib_rs_file) .arg("--outdir") .arg(&src_dir) - .capture_outputs( + .run_and_capture_outputs( true, "form", None, @@ -291,7 +364,7 @@ impl TestCase { Command::new(rustfmt_bin_path) .arg(entry) .args(["--edition", "2021"]) - .capture_outputs( + .run_and_capture_outputs( false, "rustfmt", None, @@ -417,7 +490,7 @@ impl TestCase { if let Some(opts) = self.opts.as_ref() { base_cmd.args(opts); } - base_cmd.current_dir(chip_dir).capture_outputs( + base_cmd.current_dir(chip_dir).run_and_capture_outputs( true, "svd2rust", Some(lib_rs_file).filter(|_| { From 90196b014f92755a291fc23ae23b42a386c81d66 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 7 Mar 2025 09:22:35 +0300 Subject: [PATCH 311/319] temporary disable SIM3L1x8_SVD --- .github/workflows/ci.yml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 1c56f42d..b85cb520 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -144,7 +144,8 @@ jobs: - { chip: MKW22D5 } - { chip: MK02F12810 } # Silicon Labs - - { chip: SIM3L1x8_SVD } + # TODO: fix doc rendering bug when math `>` is present in description + #- { chip: SIM3L1x8_SVD } # Nordic chips - { chip: nrf51, options: "-- -f register_mod::s:_mod" } - { chip: nrf52, options: "-- -f register_mod::s:_mod" } From 0f21f90633e9ef64011bac40e39cdd3a48ad880f Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 7 Mar 2025 11:39:40 +0300 Subject: [PATCH 312/319] Split on the start of attribute instead of the end --- .github/workflows/ci.yml | 3 +-- CHANGELOG.md | 1 + src/main.rs | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index b85cb520..1c56f42d 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -144,8 +144,7 @@ jobs: - { chip: MKW22D5 } - { chip: MK02F12810 } # Silicon Labs - # TODO: fix doc rendering bug when math `>` is present in description - #- { chip: SIM3L1x8_SVD } + - { chip: SIM3L1x8_SVD } # Nordic chips - { chip: nrf51, options: "-- -f register_mod::s:_mod" } - { chip: nrf52, options: "-- -f register_mod::s:_mod" } diff --git a/CHANGELOG.md b/CHANGELOG.md index 157948d7..110b0c25 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -20,6 +20,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Update `svd-rs` to 0.14.11 - Added `#![cfg_attr(docsrs, feature(doc_auto_cfg))]` to the generated library code. This adds a display of the feature gates in the documentation of the generated library +- Split on the start of attribute instead of the end ## [v0.35.0] - 2024-11-12 diff --git a/src/main.rs b/src/main.rs index d1dc1f4a..d3efbeba 100755 --- a/src/main.rs +++ b/src/main.rs @@ -353,7 +353,7 @@ Ignore this option if you are not building your own FPGA based soft-cores."), let filename = if config.make_mod { "mod.rs" } else { "lib.rs" }; let mut file = File::create(path.join(filename)).expect("Couldn't create output file"); - let data = items.to_string().replace("] ", "]\n"); + let data = items.to_string().replace(" # [", "\n#["); file.write_all(data.as_ref()) .expect("Could not write code to lib.rs"); From 6b30ea5ae8d63763b57cba72d1697ae29cbe0fc2 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Thu, 9 May 2024 07:36:22 +0300 Subject: [PATCH 313/319] use ConstZero/One instead of Default --- .github/workflows/ci.yml | 2 +- CHANGELOG.md | 1 + src/generate/generic.rs | 39 +++++++++++++++---------------- src/generate/generic_atomic.rs | 8 +++---- src/generate/generic_reg_vcell.rs | 4 ++-- src/generate/register.rs | 21 +++++++++++------ src/util.rs | 5 ++++ 7 files changed, 46 insertions(+), 34 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 1c56f42d..0aa32833 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -1,6 +1,6 @@ on: push: - branches: master + branches: [master] pull_request: merge_group: diff --git a/CHANGELOG.md b/CHANGELOG.md index 110b0c25..e921e919 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -8,6 +8,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] - Generic `Periph` +- use `ConstZero::ZERO` instead of `Default::default()` to force const - Add `mtvec_align` field to `riscv_config` to configure the byte alignment of interrupt vector table. - Fix reexport path when "%s" inside "derivedFrom" - Force using rust edition 2021 in CI diff --git a/src/generate/generic.rs b/src/generate/generic.rs index 9d124093..e527a4a8 100644 --- a/src/generate/generic.rs +++ b/src/generate/generic.rs @@ -49,7 +49,6 @@ impl core::ops::Deref for Periph { /// Raw register type (`u8`, `u16`, `u32`, ...) pub trait RawReg: Copy - + Default + From + core::ops::BitOr + core::ops::BitAnd @@ -60,8 +59,10 @@ pub trait RawReg: { /// Mask for bits of width `WI` fn mask() -> Self; - /// Mask for bits of width 1 - fn one() -> Self; + /// `0` + const ZERO: Self; + /// `1` + const ONE: Self; } macro_rules! raw_reg { @@ -71,10 +72,8 @@ macro_rules! raw_reg { fn mask() -> Self { $mask::() } - #[inline(always)] - fn one() -> Self { - 1 - } + const ZERO: Self = 0; + const ONE: Self = 1; } const fn $mask() -> $U { <$U>::MAX >> ($size - WI) @@ -120,10 +119,10 @@ pub trait Writable: RegisterSpec { type Safety; /// Specifies the register bits that are not changed if you pass `1` and are changed if you pass `0` - const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux; + const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = Self::Ux::ZERO; /// Specifies the register bits that are not changed if you pass `0` and are changed if you pass `1` - const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux; + const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = Self::Ux::ZERO; } /// Reset value of the register. @@ -132,7 +131,7 @@ pub trait Writable: RegisterSpec { /// register by using the `reset` method. pub trait Resettable: RegisterSpec { /// Reset value of the register. - const RESET_VALUE: Self::Ux; + const RESET_VALUE: Self::Ux = Self::Ux::ZERO; /// Reset value of the register. #[inline(always)] @@ -539,8 +538,8 @@ macro_rules! bit_proxy { /// Writes bit to the field #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << self.o); - self.w.bits |= (REG::Ux::from(value) & REG::Ux::one()) << self.o; + self.w.bits &= !(REG::Ux::ONE << self.o); + self.w.bits |= (REG::Ux::from(value) & REG::Ux::ONE) << self.o; self.w } /// Writes `variant` to the field @@ -568,13 +567,13 @@ where /// Sets the field bit #[inline(always)] pub fn set_bit(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << self.o; + self.w.bits |= REG::Ux::ONE << self.o; self.w } /// Clears the field bit #[inline(always)] pub fn clear_bit(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << self.o); + self.w.bits &= !(REG::Ux::ONE << self.o); self.w } } @@ -587,7 +586,7 @@ where /// Sets the field bit #[inline(always)] pub fn set_bit(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << self.o; + self.w.bits |= REG::Ux::ONE << self.o; self.w } } @@ -600,7 +599,7 @@ where /// Clears the field bit #[inline(always)] pub fn clear_bit(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << self.o); + self.w.bits &= !(REG::Ux::ONE << self.o); self.w } } @@ -613,7 +612,7 @@ where ///Clears the field bit by passing one #[inline(always)] pub fn clear_bit_by_one(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << self.o; + self.w.bits |= REG::Ux::ONE << self.o; self.w } } @@ -626,7 +625,7 @@ where ///Sets the field bit by passing zero #[inline(always)] pub fn set_bit_by_zero(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << self.o); + self.w.bits &= !(REG::Ux::ONE << self.o); self.w } } @@ -639,7 +638,7 @@ where ///Toggle the field bit by passing one #[inline(always)] pub fn toggle_bit(self) -> &'a mut W { - self.w.bits |= REG::Ux::one() << self.o; + self.w.bits |= REG::Ux::ONE << self.o; self.w } } @@ -652,7 +651,7 @@ where ///Toggle the field bit by passing zero #[inline(always)] pub fn toggle_bit(self) -> &'a mut W { - self.w.bits &= !(REG::Ux::one() << self.o); + self.w.bits &= !(REG::Ux::ONE << self.o); self.w } } diff --git a/src/generate/generic_atomic.rs b/src/generate/generic_atomic.rs index 54c491c3..55250961 100644 --- a/src/generate/generic_atomic.rs +++ b/src/generate/generic_atomic.rs @@ -39,7 +39,7 @@ mod atomic { impl Reg where - REG::Ux: AtomicOperations + REG::Ux: AtomicOperations, { /// Set high every bit in the register that was set in the write proxy. Leave other bits /// untouched. The write is done in a single atomic instruction. @@ -53,7 +53,7 @@ mod atomic { F: FnOnce(&mut W) -> &mut W, { let bits = f(&mut W { - bits: Default::default(), + bits: REG::Ux::ZERO, _reg: marker::PhantomData, }) .bits; @@ -72,7 +72,7 @@ mod atomic { F: FnOnce(&mut W) -> &mut W, { let bits = f(&mut W { - bits: !REG::Ux::default(), + bits: !REG::Ux::ZERO, _reg: marker::PhantomData, }) .bits; @@ -91,7 +91,7 @@ mod atomic { F: FnOnce(&mut W) -> &mut W, { let bits = f(&mut W { - bits: Default::default(), + bits: REG::Ux::ZERO, _reg: marker::PhantomData, }) .bits; diff --git a/src/generate/generic_reg_vcell.rs b/src/generate/generic_reg_vcell.rs index b0ca0d5e..9e436334 100644 --- a/src/generate/generic_reg_vcell.rs +++ b/src/generate/generic_reg_vcell.rs @@ -148,7 +148,7 @@ impl Reg { F: FnOnce(&mut W) -> &mut W, { let value = f(&mut W { - bits: REG::Ux::default(), + bits: REG::Ux::ZERO, _reg: marker::PhantomData, }) .bits; @@ -169,7 +169,7 @@ impl Reg { F: FnOnce(&mut W) -> T, { let mut writer = W { - bits: REG::Ux::default(), + bits: REG::Ux::ZERO, _reg: marker::PhantomData, }; diff --git a/src/generate/register.rs b/src/generate/register.rs index 7ff3c265..c1cdc876 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -413,24 +413,31 @@ pub fn render_register_mod( let doc = format!("`write(|w| ..)` method takes [`{mod_ty}::W`](W) writer structure",); - let zero_to_modify_fields_bitmap = util::hex(zero_to_modify_fields_bitmap); - let one_to_modify_fields_bitmap = util::hex(one_to_modify_fields_bitmap); + let zero_to_modify_fields_bitmap = util::hex_nonzero(zero_to_modify_fields_bitmap) + .map(|bm| quote!(const ZERO_TO_MODIFY_FIELDS_BITMAP: #rty = #bm;)); + let one_to_modify_fields_bitmap = util::hex_nonzero(one_to_modify_fields_bitmap) + .map(|bm| quote!(const ONE_TO_MODIFY_FIELDS_BITMAP: #rty = #bm;)); mod_items.extend(quote! { #[doc = #doc] impl crate::Writable for #regspec_ty { type Safety = crate::#safe_ty; - const ZERO_TO_MODIFY_FIELDS_BITMAP: #rty = #zero_to_modify_fields_bitmap; - const ONE_TO_MODIFY_FIELDS_BITMAP: #rty = #one_to_modify_fields_bitmap; + #zero_to_modify_fields_bitmap + #one_to_modify_fields_bitmap } }); } - if let Some(rv) = properties.reset_value.map(util::hex) { - let doc = format!("`reset()` method sets {} to value {rv}", register.name); + if let Some(rv) = properties.reset_value.map(util::hex_nonzero) { + let doc = if let Some(rv) = &rv { + format!("`reset()` method sets {} to value {rv}", register.name) + } else { + format!("`reset()` method sets {} to value 0", register.name) + }; + let rv = rv.map(|rv| quote!(const RESET_VALUE: #rty = #rv;)); mod_items.extend(quote! { #[doc = #doc] impl crate::Resettable for #regspec_ty { - const RESET_VALUE: #rty = #rv; + #rv } }); } diff --git a/src/util.rs b/src/util.rs index dbf0dde5..40a1e526 100644 --- a/src/util.rs +++ b/src/util.rs @@ -255,6 +255,11 @@ pub fn hex(n: u64) -> LitInt { ) } +/// Turns non-zero `n` into an unsuffixed separated hex token +pub fn hex_nonzero(n: u64) -> Option { + (n != 0).then(|| hex(n)) +} + /// Turns `n` into an unsuffixed token pub fn unsuffixed(n: impl Into) -> LitInt { LitInt::new(&n.into().to_string(), Span::call_site()) From 77aff9bdee93f9425c5091db1c150ec1c1fbdc5c Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 8 Mar 2025 08:10:54 +0300 Subject: [PATCH 314/319] release 0.36 --- CHANGELOG.md | 5 ++++- Cargo.lock | 2 +- Cargo.toml | 2 +- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index e921e919..ab5992eb 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.36.0] - 2025-03-09 + - Generic `Periph` - use `ConstZero::ZERO` instead of `Default::default()` to force const - Add `mtvec_align` field to `riscv_config` to configure the byte alignment of interrupt vector table. @@ -946,7 +948,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.35.0...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.36.0...HEAD +[v0.36.0]: https://github.com/rust-embedded/svd2rust/compare/v0.35.0...v0.36.0 [v0.35.0]: https://github.com/rust-embedded/svd2rust/compare/v0.34.0...v0.35.0 [v0.34.0]: https://github.com/rust-embedded/svd2rust/compare/v0.33.5...v0.34.0 [v0.33.5]: https://github.com/rust-embedded/svd2rust/compare/v0.33.4...v0.33.5 diff --git a/Cargo.lock b/Cargo.lock index 6caca339..f538b364 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -1491,7 +1491,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.35.0" +version = "0.36.0" dependencies = [ "anyhow", "clap", diff --git a/Cargo.toml b/Cargo.toml index c878da9a..86587a67 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -17,7 +17,7 @@ keywords = ["svd", "embedded", "register", "map", "generator"] license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.35.0" +version = "0.36.0" readme = "README.md" rust-version = "1.74" From 33044dc5707ef2cd34cd759a371177f135cf9fa6 Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Thu, 13 Mar 2025 09:15:15 +0300 Subject: [PATCH 315/319] irx-update --- CHANGELOG.md | 2 + Cargo.lock | 391 ++++++++++++++++++++++++++++++++------------------- Cargo.toml | 2 +- 3 files changed, 251 insertions(+), 144 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index ab5992eb..d408095e 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +- Update `irx-config` + ## [v0.36.0] - 2025-03-09 - Generic `Periph` diff --git a/Cargo.lock b/Cargo.lock index f538b364..222c836b 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -78,9 +78,9 @@ dependencies = [ [[package]] name = "anyhow" -version = "1.0.96" +version = "1.0.97" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6b964d184e89d9b6b67dd2715bc8e74cf3107fb2b529990c90cf517326150bf4" +checksum = "dcfed56ad506cb2c684a14971b8861fdc3baaaae314b9e5f9bb532cbe3ba7a4f" [[package]] name = "arrayref" @@ -152,9 +152,9 @@ checksum = "1628fb46dfa0b37568d12e5edd512553eccf6a22a78e8bde00bb4aed84d5bdbf" [[package]] name = "bytes" -version = "1.10.0" +version = "1.10.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f61dac84819c6588b558454b194026eb1f09c293b9036ae9b159e74e73ab6cf9" +checksum = "d71b6127be86fdcfddb610f7182ac57211d4b18a3e9c82eb2d17662f2227ad6a" [[package]] name = "cc" @@ -173,9 +173,9 @@ checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd" [[package]] name = "clap" -version = "4.5.31" +version = "4.5.32" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "027bb0d98429ae334a8698531da7077bdf906419543a35a55c2cb1b66437d767" +checksum = "6088f3ae8c3608d19260cd7445411865a485688711b78b5be70d78cd96136f83" dependencies = [ "clap_builder", "clap_derive", @@ -183,26 +183,26 @@ dependencies = [ [[package]] name = "clap_builder" -version = "4.5.31" +version = "4.5.32" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5589e0cba072e0f3d23791efac0fd8627b49c829c196a492e88168e6a669d863" +checksum = "22a7ef7f676155edfb82daa97f99441f3ebf4a58d5e32f295a56259f1b6facc8" dependencies = [ "anstream", "anstyle", "clap_lex", - "strsim 0.11.1", + "strsim", ] [[package]] name = "clap_derive" -version = "4.5.28" +version = "4.5.32" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "bf4ced95c6f4a675af3da73304b9ac4ed991640c36374e4b46795c49e17cf1ed" +checksum = "09176aae279615badda0765c0c0b3f6ed53f4709118af73cf4655d85d1530cd7" dependencies = [ "heck", "proc-macro2", "quote", - "syn 2.0.98", + "syn", ] [[package]] @@ -266,9 +266,9 @@ checksum = "d0a5c400df2834b80a4c3327b3aad3a4c4cd4de0629063962b03235697506a28" [[package]] name = "darling" -version = "0.14.4" +version = "0.20.10" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "7b750cb3417fd1b327431a470f388520309479ab0bf5e323505daf0290cd3850" +checksum = "6f63b86c8a8826a49b8c21f08a2d07338eec8d900540f8630dc76284be802989" dependencies = [ "darling_core", "darling_macro", @@ -276,58 +276,58 @@ dependencies = [ [[package]] name = "darling_core" -version = "0.14.4" +version = "0.20.10" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "109c1ca6e6b7f82cc233a97004ea8ed7ca123a9af07a8230878fcfda9b158bf0" +checksum = "95133861a8032aaea082871032f5815eb9e98cef03fa916ab4500513994df9e5" dependencies = [ "fnv", "ident_case", "proc-macro2", "quote", - "strsim 0.10.0", - "syn 1.0.109", + "strsim", + "syn", ] [[package]] name = "darling_macro" -version = "0.14.4" +version = "0.20.10" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "a4aab4dbc9f7611d8b55048a3a16d2d010c2c8334e46304b40ac1cc14bf3b48e" +checksum = "d336a2a514f6ccccaa3e09b02d41d35330c07ddf03a62165fcec10bb561c7806" dependencies = [ "darling_core", "quote", - "syn 1.0.109", + "syn", ] [[package]] name = "derive_builder" -version = "0.12.0" +version = "0.20.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8d67778784b508018359cbc8696edb3db78160bab2c2a28ba7f56ef6932997f8" +checksum = "507dfb09ea8b7fa618fcf76e953f4f5e192547945816d5358edffe39f6f94947" dependencies = [ "derive_builder_macro", ] [[package]] name = "derive_builder_core" -version = "0.12.0" +version = "0.20.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c11bdc11a0c47bc7d37d582b5285da6849c96681023680b906673c5707af7b0f" +checksum = "2d5bcf7b024d6835cfb3d473887cd966994907effbe9227e8c8219824d06c4e8" dependencies = [ "darling", "proc-macro2", "quote", - "syn 1.0.109", + "syn", ] [[package]] name = "derive_builder_macro" -version = "0.12.0" +version = "0.20.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "ebcda35c7a396850a55ffeac740804b40ffec779b98fffbb1738f4033f0ee79e" +checksum = "ab63b0e2bf4d5928aff72e83a7dace85d7bba5fe12dcc3c5a572d78caffd3f3c" dependencies = [ "derive_builder_core", - "syn 1.0.109", + "syn", ] [[package]] @@ -338,14 +338,14 @@ checksum = "97369cbbc041bc366949bc74d34658d6cda5621039731c6310521892a3a20ae0" dependencies = [ "proc-macro2", "quote", - "syn 2.0.98", + "syn", ] [[package]] name = "either" -version = "1.14.0" +version = "1.15.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "b7914353092ddf589ad78f25c5c1c21b7f80b0ff8621e7c814c3485b5306da9d" +checksum = "48c757948c5ede0e46177b7add2e67155f70e33c07fea8284df6576da70b3719" [[package]] name = "encoding_rs" @@ -368,14 +368,14 @@ dependencies = [ [[package]] name = "env_logger" -version = "0.11.6" +version = "0.11.7" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "dcaee3d8e3cfc3fd92428d477bc97fc29ec8716d180c0d74c643bb26166660e0" +checksum = "c3716d7a920fb4fac5d84e9d4bce8ceb321e9414b4409da61b07b75c1e3d0697" dependencies = [ "anstream", "anstyle", "env_filter", - "humantime", + "jiff", "log", ] @@ -552,9 +552,9 @@ dependencies = [ [[package]] name = "http" -version = "1.2.0" +version = "1.3.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f16ca2af56261c99fba8bac40a10251ce8188205a4c448fbb745a2e4daa76fea" +checksum = "f4a85d31aea989eead29a3aaf9e1115a180df8282431156e533de47660892565" dependencies = [ "bytes", "fnv", @@ -573,12 +573,12 @@ dependencies = [ [[package]] name = "http-body-util" -version = "0.1.2" +version = "0.1.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "793429d76616a256bcb62c2a2ec2bed781c8307e797e2598c50010f2bee2544f" +checksum = "b021d93e26becf5dc7e1b75b1bed1fd93124b374ceb73f43d4d4eafec896a64a" dependencies = [ "bytes", - "futures-util", + "futures-core", "http", "http-body", "pin-project-lite", @@ -586,15 +586,9 @@ dependencies = [ [[package]] name = "httparse" -version = "1.10.0" +version = "1.10.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f2d708df4e7140240a16cd6ab0ab65c972d7433ab77819ea693fde9c43811e2a" - -[[package]] -name = "humantime" -version = "2.1.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "9a3a5bfb195931eeb336b2a7b4d761daec841b97f947d34394601737a7bba5e4" +checksum = "6dbf3de79e51f3d586ab4cb9d5c3e2c14aa28ed23d180cf89b4df0454a69cc87" [[package]] name = "hyper" @@ -783,7 +777,7 @@ checksum = "1ec89e9337638ecdc08744df490b221a7399bf8d164eb52a665454e60e075ad6" dependencies = [ "proc-macro2", "quote", - "syn 2.0.98", + "syn", ] [[package]] @@ -815,9 +809,9 @@ dependencies = [ [[package]] name = "indexmap" -version = "2.7.1" +version = "2.8.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8c9c992b02b5b4c94ea26e32fe5bccb7aa7d9f390ab5c1221ff895bc7ea8b652" +checksum = "3954d50fe15b02142bf25d3b8bdadb634ec3948f103d04ffe3031bc8fe9d7058" dependencies = [ "equivalent", "hashbrown", @@ -837,11 +831,12 @@ checksum = "469fb0b9cefa57e3ef31275ee7cacb78f2fdca44e4765491884a2b119d4eb130" [[package]] name = "irx-config" -version = "3.3.0" +version = "3.5.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3b0071d0561e65904b6ea900e6e09d84579766c20a2b6b4d628eaf3caf9ec9ee" +checksum = "6266a086f9c5635dffbfd7bd49262b2a40e0a580ab34e85d88dc59ed8133976a" dependencies = [ "blake2b_simd", + "cfg-if", "clap", "derive_builder", "serde", @@ -859,9 +854,33 @@ checksum = "7943c866cc5cd64cbc25b2e01621d07fa8eb2a1a23160ee81ce38704e97b8ecf" [[package]] name = "itoa" -version = "1.0.14" +version = "1.0.15" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = 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checksum = "a948666b637a0f465e8564c73e89d4dde00d72d4d473cc972f390fc3dcee7d9c" dependencies = [ "proc-macro2", "quote", - "syn 2.0.98", + "syn", ] [[package]] @@ -1066,34 +1091,49 @@ checksum = "8b870d8c151b6f2fb93e84a13146138f05d02ed11c7e7c54f8826aaaf7c9f184" [[package]] name = "pkg-config" -version = "0.3.31" +version = "0.3.32" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "7edddbd0b52d732b21ad9a5fab5c704c14cd949e5e9a1ec5929a24fded1b904c" + +[[package]] +name = "portable-atomic" +version = "1.11.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "953ec861398dccce10c670dfeaf3ec4911ca479e9c02154b3a215178c5f566f2" +checksum = "350e9b48cbc6b0e028b0473b114454c6316e57336ee184ceab6e53f72c178b3e" + +[[package]] +name = "portable-atomic-util" +version = "0.2.4" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "d8a2f0d8d040d7848a709caf78912debcc3f33ee4b3cac47d73d1e1069e83507" +dependencies = [ + "portable-atomic", +] [[package]] name = "prettyplease" -version = "0.2.29" +version = "0.2.30" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6924ced06e1f7dfe3fa48d57b9f74f55d8915f5036121bef647ef4b204895fac" +checksum = "f1ccf34da56fc294e7d4ccf69a85992b7dfb826b7cf57bac6a70bba3494cc08a" dependencies = [ "proc-macro2", - "syn 2.0.98", + "syn", ] [[package]] name = "proc-macro2" -version = "1.0.93" +version = "1.0.94" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "60946a68e5f9d28b0dc1c21bb8a97ee7d018a8b322fa57838ba31cc878e22d99" +checksum = "a31971752e70b8b2686d7e46ec17fb38dad4051d94024c88df49b667caea9c84" dependencies = [ "unicode-ident", ] [[package]] name = "quote" -version = "1.0.38" +version = "1.0.40" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "0e4dccaaaf89514f546c693ddc140f729f958c247918a13380cccc6078391acc" +checksum = "1885c039570dc00dcb4ff087a89e185fd56bae234ddc7f056a945bf36467248d" dependencies = [ "proc-macro2", ] @@ -1164,9 +1204,9 @@ checksum = "2b15c43186be67a4fd63bee50d0303afffcef381492ebe2c5d87f324e1b8815c" [[package]] name = "reqwest" -version = "0.12.12" +version = "0.12.14" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "43e734407157c3c2034e0258f5e4473ddb361b1e85f95a66690d67264d7cd1da" +checksum = "989e327e510263980e231de548a33e63d34962d29ae61b467389a1a09627a254" dependencies = [ "base64", "bytes", @@ -1209,9 +1249,9 @@ dependencies = [ [[package]] name = "ring" -version = "0.17.11" +version = "0.17.14" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "da5349ae27d3887ca812fb375b45a4fbb36d8d12d2df394968cd86e35683fe73" +checksum = "a4689e6c2294d81e88dc6261c768b63bc4fcdb852be6d1352498b114f61383b7" dependencies = [ "cc", "cfg-if", @@ -1242,7 +1282,20 @@ dependencies = [ "bitflags", "errno", "libc", - "linux-raw-sys", + "linux-raw-sys 0.4.15", + "windows-sys 0.59.0", +] + +[[package]] +name = "rustix" +version = "1.0.2" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "f7178faa4b75a30e269c71e61c353ce2748cf3d76f0c44c393f4e60abf49b825" +dependencies = [ + "bitflags", + "errno", + "libc", + "linux-raw-sys 0.9.2", "windows-sys 0.59.0", ] @@ -1287,15 +1340,15 @@ dependencies = [ [[package]] name = "rustversion" -version = "1.0.19" +version = "1.0.20" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f7c45b9784283f1b2e7fb61b42047c2fd678ef0960d4f6f1eba131594cc369d4" +checksum = "eded382c5f5f786b989652c49544c4877d9f015cc22e145a5ea8ea66c2921cd2" [[package]] name = "ryu" -version = "1.0.19" +version = "1.0.20" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6ea1a2d0a644769cc99faa24c3ad26b379b786fe7c36fd3c546254801650e6dd" +checksum = "28d3b2b1366ec20994f1fd18c3c594f05c5dd4bc44d8bb0c1c632c8d6829481f" [[package]] name = "schannel" @@ -1331,29 +1384,29 @@ dependencies = [ [[package]] name = "serde" -version = "1.0.218" +version = "1.0.219" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e8dfc9d19bdbf6d17e22319da49161d5d0108e4188e8b680aef6299eed22df60" +checksum = "5f0e2c6ed6606019b4e29e69dbaba95b11854410e5347d525002456dbbb786b6" dependencies = [ "serde_derive", ] [[package]] name = "serde_derive" -version = "1.0.218" +version = "1.0.219" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f09503e191f4e797cb8aac08e9a4a4695c5edf6a2e70e376d961ddd5c969f82b" +checksum = "5b0276cf7f2c73365f7157c8123c21cd9a50fbbd844757af28ca1f5925fc2a00" dependencies = [ "proc-macro2", "quote", - "syn 2.0.98", + "syn", ] [[package]] name = "serde_json" -version = "1.0.139" +version = "1.0.140" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "44f86c3acccc9c65b153fe1b85a3be07fe5515274ec9f0653b4a0875731c72a6" +checksum = "20068b6e96dc6c9bd23e01df8827e6c7e1f2fddd43c21810382803c136b99373" dependencies = [ "itoa", "memchr", @@ -1447,12 +1500,6 @@ version = "1.2.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "a8f112729512f8e442d81f95a8a7ddf2b7c6b8a1a6f509a95864142b30cab2d3" -[[package]] -name = "strsim" -version = "0.10.0" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "73473c0e59e6d5812c5dfe2a064a6444949f089e20eec9a2e5506596494e4623" - [[package]] name = "strsim" version = "0.11.1" @@ -1467,9 +1514,9 @@ checksum = "13c2bddecc57b384dee18652358fb23172facb8a2c51ccc10d74c157bdea3292" [[package]] name = "svd-parser" -version = "0.14.8" +version = "0.14.9" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "5ee7838c1b248b3418519826888d6ed2be881092ccd815bf350bd713b1d9f687" +checksum = "a41fe17e46dee363a7d3b20e878bbf6d6b4e839ae010ff07ef0e05d41d201811" dependencies = [ "anyhow", "roxmltree", @@ -1479,9 +1526,9 @@ dependencies = [ [[package]] name = "svd-rs" -version = "0.14.11" +version = "0.14.12" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1ec61cc12f8001859a87cca405aa84bfb2e5a083cfbf2eea804e5c23b6ad5a76" +checksum = "c9b88ee2e82f09623ff76965587dc15a2e7150a3126854899c86e94dab777458" dependencies = [ "once_cell", "regex", @@ -1507,7 +1554,7 @@ dependencies = [ "serde_yaml", "svd-parser", "svd-rs", - "syn 2.0.98", + "syn", "thiserror", "url", ] @@ -1526,7 +1573,7 @@ dependencies = [ "serde_yaml", "shell-words", "svd2rust", - "syn 2.0.98", + "syn", "thiserror", "tracing", "tracing-subscriber", @@ -1536,20 +1583,9 @@ dependencies = [ [[package]] name = "syn" -version = "1.0.109" -source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "72b64191b275b66ffe2469e8af2c1cfe3bafa67b529ead792a6d0160888b4237" -dependencies = [ - "proc-macro2", - "quote", - "unicode-ident", -] - -[[package]] -name = "syn" -version = "2.0.98" +version = "2.0.100" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "36147f1a48ae0ec2b5b3bc5b537d267457555a10dc06f3dbc8cb11ba3006d3b1" +checksum = "b09a44accad81e1ba1cd74a32461ba89dee89095ba17b32f5d03683b1b1fc2a0" dependencies = [ "proc-macro2", "quote", @@ -1573,7 +1609,7 @@ checksum = "c8af7666ab7b6390ab78131fb5b0fce11d6b7a6951602017c35fa82800708971" dependencies = [ "proc-macro2", "quote", - "syn 2.0.98", + "syn", ] [[package]] @@ -1599,15 +1635,15 @@ dependencies = [ [[package]] name = "tempfile" -version = "3.17.1" +version = "3.18.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "22e5a0acb1f3f55f65cc4a866c361b2fb2a0ff6366785ae6fbb5f85df07ba230" +checksum = "2c317e0a526ee6120d8dabad239c8dadca62b24b6f168914bbbc8e2fb1f0e567" dependencies = [ "cfg-if", "fastrand", "getrandom 0.3.1", "once_cell", - "rustix", + "rustix 1.0.2", "windows-sys 0.59.0", ] @@ -1628,7 +1664,7 @@ checksum = "4fee6c4efc90059e10f81e6d42c60a18f76588c3d74cb83a0b242a2b6c7504c1" dependencies = [ "proc-macro2", "quote", - "syn 2.0.98", + "syn", ] [[package]] @@ -1653,9 +1689,9 @@ dependencies = [ [[package]] name = "tokio" -version = "1.43.0" +version = "1.44.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3d61fa4ffa3de412bfea335c6ecff681de2b609ba3c77ef3e00e521813a9ed9e" +checksum = "9975ea0f48b5aa3972bf2d888c238182458437cc2a19374b81b25cdf1023fb3a" dependencies = [ "backtrace", "bytes", @@ -1701,9 +1737,9 @@ dependencies = [ [[package]] name = "toml" -version = "0.7.8" +version = "0.8.20" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "dd79e69d3b627db300ff956027cc6c3798cef26d22526befdfcd12feeb6d2257" +checksum = "cd87a5cdd6ffab733b2f74bc4fd7ee5fff6634124999ac278c35fc78c6120148" dependencies = [ "serde", "serde_spanned", @@ -1722,9 +1758,9 @@ dependencies = [ [[package]] name = "toml_edit" -version = "0.19.15" +version = "0.22.24" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1b5bb770da30e5cbfde35a2d7b9b8a2c4b8ef89548a7a6aeab5c9a576e3e7421" +checksum = "17b4795ff5edd201c7cd6dca065ae59972ce77d1b80fa0a84d94950ece7d1474" dependencies = [ "indexmap", "serde", @@ -1779,7 +1815,7 @@ checksum = "395ae124c09f9e6918a2310af6038fba074bcf474ac352496d5910dd59a2226d" dependencies = [ "proc-macro2", "quote", - "syn 2.0.98", + "syn", ] [[package]] @@ -1829,9 +1865,9 @@ checksum = "e421abadd41a4225275504ea4d6566923418b7f05506fbc9c0fe86ba7396114b" [[package]] name = "unicode-ident" -version = "1.0.17" +version = "1.0.18" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "00e2473a93778eb0bad35909dff6a10d28e63f792f16ed15e404fca9d5eeedbe" +checksum = "5a5f39404a5da50712a4c1eecf25e90dd62b613502b7e925fd4e4d19b5c96512" [[package]] name = "unsafe-libyaml" @@ -1933,7 +1969,7 @@ dependencies = [ "log", "proc-macro2", "quote", - "syn 2.0.98", + "syn", "wasm-bindgen-shared", ] @@ -1968,7 +2004,7 @@ checksum = "8ae87ea40c9f689fc23f209965b6fb8a99ad69aeeb0231408be24920604395de" dependencies = [ "proc-macro2", "quote", - "syn 2.0.98", + "syn", "wasm-bindgen-backend", "wasm-bindgen-shared", ] @@ -2001,7 +2037,7 @@ dependencies = [ "either", "home", "once_cell", - "rustix", + "rustix 0.38.44", "windows-sys 0.48.0", ] @@ -2033,34 +2069,39 @@ version = "0.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "712e227841d057c1ee1cd2fb22fa7e5a5461ae8e48fa2ca79ec42cfc1931183f" +[[package]] +name = "windows-link" +version = "0.1.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "6dccfd733ce2b1753b03b6d3c65edf020262ea35e20ccdf3e288043e6dd620e3" + [[package]] name = "windows-registry" -version = "0.2.0" +version = "0.4.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e400001bb720a623c1c69032f8e3e4cf09984deec740f007dd2b03ec864804b0" +checksum = "4286ad90ddb45071efd1a66dfa43eb02dd0dfbae1545ad6cc3c51cf34d7e8ba3" dependencies = [ "windows-result", "windows-strings", - "windows-targets 0.52.6", + "windows-targets 0.53.0", ] [[package]] name = "windows-result" -version = "0.2.0" +version = "0.3.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "1d1043d8214f791817bab27572aaa8af63732e11bf84aa21a45a78d6c317ae0e" +checksum = "06374efe858fab7e4f881500e6e86ec8bc28f9462c47e5a9941a0142ad86b189" dependencies = [ - "windows-targets 0.52.6", + "windows-link", ] [[package]] name = "windows-strings" -version = "0.1.0" +version = "0.3.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "4cd9b125c486025df0eabcb585e62173c6c9eddcec5d117d3b6e8c30e2ee4d10" +checksum = "87fa48cc5d406560701792be122a10132491cff9d0aeb23583cc2dcafc847319" dependencies = [ - "windows-result", - "windows-targets 0.52.6", + "windows-link", ] [[package]] @@ -2114,13 +2155,29 @@ dependencies = [ "windows_aarch64_gnullvm 0.52.6", "windows_aarch64_msvc 0.52.6", "windows_i686_gnu 0.52.6", - "windows_i686_gnullvm", + "windows_i686_gnullvm 0.52.6", "windows_i686_msvc 0.52.6", "windows_x86_64_gnu 0.52.6", "windows_x86_64_gnullvm 0.52.6", "windows_x86_64_msvc 0.52.6", ] +[[package]] +name = "windows-targets" +version = "0.53.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "b1e4c7e8ceaaf9cb7d7507c974735728ab453b67ef8f18febdd7c11fe59dca8b" +dependencies = [ + "windows_aarch64_gnullvm 0.53.0", + "windows_aarch64_msvc 0.53.0", + "windows_i686_gnu 0.53.0", + "windows_i686_gnullvm 0.53.0", + "windows_i686_msvc 0.53.0", + "windows_x86_64_gnu 0.53.0", + "windows_x86_64_gnullvm 0.53.0", + "windows_x86_64_msvc 0.53.0", +] + [[package]] name = "windows_aarch64_gnullvm" version = "0.48.5" @@ -2133,6 +2190,12 @@ version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "32a4622180e7a0ec044bb555404c800bc9fd9ec262ec147edd5989ccd0c02cd3" +[[package]] +name = "windows_aarch64_gnullvm" +version = "0.53.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "86b8d5f90ddd19cb4a147a5fa63ca848db3df085e25fee3cc10b39b6eebae764" + [[package]] name = "windows_aarch64_msvc" version = "0.48.5" @@ -2145,6 +2208,12 @@ version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "09ec2a7bb152e2252b53fa7803150007879548bc709c039df7627cabbd05d469" +[[package]] +name = "windows_aarch64_msvc" +version = "0.53.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c7651a1f62a11b8cbd5e0d42526e55f2c99886c77e007179efff86c2b137e66c" + [[package]] name = "windows_i686_gnu" version = "0.48.5" @@ -2157,12 +2226,24 @@ version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "8e9b5ad5ab802e97eb8e295ac6720e509ee4c243f69d781394014ebfe8bbfa0b" +[[package]] +name = "windows_i686_gnu" +version = "0.53.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "c1dc67659d35f387f5f6c479dc4e28f1d4bb90ddd1a5d3da2e5d97b42d6272c3" + [[package]] name = "windows_i686_gnullvm" version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "0eee52d38c090b3caa76c563b86c3a4bd71ef1a819287c19d586d7334ae8ed66" +[[package]] +name = "windows_i686_gnullvm" +version = "0.53.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "9ce6ccbdedbf6d6354471319e781c0dfef054c81fbc7cf83f338a4296c0cae11" + [[package]] name = "windows_i686_msvc" version = "0.48.5" @@ -2175,6 +2256,12 @@ version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "240948bc05c5e7c6dabba28bf89d89ffce3e303022809e73deaefe4f6ec56c66" +[[package]] +name = "windows_i686_msvc" +version = "0.53.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "581fee95406bb13382d2f65cd4a908ca7b1e4c2f1917f143ba16efe98a589b5d" + [[package]] name = "windows_x86_64_gnu" version = "0.48.5" @@ -2187,6 +2274,12 @@ version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "147a5c80aabfbf0c7d901cb5895d1de30ef2907eb21fbbab29ca94c5b08b1a78" +[[package]] +name = "windows_x86_64_gnu" +version = "0.53.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "2e55b5ac9ea33f2fc1716d1742db15574fd6fc8dadc51caab1c16a3d3b4190ba" + [[package]] name = "windows_x86_64_gnullvm" version = "0.48.5" @@ -2199,6 +2292,12 @@ version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "24d5b23dc417412679681396f2b49f3de8c1473deb516bd34410872eff51ed0d" +[[package]] +name = "windows_x86_64_gnullvm" +version = "0.53.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "0a6e035dd0599267ce1ee132e51c27dd29437f63325753051e71dd9e42406c57" + [[package]] name = "windows_x86_64_msvc" version = "0.48.5" @@ -2211,11 +2310,17 @@ version = "0.52.6" source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "589f6da84c646204747d1270a2a5661ea66ed1cced2631d546fdfb155959f9ec" +[[package]] +name = "windows_x86_64_msvc" +version = "0.53.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "271414315aff87387382ec3d271b52d7ae78726f5d44ac98b4f4030c91880486" + [[package]] name = "winnow" -version = "0.5.40" +version = "0.7.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f593a95398737aeed53e489c785df13f3618e41dbcd6718c6addbf1395aa6876" +checksum = "0e97b544156e9bebe1a0ffbc03484fc1ffe3100cbce3ffb17eac35f7cdd7ab36" dependencies = [ "memchr", ] @@ -2261,7 +2366,7 @@ checksum = "2380878cad4ac9aac1e2435f3eb4020e8374b5f13c296cb75b4620ff8e229154" dependencies = [ "proc-macro2", "quote", - "syn 2.0.98", + "syn", "synstructure", ] @@ -2282,7 +2387,7 @@ checksum = "d71e5d6e06ab090c67b5e44993ec16b72dcbaabc526db883a360057678b48502" dependencies = [ "proc-macro2", "quote", - "syn 2.0.98", + "syn", "synstructure", ] @@ -2311,5 +2416,5 @@ checksum = "6eafa6dfb17584ea3e2bd6e76e0cc15ad7af12b09abdd1ca55961bed9b1063c6" dependencies = [ "proc-macro2", "quote", - "syn 2.0.98", + "syn", ] diff --git a/Cargo.toml b/Cargo.toml index 86587a67..63a92cbf 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -38,7 +38,7 @@ yaml = ["dep:serde_yaml"] [dependencies] clap = { version = "4.0", optional = true } -irx-config = { version = "=3.3.0", features = [ +irx-config = { version = "3.5.0", features = [ "cmd", "toml-parser", "yaml", From be0d5c7c712398d55a0772e04ff866036f62b9ec Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Sat, 22 Mar 2025 10:22:42 +0300 Subject: [PATCH 316/319] rm ci/script.sh, move svd2rust-regress up --- Cargo.toml | 2 +- ci/before_deploy.sh | 17 - ci/script.sh | 630 ------------------ .../.gitignore | 0 .../Cargo.toml | 2 +- .../README.md | 0 .../all-tests.yml | 0 .../src/ci.rs | 0 .../src/command.rs | 0 .../src/diff.rs | 0 .../src/github.rs | 0 .../src/main.rs | 2 +- .../src/svd_test.rs | 0 .../src/tests.rs | 0 .../tests.yml | 0 15 files changed, 3 insertions(+), 650 deletions(-) delete mode 100644 ci/before_deploy.sh delete mode 100755 ci/script.sh rename {ci/svd2rust-regress => svd2rust-regress}/.gitignore (100%) rename {ci/svd2rust-regress => svd2rust-regress}/Cargo.toml (95%) rename {ci/svd2rust-regress => svd2rust-regress}/README.md (100%) rename {ci/svd2rust-regress => svd2rust-regress}/all-tests.yml (100%) rename {ci/svd2rust-regress => svd2rust-regress}/src/ci.rs (100%) rename {ci/svd2rust-regress => svd2rust-regress}/src/command.rs (100%) rename {ci/svd2rust-regress => svd2rust-regress}/src/diff.rs (100%) rename {ci/svd2rust-regress => svd2rust-regress}/src/github.rs (100%) rename {ci/svd2rust-regress => svd2rust-regress}/src/main.rs (99%) rename {ci/svd2rust-regress => svd2rust-regress}/src/svd_test.rs (100%) rename {ci/svd2rust-regress => svd2rust-regress}/src/tests.rs (100%) rename {ci/svd2rust-regress => svd2rust-regress}/tests.yml (100%) diff --git a/Cargo.toml b/Cargo.toml index 63a92cbf..c7662e87 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -69,7 +69,7 @@ version = "2.0" features = ["full", "extra-traits"] [workspace] -members = ["ci/svd2rust-regress"] +members = ["svd2rust-regress"] default-members = ["."] exclude = [ "output", diff --git a/ci/before_deploy.sh b/ci/before_deploy.sh deleted file mode 100644 index 41d6879c..00000000 --- a/ci/before_deploy.sh +++ /dev/null @@ -1,17 +0,0 @@ -set -euxo pipefail - -main() { - cargo rustc --bin svd2rust --target $TARGET --release -- -C lto - - rm -rf stage - mkdir stage - cp target/$TARGET/release/svd2rust stage - - pushd stage - tar czf ../$CRATE_NAME-$TRAVIS_TAG-$TARGET.tar.gz * - popd - - rm -rf stage -} - -main diff --git a/ci/script.sh b/ci/script.sh deleted file mode 100755 index 01c05a89..00000000 --- a/ci/script.sh +++ /dev/null @@ -1,630 +0,0 @@ -set -euxo pipefail - -test_svd() { - test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/$VENDOR/${1}.svd -} - -test_patched_stm32() { - test_svd_for_target cortex-m https://stm32-rs.github.io/stm32-rs/${1}.svd.patched -} - -test_svd_for_target() { - curl -fL --output $td/input.svd $2 - - # NOTE we care about errors in svd2rust, but not about errors / warnings in rustfmt - pushd $td - RUST_BACKTRACE=1 svd2rust $options --target $1 --source-type xml -i input.svd - - mv lib.rs src/lib.rs - - popd - - cargo $COMMAND --manifest-path $td/Cargo.toml -} - -main() { - if [ -z ${VENDOR-} ]; then - return - fi - - td=$(mktemp -d) - - case $OPTIONS in - all) - options="--strict --atomics" - ;; - *) - options=$OPTIONS - ;; - esac - - # test crate - cargo init --lib --name foo --edition 2021 $td - echo 'cortex-m = "0.7.7"' >> $td/Cargo.toml - echo 'cortex-m-rt = "0.7.3"' >> $td/Cargo.toml - echo 'vcell = "0.1.3"' >> $td/Cargo.toml - if [[ "$options" == *"--atomics"* ]]; then - echo 'portable-atomic = { version = "1.4", default-features = false }' >> $td/Cargo.toml - fi - if [[ "$options" == *"--impl-defmt"* ]]; then - echo 'defmt = { version = "0.3.5", optional = true }' >> $td/Cargo.toml - fi - echo '[profile.dev]' >> $td/Cargo.toml - echo 'incremental = false' >> $td/Cargo.toml - - echo '[lints.rust]' >> $td/Cargo.toml - echo 'dead_code = "deny"' >> $td/Cargo.toml - echo 'improper_ctypes = "deny"' >> $td/Cargo.toml - echo 'missing_docs = "deny"' >> $td/Cargo.toml - echo 'no_mangle_generic_items = "deny"' >> $td/Cargo.toml - echo 'non_shorthand_field_patterns = "deny"' >> $td/Cargo.toml - echo 'overflowing_literals = "deny"' >> $td/Cargo.toml - echo 'path_statements = "deny"' >> $td/Cargo.toml - echo 'patterns_in_fns_without_body = "deny"' >> $td/Cargo.toml - echo 'unconditional_recursion = "deny"' >> $td/Cargo.toml - echo 'unused_allocation = "deny"' >> $td/Cargo.toml - echo 'unused_comparisons = "deny"' >> $td/Cargo.toml - echo 'unused_parens = "deny"' >> $td/Cargo.toml - echo 'while_true = "deny"' >> $td/Cargo.toml - if [[ "${RUST_TOOLCHAIN:-}" == *"nightly"* ]]; then - echo 'private_bounds = "deny"' >> $td/Cargo.toml - echo 'private_interfaces = "deny"' >> $td/Cargo.toml - fi - - case $VENDOR in - Atmel) - # BAD-SVD missing resetValue - # test_svd AT91SAM9CN11 - # test_svd AT91SAM9CN12 - # test_svd AT91SAM9G10 - # test_svd AT91SAM9G15 - # test_svd AT91SAM9G20 - # test_svd AT91SAM9G25 - # test_svd AT91SAM9G35 - # test_svd AT91SAM9M10 - # test_svd AT91SAM9M11 - # test_svd AT91SAM9N12 - # test_svd AT91SAM9X25 - # test_svd AT91SAM9X35 - # test_svd ATSAM3A4C - # test_svd ATSAM3A8C - # test_svd ATSAM3N00A - # test_svd ATSAM3N00B - # test_svd ATSAM3N0A - # test_svd ATSAM3N0B - # test_svd ATSAM3N0C - # test_svd ATSAM3N1A - # test_svd ATSAM3N1B - # test_svd ATSAM3N1C - # test_svd ATSAM3N2A - # test_svd ATSAM3N2B - # test_svd ATSAM3N2C - # test_svd ATSAM3N4A - # test_svd ATSAM3N4B - # test_svd ATSAM3N4C - # test_svd ATSAM3S1A - # test_svd ATSAM3S1B - # test_svd ATSAM3S1C - # test_svd ATSAM3S2A - # test_svd ATSAM3S2B - # test_svd ATSAM3S2C - # test_svd ATSAM3S4A - # test_svd ATSAM3S4B - # test_svd ATSAM3S4C - # test_svd ATSAM3S8B - # test_svd ATSAM3S8C - # test_svd ATSAM3SD8B - # test_svd ATSAM3SD8C - # test_svd ATSAM3U1C - # test_svd ATSAM3U1E - # test_svd ATSAM3U2C - # test_svd ATSAM3U2E - # test_svd ATSAM3U4C - # test_svd ATSAM3U4E - # test_svd ATSAM3X4C - # test_svd ATSAM3X4E - # test_svd ATSAM3X8C - # test_svd ATSAM3X8E - # test_svd ATSAM4S16B - # test_svd ATSAM4S16C - # test_svd ATSAM4S8B - # test_svd ATSAM4S8C - # test_svd ATSAM4SD32B - # test_svd ATSAM4SD32C - # test_svd ATSAMA5D31 - # test_svd ATSAMA5D33 - # test_svd ATSAMA5D34 - # test_svd ATSAMA5D35 - - # FIXME(#107) "failed to resolve. Use of undeclared type or module `sercom0`" - # test_svd ATSAMD21E15A - # test_svd ATSAMD21E16A - # test_svd ATSAMD21E17A - # test_svd ATSAMD21E18A - # test_svd ATSAMD21G16A - # test_svd ATSAMD21G17A - # test_svd ATSAMD21G18A - # test_svd ATSAMD21J16A - # test_svd ATSAMD21J17A - # test_svd ATSAMD21J18A - # test_svd ATSAMR21E16A - # test_svd ATSAMR21E17A - # test_svd ATSAMR21E18A - # test_svd ATSAMR21G16A - # test_svd ATSAMR21G17A - # test_svd ATSAMR21G18A - ;; - - Freescale) - # BAD-SVD bad enumeratedValue value - # test_svd MKV56F20 - # test_svd MKV56F22 - # test_svd MKV56F24 - # test_svd MKV58F20 - # test_svd MKV58F22 - # test_svd MKV58F24 - - # BAD-SVD field names are equivalent when case is ignored - # test_svd MK61F15 - # test_svd MK61F15WS - # test_svd MK70F12 - # test_svd MK70F15 - # test_svd MK70F15WS - - # OK - # NOTE it would take too long to test all these so we only a few of each family - test_svd MK02F12810 - # test_svd MK10D10 - # test_svd MK10D5 - test_svd MK10D7 - # test_svd MK10DZ10 - # test_svd MK10F12 - # test_svd MK11D5 - # test_svd MK11D5WS - # test_svd MK11DA5 - test_svd MK12D5 - # test_svd MK20D10 - # test_svd MK20D5 - # test_svd MK20D7 - # test_svd MK20DZ10 - # test_svd MK20F12 - test_svd MK21D5 - # test_svd MK21D5WS - # test_svd MK21DA5 - test_svd MK21F12 - # test_svd MK21FA12 - # test_svd MK22D5 - # test_svd MK22F12 - # test_svd MK22F12810 - # test_svd MK22F25612 - # test_svd MK22F51212 - # test_svd MK22FA12 - # test_svd MK24F12 - # test_svd MK24F25612 - # test_svd MK26F18 - # test_svd MK30D10 - test_svd MK30D7 - # test_svd MK30DZ10 - # test_svd MK40D10 - test_svd MK40D7 - # test_svd MK40DZ10 - # test_svd MK50D10 - # test_svd MK50D7 - # test_svd MK50DZ10 - # test_svd MK51D10 - # test_svd MK51D7 - # test_svd MK51DZ10 - # test_svd MK52D10 - test_svd MK52DZ10 - # test_svd MK53D10 - # test_svd MK53DZ10 - # test_svd MK60D10 - # test_svd MK60DZ10 - # test_svd MK60F15 - # test_svd MK63F12 - # test_svd MK64F12 - # test_svd MK65F18 - test_svd MK66F18 - # test_svd MK80F25615 - # test_svd MK81F25615 - test_svd MK82F25615 - # test_svd MKE14F16 - # test_svd MKE14Z7 - test_svd MKE15Z7 - # test_svd MKE16F16 - # test_svd MKE18F16 - test_svd MKL28T7_CORE0 - # test_svd MKL28T7_CORE1 - # test_svd MKL28Z7 - test_svd MKL81Z7 - # test_svd MKL82Z7 - # test_svd MKS22F12 - test_svd MKV10Z1287 - # test_svd MKV10Z7 - # test_svd MKV11Z7 - # test_svd MKV30F12810 - # test_svd MKV31F12810 - # test_svd MKV31F25612 - test_svd MKV31F51212 - # test_svd MKV40F15 - # test_svd MKV42F16 - # test_svd MKV43F15 - # test_svd MKV44F15 - # test_svd MKV44F16 - test_svd MKV45F15 - # test_svd MKV46F15 - # test_svd MKV46F16 - # test_svd MKW20Z4 - # test_svd MKW21D5 - # test_svd MKW21Z4 - test_svd MKW22D5 - # test_svd MKW24D5 - # test_svd MKW30Z4 - # test_svd MKW31Z4 - # test_svd MKW40Z4 - # test_svd MKW41Z4 - - # #92 regression tests - # NOTE it would take too long to test all these so we only a few of each family - test_svd MKE02Z4 - # test_svd MKE04Z1284 - # test_svd MKE04Z4 - test_svd MKE06Z4 - # test_svd MKE14D7 - # test_svd MKE15D7 - # test_svd MKL02Z4 - # test_svd MKL03Z4 - # test_svd MKL04Z4 - test_svd MKL05Z4 - # test_svd MKL13Z644 - # test_svd MKL14Z4 - # test_svd MKL15Z4 - # test_svd MKL16Z4 - # test_svd MKL17Z4 - test_svd MKL17Z644 - # test_svd MKL24Z4 - # test_svd MKL25Z4 - # test_svd MKL26Z4 - # test_svd MKL27Z4 - # test_svd MKL27Z644 - # test_svd MKL33Z4 - # test_svd MKL33Z644 - # test_svd MKL34Z4 - test_svd MKL36Z4 - # test_svd MKL43Z4 - # test_svd MKL46Z4 - test_svd MKM14ZA5 - # test_svd MKM33ZA5 - # test_svd MKM34Z7 - test_svd MKM34ZA5 - # test_svd MKW01Z4 - # test_svd SKEAZ1284 - test_svd SKEAZN642 - # test_svd SKEAZN84 - ;; - - Fujitsu) - # OK - test_svd MB9AF10xN - test_svd MB9AF10xR - test_svd MB9AF11xK - test_svd MB9AF11xL - test_svd MB9AF11xM - test_svd MB9AF11xN - test_svd MB9AF12xK - test_svd MB9AF12xL - test_svd MB9AF13xK - test_svd MB9AF13xL - test_svd MB9AF13xM - test_svd MB9AF13xN - test_svd MB9AF14xL - test_svd MB9AF14xM - test_svd MB9AF14xN - test_svd MB9AF15xM - test_svd MB9AF15xN - test_svd MB9AF15xR - test_svd MB9AF1AxL - test_svd MB9AF1AxM - test_svd MB9AF1AxN - test_svd MB9AF31xK - test_svd MB9AF31xL - test_svd MB9AF31xM - test_svd MB9AF31xN - test_svd MB9AF34xL - test_svd MB9AF34xM - test_svd MB9AF34xN - test_svd MB9AF42xK - test_svd MB9AF42xL - test_svd MB9AFA3xL - test_svd MB9AFA3xM - test_svd MB9AFA3xN - test_svd MB9AFA4xL - test_svd MB9AFA4xM - test_svd MB9AFA4xN - test_svd MB9AFAAxL - test_svd MB9AFAAxM - test_svd MB9AFAAxN - test_svd MB9AFB4xL - test_svd MB9AFB4xM - test_svd MB9AFB4xN - test_svd MB9B160L - test_svd MB9B160R - test_svd MB9B360L - test_svd MB9B360R - test_svd MB9B460L - test_svd MB9B460R - test_svd MB9B560L - test_svd MB9B560R - test_svd MB9BF10xN - test_svd MB9BF10xR - test_svd MB9BF11xN - test_svd MB9BF11xR - test_svd MB9BF11xS - test_svd MB9BF11xT - test_svd MB9BF12xJ - test_svd MB9BF12xK - test_svd MB9BF12xL - test_svd MB9BF12xM - test_svd MB9BF12xS - test_svd MB9BF12xT - test_svd MB9BF21xS - test_svd MB9BF21xT - test_svd MB9BF30xN - test_svd MB9BF30xR - test_svd MB9BF31xN - test_svd MB9BF31xR - test_svd MB9BF31xS - test_svd MB9BF31xT - test_svd MB9BF32xK - test_svd MB9BF32xL - test_svd MB9BF32xM - test_svd MB9BF32xS - test_svd MB9BF32xT - test_svd MB9BF40xN - test_svd MB9BF40xR - test_svd MB9BF41xN - test_svd MB9BF41xR - test_svd MB9BF41xS - test_svd MB9BF41xT - test_svd MB9BF42xS - test_svd MB9BF42xT - test_svd MB9BF50xN - test_svd MB9BF50xR - test_svd MB9BF51xN - test_svd MB9BF51xR - test_svd MB9BF51xS - test_svd MB9BF51xT - test_svd MB9BF52xK - test_svd MB9BF52xL - test_svd MB9BF52xM - test_svd MB9BF52xS - test_svd MB9BF52xT - test_svd MB9BF61xS - test_svd MB9BF61xT - test_svd MB9BFD1xS - test_svd MB9BFD1xT - test_svd S6E1A1 - #test_svd S6E2CC #broken CANFD.FDESCR access - ;; - - GD32) - #test_svd_for_target cortex-m https://q.geek.nz/files/gd32f130.svd.patched - ;; - - Holtek) - # OK - test_svd ht32f125x - test_svd ht32f175x - test_svd ht32f275x - ;; - - Microchip) - echo '[dependencies.bare-metal]' >> $td/Cargo.toml - echo 'version = "1.0.0"' >> $td/Cargo.toml - - echo '[dependencies.mips-mcu]' >> $td/Cargo.toml - echo 'version = "0.1.0"' >> $td/Cargo.toml - - test_svd_for_target mips https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx1xxfxxxb/PIC32MX170F256B.svd.patched - test_svd_for_target mips https://raw.githubusercontent.com/kiffie/pic32-pac/master/pic32mx2xxfxxxb/PIC32MX270F256B.svd.patched - ;; - - Nordic) - # BAD-SVD two enumeratedValues have the same value - # test_svd nrf52 - - # OK - test_svd nrf51 - ;; - - Nuvoton) - # OK - test_svd M051_Series - test_svd NUC100_Series - ;; - - NXP) - test_svd MK22F25612 - test_svd MKW41Z4 - - # BAD-SVD two enumeratedValues have the same name - # test_svd LPC11Exx_v5 - # test_svd LPC11Uxx_v7 - # test_svd LPC11xx_v6a - # test_svd LPC11xx_v6 - # test_svd LPC13Uxx_v1 - # test_svd LPC15xx_v0.7 - # test_svd LPC800_v0.3 - # test_svd LPC11E6x_v0.8 - # test_svd LPC176x5x_v0.2 - # test_svd LPC11Cxx_v9 - - # BAD-SVD missing resetValue - # test_svd LPC178x_7x - # test_svd LPC178x_7x_v0.8 - # test_svd LPC408x_7x_v0.7 - # test_svd LPC11Axxv0.6 - - - # BAD-SVD bad identifier: contains a '.' - # test_svd LPC11D14_svd_v4 - # test_svd LPC13xx_svd_v1 - - # BAD-SVD bad identifier: contains a '/' - # test_svd LPC18xx_svd_v18 - # test_svd LPC43xx_svd_v5 - - # BAD-SVD uses the identifier '_' to name a reserved bitfield value - # test_svd LPC1102_4_v4 - - # FIXME(???) "duplicate definitions for `write`" - # #99 regression test - # test_svd LPC5410x_v0.4 - ;; - - # MSP430 - MSP430) - echo '[dependencies.msp430]' >> $td/Cargo.toml - echo 'version = "0.4.0"' >> $td/Cargo.toml - - # Test MSP430 - test_svd_for_target msp430 https://raw.githubusercontent.com/pftbest/msp430g2553/v0.3.0-svd/msp430g2553.svd - test_svd_for_target msp430 https://raw.githubusercontent.com/YuhanLiin/msp430fr2355/master/msp430fr2355.svd - ;; - - # Community-provided RISC-V SVDs - RISC-V) - echo '[dependencies.bare-metal]' >> $td/Cargo.toml - echo 'version = "1.0.0"' >> $td/Cargo.toml - - echo '[dependencies.riscv]' >> $td/Cargo.toml - echo 'version = "0.12.1"' >> $td/Cargo.toml - - echo '[dependencies.riscv-rt]' >> $td/Cargo.toml - echo 'version = "0.13.0"' >> $td/Cargo.toml - - test_svd_for_target riscv https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x/e310x.svd - test_svd_for_target riscv https://raw.githubusercontent.com/riscv-rust/k210-pac/master/k210.svd - test_svd_for_target riscv https://raw.githubusercontent.com/riscv-rust/fu540-pac/master/fu540.svd - ;; - - SiliconLabs) - # #99 regression tests - test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3C1x4.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3C1x6.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3C1x7.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3L1x4.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3L1x6.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3L1x7.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3U1x4.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3U1x6.svd - test_svd_for_target cortex-m https://raw.githubusercontent.com/cmsis-svd/cmsis-svd-data/main/data/SiliconLabs/SiM3_NRND/SIM3U1x7.svd - - # FIXME(???) panicked at "c.text.clone()" - # test_svd SIM3L1x8_SVD - ;; - - Spansion) - # OK - # See Fujitsu for other chips - test_svd MB9BF36xx - test_svd MB9BF46xx - test_svd MB9BF56xx - ;; - - STMicro) - # OK - test_svd STM32F030 - test_svd STM32F031x - test_svd STM32F042x - test_svd STM32F072x - test_svd STM32F091x - test_svd STM32F0xx - test_svd STM32F100xx - test_svd STM32F103xx - test_svd STM32F107xx - test_svd STM32F20x - test_svd STM32F21x - test_svd STM32F301 - test_svd STM32F303 - test_svd STM32F401 - test_svd STM32F407 - test_svd STM32F410 - test_svd STM32F413 - test_svd STM32F427 - test_svd STM32F429 - test_svd STM32F446 - test_svd STM32F469 - test_svd STM32L100 - test_svd STM32L15xC - test_svd STM32L15xxE - test_svd STM32L15xxxA - test_svd STM32L1xx - test_svd STM32L4x6 - test_svd STM32W108 - - # FIXME(#91) "field is never used: `register`" - # test_svd STM32L051x - # test_svd STM32L052x - # test_svd STM32L053x - # test_svd STM32L062x - # test_svd STM32L063x - ;; - - STM32-patched) - echo '[dependencies.critical-section]' >> $td/Cargo.toml - echo 'version = "1.0"' >> $td/Cargo.toml - echo 'optional = true' >> $td/Cargo.toml - - echo '[features]' >> $td/Cargo.toml - echo 'default = ["critical-section", "rt"]' >> $td/Cargo.toml - echo 'rt = ["cortex-m-rt/device"]' >> $td/Cargo.toml - echo 'atomics = []' >> $td/Cargo.toml - - # OK - test_patched_stm32 stm32f0x2 - test_patched_stm32 stm32f103 - test_patched_stm32 stm32f411 - test_patched_stm32 stm32f469 - test_patched_stm32 stm32f723 - test_patched_stm32 stm32g070 - test_patched_stm32 stm32g473 - test_patched_stm32 stm32h743 - test_patched_stm32 stm32l0x3 - test_patched_stm32 stm32l162 - test_patched_stm32 stm32l4x6 - test_patched_stm32 stm32l562 - test_patched_stm32 stm32mp157 - test_patched_stm32 stm32wb55 - test_patched_stm32 stm32wle5 - test_patched_stm32 stm32c011 - ;; - - Toshiba) - # BAD-SVD resetValue is bigger than the register size - # test_svd M365 - # test_svd M367 - # test_svd M368 - # test_svd M369 - # test_svd M36B - - # OK - test_svd M061 - ;; - - Espressif) - test_svd_for_target riscv https://raw.githubusercontent.com/espressif/svd/main/svd/esp32c3.svd - - test_svd_for_target xtensa-lx https://raw.githubusercontent.com/espressif/svd/main/svd/esp32.svd - test_svd_for_target xtensa-lx https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s2.svd - test_svd_for_target xtensa-lx https://raw.githubusercontent.com/espressif/svd/main/svd/esp32s3.svd - ;; - - esac - - rm -rf $td -} - -if [ -z ${TRAVIS_TAG-} ]; then - main -fi diff --git a/ci/svd2rust-regress/.gitignore b/svd2rust-regress/.gitignore similarity index 100% rename from ci/svd2rust-regress/.gitignore rename to svd2rust-regress/.gitignore diff --git a/ci/svd2rust-regress/Cargo.toml b/svd2rust-regress/Cargo.toml similarity index 95% rename from ci/svd2rust-regress/Cargo.toml rename to svd2rust-regress/Cargo.toml index 62f4cff4..9b3fc80e 100644 --- a/ci/svd2rust-regress/Cargo.toml +++ b/svd2rust-regress/Cargo.toml @@ -7,7 +7,7 @@ rust-version = "1.82.0" [dependencies] clap = { version = "4.1", features = ["color", "derive", "string", "env"] } -svd2rust = { path = "../../" } +svd2rust = { path = "../" } reqwest = { version = "0.12", features = ["blocking", "native-tls-vendored"] } rayon = "1.4" anyhow = "1" diff --git a/ci/svd2rust-regress/README.md b/svd2rust-regress/README.md similarity index 100% rename from ci/svd2rust-regress/README.md rename to svd2rust-regress/README.md diff --git a/ci/svd2rust-regress/all-tests.yml b/svd2rust-regress/all-tests.yml similarity index 100% rename from ci/svd2rust-regress/all-tests.yml rename to svd2rust-regress/all-tests.yml diff --git a/ci/svd2rust-regress/src/ci.rs b/svd2rust-regress/src/ci.rs similarity index 100% rename from ci/svd2rust-regress/src/ci.rs rename to svd2rust-regress/src/ci.rs diff --git a/ci/svd2rust-regress/src/command.rs b/svd2rust-regress/src/command.rs similarity index 100% rename from ci/svd2rust-regress/src/command.rs rename to svd2rust-regress/src/command.rs diff --git a/ci/svd2rust-regress/src/diff.rs b/svd2rust-regress/src/diff.rs similarity index 100% rename from ci/svd2rust-regress/src/diff.rs rename to svd2rust-regress/src/diff.rs diff --git a/ci/svd2rust-regress/src/github.rs b/svd2rust-regress/src/github.rs similarity index 100% rename from ci/svd2rust-regress/src/github.rs rename to svd2rust-regress/src/github.rs diff --git a/ci/svd2rust-regress/src/main.rs b/svd2rust-regress/src/main.rs similarity index 99% rename from ci/svd2rust-regress/src/main.rs rename to svd2rust-regress/src/main.rs index 36dec528..f1a4ae6a 100644 --- a/ci/svd2rust-regress/src/main.rs +++ b/svd2rust-regress/src/main.rs @@ -412,7 +412,7 @@ impl Opts { } } -/// Hack to use ci/tests.yml as default value when running as `cargo run` +/// Hack to use svd2rust-regress/tests.yml as default value when running as `cargo run` fn default_test_cases() -> std::ffi::OsString { std::env::var_os("CARGO_MANIFEST_DIR").map_or_else( || std::ffi::OsString::from("tests.yml".to_owned()), diff --git a/ci/svd2rust-regress/src/svd_test.rs b/svd2rust-regress/src/svd_test.rs similarity index 100% rename from ci/svd2rust-regress/src/svd_test.rs rename to svd2rust-regress/src/svd_test.rs diff --git a/ci/svd2rust-regress/src/tests.rs b/svd2rust-regress/src/tests.rs similarity index 100% rename from ci/svd2rust-regress/src/tests.rs rename to svd2rust-regress/src/tests.rs diff --git a/ci/svd2rust-regress/tests.yml b/svd2rust-regress/tests.yml similarity index 100% rename from ci/svd2rust-regress/tests.yml rename to svd2rust-regress/tests.yml From 2ca591cfc0aded0492351eb85a6da4201085e8cc Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Thu, 3 Apr 2025 09:55:51 +0300 Subject: [PATCH 317/319] fix known issues in derive register arrays --- .github/workflows/ci.yml | 10 ++++-- CHANGELOG.md | 1 + src/generate/peripheral.rs | 58 ++++++++++++++++++++++------------- src/generate/register.rs | 24 ++++++++++----- svd2rust-regress/src/tests.rs | 2 ++ svd2rust-regress/tests.yml | 6 ++++ 6 files changed, 69 insertions(+), 32 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 0aa32833..92d9873a 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -83,7 +83,10 @@ jobs: - { vendor: Spansion, options: "-- --atomics" } - { vendor: STMicro } - { vendor: STMicro, options: "-- --atomics" } - - { vendor: STMicro, options: "-- --strict -f enum_value::p: --max-cluster-size --atomics --atomics-feature atomics --impl-debug --impl-defmt defmt" } + - { + vendor: STMicro, + options: "-- --strict -f enum_value::p: --max-cluster-size --atomics --atomics-feature atomics --impl-debug --impl-defmt defmt", + } - { vendor: Toshiba } - { vendor: Toshiba, options: "-- --strict --atomics" } - { vendor: TexasInstruments } @@ -92,6 +95,7 @@ jobs: - { vendor: Espressif, options: "-- --atomics" } - { vendor: Vorago } - { vendor: Vorago, options: "-- --strict --atomics" } + - { vendor: Renesas } - { vendor: RaspberryPi } - { vendor: RaspberryPi, options: "-- --atomics" } @@ -176,11 +180,11 @@ jobs: - name: Cache uses: Swatinem/rust-cache@v2 with: - key: svdtools-0.3.19 + key: svdtools-0.4.6 - name: Install svdtools run: | - cargo install svdtools --version 0.3.19 --target-dir target + cargo install svdtools --version 0.4.6 --target-dir target - name: Run CI script run: | diff --git a/CHANGELOG.md b/CHANGELOG.md index d408095e..013438df 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -8,6 +8,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] - Update `irx-config` +- Fix register array derive regression ## [v0.36.0] - 2025-03-09 diff --git a/src/generate/peripheral.rs b/src/generate/peripheral.rs index f5de3902..618952eb 100644 --- a/src/generate/peripheral.rs +++ b/src/generate/peripheral.rs @@ -188,8 +188,15 @@ pub fn render(p_original: &Peripheral, index: &Index, config: &Config) -> Result "Pushing {} register or cluster blocks into output", ercs.len() ); - let reg_block = - register_or_cluster_block(&ercs, &derive_infos, None, "Register block", None, config)?; + let reg_block = register_or_cluster_block( + &ercs, + &BlockPath::new(&p.name), + &derive_infos, + None, + "Register block", + None, + config, + )?; out.extend(quote! { #[doc = #doc] @@ -469,6 +476,7 @@ fn make_comment(size: u32, offset: u32, description: &str) -> String { fn register_or_cluster_block( ercs: &[RegisterCluster], + path: &BlockPath, derive_infos: &[DeriveInfo], name: Option<&str>, doc: &str, @@ -478,7 +486,7 @@ fn register_or_cluster_block( let mut rbfs = TokenStream::new(); let mut accessors = TokenStream::new(); - let ercs_expanded = expand(ercs, derive_infos, config) + let ercs_expanded = expand(ercs, path, derive_infos, config) .with_context(|| "Could not expand register or cluster block")?; // Locate conflicting regions; we'll need to use unions to represent them. @@ -612,6 +620,7 @@ fn register_or_cluster_block( /// `RegisterBlockField`s containing `Field`s. fn expand( ercs: &[RegisterCluster], + path: &BlockPath, derive_infos: &[DeriveInfo], config: &Config, ) -> Result> { @@ -623,14 +632,14 @@ fn expand( match &erc { RegisterCluster::Register(register) => { let reg_name = ®ister.name; - let expanded_reg = expand_register(register, derive_info, config) + let expanded_reg = expand_register(register, path, derive_info, config) .with_context(|| format!("can't expand register '{reg_name}'"))?; trace!("Register: {reg_name}"); ercs_expanded.extend(expanded_reg); } RegisterCluster::Cluster(cluster) => { let cluster_name = &cluster.name; - let expanded_cluster = expand_cluster(cluster, config) + let expanded_cluster = expand_cluster(cluster, path, config) .with_context(|| format!("can't expand cluster '{cluster_name}'"))?; trace!("Cluster: {cluster_name}"); ercs_expanded.extend(expanded_cluster); @@ -873,9 +882,9 @@ fn is_derivable( /// Calculate the size of a Cluster. If it is an array, then the dimensions /// tell us the size of the array. Otherwise, inspect the contents using /// [cluster_info_size_in_bits]. -fn cluster_size_in_bits(cluster: &Cluster, config: &Config) -> Result { +fn cluster_size_in_bits(cluster: &Cluster, path: &BlockPath, config: &Config) -> Result { match cluster { - Cluster::Single(info) => cluster_info_size_in_bits(info, config), + Cluster::Single(info) => cluster_info_size_in_bits(info, path, config), // If the contained array cluster has a mismatch between the // dimIncrement and the size of the array items, then the array // will get expanded in expand_cluster below. The overall size @@ -885,7 +894,7 @@ fn cluster_size_in_bits(cluster: &Cluster, config: &Config) -> Result { return Ok(0); // Special case! } let last_offset = (dim.dim - 1) * dim.dim_increment * BITS_PER_BYTE; - let last_size = cluster_info_size_in_bits(info, config); + let last_size = cluster_info_size_in_bits(info, path, config); Ok(last_offset + last_size?) } } @@ -893,13 +902,13 @@ fn cluster_size_in_bits(cluster: &Cluster, config: &Config) -> Result { /// Recursively calculate the size of a ClusterInfo. A cluster's size is the /// maximum end position of its recursive children. -fn cluster_info_size_in_bits(info: &ClusterInfo, config: &Config) -> Result { +fn cluster_info_size_in_bits(info: &ClusterInfo, path: &BlockPath, config: &Config) -> Result { let mut size = 0; for c in &info.children { let end = match c { RegisterCluster::Register(reg) => { - let reg_size: u32 = expand_register(reg, &DeriveInfo::Root, config)? + let reg_size: u32 = expand_register(reg, path, &DeriveInfo::Root, config)? .iter() .map(|rbf| rbf.size) .sum(); @@ -907,7 +916,7 @@ fn cluster_info_size_in_bits(info: &ClusterInfo, config: &Config) -> Result (reg.address_offset * BITS_PER_BYTE) + reg_size } RegisterCluster::Cluster(clust) => { - (clust.address_offset * BITS_PER_BYTE) + cluster_size_in_bits(clust, config)? + (clust.address_offset * BITS_PER_BYTE) + cluster_size_in_bits(clust, path, config)? } }; @@ -917,10 +926,14 @@ fn cluster_info_size_in_bits(info: &ClusterInfo, config: &Config) -> Result } /// Render a given cluster (and any children) into `RegisterBlockField`s -fn expand_cluster(cluster: &Cluster, config: &Config) -> Result> { +fn expand_cluster( + cluster: &Cluster, + path: &BlockPath, + config: &Config, +) -> Result> { let mut cluster_expanded = vec![]; - let cluster_size = cluster_info_size_in_bits(cluster, config) + let cluster_size = cluster_info_size_in_bits(cluster, path, config) .with_context(|| format!("Can't calculate cluster {} size", cluster.name))?; let description = cluster .description @@ -1087,6 +1100,7 @@ fn expand_cluster(cluster: &Cluster, config: &Config) -> Result Result> { @@ -1104,7 +1118,7 @@ fn expand_register( } else { info_name.remove_dim() }; - let ty_str = ty_name.clone(); + let mut ty_str = ty_name.clone(); match register { Register::Single(info) => { @@ -1135,7 +1149,7 @@ fn expand_register( || (register_size <= array_info.dim_increment * BITS_PER_BYTE); let convert_list = match config.keep_list { - true => info.name.contains("[%s]"), + true => info_name.contains("[%s]"), false => true, }; @@ -1154,13 +1168,12 @@ fn expand_register( "".into() }; let ac = match derive_info { - DeriveInfo::Implicit(_) => { - ty_name = info_name.expand_dim(&index); - convert_list && sequential_indexes_from0 - } - DeriveInfo::Explicit(_) => { + DeriveInfo::Implicit(di) | DeriveInfo::Explicit(di) + if path == &di.block && !info_name.contains("[%s]") => + { ty_name = info_name.expand_dim(&index); - convert_list && sequential_indexes_from0 + ty_str = ty_name.clone(); + false } _ => convert_list, }; @@ -1207,7 +1220,7 @@ fn expand_register( let idx_name = ident( &util::fullname(&ri.name, &info.alternate_group, config.ignore_groups), config, - "cluster_accessor", + "register_accessor", span, ); let doc = make_comment( @@ -1374,6 +1387,7 @@ fn cluster_block( }; let reg_block = register_or_cluster_block( &c.children, + &path.new_cluster(&c.name), &mod_derive_infos, Some(&mod_name), &doc, diff --git a/src/generate/register.rs b/src/generate/register.rs index c1cdc876..7622ba71 100644 --- a/src/generate/register.rs +++ b/src/generate/register.rs @@ -50,14 +50,16 @@ pub fn render( ) -> Result { let mut name = util::name_of(register, config.ignore_groups); // Rename if this is a derived array - if dpath.is_some() { + if let Some(dpath) = dpath.as_ref() { if let MaybeArray::Array(info, array_info) = register { if let Some(dim_index) = &array_info.dim_index { - let index: Cow = dim_index.first().unwrap().into(); - name = info - .fullname(config.ignore_groups) - .expand_dim(&index) - .into() + if path == &dpath.block { + let index: Cow = dim_index.first().unwrap().into(); + name = info + .fullname(config.ignore_groups) + .expand_dim(&index) + .into() + } } } } @@ -1452,7 +1454,15 @@ impl Variant { span, ); let sc = case.sanitize(&ev.name); - const INTERNALS: [&str; 6] = ["bit", "bits", "clear_bit", "set", "set_bit", "variant"]; + const INTERNALS: [&str; 7] = [ + "bit", + "bits", + "clear_bit", + "set", + "set_bit", + "variant", + "offset", + ]; let sc = Ident::new( &(if INTERNALS.contains(&sc.as_ref()) { sc + "_" diff --git a/svd2rust-regress/src/tests.rs b/svd2rust-regress/src/tests.rs index c7ebc083..f6c2f73d 100644 --- a/svd2rust-regress/src/tests.rs +++ b/svd2rust-regress/src/tests.rs @@ -25,6 +25,7 @@ pub enum Manufacturer { Vorago, Espressif, RaspberryPi, + Renesas, Unknown, } @@ -47,6 +48,7 @@ impl Manufacturer { Toshiba, SiFive, RaspberryPi, + Renesas, TexasInstruments, Espressif, ] diff --git a/svd2rust-regress/tests.yml b/svd2rust-regress/tests.yml index 73a87549..bf17e088 100644 --- a/svd2rust-regress/tests.yml +++ b/svd2rust-regress/tests.yml @@ -696,6 +696,12 @@ chip: va108xx svd_url: https://raw.githubusercontent.com/us-irs/va108xx-rs/refs/heads/main/va108xx/svd/va108xx.svd.patched +# Renesas +- arch: cortex-m + mfgr: Renesas + chip: r7fa4m1ab + svd_url: https://raw.githubusercontent.com/ra-rs/ra/refs/heads/main/svd/vendor/R7FA4M1AB.svd + # Raspberry Pi - arch: cortex-m mfgr: RaspberryPi From a85dedaca8054a70007d32289946a48ebafef76c Mon Sep 17 00:00:00 2001 From: Andrey Zgarbul Date: Fri, 4 Apr 2025 06:27:14 +0300 Subject: [PATCH 318/319] release 0.36.1 --- CHANGELOG.md | 5 +- Cargo.lock | 144 +++++++++++++++++++++++++++------------------------ Cargo.toml | 6 +-- 3 files changed, 82 insertions(+), 73 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 013438df..8362d053 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/). ## [Unreleased] +## [v0.36.1] - 2025-04-04 + - Update `irx-config` - Fix register array derive regression @@ -951,7 +953,8 @@ peripheral.register.write(|w| w.field().set()); - Initial version of the `svd2rust` tool -[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.36.0...HEAD +[Unreleased]: https://github.com/rust-embedded/svd2rust/compare/v0.36.1...HEAD +[v0.36.1]: https://github.com/rust-embedded/svd2rust/compare/v0.36.0...v0.36.1 [v0.36.0]: https://github.com/rust-embedded/svd2rust/compare/v0.35.0...v0.36.0 [v0.35.0]: https://github.com/rust-embedded/svd2rust/compare/v0.34.0...v0.35.0 [v0.34.0]: https://github.com/rust-embedded/svd2rust/compare/v0.33.5...v0.34.0 diff --git a/Cargo.lock b/Cargo.lock index 222c836b..f87d1e9c 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -158,9 +158,9 @@ checksum = "d71b6127be86fdcfddb610f7182ac57211d4b18a3e9c82eb2d17662f2227ad6a" [[package]] name = "cc" -version = "1.2.16" +version = "1.2.17" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "be714c154be609ec7f5dad223a33bf1482fff90472de28f7362806e6d4832b8c" +checksum = "1fcb57c740ae1daf453ae85f16e37396f672b039e00d9d866e07ddb24e328e3a" dependencies = [ "shlex", ] @@ -173,9 +173,9 @@ checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd" [[package]] name = "clap" -version = "4.5.32" +version = "4.5.35" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6088f3ae8c3608d19260cd7445411865a485688711b78b5be70d78cd96136f83" +checksum = "d8aa86934b44c19c50f87cc2790e19f54f7a67aedb64101c2e1a2e5ecfb73944" dependencies = [ "clap_builder", "clap_derive", @@ -183,9 +183,9 @@ dependencies = [ [[package]] name = "clap_builder" -version = "4.5.32" +version = "4.5.35" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "22a7ef7f676155edfb82daa97f99441f3ebf4a58d5e32f295a56259f1b6facc8" +checksum = "2414dbb2dd0695280da6ea9261e327479e9d37b0630f6b53ba2a11c60c679fd9" dependencies = [ "anstream", "anstyle", @@ -266,9 +266,9 @@ checksum = "d0a5c400df2834b80a4c3327b3aad3a4c4cd4de0629063962b03235697506a28" [[package]] name = "darling" -version = "0.20.10" +version = "0.20.11" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6f63b86c8a8826a49b8c21f08a2d07338eec8d900540f8630dc76284be802989" +checksum = "fc7f46116c46ff9ab3eb1597a45688b6715c6e628b5c133e288e709a29bcb4ee" dependencies = [ "darling_core", "darling_macro", @@ -276,9 +276,9 @@ dependencies = [ [[package]] name = "darling_core" -version = "0.20.10" +version = "0.20.11" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "95133861a8032aaea082871032f5815eb9e98cef03fa916ab4500513994df9e5" +checksum = "0d00b9596d185e565c2207a0b01f8bd1a135483d02d9b7b0a54b11da8d53412e" dependencies = [ "fnv", "ident_case", @@ -290,9 +290,9 @@ dependencies = [ [[package]] name = "darling_macro" -version = "0.20.10" +version = "0.20.11" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d336a2a514f6ccccaa3e09b02d41d35330c07ddf03a62165fcec10bb561c7806" +checksum = "fc34b93ccb385b40dc71c6fceac4b2ad23662c7eeb248cf10d529b7e055b6ead" dependencies = [ "darling_core", "quote", @@ -368,9 +368,9 @@ dependencies = [ [[package]] name = "env_logger" -version = "0.11.7" +version = "0.11.8" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c3716d7a920fb4fac5d84e9d4bce8ceb321e9414b4409da61b07b75c1e3d0697" +checksum = "13c863f0904021b108aa8b2f55046443e6b1ebde8fd4a15c399893aae4fa069f" dependencies = [ "anstream", "anstyle", @@ -494,14 +494,14 @@ dependencies = [ [[package]] name = "getrandom" -version = "0.3.1" +version = "0.3.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "43a49c392881ce6d5c3b8cb70f98717b7c07aabbdff06687b9030dbfbe2725f8" +checksum = "73fea8450eea4bac3940448fb7ae50d91f034f941199fcd9d909a5a07aa455f0" dependencies = [ "cfg-if", "libc", - "wasi 0.13.3+wasi-0.2.2", - "windows-targets 0.52.6", + "r-efi", + "wasi 0.14.2+wasi-0.2.4", ] [[package]] @@ -645,9 +645,9 @@ dependencies = [ [[package]] name = "hyper-util" -version = "0.1.10" +version = "0.1.11" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "df2dcfbe0677734ab2f3ffa7fa7bfd4706bfdc1ef393f2ee30184aed67e631b4" +checksum = "497bbc33a26fdd4af9ed9c70d63f61cf56a938375fbb32df34db9b1cd6d643f2" dependencies = [ "bytes", "futures-channel", @@ -655,6 +655,7 @@ dependencies = [ "http", "http-body", "hyper", + "libc", "pin-project-lite", "socket2", "tokio", @@ -703,9 +704,9 @@ dependencies = [ [[package]] name = "icu_locid_transform_data" -version = "1.5.0" +version = "1.5.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "fdc8ff3388f852bede6b579ad4e978ab004f139284d7b28715f773507b946f6e" +checksum = "7515e6d781098bf9f7205ab3fc7e9709d34554ae0b21ddbcb5febfa4bc7df11d" [[package]] name = "icu_normalizer" @@ -727,9 +728,9 @@ dependencies = [ [[package]] name = "icu_normalizer_data" -version = "1.5.0" +version = "1.5.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f8cafbf7aa791e9b22bec55a167906f9e1215fd475cd22adfcf660e03e989516" +checksum = "c5e8338228bdc8ab83303f16b797e177953730f601a96c25d10cb3ab0daa0cb7" [[package]] name = "icu_properties" @@ -748,9 +749,9 @@ dependencies = [ [[package]] name = "icu_properties_data" -version = "1.5.0" +version = "1.5.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "67a8effbc3dd3e4ba1afa8ad918d5684b8868b3b26500753effea8d2eed19569" +checksum = "85fb8799753b75aee8d2a21d7c14d9f38921b54b3dbda10f5a3c7a7b82dba5e2" [[package]] name = "icu_provider" @@ -860,9 +861,9 @@ checksum = "4a5f13b858c8d314ee3e8f639011f7ccefe71f97f96e50151fb991f267928e2c" [[package]] name = "jiff" -version = "0.2.4" +version = "0.2.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d699bc6dfc879fb1bf9bdff0d4c56f0884fc6f0d0eb0fba397a6d00cd9a6b85e" +checksum = "c102670231191d07d37a35af3eb77f1f0dbf7a71be51a962dcd57ea607be7260" dependencies = [ "jiff-static", "log", @@ -873,9 +874,9 @@ dependencies = [ [[package]] name = "jiff-static" -version = "0.2.4" +version = "0.2.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8d16e75759ee0aa64c57a56acbf43916987b20c77373cb7e808979e02b93c9f9" +checksum = "4cdde31a9d349f1b1f51a0b3714a5940ac022976f4b49485fc04be052b183b4c" dependencies = [ "proc-macro2", "quote", @@ -912,9 +913,9 @@ checksum = "d26c52dbd32dccf2d10cac7725f8eae5296885fb5703b261f7d0a0739ec807ab" [[package]] name = "linux-raw-sys" -version = "0.9.2" +version = "0.9.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6db9c683daf087dc577b7506e9695b3d556a9f3849903fa28186283afd6809e9" +checksum = "fe7db12097d22ec582439daf8618b8fdd1a7bef6270e9af3b1ebcd30893cf413" [[package]] name = "litemap" @@ -924,9 +925,9 @@ checksum = "23fb14cb19457329c82206317a5663005a4d404783dc74f4252769b0d5f42856" [[package]] name = "log" -version = "0.4.26" +version = "0.4.27" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "30bde2b3dc3671ae49d8e2e9f044c7c005836e7a023ee57cffa25ab82764bb9e" +checksum = "13dc2df351e3202783a1fe0d44375f7295ffb4049267b0f3018346dc122a1d94" [[package]] name = "matchers" @@ -951,9 +952,9 @@ checksum = "6877bb514081ee2a7ff5ef9de3281f14a4dd4bceac4c09388074a6b5df8a139a" [[package]] name = "miniz_oxide" -version = "0.8.5" +version = "0.8.7" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "8e3e04debbb59698c15bacbb6d93584a8c0ca9cc3213cb423d31f760d8843ce5" +checksum = "ff70ce3e48ae43fa075863cef62e8b43b71a4f2382229920e0df362592919430" dependencies = [ "adler2", ] @@ -1007,9 +1008,9 @@ dependencies = [ [[package]] name = "once_cell" -version = "1.21.0" +version = "1.21.3" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "cde51589ab56b20a6f686b2c68f7a0bd6add753d697abf720d63f8db3ab7b1ad" +checksum = "42f5e15c9953c5e4ccceeb2e7382a716482c34515315f7b03532b8b4e8393d2d" [[package]] name = "openssl" @@ -1112,9 +1113,9 @@ dependencies = [ [[package]] name = "prettyplease" -version = "0.2.30" +version = "0.2.31" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f1ccf34da56fc294e7d4ccf69a85992b7dfb826b7cf57bac6a70bba3494cc08a" +checksum = "5316f57387668042f561aae71480de936257848f9c43ce528e311d89a07cadeb" dependencies = [ "proc-macro2", "syn", @@ -1138,6 +1139,12 @@ dependencies = [ "proc-macro2", ] +[[package]] +name = "r-efi" +version = "5.2.0" +source = "registry+https://github.com/rust-lang/crates.io-index" +checksum = "74765f6d916ee2faa39bc8e68e4f3ed8949b48cccdac59983d287a7cb71ce9c5" + [[package]] name = "rayon" version = "1.10.0" @@ -1204,9 +1211,9 @@ checksum = "2b15c43186be67a4fd63bee50d0303afffcef381492ebe2c5d87f324e1b8815c" [[package]] name = "reqwest" -version = "0.12.14" +version = "0.12.15" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "989e327e510263980e231de548a33e63d34962d29ae61b467389a1a09627a254" +checksum = "d19c46a6fdd48bc4dab94b6103fccc55d34c67cc0ad04653aad4ea2a07cd7bbb" dependencies = [ "base64", "bytes", @@ -1288,22 +1295,22 @@ dependencies = [ [[package]] name = "rustix" -version = "1.0.2" +version = "1.0.5" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "f7178faa4b75a30e269c71e61c353ce2748cf3d76f0c44c393f4e60abf49b825" +checksum = "d97817398dd4bb2e6da002002db259209759911da105da92bec29ccb12cf58bf" dependencies = [ "bitflags", "errno", "libc", - "linux-raw-sys 0.9.2", + "linux-raw-sys 0.9.3", "windows-sys 0.59.0", ] [[package]] name = "rustls" -version = "0.23.23" +version = "0.23.25" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "47796c98c480fce5406ef69d1c76378375492c3b0a0de587be0c1d9feb12f395" +checksum = "822ee9188ac4ec04a2f0531e55d035fb2de73f18b41a63c70c2712503b6fb13c" dependencies = [ "once_cell", "rustls-pki-types", @@ -1329,9 +1336,9 @@ checksum = "917ce264624a4b4db1c364dcc35bfca9ded014d0a958cd47ad3e960e988ea51c" [[package]] name = "rustls-webpki" -version = "0.102.8" +version = "0.103.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "64ca1bc8749bd4cf37b5ce386cc146580777b4e8572c7b97baf22c83f444bee9" +checksum = "fef8b8769aaccf73098557a87cd1816b4f9c7c16811c9c77142aa695c16f2c03" dependencies = [ "ring", "rustls-pki-types", @@ -1486,9 +1493,9 @@ checksum = "7fcf8323ef1faaee30a44a340193b1ac6814fd9b7b4e88e9d4519a3e4abe1cfd" [[package]] name = "socket2" -version = "0.5.8" +version = "0.5.9" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "c970269d99b64e60ec3bd6ad27270092a5394c4e309314b18ae3fe575695fbe8" +checksum = "4f5fd57c80058a56cf5c777ab8a126398ece8e442983605d280a44ce79d0edef" dependencies = [ "libc", "windows-sys 0.52.0", @@ -1538,7 +1545,7 @@ dependencies = [ [[package]] name = "svd2rust" -version = "0.36.0" +version = "0.36.1" dependencies = [ "anyhow", "clap", @@ -1635,15 +1642,14 @@ dependencies = [ [[package]] name = "tempfile" -version = "3.18.0" +version = "3.19.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "2c317e0a526ee6120d8dabad239c8dadca62b24b6f168914bbbc8e2fb1f0e567" +checksum = "7437ac7763b9b123ccf33c338a5cc1bac6f69b45a136c19bdd8a65e3916435bf" dependencies = [ - "cfg-if", "fastrand", - "getrandom 0.3.1", + "getrandom 0.3.2", "once_cell", - "rustix 1.0.2", + "rustix 1.0.5", "windows-sys 0.59.0", ] @@ -1689,9 +1695,9 @@ dependencies = [ [[package]] name = "tokio" -version = "1.44.0" +version = "1.44.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "9975ea0f48b5aa3972bf2d888c238182458437cc2a19374b81b25cdf1023fb3a" +checksum = "f382da615b842244d4b8738c82ed1275e6c5dd90c459a30941cd07080b06c91a" dependencies = [ "backtrace", "bytes", @@ -1724,9 +1730,9 @@ dependencies = [ [[package]] name = "tokio-util" -version = "0.7.13" +version = "0.7.14" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "d7fcaa8d55a2bdd6b83ace262b016eca0d79ee02818c5c1bcdf0305114081078" +checksum = "6b9590b93e6fcc1739458317cccd391ad3955e2bde8913edf6f95f9e65a8f034" dependencies = [ "bytes", "futures-core", @@ -1940,9 +1946,9 @@ checksum = "9c8d87e72b64a3b4db28d11ce29237c246188f4f51057d65a7eab63b7987e423" [[package]] name = "wasi" -version = "0.13.3+wasi-0.2.2" +version = "0.14.2+wasi-0.2.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "26816d2e1a4a36a2940b96c5296ce403917633dff8f3440e9b236ed6f6bacad2" +checksum = "9683f9a5a998d873c0d21fcbe3c083009670149a8fab228644b8bd36b2c48cb3" dependencies = [ "wit-bindgen-rt", ] @@ -2071,9 +2077,9 @@ checksum = "712e227841d057c1ee1cd2fb22fa7e5a5461ae8e48fa2ca79ec42cfc1931183f" [[package]] name = "windows-link" -version = "0.1.0" +version = "0.1.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "6dccfd733ce2b1753b03b6d3c65edf020262ea35e20ccdf3e288043e6dd620e3" +checksum = "76840935b766e1b0a05c0066835fb9ec80071d4c09a16f6bd5f7e655e3c14c38" [[package]] name = "windows-registry" @@ -2088,9 +2094,9 @@ dependencies = [ [[package]] name = "windows-result" -version = "0.3.1" +version = "0.3.2" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "06374efe858fab7e4f881500e6e86ec8bc28f9462c47e5a9941a0142ad86b189" +checksum = "c64fd11a4fd95df68efcfee5f44a294fe71b8bc6a91993e2791938abcc712252" dependencies = [ "windows-link", ] @@ -2327,9 +2333,9 @@ dependencies = [ [[package]] name = "wit-bindgen-rt" -version = "0.33.0" +version = "0.39.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "3268f3d866458b787f390cf61f4bbb563b922d091359f9608842999eaee3943c" +checksum = "6f42320e61fe2cfd34354ecb597f86f413484a798ba44a8ca1165c58d42da6c1" dependencies = [ "bitflags", ] diff --git a/Cargo.toml b/Cargo.toml index c7662e87..88daf5ee 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -17,7 +17,7 @@ keywords = ["svd", "embedded", "register", "map", "generator"] license = "MIT OR Apache-2.0" name = "svd2rust" repository = "https://github.com/rust-embedded/svd2rust/" -version = "0.36.0" +version = "0.36.1" readme = "README.md" rust-version = "1.74" @@ -58,11 +58,11 @@ url = { version = "2.5", features = ["serde"] } [dependencies.svd-parser] features = ["expand"] -version = "0.14.8" +version = "0.14.9" [dependencies.svd-rs] features = ["serde"] -version = "0.14.11" +version = "0.14.12" [dependencies.syn] version = "2.0" From 5a4d946e179dde91fd8a49fae94ddf06945a5bea Mon Sep 17 00:00:00 2001 From: Mike Bernard Date: Wed, 2 Apr 2025 20:00:54 -0700 Subject: [PATCH 319/319] add 'gen' keyword (close #927) --- CHANGELOG.md | 1 + src/util.rs | 10 +++++----- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 013438df..137c4048 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/). - Update `irx-config` - Fix register array derive regression +- Sanitize `gen` keyword (new in Rust 2024 edition) ## [v0.36.0] - 2025-03-09 diff --git a/src/util.rs b/src/util.rs index 40a1e526..92e420c6 100644 --- a/src/util.rs +++ b/src/util.rs @@ -132,13 +132,13 @@ pub fn ident_str(name: &str, fmt: &IdentFormat) -> String { } pub fn sanitize_keyword(sc: Cow) -> Cow { - const KEYWORDS: [&str; 55] = [ + const KEYWORDS: [&str; 56] = [ "abstract", "alignof", "as", "async", "await", "become", "box", "break", "const", "continue", "crate", "do", "dyn", "else", "enum", "extern", "false", "final", "fn", "for", - "if", "impl", "in", "let", "loop", "macro", "match", "mod", "move", "mut", "offsetof", - "override", "priv", "proc", "pub", "pure", "ref", "return", "self", "sizeof", "static", - "struct", "super", "trait", "true", "try", "type", "typeof", "unsafe", "unsized", "use", - "virtual", "where", "while", "yield", + "gen", "if", "impl", "in", "let", "loop", "macro", "match", "mod", "move", "mut", + "offsetof", "override", "priv", "proc", "pub", "pure", "ref", "return", "self", "sizeof", + "static", "struct", "super", "trait", "true", "try", "type", "typeof", "unsafe", "unsized", + "use", "virtual", "where", "while", "yield", ]; if KEYWORDS.contains(&sc.as_ref()) { sc + "_"