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use ConstDefault instead of Default
1 parent 6979dc4 commit 96ad0c3

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7 files changed

+39
-17
lines changed

7 files changed

+39
-17
lines changed

ci/script.sh

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -43,6 +43,7 @@ main() {
4343
echo 'cortex-m = "0.7.7"' >> $td/Cargo.toml
4444
echo 'cortex-m-rt = "0.7.3"' >> $td/Cargo.toml
4545
echo 'vcell = "0.1.3"' >> $td/Cargo.toml
46+
echo 'const-default = "1.0"' >> $td/Cargo.toml
4647
if [[ "$options" == *"--atomics"* ]]; then
4748
echo 'portable-atomic = { version = "1.4", default-features = false }' >> $td/Cargo.toml
4849
fi

ci/svd2rust-regress/src/svd_test.rs

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,11 @@ use std::{
1111
path::Path,
1212
};
1313

14-
const CRATES_ALL: &[&str] = &["critical-section = \"1.0\"", "vcell = \"0.1.2\""];
14+
const CRATES_ALL: &[&str] = &[
15+
"critical-section = \"1.0\"",
16+
"vcell = \"0.1.2\"",
17+
"const-default = \"1.0\"",
18+
];
1519
const CRATES_MSP430: &[&str] = &["msp430 = \"0.4.0\"", "msp430-rt = \"0.4.0\""];
1620
const CRATES_ATOMICS: &[&str] =
1721
&["portable-atomic = { version = \"0.3.16\", default-features = false }"];

src/generate/generic.rs

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,10 @@
11
use core::marker;
2+
use const_default::ConstDefault;
23

34
/// Raw register type (`u8`, `u16`, `u32`, ...)
45
pub trait RawReg:
56
Copy
6-
+ Default
7+
+ ConstDefault
78
+ From<bool>
89
+ core::ops::BitOr<Output = Self>
910
+ core::ops::BitAnd<Output = Self>
@@ -74,10 +75,10 @@ pub trait Writable: RegisterSpec {
7475
type Safety;
7576

7677
/// Specifies the register bits that are not changed if you pass `1` and are changed if you pass `0`
77-
const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux;
78+
const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = Self::Ux::DEFAULT;
7879

7980
/// Specifies the register bits that are not changed if you pass `0` and are changed if you pass `1`
80-
const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux;
81+
const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = Self::Ux::DEFAULT;
8182
}
8283

8384
/// Reset value of the register.
@@ -86,7 +87,7 @@ pub trait Writable: RegisterSpec {
8687
/// register by using the `reset` method.
8788
pub trait Resettable: RegisterSpec {
8889
/// Reset value of the register.
89-
const RESET_VALUE: Self::Ux;
90+
const RESET_VALUE: Self::Ux = Self::Ux::DEFAULT;
9091

9192
/// Reset value of the register.
9293
#[inline(always)]
@@ -201,7 +202,7 @@ impl<REG: Writable> Reg<REG> {
201202
{
202203
self.register.set(
203204
f(&mut W {
204-
bits: REG::Ux::default(),
205+
bits: REG::Ux::DEFAULT,
205206
_reg: marker::PhantomData,
206207
})
207208
.bits,

src/generate/generic_atomic.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,7 @@ mod atomic {
3939

4040
impl<REG: Readable + Writable> Reg<REG>
4141
where
42-
REG::Ux: AtomicOperations + Default + core::ops::Not<Output = REG::Ux>,
42+
REG::Ux: AtomicOperations,
4343
{
4444
/// Set high every bit in the register that was set in the write proxy. Leave other bits
4545
/// untouched. The write is done in a single atomic instruction.
@@ -53,7 +53,7 @@ mod atomic {
5353
F: FnOnce(&mut W<REG>) -> &mut W<REG>,
5454
{
5555
let bits = f(&mut W {
56-
bits: Default::default(),
56+
bits: REG::Ux::DEFAULT,
5757
_reg: marker::PhantomData,
5858
})
5959
.bits;
@@ -72,7 +72,7 @@ mod atomic {
7272
F: FnOnce(&mut W<REG>) -> &mut W<REG>,
7373
{
7474
let bits = f(&mut W {
75-
bits: !REG::Ux::default(),
75+
bits: !REG::Ux::DEFAULT,
7676
_reg: marker::PhantomData,
7777
})
7878
.bits;
@@ -91,7 +91,7 @@ mod atomic {
9191
F: FnOnce(&mut W<REG>) -> &mut W<REG>,
9292
{
9393
let bits = f(&mut W {
94-
bits: Default::default(),
94+
bits: REG::Ux::DEFAULT,
9595
_reg: marker::PhantomData,
9696
})
9797
.bits;

src/generate/register.rs

Lines changed: 14 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -413,24 +413,31 @@ pub fn render_register_mod(
413413

414414
let doc = format!("`write(|w| ..)` method takes [`{mod_ty}::W`](W) writer structure",);
415415

416-
let zero_to_modify_fields_bitmap = util::hex(zero_to_modify_fields_bitmap);
417-
let one_to_modify_fields_bitmap = util::hex(one_to_modify_fields_bitmap);
416+
let zero_to_modify_fields_bitmap = util::hex_nonzero(zero_to_modify_fields_bitmap)
417+
.map(|bm| quote!(const ZERO_TO_MODIFY_FIELDS_BITMAP: #rty = #bm;));
418+
let one_to_modify_fields_bitmap = util::hex_nonzero(one_to_modify_fields_bitmap)
419+
.map(|bm| quote!(const ONE_TO_MODIFY_FIELDS_BITMAP: #rty = #bm;));
418420

419421
mod_items.extend(quote! {
420422
#[doc = #doc]
421423
impl crate::Writable for #regspec_ty {
422424
type Safety = crate::#safe_ty;
423-
const ZERO_TO_MODIFY_FIELDS_BITMAP: #rty = #zero_to_modify_fields_bitmap;
424-
const ONE_TO_MODIFY_FIELDS_BITMAP: #rty = #one_to_modify_fields_bitmap;
425+
#zero_to_modify_fields_bitmap
426+
#one_to_modify_fields_bitmap
425427
}
426428
});
427429
}
428-
if let Some(rv) = properties.reset_value.map(util::hex) {
429-
let doc = format!("`reset()` method sets {} to value {rv}", register.name);
430+
if let Some(rv) = properties.reset_value.map(util::hex_nonzero) {
431+
let doc = if let Some(rv) = &rv {
432+
format!("`reset()` method sets {} to value {rv}", register.name)
433+
} else {
434+
format!("`reset()` method sets {} to value 0", register.name)
435+
};
436+
let rv = rv.map(|rv| quote!(const RESET_VALUE: #rty = #rv;));
430437
mod_items.extend(quote! {
431438
#[doc = #doc]
432439
impl crate::Resettable for #regspec_ty {
433-
const RESET_VALUE: #rty = #rv;
440+
#rv
434441
}
435442
});
436443
}

src/lib.rs

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -62,6 +62,7 @@
6262
//! - [`cortex-m`](https://crates.io/crates/cortex-m) >=v0.7.6
6363
//! - [`cortex-m-rt`](https://crates.io/crates/cortex-m-rt) >=v0.6.13
6464
//! - [`vcell`](https://crates.io/crates/vcell) >=v0.1.2
65+
//! - [`const-default`](https://crates.io/crates/const-default) >=v1.0
6566
//!
6667
//! Furthermore, the "device" feature of `cortex-m-rt` must be enabled when the `rt` feature
6768
//! is enabled. The `Cargo.toml` of the device crate will look like this:
@@ -126,6 +127,7 @@
126127
//! - [`msp430`](https://crates.io/crates/msp430) v0.4.x
127128
//! - [`msp430-rt`](https://crates.io/crates/msp430-rt) v0.4.x
128129
//! - [`vcell`](https://crates.io/crates/vcell) v0.1.x
130+
//! - [`const-default`](https://crates.io/crates/const-default) v1.x.x
129131
//!
130132
//! The "device" feature of `msp430-rt` must be enabled when the `rt` feature is
131133
//! enabled. The `Cargo.toml` of the device crate will look like this:
@@ -152,6 +154,7 @@
152154
//! - [`riscv`](https://crates.io/crates/riscv) v0.9.x (if target is RISC-V)
153155
//! - [`riscv-rt`](https://crates.io/crates/riscv-rt) v0.9.x (if target is RISC-V)
154156
//! - [`vcell`](https://crates.io/crates/vcell) v0.1.x
157+
//! - [`const-default`](https://crates.io/crates/const-default) v1.x.x
155158
//!
156159
//! The `*-rt` dependencies must be optional only enabled when the `rt` feature is enabled. The
157160
//! `Cargo.toml` of the device crate will look like this for a RISC-V target:
@@ -162,6 +165,7 @@
162165
//! riscv = "0.9.0"
163166
//! riscv-rt = { version = "0.9.0", optional = true }
164167
//! vcell = "0.1.0"
168+
//! const-default = "1.0"
165169
//!
166170
//! [features]
167171
//! rt = ["riscv-rt"]

src/util.rs

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -253,6 +253,11 @@ pub fn hex(n: u64) -> LitInt {
253253
)
254254
}
255255

256+
/// Turns non-zero `n` into an unsuffixed separated hex token
257+
pub fn hex_nonzero(n: u64) -> Option<LitInt> {
258+
(n != 0).then(|| hex(n))
259+
}
260+
256261
/// Turns `n` into an unsuffixed token
257262
pub fn unsuffixed(n: impl Into<u64>) -> LitInt {
258263
LitInt::new(&n.into().to_string(), Span::call_site())

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