Merge #268

268: Add some Armv8-M assembly routines r=jonas-schievink a=hug-dev

Adds access to `MSP_NS` and the `BXNS` instruction.
Also adds `__dsb` which was missing.

Executed `cargo xtask assemble` and pushed everything, I hope that's enough.

Co-authored-by: Hugues de Valon <hugues.devalon@arm.com>

Author: bors[bot]

asm/inline.rs

@@ -308,6 +308,23 @@ mod v8m {
         asm!("ttat {target}, {target}", target = inout(reg) target);
         target
     }
+
+    #[inline(always)]
+    pub unsafe fn __msp_ns_r() -> u32 {
+        let r;
+        asm!("mrs {}, MSP_NS", out(reg) r);
+        r
+    }
+
+    #[inline(always)]
+    pub unsafe fn __msp_ns_w(val: u32) {
+        asm!("msr MSP_NS, {}", in(reg) val);
+    }
+
+    #[inline(always)]
+    pub unsafe fn __bxns(val: u32) {
+        asm!("BXNS {}", in(reg) val);
+    }
 }
 
 #[cfg(armv8m_main)]

asm/lib.rs

@@ -60,6 +60,7 @@ shims! {
     fn __cpsie();
     fn __delay(cyc: u32);
     fn __dmb();
+    fn __dsb();
     fn __isb();
     fn __msp_r() -> u32;
     fn __msp_w(val: u32);
@@ -97,6 +98,9 @@ shims! {
     fn __ttt(target: u32) -> u32;
     fn __tta(target: u32) -> u32;
     fn __ttat(target: u32) -> u32;
+    fn __msp_ns_r() -> u32;
+    fn __msp_ns_w(val: u32);
+    fn __bxns(val: u32);
 }
 
 // Mainline only.

bin/thumbv6m-none-eabi-lto.a

@@ -154,3 +154,13 @@ pub fn ttat(addr: *mut u32) -> u32 {
     let addr = addr as u32;
     call_asm!(__ttat(addr: u32) -> u32)
 }
+
+/// Branch and Exchange Non-secure
+///
+/// See section C2.4.26 of Armv8-M Architecture Reference Manual for details.
+/// Undefined if executed in Non-Secure state.
+#[inline]
+#[cfg(armv8m)]
+pub unsafe fn bx_ns(addr: u32) {
+    call_asm!(__bxns(addr: u32));
+}

bin/thumbv6m-none-eabi.a

@@ -11,3 +11,21 @@ pub fn read() -> u32 {
 pub unsafe fn write(bits: u32) {
     call_asm!(__msp_w(bits: u32));
 }
+
+/// Reads the Non-Secure CPU register from Secure state.
+///
+/// Executing this function in Non-Secure state will return zeroes.
+#[cfg(armv8m)]
+#[inline]
+pub fn read_ns() -> u32 {
+    call_asm!(__msp_ns_r() -> u32)
+}
+
+/// Writes `bits` to the Non-Secure CPU register from Secure state.
+///
+/// Executing this function in Non-Secure state will be ignored.
+#[cfg(armv8m)]
+#[inline]
+pub unsafe fn write_ns(bits: u32) {
+    call_asm!(__msp_ns_w(bits: u32));
+}