Skip to content
This repository was archived by the owner on Nov 7, 2022. It is now read-only.
Permalink

Comparing changes

Choose two branches to see what’s changed or to start a new pull request. If you need to, you can also or learn more about diff comparisons.

Open a pull request

Create a new pull request by comparing changes across two branches. If you need to, you can also . Learn more about diff comparisons here.
base repository: rust-embedded/cortex-a
Failed to load repositories. Confirm that selected base ref is valid, then try again.
Loading
base: v8.0.0
Choose a base ref
...
head repository: rust-embedded/cortex-a
Failed to load repositories. Confirm that selected head ref is valid, then try again.
Loading
compare: master
Choose a head ref
  • 3 commits
  • 3 files changed
  • 2 contributors

Commits on Nov 5, 2022

  1. Add all memory barrier variants (#50)

    The Arm A-profile A64 Instruction Set Architecture[0] specifies many
    memory barrier variants.  In the 2022-09 version of the document, they
    are in pages 348 and 351 for the DMB and DSB respectively.
    
    The cortex-a crate only supports SY, ISH and ISHST currently.  Add the
    rest.
    
    [0] https://developer.arm.com/documentation/ddi0602/
    JaviMerino authored Nov 5, 2022
    Configuration menu
    Copy the full SHA
    a1ae003 View commit details
    Browse the repository at this point in the history
  2. Bump version to 8.1.0

    andre-richter committed Nov 5, 2022
    Configuration menu
    Copy the full SHA
    2c496c1 View commit details
    Browse the repository at this point in the history

Commits on Nov 6, 2022

  1. Deprecate the crate

    andre-richter committed Nov 6, 2022
    Configuration menu
    Copy the full SHA
    2ce4624 View commit details
    Browse the repository at this point in the history
Loading