Refactor

Author: rui314

src/arch-arm32.cc

@@ -57,6 +57,7 @@ i64 get_addend(u8 *loc, const ElfRel<E> &rel) {
   case R_ARM_TLS_IE32:
   case R_ARM_TLS_LE32:
   case R_ARM_TLS_GOTDESC:
+  case R_ARM_TARGET1:
   case R_ARM_TARGET2:
     return (il32)*arm;
   case R_ARM_THM_JUMP8:
@@ -181,6 +182,7 @@ void write_addend(u8 *loc, i64 val, const ElfRel<E> &rel) {
   case R_ARM_TLS_IE32:
   case R_ARM_TLS_LE32:
   case R_ARM_TLS_GOTDESC:
+  case R_ARM_TARGET1:
   case R_ARM_TARGET2:
     *(ul32 *)loc = val;
     break;
@@ -315,6 +317,7 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
 
     switch (rel.r_type) {
     case R_ARM_ABS32:
+    case R_ARM_TARGET1:
       break;
     case R_ARM_REL32:
       *(ul32 *)loc = S + A - P;
@@ -644,6 +647,7 @@ void InputSection<E>::scan_relocations(Context<E> &ctx) {
       check_tlsle(ctx, sym, rel);
       break;
     case R_ARM_ABS32:
+    case R_ARM_TARGET1:
     case R_ARM_MOVT_ABS:
     case R_ARM_THM_MOVT_ABS:
     case R_ARM_REL32:

src/input-files.cc

@@ -898,16 +898,6 @@ void ObjectFile<E>::parse(Context<E> &ctx) {
   initialize_sections(ctx);
   initialize_symbols(ctx);
   sort_relocations(ctx);
-
-  // R_ARM_TARGET1 is typically used for entries in .init_array and may
-  // be interpreted as REL32 or ABS32 depending on the target.
-  // All targets we support handle it as if it were a ABS32.
-  if constexpr (is_arm32<E>)
-    for (std::unique_ptr<InputSection<E>> &isec : sections)
-      if (isec && isec->is_alive)
-        for (ElfRel<E> &r : isec->get_rels(ctx))
-          if (r.r_type == R_ARM_TARGET1)
-            r.r_type = R_ARM_ABS32;
 }
 
 // Symbols with higher priorities overwrites symbols with lower priorities.

src/output-chunks.cc

@@ -1057,6 +1057,16 @@ static AbsRelKind get_abs_rel_kind(Context<E> &ctx, Symbol<E> &sym) {
   return ABS_REL_DYNREL;
 }
 
+template <typename E>
+static bool is_absrel(const ElfRel<E> &r) {
+  // On ARM32, R_ARM_TARGET1 is typically used for entries in .init_array
+  // and is interpreted as either ABS32 or REL32 depending on the target.
+  // All targets we support handle it as if it were a ABS32.
+  if constexpr (is_arm32<E>)
+    return r.r_type == E::R_ABS || r.r_type == R_ARM_TARGET1;
+  return r.r_type == E::R_ABS;
+}
+
 // Scan word-size absolute relocations (e.g. R_X86_64_64). This is
 // separated from scan_relocations() because only such relocations can
 // be promoted to dynamic relocations.
@@ -1068,7 +1078,7 @@ void OutputSection<E>::scan_abs_relocations(Context<E> &ctx) {
   tbb::parallel_for((i64)0, (i64)members.size(), [&](i64 i) {
     InputSection<E> *isec = members[i];
     for (const ElfRel<E> &r : isec->get_rels(ctx))
-      if (r.r_type == E::R_ABS)
+      if (is_absrel(r))
         shards[i].push_back(AbsRel<E>{isec, r.r_offset, isec->file.symbols[r.r_sym],
                                       get_addend(*isec, r)});
   });