-
Notifications
You must be signed in to change notification settings - Fork 2
/
gpio.c
152 lines (122 loc) · 3 KB
/
gpio.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
#include "platform.h"
#include "gpio.h"
void gpio_init(const struct gpio_init_table_t *t, int num)
{
int i;
#if defined(STM32F4) || defined(STM32F0)
uint32_t reg;
for (i = 0; i < num; i++) {
uint16_t pos = 0;
gpio_set(&t[i], t[i].state);
for (pos = 0; pos < 16; pos++) {
if (!(t[i].pin & (1 << pos))) {
continue;
}
if (t[i].af) {
uint32_t idx = ((uint32_t)(pos & (uint32_t)0x07U) * 4U);
reg = t[i].gpio->AFR[pos >> 3];
reg &= ~((uint32_t)0xFU << idx) ;
reg |= ((uint32_t)(t[i].af) << idx);
t[i].gpio->AFR[pos >> 3] = reg;
}
if ((t[i].mode == GPIO_Mode_OUT) || (t[i].mode == GPIO_Mode_AF)) {
reg = t[i].gpio->OSPEEDR;
reg &= ~(3 << (pos * 2));
reg |= (t[i].speed << (pos * 2));
t[i].gpio->OSPEEDR = reg;
reg = t[i].gpio->OTYPER;
reg &= ~(1 << pos);
reg |= (t[i].otype << pos);
t[i].gpio->OTYPER = (uint16_t)reg;
}
reg = t[i].gpio->MODER;
reg &= ~(3 << (pos * 2));
reg |= (t[i].mode << (pos * 2));
t[i].gpio->MODER = reg;
reg = t[i].gpio->PUPDR;
reg &= ~(3 << (pos * 2));
reg |= (t[i].pupd << (pos * 2));
t[i].gpio->PUPDR = reg;
}
}
#else
for (i = 0; i < num; i++) {
uint16_t pos = 0;
uint32_t mode;
mode = t[i].mode & 0xf;
if (t[i].mode & 0x10) {
mode |= t[i].speed;
}
if (!(t[i].mode == GPIO_MODE_AIN || t[i].mode == GPIO_MODE_IN_FLOATING || t[i].mode == GPIO_MODE_IPD || t[i].mode == GPIO_MODE_IPU)) {
gpio_set(&t[i], t[i].state);
}
if (t[i].pin & 0xff) {
uint32_t cr;
cr = t[i].gpio->CRL;
for (pos = 0; pos < 8; pos++) {
if (!(t[i].pin & (1 << pos))) {
continue;
}
uint32_t pinmask = 0x0f << (4*pos);
cr &= ~pinmask;
cr |= mode << (4*pos);
if (t[i].mode == GPIO_MODE_IPD) {
t[i].gpio->BRR = 0x01 << pos;
} else if (t[i].mode == GPIO_MODE_IPU) {
t[i].gpio->BSRR = 0x01 << pos;
}
}
t[i].gpio->CRL = cr;
}
if (t[i].pin & 0xff00) {
uint32_t cr;
cr = t[i].gpio->CRH;
for (pos = 0; pos < 8; pos++) {
if (!(t[i].pin & (1 << (pos+8)))) {
continue;
}
uint32_t pinmask = 0x0f << (4*pos);
cr &= ~pinmask;
cr |= mode << (4*pos);
if (t[i].mode == GPIO_MODE_IPD) {
t[i].gpio->BRR = 0x01 << pos;
} else if (t[i].mode == GPIO_MODE_IPU) {
t[i].gpio->BSRR = 0x01 << pos;
}
}
t[i].gpio->CRH = cr;
}
}
#endif
}
uint8_t gpio_wait_state(const struct gpio_init_table_t *gpio, uint8_t state)
{
volatile uint32_t time = 0xFFFFFF;
while (--time && ((!!(gpio->gpio->IDR & gpio->pin)) != (!!state)));
return (time > 0)?0:1;
}
void gpio_set(const struct gpio_init_table_t *gpio, uint8_t state)
{
switch (state) {
case GPIO_SET:
#if defined(STM32F4)
gpio->gpio->BSRRL = gpio->pin;
#else
gpio->gpio->BSRR = gpio->pin;
#endif
break;
case GPIO_RESET:
#if defined(STM32F4)
gpio->gpio->BSRRH = gpio->pin;
#else
gpio->gpio->BRR = gpio->pin;
#endif
break;
default:
break;
}
}
uint8_t gpio_get(const struct gpio_init_table_t *gpio)
{
return !!(gpio->gpio->IDR & gpio->pin);
}