@@ -812,16 +812,12 @@ def test_itimer_virtual(self):
812812 signal .signal (signal .SIGVTALRM , self .sig_vtalrm )
813813 signal .setitimer (self .itimer , 0.3 , 0.2 )
814814
815- for _ in support .busy_retry (support .LONG_TIMEOUT , error = False ):
815+ for _ in support .busy_retry (support .LONG_TIMEOUT ):
816816 # use up some virtual time by doing real work
817817 _ = pow (12345 , 67890 , 10000019 )
818818 if signal .getitimer (self .itimer ) == (0.0 , 0.0 ):
819819 # sig_vtalrm handler stopped this itimer
820820 break
821- else :
822- # bpo-8424
823- self .skipTest ("timeout: likely cause: machine too slow or load too "
824- "high" )
825821
826822 # virtual itimer should be (0.0, 0.0) now
827823 self .assertEqual (signal .getitimer (self .itimer ), (0.0 , 0.0 ))
@@ -833,16 +829,12 @@ def test_itimer_prof(self):
833829 signal .signal (signal .SIGPROF , self .sig_prof )
834830 signal .setitimer (self .itimer , 0.2 , 0.2 )
835831
836- for _ in support .busy_retry (support .LONG_TIMEOUT , error = False ):
832+ for _ in support .busy_retry (support .LONG_TIMEOUT ):
837833 # do some work
838834 _ = pow (12345 , 67890 , 10000019 )
839835 if signal .getitimer (self .itimer ) == (0.0 , 0.0 ):
840836 # sig_prof handler stopped this itimer
841837 break
842- else :
843- # bpo-8424
844- self .skipTest ("timeout: likely cause: machine too slow or load too "
845- "high" )
846838
847839 # profiling itimer should be (0.0, 0.0) now
848840 self .assertEqual (signal .getitimer (self .itimer ), (0.0 , 0.0 ))
@@ -1317,7 +1309,7 @@ def handler(signum, frame):
13171309
13181310 expected_sigs += 2
13191311 # Wait for handlers to run to avoid signal coalescing
1320- for _ in support .sleeping_retry (support .SHORT_TIMEOUT , error = False ):
1312+ for _ in support .sleeping_retry (support .SHORT_TIMEOUT ):
13211313 if len (sigs ) >= expected_sigs :
13221314 break
13231315
0 commit comments