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Update uart documentation with inverted mode feature
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content/firmwareapi/pycom/machine/uart.md

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@@ -83,17 +83,24 @@ On the GPy/FiPy UART2 is unavailable because it is used to communicate with the
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## Methods
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#### uart.init(baudrate=9600, bits=8, parity=None, stop=1, \* , timeout\_chars=2, pins=(TXD, RXD, RTS, CTS), rx\_buffer\_size=512)
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#### uart.init(baudrate=9600, bits=8, parity=None, stop=1, \* , timeout\_chars=2, pins=(TXD, RXD, RTS, CTS), invert=0, rx\_buffer\_size=512)
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Initialise the UART bus with the given parameters:
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* `baudrate` is the clock rate.
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* `bits` is the number of bits per character. Can be `5, 6, 7 or 8`.
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* `parity` is the parity, `None`, UART.EVEN or UART.ODD.
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* `parity` is the parity, `None`, `UART.EVEN` or `UART.ODD`.
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* `stop` is the number of stop bits, `1 or 2`.
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* `timeout_chars` Rx timeout defined in number of characters. The value given here will be multiplied by the time a characters takes to be transmitted at the configured `baudrate`.
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* `pins` is a 4 or 2 item list indicating the TXD, RXD, RTS and CTS pins (in that order). Any of the pins can be `None` if one wants the UART to operate with limited functionality. If the RTS pin is given the the RX pin must be given as well. The same applies to CTS. When no pins are given, then the default set of TXD (P1) and RXD (P0) pins is taken, and hardware flow control will be disabled. If `pins=None`, no pin assignment will be made.
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* `rx_buffer_size` is the size of the buffer used for storing the RX packets. By default is is 512 bytes.
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* `invert` is the desired pin to be in inverse mode, by default none of the pins are inverted. Possible values are:
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* `UART.INV_RX` inverts Receiver dataline.
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* `UART.INV_TX` inverts Transmitter dataline.
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* `UART.INV_CTS` inverts Clear To Send dataline.
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* `UART.INV_RTS` inverts Request To Send dataline.
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The values can be OR-ed together, for instance `invert=UART.INV_RX | UART.INV_TX`
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* `rx_buffer_size` is the size of the buffer used for storing the RX packets. By default it is 512 bytes.
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#### uart.deinit()
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@@ -145,4 +152,5 @@ Waits at most `timeout_ms` for the last Tx transaction to complete. Returns `Tru
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* Parity types (along with `None`): `UART.EVEN`, `UART.ODD`
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* IRQ trigger sources: `UART.RX_ANY`
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* Inverted mode selectors: `UART.INV_RX`, `UART.INV_TX`, `UART.INV_CTS`, `UART.INV_RTS`
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