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base repository: pulp-platform/tech_cells_generic
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base: master
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head repository: pulp-platform/tech_cells_generic
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compare: fpga
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  • 2 commits
  • 5 files changed
  • 2 contributors

Commits on Feb 28, 2018

  1. Added a few Xilinx IPs

    @FrancescoConti
    FrancescoConti committed Feb 28, 2018
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    1ccf061 View commit details
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Commits on May 31, 2019

  1. Fix falsely inverted signal on tristate enable input of IOBUF

    Manuel Eggimann committed May 31, 2019
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    2cf66b7 View commit details
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