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hw: Assign correct hart_base_id to snitch and SPU cluster #35

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Merged
merged 1 commit into from
May 19, 2025
Merged

hw: Assign correct hart_base_id to snitch and SPU cluster #35

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2 changes: 1 addition & 1 deletion cfg/snitch_cluster.json
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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@
cluster: {
cluster_base_addr: 0x20000000,
cluster_base_offset: 0x40000,
cluster_base_hartid: 0,
cluster_base_hartid: 1,
addr_width: 48,
data_width: 64,
user_width: 3, // clog2(nr_clusters + 1)
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7 changes: 4 additions & 3 deletions hw/picobello_top.sv
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Expand Up @@ -86,7 +86,7 @@ module picobello_top
localparam id_t ClusterId = Sam[ClusterSamIdx].idx;
localparam int X = int'(ClusterId.x);
localparam int Y = int'(ClusterId.y);
localparam int unsigned HartBaseId = c * NrCores;
localparam int unsigned HartBaseId = c * NrCores + 1; // Cheshire is hart 0
localparam axi_wide_in_addr_t ClusterBaseAddr = Sam[ClusterSamIdx].start_addr;

cluster_tile i_cluster_tile (
Expand Down Expand Up @@ -190,7 +190,8 @@ module picobello_top

localparam id_t FhgSpuId = Sam[FhgSpuSamIdx].idx;

// TODO: connect actual hart_base_id
// Add offset to consider Cheshire as hart 0
localparam int unsigned FhgSpuHartBaseId = NumClusters * NrCores + 1;
fhg_spu_tile i_fhg_spu_tile (
.clk_i,
.rst_ni,
Expand All @@ -199,7 +200,7 @@ module picobello_top
.meip_i (fhg_spu_meip),
.mtip_i (fhg_spu_mtip),
.msip_i (fhg_spu_msip),
.hart_base_id_i ('0),
.hart_base_id_i (FhgSpuHartBaseId[9:0]),
.cluster_base_addr_i(Sam[FhgSpuSamIdx].start_addr),
.id_i (FhgSpuId),
.floo_req_o (floo_req_out[FhgSpuId.x][FhgSpuId.y]),
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