Merge pull request #15 from projf/parameters

Switched parameter location in modules.

Author: WillGreen

rtl/display_clocks.v

@@ -7,22 +7,21 @@
 
 // Defaults to 25.2 and 126 MHz for 640x480 at 60 Hz
 
-module display_clocks #(
-    MULT_MASTER=31.5,       // master clock multiplier (2.000-64.000)
-    DIV_MASTER=5,           // master clock divider (1-106)
-    DIV_5X=5.0,             // 5x clock divider (1-128)
-    DIV_1X=25,              // 1x clock divider (1-128)
-    IN_PERIOD=10.0          // period of i_clk in ns (100 MHz = 10.0 ns)
-    )
-    (
+module display_clocks (
     input  wire i_clk,      // input clock
     input  wire i_rst,      // reset (active high)
     output wire o_clk_1x,   // pixel clock
     output wire o_clk_5x,   // 5x clock for 10:1 DDR SerDes
     output wire o_locked    // clock locked? (active high)
     );
 
-    wire clk_fb;  // internal feedback
+    parameter MULT_MASTER=31.5;     // master clock multiplier (2.000-64.000)
+    parameter DIV_MASTER=5;         // master clock divider (1-106)
+    parameter DIV_5X=5.0;           // 5x clock divider (1-128)
+    parameter DIV_1X=25;            // 1x clock divider (1-128)
+    parameter IN_PERIOD=10.0;       // period of i_clk in ns (100 MHz = 10.0 ns)
+
+    wire clk_fb;  // internal clock feedback
 
     MMCME2_BASE #(
         .BANDWIDTH("OPTIMIZED"),        // Jitter programming (OPTIMIZED, HIGH, LOW)

rtl/display_timings.v

@@ -7,19 +7,7 @@
 
 // Defaults to 640x480 at 60 Hz
 
-module display_timings #(
-    H_RES=640,      // horizontal resolution (pixels)
-    V_RES=480,      // vertical resolution (lines)
-    H_FP=16,        // horizontal front porch
-    H_SYNC=96,      // horizontal sync
-    H_BP=48,        // horizontal back porch
-    V_FP=10,        // vertical front porch
-    V_SYNC=2,       // vertical sync
-    V_BP=33,        // vertical back porch
-    H_POL=0,        // horizontal sync polarity (0:neg, 1:pos)
-    V_POL=0         // vertical sync polarity (0:neg, 1:pos)
-    )
-    (
+module display_timings (
     input  wire i_pix_clk,          // pixel clock
     input  wire i_rst,              // reset: restarts frame (active high)
     output wire o_hs,               // horizontal sync
@@ -30,6 +18,17 @@ module display_timings #(
     output reg signed [15:0] o_sy   // vertical beam position (including blanking)
     );
 
+    parameter H_RES=640;            // horizontal resolution (pixels)
+    parameter V_RES=480;            // vertical resolution (lines)
+    parameter H_FP=16;              // horizontal front porch
+    parameter H_SYNC=96;            // horizontal sync
+    parameter H_BP=48;              // horizontal back porch
+    parameter V_FP=10;              // vertical front porch
+    parameter V_SYNC=2;             // vertical sync
+    parameter V_BP=33;              // vertical back porch
+    parameter H_POL=0;              // horizontal sync polarity (0:neg, 1:pos)
+    parameter V_POL=0;              // vertical sync polarity (0:neg, 1:pos)
+
     // Horizontal: sync, active, and pixels
     localparam signed H_STA  = 0 - H_FP - H_SYNC - H_BP;    // horizontal start
     localparam signed HS_STA = H_STA + H_FP;                // sync start