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svens-s390Vasily Gorbik
authored and
Vasily Gorbik
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s390: remove critical section cleanup from entry.S
The current code is rather complex and caused a lot of subtle and hard to debug bugs in the past. Simplify the code by calling the system_call handler with interrupts disabled, save machine state, and re-enable them later. This requires significant changes to the machine check handling code as well. When the machine check interrupt arrived while being in kernel mode the new code will signal pending machine checks with a SIGP external call. When userspace was interrupted, the handler will switch to the kernel stack and directly execute s390_handle_mcck(). Signed-off-by: Sven Schnelle <svens@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
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9 files changed

+144
-391
lines changed

9 files changed

+144
-391
lines changed

arch/s390/include/asm/nmi.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -99,7 +99,7 @@ int nmi_alloc_per_cpu(struct lowcore *lc);
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void nmi_free_per_cpu(struct lowcore *lc);
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void s390_handle_mcck(void);
102-
void s390_do_machine_check(struct pt_regs *regs);
102+
int s390_do_machine_check(struct pt_regs *regs);
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_S390_NMI_H */

arch/s390/include/asm/processor.h

+9-11
Original file line numberDiff line numberDiff line change
@@ -14,17 +14,15 @@
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#include <linux/bits.h>
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17-
#define CIF_MCCK_PENDING 0 /* machine check handling is pending */
18-
#define CIF_ASCE_PRIMARY 1 /* primary asce needs fixup / uaccess */
19-
#define CIF_ASCE_SECONDARY 2 /* secondary asce needs fixup / uaccess */
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#define CIF_NOHZ_DELAY 3 /* delay HZ disable for a tick */
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#define CIF_FPU 4 /* restore FPU registers */
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#define CIF_IGNORE_IRQ 5 /* ignore interrupt (for udelay) */
23-
#define CIF_ENABLED_WAIT 6 /* in enabled wait state */
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#define CIF_MCCK_GUEST 7 /* machine check happening in guest */
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#define CIF_DEDICATED_CPU 8 /* this CPU is dedicated */
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#define _CIF_MCCK_PENDING BIT(CIF_MCCK_PENDING)
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#define CIF_ASCE_PRIMARY 0 /* primary asce needs fixup / uaccess */
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#define CIF_ASCE_SECONDARY 1 /* secondary asce needs fixup / uaccess */
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#define CIF_NOHZ_DELAY 2 /* delay HZ disable for a tick */
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#define CIF_FPU 3 /* restore FPU registers */
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#define CIF_IGNORE_IRQ 4 /* ignore interrupt (for udelay) */
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#define CIF_ENABLED_WAIT 5 /* in enabled wait state */
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#define CIF_MCCK_GUEST 6 /* machine check happening in guest */
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#define CIF_DEDICATED_CPU 7 /* this CPU is dedicated */
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#define _CIF_ASCE_PRIMARY BIT(CIF_ASCE_PRIMARY)
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#define _CIF_ASCE_SECONDARY BIT(CIF_ASCE_SECONDARY)
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#define _CIF_NOHZ_DELAY BIT(CIF_NOHZ_DELAY)

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