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netlist-to-vhdl/Language/Netlist Expand file tree Collapse file tree 1 file changed +11
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lines changed Original file line number Diff line number Diff line change @@ -18,21 +18,24 @@ import Language.Netlist.AST
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import Text.PrettyPrint
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import Data.Maybe (catMaybes )
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import Data.List (nub , (\\) )
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- genVHDL :: Module -> Doc
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- genVHDL m = imports $$
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-- | Generate a 'Language.Netlist.AST.Module' as a VHDL file, in a 'Doc' structure . The ['String'] argument
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-- is the list of extra modules to import, typically [\"work.all\"].
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+ genVHDL :: Module -> [String ] -> Doc
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+ genVHDL m others
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+ = imports others $$
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entity m $$
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architecture m
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- imports = vcat $ [
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- text " library IEEE" <> semi,
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- text " use IEEE.STD_LOGIC_1164.ALL" <> semi,
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- text " use IEEE.NUMERIC_STD.ALL" <> semi,
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- text " use work.all" <> semi
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- ]
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+ imports others = vcat
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+ [ text " library IEEE" <> semi
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+ , text " use IEEE.STD_LOGIC_1164.ALL" <> semi
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+ , text " use IEEE.NUMERIC_STD.ALL" <> semi
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+ ] $$ vcat [
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+ text (" use " ++ other) <> semi
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+ | other <- others
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+ ]
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entity :: Module -> Doc
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