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images
images
 
 
when
when
 
 
FAQ.md
FAQ.md
 
 
bind.md
bind.md
 
 
cheat_sheet.md
cheat_sheet.md
 
 
circuit_definitions.md
circuit_definitions.md
 
 
circuit_metaprogramming.md
circuit_metaprogramming.md
 
 
circuits.md
circuits.md
 
 
compile.md
compile.md
 
 
compile_guard.md
compile_guard.md
 
 
config.md
config.md
 
 
conversions.md
conversions.md
 
 
debugging.md
debugging.md
 
 
developers.md
developers.md
 
 
display_and_logging.md
display_and_logging.md
 
 
functions.md
functions.md
 
 
gettingstarted.md
gettingstarted.md
 
 
higher_order_circuits.md
higher_order_circuits.md
 
 
index.md
index.md
 
 
inline_combinational.md
inline_combinational.md
 
 
inline_verilog.md
inline_verilog.md
 
 
install.md
install.md
 
 
internals.md
internals.md
 
 
logging.md
logging.md
 
 
magma.md
magma.md
 
 
magma_2_migration_guide.md
magma_2_migration_guide.md
 
 
mantle_primitives.md
mantle_primitives.md
 
 
mantle_to_magma_primitives_migration_guide.md
mantle_to_magma_primitives_migration_guide.md
 
 
metaclasses.md
metaclasses.md
 
 
mlir.md
mlir.md
 
 
new_style_syntax.md
new_style_syntax.md
 
 
operators.md
operators.md
 
 
overview.md
overview.md
 
 
primitives.md
primitives.md
 
 
readme.md
readme.md
 
 
simulation.md
simulation.md
 
 
smart_bits.md
smart_bits.md
 
 
split_verilog.md
split_verilog.md
 
 
syntaxes.md
syntaxes.md
 
 
system_architecture.md
system_architecture.md
 
 
tools.md
tools.md
 
 
types_and_values.md
types_and_values.md
 
 
uniquification.md
uniquification.md
 
 
utility_functions.md
utility_functions.md
 
 
verilog_to_magma.md
verilog_to_magma.md
 
 

readme.md