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Bender.yml
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Bender.yml
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package:
name: axi
authors:
# Alphabetically ordered by last name (maintainers first)
- "Thomas Benz <tbenz@iis.ee.ethz.ch>" # current maintainer
- "Michael Rogenmoser <michaero@iis.ee.ethz.ch>" # current maintainer
- "Matheus Cavalcante <matheusd@iis.ee.ethz.ch>"
- "Tim Fischer <fischeti@iis.ee.ethz.ch>"
- "Noah Huetter <huettern@ethz.ch>"
- "Andreas Kurth <akurth@iis.ee.ethz.ch>"
- "Stefan Mach <smach@iis.ee.ethz.ch>"
- "Samuel Riedel <sriedel@iis.ee.ethz.ch>"
- "Wolfgang Rönninger <wroennin@iis.ee.ethz.ch>"
- "Fabian Schuiki <fschuiki@iis.ee.ethz.ch>"
- "Luca Valente <luca.valente@unibo.it>"
- "Nils Wistoff <nwistoff@iis.ee.ethz.ch>"
- "Florian Zaruba <zarubaf@iis.ee.ethz.ch>"
dependencies:
common_cells: { git: "https://github.com/pulp-platform/common_cells.git", version: 1.27.0 }
common_verification: { git: "https://github.com/pulp-platform/common_verification.git", version: 0.2.3 }
tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.2 }
export_include_dirs:
- include
sources:
# Source files grouped in levels. Files in level 0 have no dependencies on files in this
# package. Files in level 1 only depend on files in level 0, files in level 2 on files in
# levels 1 and 0, etc. Files within a level are ordered alphabetically.
# Level 0
- src/axi_pkg.sv
# Level 1
- src/axi_intf.sv
# Level 2
- src/axi_atop_filter.sv
- src/axi_burst_splitter.sv
- src/axi_bus_compare.sv
- src/axi_cdc_dst.sv
- src/axi_cdc_src.sv
- src/axi_cut.sv
- src/axi_delayer.sv
- src/axi_demux.sv
- src/axi_dw_downsizer.sv
- src/axi_dw_upsizer.sv
- src/axi_fifo.sv
- src/axi_id_remap.sv
- src/axi_id_prepend.sv
- src/axi_isolate.sv
- src/axi_join.sv
- src/axi_lite_demux.sv
- src/axi_lite_dw_converter.sv
- src/axi_lite_from_mem.sv
- src/axi_lite_join.sv
- src/axi_lite_lfsr.sv
- src/axi_lite_mailbox.sv
- src/axi_lite_mux.sv
- src/axi_lite_regs.sv
- src/axi_lite_to_apb.sv
- src/axi_lite_to_axi.sv
- src/axi_modify_address.sv
- src/axi_mux.sv
- src/axi_rw_join.sv
- src/axi_rw_split.sv
- src/axi_serializer.sv
- src/axi_slave_compare.sv
- src/axi_throttle.sv
- src/axi_to_mem.sv
# Level 3
- src/axi_cdc.sv
- src/axi_err_slv.sv
- src/axi_dw_converter.sv
- src/axi_from_mem.sv
- src/axi_id_serialize.sv
- src/axi_lfsr.sv
- src/axi_multicut.sv
- src/axi_to_axi_lite.sv
- src/axi_to_mem_banked.sv
- src/axi_to_mem_interleaved.sv
- src/axi_to_mem_split.sv
# Level 4
- src/axi_iw_converter.sv
- src/axi_lite_xbar.sv
- src/axi_xbar.sv
# Level 5
- src/axi_xp.sv
- target: synth_test
files:
- test/axi_synth_bench.sv
- target: simulation
files:
- src/axi_chan_compare.sv
- src/axi_dumper.sv
- src/axi_sim_mem.sv
- src/axi_test.sv
- target: test
files:
# Level 0
- test/tb_axi_dw_pkg.sv
- test/tb_axi_xbar_pkg.sv
# Level 1
- test/tb_axi_addr_test.sv
- test/tb_axi_atop_filter.sv
- test/tb_axi_bus_compare.sv
- test/tb_axi_cdc.sv
- test/tb_axi_delayer.sv
- test/tb_axi_dw_downsizer.sv
- test/tb_axi_dw_upsizer.sv
- test/tb_axi_fifo.sv
- test/tb_axi_isolate.sv
- test/tb_axi_lite_dw_converter.sv
- test/tb_axi_lite_mailbox.sv
- test/tb_axi_lite_regs.sv
- test/tb_axi_iw_converter.sv
- test/tb_axi_lite_to_apb.sv
- test/tb_axi_lite_to_axi.sv
- test/tb_axi_lite_xbar.sv
- test/tb_axi_modify_address.sv
- test/tb_axi_serializer.sv
- test/tb_axi_sim_mem.sv
- test/tb_axi_slave_compare.sv
- test/tb_axi_to_axi_lite.sv
- test/tb_axi_to_mem_banked.sv
- test/tb_axi_xbar.sv