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BUGFIXES:
1 After changes in ramp gene generic attribute - static pulse tb reported error - fix now 2 Max Min Mean test bench had few problems when passing integer with exponent, removed generic with exponent as full integer
1 parent 56c95ab commit eea8892

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4 files changed

+12
-10
lines changed

4 files changed

+12
-10
lines changed

hdl/psi_common_pulse_generator_ctrl_static.vhd

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -91,8 +91,10 @@ begin
9191
--*** Pulse generator ***
9292
inst_pulse : entity work.psi_common_ramp_gene
9393
generic map(
94-
width_g => length_g,
95-
rst_pol_g => rst_pol_g)
94+
width_g => length_g,
95+
is_sign_g => false,
96+
rst_pol_g => rst_pol_g,
97+
init_val_g => 0)
9698
port map(
9799
clk_i => clk_i,
98100
rst_i => rst_i,

sim/config.tcl

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -162,7 +162,7 @@ tb_run_add_arguments \
162162
"-gclock_cycle_g=100 -gsigned_data_g=true -gdata_length_g=16 -gaccu_length_g=64" \
163163
"-gclock_cycle_g=10 -gsigned_data_g=false -gdata_length_g=8 -gaccu_length_g=16" \
164164
"-gclock_cycle_g=10 -gsigned_data_g=true -gdata_length_g=24 -gaccu_length_g=48" \
165-
"-gclock_cycle_g=10 -gsigned_data_g=false -gdata_length_g=32 -gaccu_length_g=40"
165+
"-gclock_cycle_g=10 -gsigned_data_g=false -gdata_length_g=31 -gaccu_length_g=40"
166166
add_tb_run
167167

168168
create_tb_run "psi_common_find_min_max_tb"
@@ -185,9 +185,9 @@ add_tb_run
185185

186186
create_tb_run "psi_common_pulse_generator_ctrl_static_tb"
187187
tb_run_add_arguments \
188-
"-glength_g=16 -gfreq_clk_g=100e6 -gstr_freq_g=12e6 -gstep_dw_g=5 -gstep_up_g=10 -gstep_fll_g=50 -gstep_flh_g=60"\
189-
"-glength_g=16 -gfreq_clk_g=100e6 -gstr_freq_g=1e6 -gstep_dw_g=17 -gstep_up_g=29 -gstep_fll_g=301 -gstep_flh_g=400"\
190-
"-glength_g=16 -gfreq_clk_g=100e6 -gstr_freq_g=10e6 -gstep_dw_g=129 -gstep_up_g=738 -gstep_fll_g=12302 -gstep_flh_g=8789"
188+
"-glength_g=16 -gfreq_clk_g=100000000 -gstr_freq_g=12000000 -gstep_dw_g=5 -gstep_up_g=10 -gstep_fll_g=50 -gstep_flh_g=60"\
189+
"-glength_g=16 -gfreq_clk_g=100000000 -gstr_freq_g=1000000 -gstep_dw_g=17 -gstep_up_g=29 -gstep_fll_g=301 -gstep_flh_g=400"\
190+
"-glength_g=16 -gfreq_clk_g=100000000 -gstr_freq_g=10000000 -gstep_dw_g=129 -gstep_up_g=738 -gstep_fll_g=12302 -gstep_flh_g=8789"
191191
add_tb_run
192192

193193
create_tb_run "psi_common_ramp_gene_tb"

testbench/psi_common_min_max_mean_tb/psi_common_min_max_mean_tb.vhd

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@ architecture tb of psi_common_min_max_mean_tb is
4343
signal max_s : std_logic_vector(data_length_g - 1 downto 0) := (others => '0');
4444
signal counter_s : integer :=0;
4545
begin
46-
46+
assert data_length_g < 32 report "[ERROR]: for this test bench only data length less than 32 are authorized" severity failure;
4747
--*** Reset generation ***
4848
proc_rst : process
4949
begin

testbench/psi_common_pulse_generator_ctrl_static_tb/psi_common_pulse_generator_ctrl_static_tb.vhd

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -240,9 +240,9 @@ begin
240240
trig_sti <= '1';
241241
wait for (step_fll_g*200)*(1 sec /str_freq_g);
242242
stop_sti <= '1';
243-
print("[INFO]: pulse ABORT at " & to_string(now, ns));
244-
wait until str_obs = '1';
245-
wait until str_obs = '1';
243+
print("[INFO]: pulse ABORT at " & to_string(now, ns));
244+
wait until rising_edge(str_obs);
245+
wait until rising_edge(str_obs);
246246
assert dat_obs =to_uslv(0,length_g) report"[ERROR]: It didn't stop " severity error;
247247

248248
print(" *********************************************************");

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