An implementation of R7RS in Racket

(in progress) Racket port of the SICM scmutils library

C programs and data sets for publication "Learning Without Loss", by Veit Elser

Temporary repository for Kind2's refactor based on HVM2

A massively parallel, high-level programming language

AMD OpenNIC Project Overview

Setup and Usage Notes for the Zynq XCZU19EG FPGA on the Alveo U25

Documenting the Catapult v3 SmartNIC FPGA boards (Dragontails Peak & Longs Peak)

Binary Decision Diagrams (BDDs) in pure Python and Cython wrappers of CUDD, Sylvan, and BuDDy

Some examples of Lean projects, for undergraduate mathematicians.

PlayStation 3 emulator and debugger

a structural diff that understands syntax 🟥🟩

An incremental parsing system for programming tools

VHDL library for synthesizable minimal gigabit ethernet with RGMII interface, minimal ethernet, ip and udp header parsers.

Axiom is a free, open source computer algebra system

Open-source version of SLiCAP, implemented in python

emt250_roms_parse: tool to parse ROMs of EMT 250

Computer Algebra, Physics and Differential Geometry in Clojure.

hBPF = eBPF in hardware

Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

A package for Sublime Text that aids coding in the VHDL language.

Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)

The old code for our 36 channel rtl-sdr based coherent receiver

PicoRV32 - A Size-Optimized RISC-V CPU

This repository contains an Aquila SoC with an embedded TCP/IP hardware network stack.

Port of id Tech 4 / Doom 3 engine to WebAssembly / WebGL using Emscripten