LoongArch porting

[JiaFan1994]

LoongArch is a RISC ISA developed by Loongson. We currently have a LoongArch porting that we maintain ourselves. What conditions need to be met if we upload this code to the upstream?

[BobbyRBruce]

[I've moved this to the discussion page as this isn't strictly speaking an "issue" and may warrant discussion from the community].

I can speak only for myself here but if someone were willing to incorporate a new ISA into gem5 we'd welcome it assuming it was to a reasonable standard with some tests proving the implementation was correct. I know almost nothing about LoongArch but i'd say things like proving the running of some binaries in gem5's SE mode and maybe proving the booting of some OS in LoongArch would be suitable.

Right now we support ARM, MIPS, POWER, RISCV, SPARC, and X86. Of those X86, RISCV, and ARM are well tested and regularly maintained, and used regularly. MIPS, POWER, and SPARC are tested less, maintained less, and used less. It'd be a huge effort to get a new ISA up to the same maturity as we have achieved with ARM, X86, and RISCV, but something along the lines of MIPS, POWER, or SPARC may be possible. For example, with X86 we already have suites of disk images, tests, test data, standard library implementation, and various other features which we've developed for the ISA over years to help users utilize it for their research. SPARC, on the otherhand, exists and may be used but comes with no guarantees.

In general we are fine accepting contributions to gem5 but we, as a project, don't want to be left with long-term maintenance obligations. If a new ISA were introduced and it became burdensome to maintain we would likely remove it in some future release. So, in short, the bigger factor on upstreaming this code is a willingness by the LoongArch community to regularly keep the implementation up-to-date.