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Merge tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma
Pull dmaengine updates from Vinod Koul: - Add support in dmaengine core to do device node checks for DT devices and update bunch of drivers to use that and remove open coding from drivers - New driver/driver support for new hardware, namely: - MediaTek UART APDMA - Freescale i.mx7ulp edma2 - Synopsys eDMA IP core version 0 - Allwinner H6 DMA - Updates to axi-dma and support for interleaved cyclic transfers - Greg's debugfs return value check removals on drivers - Updates to stm32-dma, hsu, dw, pl330, tegra drivers * tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (68 commits) dmaengine: Revert "dmaengine: fsl-edma: add i.mx7ulp edma2 version support" dmaengine: at_xdmac: check for non-empty xfers_list before invoking callback Documentation: dmaengine: clean up description of dmatest usage dmaengine: tegra210-adma: remove PM_CLK dependency dmaengine: fsl-edma: add i.mx7ulp edma2 version support dt-bindings: dma: fsl-edma: add new i.mx7ulp-edma dmaengine: fsl-edma-common: version check for v2 instead dmaengine: fsl-edma-common: move dmamux register to another single function dmaengine: fsl-edma: add drvdata for fsl-edma dmaengine: Revert "dmaengine: fsl-edma: support little endian for edma driver" dmaengine: rcar-dmac: Reject zero-length slave DMA requests dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake dmaengine: dw-edma: fix semicolon.cocci warnings dmaengine: sh: usb-dmac: Use [] to denote a flexible array member dmaengine: dmatest: timeout value of -1 should specify infinite wait dmaengine: dw: Distinguish ->remove() between DW and iDMA 32-bit dmaengine: fsl-edma: support little endian for edma driver dmaengine: hsu: Revert "set HSU_CH_MTSR to memory width" dmagengine: pl330: add code to get reset property dt-bindings: pl330: document the optional resets property ...
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‎Documentation/devicetree/bindings/dma/8250_mtk_dma.txt

Lines changed: 0 additions & 33 deletions
This file was deleted.

‎Documentation/devicetree/bindings/dma/arm-pl330.txt

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,9 @@ Optional properties:
1616
- dma-channels: contains the total number of DMA channels supported by the DMAC
1717
- dma-requests: contains the total number of DMA requests supported by the DMAC
1818
- arm,pl330-broken-no-flushp: quirk for avoiding to execute DMAFLUSHP
19+
- resets: contains an entry for each entry in reset-names.
20+
See ../reset/reset.txt for details.
21+
- reset-names: must contain at least "dma", and optional is "dma-ocp".
1922

2023
Example:
2124

‎Documentation/devicetree/bindings/dma/fsl-edma.txt

Lines changed: 39 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -9,15 +9,16 @@ group, DMAMUX0 or DMAMUX1, but not both.
99
Required properties:
1010
- compatible :
1111
- "fsl,vf610-edma" for eDMA used similar to that on Vybrid vf610 SoC
12+
- "fsl,imx7ulp-edma" for eDMA2 used similar to that on i.mx7ulp
1213
- reg : Specifies base physical address(s) and size of the eDMA registers.
1314
The 1st region is eDMA control register's address and size.
1415
The 2nd and the 3rd regions are programmable channel multiplexing
1516
control register's address and size.
1617
- interrupts : A list of interrupt-specifiers, one for each entry in
17-
interrupt-names.
18-
- interrupt-names : Should contain:
19-
"edma-tx" - the transmission interrupt
20-
"edma-err" - the error interrupt
18+
interrupt-names on vf610 similar SoC. But for i.mx7ulp per channel
19+
per transmission interrupt, total 16 channel interrupt and 1
20+
error interrupt(located in the last), no interrupt-names list on
21+
i.mx7ulp for clean on dts.
2122
- #dma-cells : Must be <2>.
2223
The 1st cell specifies the DMAMUX(0 for DMAMUX0 and 1 for DMAMUX1).
2324
Specific request source can only be multiplexed by specific channels
@@ -28,13 +29,18 @@ Required properties:
2829
- clock-names : A list of channel group clock names. Should contain:
2930
"dmamux0" - clock name of mux0 group
3031
"dmamux1" - clock name of mux1 group
32+
Note: No dmamux0 on i.mx7ulp, but another 'dma' clk added on i.mx7ulp.
3133
- clocks : A list of phandle and clock-specifier pairs, one for each entry in
3234
clock-names.
3335

3436
Optional properties:
3537
- big-endian: If present registers and hardware scatter/gather descriptors
3638
of the eDMA are implemented in big endian mode, otherwise in little
3739
mode.
40+
- interrupt-names : Should contain the below on vf610 similar SoC but not used
41+
on i.mx7ulp similar SoC:
42+
"edma-tx" - the transmission interrupt
43+
"edma-err" - the error interrupt
3844

3945

4046
Examples:
@@ -52,8 +58,36 @@ edma0: dma-controller@40018000 {
5258
clock-names = "dmamux0", "dmamux1";
5359
clocks = <&clks VF610_CLK_DMAMUX0>,
5460
<&clks VF610_CLK_DMAMUX1>;
55-
};
61+
}; /* vf610 */
5662

63+
edma1: dma-controller@40080000 {
64+
#dma-cells = <2>;
65+
compatible = "fsl,imx7ulp-edma";
66+
reg = <0x40080000 0x2000>,
67+
<0x40210000 0x1000>;
68+
dma-channels = <32>;
69+
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
70+
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
71+
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
72+
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
73+
<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
74+
<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
75+
<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
76+
<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
77+
<GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
78+
<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
79+
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
80+
<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
81+
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
82+
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
83+
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
84+
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
85+
/* last is eDMA2-ERR interrupt */
86+
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
87+
clock-names = "dma", "dmamux0";
88+
clocks = <&pcc2 IMX7ULP_CLK_DMA1>,
89+
<&pcc2 IMX7ULP_CLK_DMA_MUX1>;
90+
}; /* i.mx7ulp */
5791

5892
* DMA clients
5993
DMA client drivers that uses the DMA function must use the format described

‎Documentation/devicetree/bindings/dma/mtk-uart-apdma.txt

Lines changed: 54 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,54 @@
1+
* Mediatek UART APDMA Controller
2+
3+
Required properties:
4+
- compatible should contain:
5+
* "mediatek,mt2712-uart-dma" for MT2712 compatible APDMA
6+
* "mediatek,mt6577-uart-dma" for MT6577 and all of the above
7+
8+
- reg: The base address of the APDMA register bank.
9+
10+
- interrupts: A single interrupt specifier.
11+
One interrupt per dma-requests, or 8 if no dma-requests property is present
12+
13+
- dma-requests: The number of DMA channels
14+
15+
- clocks : Must contain an entry for each entry in clock-names.
16+
See ../clocks/clock-bindings.txt for details.
17+
- clock-names: The APDMA clock for register accesses
18+
19+
- mediatek,dma-33bits: Present if the DMA requires support
20+
21+
Examples:
22+
23+
apdma: dma-controller@11000400 {
24+
compatible = "mediatek,mt2712-uart-dma";
25+
reg = <0 0x11000400 0 0x80>,
26+
<0 0x11000480 0 0x80>,
27+
<0 0x11000500 0 0x80>,
28+
<0 0x11000580 0 0x80>,
29+
<0 0x11000600 0 0x80>,
30+
<0 0x11000680 0 0x80>,
31+
<0 0x11000700 0 0x80>,
32+
<0 0x11000780 0 0x80>,
33+
<0 0x11000800 0 0x80>,
34+
<0 0x11000880 0 0x80>,
35+
<0 0x11000900 0 0x80>,
36+
<0 0x11000980 0 0x80>;
37+
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_LOW>,
38+
<GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>,
39+
<GIC_SPI 105 IRQ_TYPE_LEVEL_LOW>,
40+
<GIC_SPI 106 IRQ_TYPE_LEVEL_LOW>,
41+
<GIC_SPI 107 IRQ_TYPE_LEVEL_LOW>,
42+
<GIC_SPI 108 IRQ_TYPE_LEVEL_LOW>,
43+
<GIC_SPI 109 IRQ_TYPE_LEVEL_LOW>,
44+
<GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>,
45+
<GIC_SPI 111 IRQ_TYPE_LEVEL_LOW>,
46+
<GIC_SPI 112 IRQ_TYPE_LEVEL_LOW>,
47+
<GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>,
48+
<GIC_SPI 114 IRQ_TYPE_LEVEL_LOW>;
49+
dma-requests = <12>;
50+
clocks = <&pericfg CLK_PERI_AP_DMA>;
51+
clock-names = "apdma";
52+
mediatek,dma-33bits;
53+
#dma-cells = <1>;
54+
};

‎Documentation/devicetree/bindings/dma/sun6i-dma.txt

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -28,12 +28,17 @@ Example:
2828
};
2929

3030
------------------------------------------------------------------------------
31-
For A64 DMA controller:
31+
For A64 and H6 DMA controller:
3232

3333
Required properties:
34-
- compatible: "allwinner,sun50i-a64-dma"
34+
- compatible: Must be one of
35+
"allwinner,sun50i-a64-dma"
36+
"allwinner,sun50i-h6-dma"
3537
- dma-channels: Number of DMA channels supported by the controller.
3638
Refer to Documentation/devicetree/bindings/dma/dma.txt
39+
- clocks: In addition to parent AHB clock, it should also contain mbus
40+
clock (H6 only)
41+
- clock-names: Should contain "bus" and "mbus" (H6 only)
3742
- all properties above, i.e. reg, interrupts, clocks, resets and #dma-cells
3843

3944
Optional properties:

‎Documentation/driver-api/dmaengine/dmatest.rst

Lines changed: 13 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,8 @@ Example of usage::
4444

4545
dmatest.timeout=2000 dmatest.iterations=1 dmatest.channel=dma0chan0 dmatest.run=1
4646

47-
Example of multi-channel test usage:
47+
Example of multi-channel test usage (new in the 5.0 kernel)::
48+
4849
% modprobe dmatest
4950
% echo 2000 > /sys/module/dmatest/parameters/timeout
5051
% echo 1 > /sys/module/dmatest/parameters/iterations
@@ -53,15 +54,18 @@ Example of multi-channel test usage:
5354
% echo dma0chan2 > /sys/module/dmatest/parameters/channel
5455
% echo 1 > /sys/module/dmatest/parameters/run
5556

56-
Note: the channel parameter should always be the last parameter set prior to
57-
running the test (setting run=1), this is because upon setting the channel
58-
parameter, that specific channel is requested using the dmaengine and a thread
59-
is created with the existing parameters. This thread is set as pending
60-
and will be executed once run is set to 1. Any parameters set after the thread
61-
is created are not applied.
57+
.. note::
58+
For all tests, starting in the 5.0 kernel, either single- or multi-channel,
59+
the channel parameter(s) must be set after all other parameters. It is at
60+
that time that the existing parameter values are acquired for use by the
61+
thread(s). All other parameters are shared. Therefore, if changes are made
62+
to any of the other parameters, and an additional channel specified, the
63+
(shared) parameters used for all threads will use the new values.
64+
After the channels are specified, each thread is set as pending. All threads
65+
begin execution when the run parameter is set to 1.
6266

6367
.. hint::
64-
available channel list could be extracted by running the following command::
68+
A list of available channels can be found by running the following command::
6569

6670
% ls -1 /sys/class/dma/
6771

@@ -204,6 +208,7 @@ Releasing Channels
204208
Channels can be freed by setting run to 0.
205209

206210
Example::
211+
207212
% echo dma0chan1 > /sys/module/dmatest/parameters/channel
208213
dmatest: Added 1 threads using dma0chan1
209214
% cat /sys/class/dma/dma0chan1/in_use

‎MAINTAINERS

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4683,6 +4683,13 @@ L: linux-mtd@lists.infradead.org
46834683
S: Supported
46844684
F: drivers/mtd/nand/raw/denali*
46854685

4686+
DESIGNWARE EDMA CORE IP DRIVER
4687+
M: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
4688+
L: dmaengine@vger.kernel.org
4689+
S: Maintained
4690+
F: drivers/dma/dw-edma/
4691+
F: include/linux/dma/edma.h
4692+
46864693
DESIGNWARE USB2 DRD IP DRIVER
46874694
M: Minas Harutyunyan <hminas@synopsys.com>
46884695
L: linux-usb@vger.kernel.org

‎drivers/dma/Kconfig

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -103,6 +103,7 @@ config AXI_DMAC
103103
depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_SOCFPGA || COMPILE_TEST
104104
select DMA_ENGINE
105105
select DMA_VIRTUAL_CHANNELS
106+
select REGMAP_MMIO
106107
help
107108
Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
108109
controller is often used in Analog Device's reference designs for FPGA
@@ -584,7 +585,7 @@ config TEGRA20_APB_DMA
584585

585586
config TEGRA210_ADMA
586587
tristate "NVIDIA Tegra210 ADMA support"
587-
depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) && PM_CLK
588+
depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST)
588589
select DMA_ENGINE
589590
select DMA_VIRTUAL_CHANNELS
590591
help
@@ -666,6 +667,8 @@ source "drivers/dma/qcom/Kconfig"
666667

667668
source "drivers/dma/dw/Kconfig"
668669

670+
source "drivers/dma/dw-edma/Kconfig"
671+
669672
source "drivers/dma/hsu/Kconfig"
670673

671674
source "drivers/dma/sh/Kconfig"

‎drivers/dma/Makefile

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,7 @@ obj-$(CONFIG_DMA_SUN4I) += sun4i-dma.o
2929
obj-$(CONFIG_DMA_SUN6I) += sun6i-dma.o
3030
obj-$(CONFIG_DW_AXI_DMAC) += dw-axi-dmac/
3131
obj-$(CONFIG_DW_DMAC_CORE) += dw/
32+
obj-$(CONFIG_DW_EDMA) += dw-edma/
3233
obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o
3334
obj-$(CONFIG_FSL_DMA) += fsldma.o
3435
obj-$(CONFIG_FSL_EDMA) += fsl-edma.o fsl-edma-common.o

‎drivers/dma/amba-pl08x.c

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2508,9 +2508,8 @@ DEFINE_SHOW_ATTRIBUTE(pl08x_debugfs);
25082508
static void init_pl08x_debugfs(struct pl08x_driver_data *pl08x)
25092509
{
25102510
/* Expose a simple debugfs interface to view all clocks */
2511-
(void) debugfs_create_file(dev_name(&pl08x->adev->dev),
2512-
S_IFREG | S_IRUGO, NULL, pl08x,
2513-
&pl08x_debugfs_fops);
2511+
debugfs_create_file(dev_name(&pl08x->adev->dev), S_IFREG | S_IRUGO,
2512+
NULL, pl08x, &pl08x_debugfs_fops);
25142513
}
25152514

25162515
#else

‎drivers/dma/at_xdmac.c

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1568,11 +1568,14 @@ static void at_xdmac_handle_cyclic(struct at_xdmac_chan *atchan)
15681568
struct at_xdmac_desc *desc;
15691569
struct dma_async_tx_descriptor *txd;
15701570

1571-
desc = list_first_entry(&atchan->xfers_list, struct at_xdmac_desc, xfer_node);
1572-
txd = &desc->tx_dma_desc;
1571+
if (!list_empty(&atchan->xfers_list)) {
1572+
desc = list_first_entry(&atchan->xfers_list,
1573+
struct at_xdmac_desc, xfer_node);
1574+
txd = &desc->tx_dma_desc;
15731575

1574-
if (txd->flags & DMA_PREP_INTERRUPT)
1575-
dmaengine_desc_get_callback_invoke(txd, NULL);
1576+
if (txd->flags & DMA_PREP_INTERRUPT)
1577+
dmaengine_desc_get_callback_invoke(txd, NULL);
1578+
}
15761579
}
15771580

15781581
static void at_xdmac_handle_error(struct at_xdmac_chan *atchan)

‎drivers/dma/bcm-sba-raid.c

Lines changed: 3 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -164,7 +164,6 @@ struct sba_device {
164164
struct list_head reqs_free_list;
165165
/* DebugFS directory entries */
166166
struct dentry *root;
167-
struct dentry *stats;
168167
};
169168

170169
/* ====== Command helper routines ===== */
@@ -1716,17 +1715,11 @@ static int sba_probe(struct platform_device *pdev)
17161715

17171716
/* Create debugfs root entry */
17181717
sba->root = debugfs_create_dir(dev_name(sba->dev), NULL);
1719-
if (IS_ERR_OR_NULL(sba->root)) {
1720-
dev_err(sba->dev, "failed to create debugfs root entry\n");
1721-
sba->root = NULL;
1722-
goto skip_debugfs;
1723-
}
17241718

17251719
/* Create debugfs stats entry */
1726-
sba->stats = debugfs_create_devm_seqfile(sba->dev, "stats", sba->root,
1727-
sba_debugfs_stats_show);
1728-
if (IS_ERR_OR_NULL(sba->stats))
1729-
dev_err(sba->dev, "failed to create debugfs stats file\n");
1720+
debugfs_create_devm_seqfile(sba->dev, "stats", sba->root,
1721+
sba_debugfs_stats_show);
1722+
17301723
skip_debugfs:
17311724

17321725
/* Register DMA device with Linux async framework */

‎drivers/dma/coh901318.c

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1378,10 +1378,8 @@ static int __init init_coh901318_debugfs(void)
13781378

13791379
dma_dentry = debugfs_create_dir("dma", NULL);
13801380

1381-
(void) debugfs_create_file("status",
1382-
S_IFREG | S_IRUGO,
1383-
dma_dentry, NULL,
1384-
&coh901318_debugfs_status_operations);
1381+
debugfs_create_file("status", S_IFREG | S_IRUGO, dma_dentry, NULL,
1382+
&coh901318_debugfs_status_operations);
13851383
return 0;
13861384
}
13871385

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