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math.c
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/*
* S390 version
* Copyright IBM Corp. 1999, 2001
* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
*
* 'math.c' emulates IEEE instructions on a S390 processor
* that does not have the IEEE fpu (all processors before G5).
*/
#include <linux/types.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <asm/uaccess.h>
#include <asm/lowcore.h>
#include <asm/sfp-util.h>
#include <math-emu/soft-fp.h>
#include <math-emu/single.h>
#include <math-emu/double.h>
#include <math-emu/quad.h>
#define FPC_VALID_MASK 0xF8F8FF03
/*
* I miss a macro to round a floating point number to the
* nearest integer in the same floating point format.
*/
#define _FP_TO_FPINT_ROUND(fs, wc, X) \
do { \
switch (X##_c) \
{ \
case FP_CLS_NORMAL: \
if (X##_e > _FP_FRACBITS_##fs + _FP_EXPBIAS_##fs) \
{ /* floating point number has no bits after the dot. */ \
} \
else if (X##_e <= _FP_FRACBITS_##fs + _FP_EXPBIAS_##fs && \
X##_e > _FP_EXPBIAS_##fs) \
{ /* some bits before the dot, some after it. */ \
_FP_FRAC_SRS_##wc(X, _FP_WFRACBITS_##fs, \
X##_e - _FP_EXPBIAS_##fs \
+ _FP_FRACBITS_##fs); \
_FP_ROUND(wc, X); \
_FP_FRAC_SLL_##wc(X, X##_e - _FP_EXPBIAS_##fs \
+ _FP_FRACBITS_##fs); \
} \
else \
{ /* all bits after the dot. */ \
FP_SET_EXCEPTION(FP_EX_INEXACT); \
X##_c = FP_CLS_ZERO; \
} \
break; \
case FP_CLS_NAN: \
case FP_CLS_INF: \
case FP_CLS_ZERO: \
break; \
} \
} while (0)
#define FP_TO_FPINT_ROUND_S(X) _FP_TO_FPINT_ROUND(S,1,X)
#define FP_TO_FPINT_ROUND_D(X) _FP_TO_FPINT_ROUND(D,2,X)
#define FP_TO_FPINT_ROUND_Q(X) _FP_TO_FPINT_ROUND(Q,4,X)
typedef union {
long double ld;
struct {
__u64 high;
__u64 low;
} w;
} mathemu_ldcv;
#ifdef CONFIG_SYSCTL
int sysctl_ieee_emulation_warnings=1;
#endif
#define mathemu_put_user(x, p) \
do { \
if (put_user((x),(p))) \
return SIGSEGV; \
} while (0)
#define mathemu_get_user(x, p) \
do { \
if (get_user((x),(p))) \
return SIGSEGV; \
} while (0)
#define mathemu_copy_from_user(d, s, n)\
do { \
if (copy_from_user((d),(s),(n)) != 0) \
return SIGSEGV; \
} while (0)
#define mathemu_copy_to_user(d, s, n) \
do { \
if (copy_to_user((d),(s),(n)) != 0) \
return SIGSEGV; \
} while (0)
static void display_emulation_not_implemented(struct pt_regs *regs, char *instr)
{
__u16 *location;
#ifdef CONFIG_SYSCTL
if(sysctl_ieee_emulation_warnings)
#endif
{
location = (__u16 *)(regs->psw.addr-S390_lowcore.pgm_ilc);
printk("%s ieee fpu instruction not emulated "
"process name: %s pid: %d \n",
instr, current->comm, current->pid);
printk("%s's PSW: %08lx %08lx\n", instr,
(unsigned long) regs->psw.mask,
(unsigned long) location);
}
}
static inline void emu_set_CC (struct pt_regs *regs, int cc)
{
regs->psw.mask = (regs->psw.mask & 0xFFFFCFFF) | ((cc&3) << 12);
}
/*
* Set the condition code in the user psw.
* 0 : Result is zero
* 1 : Result is less than zero
* 2 : Result is greater than zero
* 3 : Result is NaN or INF
*/
static inline void emu_set_CC_cs(struct pt_regs *regs, int class, int sign)
{
switch (class) {
case FP_CLS_NORMAL:
case FP_CLS_INF:
emu_set_CC(regs, sign ? 1 : 2);
break;
case FP_CLS_ZERO:
emu_set_CC(regs, 0);
break;
case FP_CLS_NAN:
emu_set_CC(regs, 3);
break;
}
}
/* Add long double */
static int emu_axbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_Q(QA); FP_DECL_Q(QB); FP_DECL_Q(QR);
FP_DECL_EX;
mathemu_ldcv cvt;
int mode;
mode = current->thread.fp_regs.fpc & 3;
cvt.w.high = current->thread.fp_regs.fprs[rx].ui;
cvt.w.low = current->thread.fp_regs.fprs[rx+2].ui;
FP_UNPACK_QP(QA, &cvt.ld);
cvt.w.high = current->thread.fp_regs.fprs[ry].ui;
cvt.w.low = current->thread.fp_regs.fprs[ry+2].ui;
FP_UNPACK_QP(QB, &cvt.ld);
FP_ADD_Q(QR, QA, QB);
FP_PACK_QP(&cvt.ld, QR);
current->thread.fp_regs.fprs[rx].ui = cvt.w.high;
current->thread.fp_regs.fprs[rx+2].ui = cvt.w.low;
emu_set_CC_cs(regs, QR_c, QR_s);
return _fex;
}
/* Add double */
static int emu_adbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_D(DA); FP_DECL_D(DB); FP_DECL_D(DR);
FP_DECL_EX;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_DP(DA, ¤t->thread.fp_regs.fprs[rx].d);
FP_UNPACK_DP(DB, ¤t->thread.fp_regs.fprs[ry].d);
FP_ADD_D(DR, DA, DB);
FP_PACK_DP(¤t->thread.fp_regs.fprs[rx].d, DR);
emu_set_CC_cs(regs, DR_c, DR_s);
return _fex;
}
/* Add double */
static int emu_adb (struct pt_regs *regs, int rx, double *val) {
FP_DECL_D(DA); FP_DECL_D(DB); FP_DECL_D(DR);
FP_DECL_EX;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_DP(DA, ¤t->thread.fp_regs.fprs[rx].d);
FP_UNPACK_DP(DB, val);
FP_ADD_D(DR, DA, DB);
FP_PACK_DP(¤t->thread.fp_regs.fprs[rx].d, DR);
emu_set_CC_cs(regs, DR_c, DR_s);
return _fex;
}
/* Add float */
static int emu_aebr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_S(SA); FP_DECL_S(SB); FP_DECL_S(SR);
FP_DECL_EX;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_SP(SA, ¤t->thread.fp_regs.fprs[rx].f);
FP_UNPACK_SP(SB, ¤t->thread.fp_regs.fprs[ry].f);
FP_ADD_S(SR, SA, SB);
FP_PACK_SP(¤t->thread.fp_regs.fprs[rx].f, SR);
emu_set_CC_cs(regs, SR_c, SR_s);
return _fex;
}
/* Add float */
static int emu_aeb (struct pt_regs *regs, int rx, float *val) {
FP_DECL_S(SA); FP_DECL_S(SB); FP_DECL_S(SR);
FP_DECL_EX;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_SP(SA, ¤t->thread.fp_regs.fprs[rx].f);
FP_UNPACK_SP(SB, val);
FP_ADD_S(SR, SA, SB);
FP_PACK_SP(¤t->thread.fp_regs.fprs[rx].f, SR);
emu_set_CC_cs(regs, SR_c, SR_s);
return _fex;
}
/* Compare long double */
static int emu_cxbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_Q(QA); FP_DECL_Q(QB);
mathemu_ldcv cvt;
int IR;
cvt.w.high = current->thread.fp_regs.fprs[rx].ui;
cvt.w.low = current->thread.fp_regs.fprs[rx+2].ui;
FP_UNPACK_RAW_QP(QA, &cvt.ld);
cvt.w.high = current->thread.fp_regs.fprs[ry].ui;
cvt.w.low = current->thread.fp_regs.fprs[ry+2].ui;
FP_UNPACK_RAW_QP(QB, &cvt.ld);
FP_CMP_Q(IR, QA, QB, 3);
/*
* IR == -1 if DA < DB, IR == 0 if DA == DB,
* IR == 1 if DA > DB and IR == 3 if unorderded
*/
emu_set_CC(regs, (IR == -1) ? 1 : (IR == 1) ? 2 : IR);
return 0;
}
/* Compare double */
static int emu_cdbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_D(DA); FP_DECL_D(DB);
int IR;
FP_UNPACK_RAW_DP(DA, ¤t->thread.fp_regs.fprs[rx].d);
FP_UNPACK_RAW_DP(DB, ¤t->thread.fp_regs.fprs[ry].d);
FP_CMP_D(IR, DA, DB, 3);
/*
* IR == -1 if DA < DB, IR == 0 if DA == DB,
* IR == 1 if DA > DB and IR == 3 if unorderded
*/
emu_set_CC(regs, (IR == -1) ? 1 : (IR == 1) ? 2 : IR);
return 0;
}
/* Compare double */
static int emu_cdb (struct pt_regs *regs, int rx, double *val) {
FP_DECL_D(DA); FP_DECL_D(DB);
int IR;
FP_UNPACK_RAW_DP(DA, ¤t->thread.fp_regs.fprs[rx].d);
FP_UNPACK_RAW_DP(DB, val);
FP_CMP_D(IR, DA, DB, 3);
/*
* IR == -1 if DA < DB, IR == 0 if DA == DB,
* IR == 1 if DA > DB and IR == 3 if unorderded
*/
emu_set_CC(regs, (IR == -1) ? 1 : (IR == 1) ? 2 : IR);
return 0;
}
/* Compare float */
static int emu_cebr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_S(SA); FP_DECL_S(SB);
int IR;
FP_UNPACK_RAW_SP(SA, ¤t->thread.fp_regs.fprs[rx].f);
FP_UNPACK_RAW_SP(SB, ¤t->thread.fp_regs.fprs[ry].f);
FP_CMP_S(IR, SA, SB, 3);
/*
* IR == -1 if DA < DB, IR == 0 if DA == DB,
* IR == 1 if DA > DB and IR == 3 if unorderded
*/
emu_set_CC(regs, (IR == -1) ? 1 : (IR == 1) ? 2 : IR);
return 0;
}
/* Compare float */
static int emu_ceb (struct pt_regs *regs, int rx, float *val) {
FP_DECL_S(SA); FP_DECL_S(SB);
int IR;
FP_UNPACK_RAW_SP(SA, ¤t->thread.fp_regs.fprs[rx].f);
FP_UNPACK_RAW_SP(SB, val);
FP_CMP_S(IR, SA, SB, 3);
/*
* IR == -1 if DA < DB, IR == 0 if DA == DB,
* IR == 1 if DA > DB and IR == 3 if unorderded
*/
emu_set_CC(regs, (IR == -1) ? 1 : (IR == 1) ? 2 : IR);
return 0;
}
/* Compare and signal long double */
static int emu_kxbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_Q(QA); FP_DECL_Q(QB);
FP_DECL_EX;
mathemu_ldcv cvt;
int IR;
cvt.w.high = current->thread.fp_regs.fprs[rx].ui;
cvt.w.low = current->thread.fp_regs.fprs[rx+2].ui;
FP_UNPACK_RAW_QP(QA, &cvt.ld);
cvt.w.high = current->thread.fp_regs.fprs[ry].ui;
cvt.w.low = current->thread.fp_regs.fprs[ry+2].ui;
FP_UNPACK_QP(QB, &cvt.ld);
FP_CMP_Q(IR, QA, QB, 3);
/*
* IR == -1 if DA < DB, IR == 0 if DA == DB,
* IR == 1 if DA > DB and IR == 3 if unorderded
*/
emu_set_CC(regs, (IR == -1) ? 1 : (IR == 1) ? 2 : IR);
if (IR == 3)
FP_SET_EXCEPTION (FP_EX_INVALID);
return _fex;
}
/* Compare and signal double */
static int emu_kdbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_D(DA); FP_DECL_D(DB);
FP_DECL_EX;
int IR;
FP_UNPACK_RAW_DP(DA, ¤t->thread.fp_regs.fprs[rx].d);
FP_UNPACK_RAW_DP(DB, ¤t->thread.fp_regs.fprs[ry].d);
FP_CMP_D(IR, DA, DB, 3);
/*
* IR == -1 if DA < DB, IR == 0 if DA == DB,
* IR == 1 if DA > DB and IR == 3 if unorderded
*/
emu_set_CC(regs, (IR == -1) ? 1 : (IR == 1) ? 2 : IR);
if (IR == 3)
FP_SET_EXCEPTION (FP_EX_INVALID);
return _fex;
}
/* Compare and signal double */
static int emu_kdb (struct pt_regs *regs, int rx, double *val) {
FP_DECL_D(DA); FP_DECL_D(DB);
FP_DECL_EX;
int IR;
FP_UNPACK_RAW_DP(DA, ¤t->thread.fp_regs.fprs[rx].d);
FP_UNPACK_RAW_DP(DB, val);
FP_CMP_D(IR, DA, DB, 3);
/*
* IR == -1 if DA < DB, IR == 0 if DA == DB,
* IR == 1 if DA > DB and IR == 3 if unorderded
*/
emu_set_CC(regs, (IR == -1) ? 1 : (IR == 1) ? 2 : IR);
if (IR == 3)
FP_SET_EXCEPTION (FP_EX_INVALID);
return _fex;
}
/* Compare and signal float */
static int emu_kebr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_S(SA); FP_DECL_S(SB);
FP_DECL_EX;
int IR;
FP_UNPACK_RAW_SP(SA, ¤t->thread.fp_regs.fprs[rx].f);
FP_UNPACK_RAW_SP(SB, ¤t->thread.fp_regs.fprs[ry].f);
FP_CMP_S(IR, SA, SB, 3);
/*
* IR == -1 if DA < DB, IR == 0 if DA == DB,
* IR == 1 if DA > DB and IR == 3 if unorderded
*/
emu_set_CC(regs, (IR == -1) ? 1 : (IR == 1) ? 2 : IR);
if (IR == 3)
FP_SET_EXCEPTION (FP_EX_INVALID);
return _fex;
}
/* Compare and signal float */
static int emu_keb (struct pt_regs *regs, int rx, float *val) {
FP_DECL_S(SA); FP_DECL_S(SB);
FP_DECL_EX;
int IR;
FP_UNPACK_RAW_SP(SA, ¤t->thread.fp_regs.fprs[rx].f);
FP_UNPACK_RAW_SP(SB, val);
FP_CMP_S(IR, SA, SB, 3);
/*
* IR == -1 if DA < DB, IR == 0 if DA == DB,
* IR == 1 if DA > DB and IR == 3 if unorderded
*/
emu_set_CC(regs, (IR == -1) ? 1 : (IR == 1) ? 2 : IR);
if (IR == 3)
FP_SET_EXCEPTION (FP_EX_INVALID);
return _fex;
}
/* Convert from fixed long double */
static int emu_cxfbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_Q(QR);
FP_DECL_EX;
mathemu_ldcv cvt;
__s32 si;
int mode;
mode = current->thread.fp_regs.fpc & 3;
si = regs->gprs[ry];
FP_FROM_INT_Q(QR, si, 32, int);
FP_PACK_QP(&cvt.ld, QR);
current->thread.fp_regs.fprs[rx].ui = cvt.w.high;
current->thread.fp_regs.fprs[rx+2].ui = cvt.w.low;
return _fex;
}
/* Convert from fixed double */
static int emu_cdfbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_D(DR);
FP_DECL_EX;
__s32 si;
int mode;
mode = current->thread.fp_regs.fpc & 3;
si = regs->gprs[ry];
FP_FROM_INT_D(DR, si, 32, int);
FP_PACK_DP(¤t->thread.fp_regs.fprs[rx].d, DR);
return _fex;
}
/* Convert from fixed float */
static int emu_cefbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_S(SR);
FP_DECL_EX;
__s32 si;
int mode;
mode = current->thread.fp_regs.fpc & 3;
si = regs->gprs[ry];
FP_FROM_INT_S(SR, si, 32, int);
FP_PACK_SP(¤t->thread.fp_regs.fprs[rx].f, SR);
return _fex;
}
/* Convert to fixed long double */
static int emu_cfxbr (struct pt_regs *regs, int rx, int ry, int mask) {
FP_DECL_Q(QA);
FP_DECL_EX;
mathemu_ldcv cvt;
__s32 si;
int mode;
if (mask == 0)
mode = current->thread.fp_regs.fpc & 3;
else if (mask == 1)
mode = FP_RND_NEAREST;
else
mode = mask - 4;
cvt.w.high = current->thread.fp_regs.fprs[ry].ui;
cvt.w.low = current->thread.fp_regs.fprs[ry+2].ui;
FP_UNPACK_QP(QA, &cvt.ld);
FP_TO_INT_ROUND_Q(si, QA, 32, 1);
regs->gprs[rx] = si;
emu_set_CC_cs(regs, QA_c, QA_s);
return _fex;
}
/* Convert to fixed double */
static int emu_cfdbr (struct pt_regs *regs, int rx, int ry, int mask) {
FP_DECL_D(DA);
FP_DECL_EX;
__s32 si;
int mode;
if (mask == 0)
mode = current->thread.fp_regs.fpc & 3;
else if (mask == 1)
mode = FP_RND_NEAREST;
else
mode = mask - 4;
FP_UNPACK_DP(DA, ¤t->thread.fp_regs.fprs[ry].d);
FP_TO_INT_ROUND_D(si, DA, 32, 1);
regs->gprs[rx] = si;
emu_set_CC_cs(regs, DA_c, DA_s);
return _fex;
}
/* Convert to fixed float */
static int emu_cfebr (struct pt_regs *regs, int rx, int ry, int mask) {
FP_DECL_S(SA);
FP_DECL_EX;
__s32 si;
int mode;
if (mask == 0)
mode = current->thread.fp_regs.fpc & 3;
else if (mask == 1)
mode = FP_RND_NEAREST;
else
mode = mask - 4;
FP_UNPACK_SP(SA, ¤t->thread.fp_regs.fprs[ry].f);
FP_TO_INT_ROUND_S(si, SA, 32, 1);
regs->gprs[rx] = si;
emu_set_CC_cs(regs, SA_c, SA_s);
return _fex;
}
/* Divide long double */
static int emu_dxbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_Q(QA); FP_DECL_Q(QB); FP_DECL_Q(QR);
FP_DECL_EX;
mathemu_ldcv cvt;
int mode;
mode = current->thread.fp_regs.fpc & 3;
cvt.w.high = current->thread.fp_regs.fprs[rx].ui;
cvt.w.low = current->thread.fp_regs.fprs[rx+2].ui;
FP_UNPACK_QP(QA, &cvt.ld);
cvt.w.high = current->thread.fp_regs.fprs[ry].ui;
cvt.w.low = current->thread.fp_regs.fprs[ry+2].ui;
FP_UNPACK_QP(QB, &cvt.ld);
FP_DIV_Q(QR, QA, QB);
FP_PACK_QP(&cvt.ld, QR);
current->thread.fp_regs.fprs[rx].ui = cvt.w.high;
current->thread.fp_regs.fprs[rx+2].ui = cvt.w.low;
return _fex;
}
/* Divide double */
static int emu_ddbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_D(DA); FP_DECL_D(DB); FP_DECL_D(DR);
FP_DECL_EX;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_DP(DA, ¤t->thread.fp_regs.fprs[rx].d);
FP_UNPACK_DP(DB, ¤t->thread.fp_regs.fprs[ry].d);
FP_DIV_D(DR, DA, DB);
FP_PACK_DP(¤t->thread.fp_regs.fprs[rx].d, DR);
return _fex;
}
/* Divide double */
static int emu_ddb (struct pt_regs *regs, int rx, double *val) {
FP_DECL_D(DA); FP_DECL_D(DB); FP_DECL_D(DR);
FP_DECL_EX;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_DP(DA, ¤t->thread.fp_regs.fprs[rx].d);
FP_UNPACK_DP(DB, val);
FP_DIV_D(DR, DA, DB);
FP_PACK_DP(¤t->thread.fp_regs.fprs[rx].d, DR);
return _fex;
}
/* Divide float */
static int emu_debr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_S(SA); FP_DECL_S(SB); FP_DECL_S(SR);
FP_DECL_EX;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_SP(SA, ¤t->thread.fp_regs.fprs[rx].f);
FP_UNPACK_SP(SB, ¤t->thread.fp_regs.fprs[ry].f);
FP_DIV_S(SR, SA, SB);
FP_PACK_SP(¤t->thread.fp_regs.fprs[rx].f, SR);
return _fex;
}
/* Divide float */
static int emu_deb (struct pt_regs *regs, int rx, float *val) {
FP_DECL_S(SA); FP_DECL_S(SB); FP_DECL_S(SR);
FP_DECL_EX;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_SP(SA, ¤t->thread.fp_regs.fprs[rx].f);
FP_UNPACK_SP(SB, val);
FP_DIV_S(SR, SA, SB);
FP_PACK_SP(¤t->thread.fp_regs.fprs[rx].f, SR);
return _fex;
}
/* Divide to integer double */
static int emu_didbr (struct pt_regs *regs, int rx, int ry, int mask) {
display_emulation_not_implemented(regs, "didbr");
return 0;
}
/* Divide to integer float */
static int emu_diebr (struct pt_regs *regs, int rx, int ry, int mask) {
display_emulation_not_implemented(regs, "diebr");
return 0;
}
/* Extract fpc */
static int emu_efpc (struct pt_regs *regs, int rx, int ry) {
regs->gprs[rx] = current->thread.fp_regs.fpc;
return 0;
}
/* Load and test long double */
static int emu_ltxbr (struct pt_regs *regs, int rx, int ry) {
s390_fp_regs *fp_regs = ¤t->thread.fp_regs;
mathemu_ldcv cvt;
FP_DECL_Q(QA);
FP_DECL_EX;
cvt.w.high = current->thread.fp_regs.fprs[ry].ui;
cvt.w.low = current->thread.fp_regs.fprs[ry+2].ui;
FP_UNPACK_QP(QA, &cvt.ld);
fp_regs->fprs[rx].ui = fp_regs->fprs[ry].ui;
fp_regs->fprs[rx+2].ui = fp_regs->fprs[ry+2].ui;
emu_set_CC_cs(regs, QA_c, QA_s);
return _fex;
}
/* Load and test double */
static int emu_ltdbr (struct pt_regs *regs, int rx, int ry) {
s390_fp_regs *fp_regs = ¤t->thread.fp_regs;
FP_DECL_D(DA);
FP_DECL_EX;
FP_UNPACK_DP(DA, &fp_regs->fprs[ry].d);
fp_regs->fprs[rx].ui = fp_regs->fprs[ry].ui;
emu_set_CC_cs(regs, DA_c, DA_s);
return _fex;
}
/* Load and test double */
static int emu_ltebr (struct pt_regs *regs, int rx, int ry) {
s390_fp_regs *fp_regs = ¤t->thread.fp_regs;
FP_DECL_S(SA);
FP_DECL_EX;
FP_UNPACK_SP(SA, &fp_regs->fprs[ry].f);
fp_regs->fprs[rx].ui = fp_regs->fprs[ry].ui;
emu_set_CC_cs(regs, SA_c, SA_s);
return _fex;
}
/* Load complement long double */
static int emu_lcxbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_Q(QA); FP_DECL_Q(QR);
FP_DECL_EX;
mathemu_ldcv cvt;
int mode;
mode = current->thread.fp_regs.fpc & 3;
cvt.w.high = current->thread.fp_regs.fprs[ry].ui;
cvt.w.low = current->thread.fp_regs.fprs[ry+2].ui;
FP_UNPACK_QP(QA, &cvt.ld);
FP_NEG_Q(QR, QA);
FP_PACK_QP(&cvt.ld, QR);
current->thread.fp_regs.fprs[rx].ui = cvt.w.high;
current->thread.fp_regs.fprs[rx+2].ui = cvt.w.low;
emu_set_CC_cs(regs, QR_c, QR_s);
return _fex;
}
/* Load complement double */
static int emu_lcdbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_D(DA); FP_DECL_D(DR);
FP_DECL_EX;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_DP(DA, ¤t->thread.fp_regs.fprs[ry].d);
FP_NEG_D(DR, DA);
FP_PACK_DP(¤t->thread.fp_regs.fprs[rx].d, DR);
emu_set_CC_cs(regs, DR_c, DR_s);
return _fex;
}
/* Load complement float */
static int emu_lcebr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_S(SA); FP_DECL_S(SR);
FP_DECL_EX;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_SP(SA, ¤t->thread.fp_regs.fprs[ry].f);
FP_NEG_S(SR, SA);
FP_PACK_SP(¤t->thread.fp_regs.fprs[rx].f, SR);
emu_set_CC_cs(regs, SR_c, SR_s);
return _fex;
}
/* Load floating point integer long double */
static int emu_fixbr (struct pt_regs *regs, int rx, int ry, int mask) {
s390_fp_regs *fp_regs = ¤t->thread.fp_regs;
FP_DECL_Q(QA);
FP_DECL_EX;
mathemu_ldcv cvt;
__s32 si;
int mode;
if (mask == 0)
mode = fp_regs->fpc & 3;
else if (mask == 1)
mode = FP_RND_NEAREST;
else
mode = mask - 4;
cvt.w.high = fp_regs->fprs[ry].ui;
cvt.w.low = fp_regs->fprs[ry+2].ui;
FP_UNPACK_QP(QA, &cvt.ld);
FP_TO_FPINT_ROUND_Q(QA);
FP_PACK_QP(&cvt.ld, QA);
fp_regs->fprs[rx].ui = cvt.w.high;
fp_regs->fprs[rx+2].ui = cvt.w.low;
return _fex;
}
/* Load floating point integer double */
static int emu_fidbr (struct pt_regs *regs, int rx, int ry, int mask) {
/* FIXME: rounding mode !! */
s390_fp_regs *fp_regs = ¤t->thread.fp_regs;
FP_DECL_D(DA);
FP_DECL_EX;
__s32 si;
int mode;
if (mask == 0)
mode = fp_regs->fpc & 3;
else if (mask == 1)
mode = FP_RND_NEAREST;
else
mode = mask - 4;
FP_UNPACK_DP(DA, &fp_regs->fprs[ry].d);
FP_TO_FPINT_ROUND_D(DA);
FP_PACK_DP(&fp_regs->fprs[rx].d, DA);
return _fex;
}
/* Load floating point integer float */
static int emu_fiebr (struct pt_regs *regs, int rx, int ry, int mask) {
s390_fp_regs *fp_regs = ¤t->thread.fp_regs;
FP_DECL_S(SA);
FP_DECL_EX;
__s32 si;
int mode;
if (mask == 0)
mode = fp_regs->fpc & 3;
else if (mask == 1)
mode = FP_RND_NEAREST;
else
mode = mask - 4;
FP_UNPACK_SP(SA, &fp_regs->fprs[ry].f);
FP_TO_FPINT_ROUND_S(SA);
FP_PACK_SP(&fp_regs->fprs[rx].f, SA);
return _fex;
}
/* Load lengthened double to long double */
static int emu_lxdbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_D(DA); FP_DECL_Q(QR);
FP_DECL_EX;
mathemu_ldcv cvt;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_DP(DA, ¤t->thread.fp_regs.fprs[ry].d);
FP_CONV (Q, D, 4, 2, QR, DA);
FP_PACK_QP(&cvt.ld, QR);
current->thread.fp_regs.fprs[rx].ui = cvt.w.high;
current->thread.fp_regs.fprs[rx+2].ui = cvt.w.low;
return _fex;
}
/* Load lengthened double to long double */
static int emu_lxdb (struct pt_regs *regs, int rx, double *val) {
FP_DECL_D(DA); FP_DECL_Q(QR);
FP_DECL_EX;
mathemu_ldcv cvt;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_DP(DA, val);
FP_CONV (Q, D, 4, 2, QR, DA);
FP_PACK_QP(&cvt.ld, QR);
current->thread.fp_regs.fprs[rx].ui = cvt.w.high;
current->thread.fp_regs.fprs[rx+2].ui = cvt.w.low;
return _fex;
}
/* Load lengthened float to long double */
static int emu_lxebr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_S(SA); FP_DECL_Q(QR);
FP_DECL_EX;
mathemu_ldcv cvt;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_SP(SA, ¤t->thread.fp_regs.fprs[ry].f);
FP_CONV (Q, S, 4, 1, QR, SA);
FP_PACK_QP(&cvt.ld, QR);
current->thread.fp_regs.fprs[rx].ui = cvt.w.high;
current->thread.fp_regs.fprs[rx+2].ui = cvt.w.low;
return _fex;
}
/* Load lengthened float to long double */
static int emu_lxeb (struct pt_regs *regs, int rx, float *val) {
FP_DECL_S(SA); FP_DECL_Q(QR);
FP_DECL_EX;
mathemu_ldcv cvt;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_SP(SA, val);
FP_CONV (Q, S, 4, 1, QR, SA);
FP_PACK_QP(&cvt.ld, QR);
current->thread.fp_regs.fprs[rx].ui = cvt.w.high;
current->thread.fp_regs.fprs[rx+2].ui = cvt.w.low;
return _fex;
}
/* Load lengthened float to double */
static int emu_ldebr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_S(SA); FP_DECL_D(DR);
FP_DECL_EX;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_SP(SA, ¤t->thread.fp_regs.fprs[ry].f);
FP_CONV (D, S, 2, 1, DR, SA);
FP_PACK_DP(¤t->thread.fp_regs.fprs[rx].d, DR);
return _fex;
}
/* Load lengthened float to double */
static int emu_ldeb (struct pt_regs *regs, int rx, float *val) {
FP_DECL_S(SA); FP_DECL_D(DR);
FP_DECL_EX;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_SP(SA, val);
FP_CONV (D, S, 2, 1, DR, SA);
FP_PACK_DP(¤t->thread.fp_regs.fprs[rx].d, DR);
return _fex;
}
/* Load negative long double */
static int emu_lnxbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_Q(QA); FP_DECL_Q(QR);
FP_DECL_EX;
mathemu_ldcv cvt;
int mode;
mode = current->thread.fp_regs.fpc & 3;
cvt.w.high = current->thread.fp_regs.fprs[ry].ui;
cvt.w.low = current->thread.fp_regs.fprs[ry+2].ui;
FP_UNPACK_QP(QA, &cvt.ld);
if (QA_s == 0) {
FP_NEG_Q(QR, QA);
FP_PACK_QP(&cvt.ld, QR);
current->thread.fp_regs.fprs[rx].ui = cvt.w.high;
current->thread.fp_regs.fprs[rx+2].ui = cvt.w.low;
} else {
current->thread.fp_regs.fprs[rx].ui =
current->thread.fp_regs.fprs[ry].ui;
current->thread.fp_regs.fprs[rx+2].ui =
current->thread.fp_regs.fprs[ry+2].ui;
}
emu_set_CC_cs(regs, QR_c, QR_s);
return _fex;
}
/* Load negative double */
static int emu_lndbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_D(DA); FP_DECL_D(DR);
FP_DECL_EX;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_DP(DA, ¤t->thread.fp_regs.fprs[ry].d);
if (DA_s == 0) {
FP_NEG_D(DR, DA);
FP_PACK_DP(¤t->thread.fp_regs.fprs[rx].d, DR);
} else
current->thread.fp_regs.fprs[rx].ui =
current->thread.fp_regs.fprs[ry].ui;
emu_set_CC_cs(regs, DR_c, DR_s);
return _fex;
}
/* Load negative float */
static int emu_lnebr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_S(SA); FP_DECL_S(SR);
FP_DECL_EX;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_SP(SA, ¤t->thread.fp_regs.fprs[ry].f);
if (SA_s == 0) {
FP_NEG_S(SR, SA);
FP_PACK_SP(¤t->thread.fp_regs.fprs[rx].f, SR);
} else
current->thread.fp_regs.fprs[rx].ui =
current->thread.fp_regs.fprs[ry].ui;
emu_set_CC_cs(regs, SR_c, SR_s);
return _fex;
}
/* Load positive long double */
static int emu_lpxbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_Q(QA); FP_DECL_Q(QR);
FP_DECL_EX;
mathemu_ldcv cvt;
int mode;
mode = current->thread.fp_regs.fpc & 3;
cvt.w.high = current->thread.fp_regs.fprs[ry].ui;
cvt.w.low = current->thread.fp_regs.fprs[ry+2].ui;
FP_UNPACK_QP(QA, &cvt.ld);
if (QA_s != 0) {
FP_NEG_Q(QR, QA);
FP_PACK_QP(&cvt.ld, QR);
current->thread.fp_regs.fprs[rx].ui = cvt.w.high;
current->thread.fp_regs.fprs[rx+2].ui = cvt.w.low;
} else{
current->thread.fp_regs.fprs[rx].ui =
current->thread.fp_regs.fprs[ry].ui;
current->thread.fp_regs.fprs[rx+2].ui =
current->thread.fp_regs.fprs[ry+2].ui;
}
emu_set_CC_cs(regs, QR_c, QR_s);
return _fex;
}
/* Load positive double */
static int emu_lpdbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_D(DA); FP_DECL_D(DR);
FP_DECL_EX;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_DP(DA, ¤t->thread.fp_regs.fprs[ry].d);
if (DA_s != 0) {
FP_NEG_D(DR, DA);
FP_PACK_DP(¤t->thread.fp_regs.fprs[rx].d, DR);
} else
current->thread.fp_regs.fprs[rx].ui =
current->thread.fp_regs.fprs[ry].ui;
emu_set_CC_cs(regs, DR_c, DR_s);
return _fex;
}
/* Load positive float */
static int emu_lpebr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_S(SA); FP_DECL_S(SR);
FP_DECL_EX;
int mode;
mode = current->thread.fp_regs.fpc & 3;
FP_UNPACK_SP(SA, ¤t->thread.fp_regs.fprs[ry].f);
if (SA_s != 0) {
FP_NEG_S(SR, SA);
FP_PACK_SP(¤t->thread.fp_regs.fprs[rx].f, SR);
} else
current->thread.fp_regs.fprs[rx].ui =
current->thread.fp_regs.fprs[ry].ui;
emu_set_CC_cs(regs, SR_c, SR_s);
return _fex;
}
/* Load rounded long double to double */
static int emu_ldxbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_Q(QA); FP_DECL_D(DR);
FP_DECL_EX;
mathemu_ldcv cvt;
int mode;
mode = current->thread.fp_regs.fpc & 3;
cvt.w.high = current->thread.fp_regs.fprs[ry].ui;
cvt.w.low = current->thread.fp_regs.fprs[ry+2].ui;
FP_UNPACK_QP(QA, &cvt.ld);
FP_CONV (D, Q, 2, 4, DR, QA);
FP_PACK_DP(¤t->thread.fp_regs.fprs[rx].f, DR);
return _fex;
}
/* Load rounded long double to float */
static int emu_lexbr (struct pt_regs *regs, int rx, int ry) {
FP_DECL_Q(QA); FP_DECL_S(SR);