Merge 904c78e into 7131f05

Author: ghost

src/hotspot/cpu/aarch64/aarch64.ad

@@ -1659,6 +1659,11 @@ int MachCallRuntimeNode::ret_addr_offset() {
   }
 }
 
+int MachSafePointNode::ret_addr_offset() {
+  // Size of polling page load
+  return NativeInstruction::instruction_size;
+}
+
 //=============================================================================
 
 #ifndef PRODUCT
@@ -16020,16 +16025,20 @@ instruct cmpFastUnlockLightweight(rFlagsReg cr, iRegP object, iRegP box, iRegPNo
 // TODO
 // provide a near and far version of this code
 
-instruct safePoint(rFlagsReg cr, iRegP poll)
+// Note: MachSafePointNode::ret_addr_offset() should match this encoding.
+// The return would happen to safepoint poll itself, not to polling page load.
+instruct safePoint(rFlagsReg cr)
 %{
-  match(SafePoint poll);
+  match(SafePoint);
   effect(KILL cr);
 
   format %{
-    "ldrw zr, [$poll]\t# Safepoint: poll for GC"
+    "ldr rscratch1, [rthread, #polling_page_offset]\n\t"
+    "ldrw zr, [rscratch1]\t# Safepoint: poll for GC"
   %}
   ins_encode %{
-    __ read_polling_page(as_Register($poll$$reg), relocInfo::poll_type);
+    __ get_polling_page(rscratch1);
+    __ read_polling_page(rscratch1);
   %}
   ins_pipe(pipe_serial); // ins_pipe(iload_reg_mem);
 %}

src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp

@@ -490,10 +490,10 @@ void LIR_Assembler::return_op(LIR_Opr result, C1SafepointPollStub* code_stub) {
 
 int LIR_Assembler::safepoint_poll(LIR_Opr tmp, CodeEmitInfo* info) {
   guarantee(info != nullptr, "Shouldn't be null");
-  __ get_polling_page(rscratch1, relocInfo::poll_type);
+  __ get_polling_page(rscratch1);
   add_debug_info_for_branch(info);  // This isn't just debug info:
                                     // it's the oop map
-  __ read_polling_page(rscratch1, relocInfo::poll_type);
+  __ read_polling_page(rscratch1);
   return __ offset();
 }
 

src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp

@@ -5386,22 +5386,19 @@ void MacroAssembler::bang_stack_size(Register size, Register tmp) {
 }
 
 // Move the address of the polling page into dest.
-void MacroAssembler::get_polling_page(Register dest, relocInfo::relocType rtype) {
+void MacroAssembler::get_polling_page(Register dest) {
   ldr(dest, Address(rthread, JavaThread::polling_page_offset()));
 }
 
 // Read the polling page.  The address of the polling page must
-// already be in r.
-address MacroAssembler::read_polling_page(Register r, relocInfo::relocType rtype) {
-  address mark;
+// already be in addr.
+void MacroAssembler::read_polling_page(Register addr) {
   {
     InstructionMark im(this);
-    code_section()->relocate(inst_mark(), rtype);
-    ldrw(zr, Address(r, 0));
-    mark = inst_mark();
+    code_section()->relocate(inst_mark(), relocInfo::poll_type);
+    ldrw(zr, Address(addr, 0));
   }
   verify_cross_modify_fence_not_required();
-  return mark;
 }
 
 void MacroAssembler::adrp(Register reg1, const Address &dest, uint64_t &byte_offset) {

src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp

@@ -1425,8 +1425,8 @@ class MacroAssembler: public Assembler {
     }
   }
 
-  address read_polling_page(Register r, relocInfo::relocType rtype);
-  void get_polling_page(Register dest, relocInfo::relocType rtype);
+  void read_polling_page(Register addr);
+  void get_polling_page(Register dest);
 
   // CRC32 code for java.util.zip.CRC32::updateBytes() intrinsic.
   void update_byte_crc32(Register crc, Register val, Register table);

src/hotspot/cpu/arm/arm_32.ad

@@ -447,6 +447,11 @@ int MachCallRuntimeNode::ret_addr_offset() {
   bool far = maybe_far_call(this);
   return (far ? 3 : 1) * NativeInstruction::instruction_size;
 }
+
+int MachSafePointNode::ret_addr_offset() {
+  Unimplemented();
+  return 0;
+}
 %}
 
 // The intptr_t operand types, defined by textual substitution.

src/hotspot/cpu/ppc/ppc.ad

@@ -1134,6 +1134,11 @@ int MachCallRuntimeNode::ret_addr_offset() {
   return 4;
 }
 
+int MachSafePointNode::ret_addr_offset() {
+  Unimplemented();
+  return 0;
+}
+
 //=============================================================================
 
 // condition code conversions

src/hotspot/cpu/riscv/riscv.ad

@@ -1277,6 +1277,11 @@ int MachCallRuntimeNode::ret_addr_offset() {
   }
 }
 
+int MachSafePointNode::ret_addr_offset() {
+  Unimplemented();
+  return 0;
+}
+
 //
 // Compute padding required for nodes which need alignment
 //

src/hotspot/cpu/s390/s390.ad

@@ -641,6 +641,11 @@ int MachCallRuntimeNode::ret_addr_offset() {
   return 12 + MacroAssembler::call_far_patchable_ret_addr_offset();
 }
 
+int MachSafePointNode::ret_addr_offset() {
+  Unimplemented();
+  return 0;
+}
+
 // Compute padding required for nodes which need alignment
 //
 // The addresses of the call instructions needs to be 4-byte aligned to

src/hotspot/cpu/x86/x86_32.ad

@@ -315,6 +315,11 @@ int MachCallRuntimeNode::ret_addr_offset() {
   return 5 + pre_call_resets_size() + (_leaf_no_fp ? 0 : sizeof_FFree_Float_Stack_All);
 }
 
+int MachSafePointNode::ret_addr_offset() {
+  Unimplemented();
+  return 0;
+}
+
 //
 // Compute padding required for nodes which need alignment
 //

src/hotspot/cpu/x86/x86_64.ad

@@ -609,6 +609,12 @@ int MachCallRuntimeNode::ret_addr_offset() {
   }
   return offset;
 }
+
+int MachSafePointNode::ret_addr_offset() {
+  // Size of mov rax, [thread, #polling_page_offset]
+  return 4;
+}
+
 //
 // Compute padding required for nodes which need alignment
 //
@@ -12385,18 +12391,21 @@ instruct cmpFastUnlockLightweight(rFlagsReg cr, rRegP object, rax_RegP rax_reg,
 
 // ============================================================================
 // Safepoint Instructions
-instruct safePoint_poll_tls(rFlagsReg cr, rRegP poll)
+// Note: MachSafePointNode::ret_addr_offset() should match this encoding.
+// The return would happen to safepoint poll itself, not to polling page load.
+instruct safePoint_poll_tls(rax_RegP rax_reg, rFlagsReg cr)
 %{
-  match(SafePoint poll);
-  effect(KILL cr, USE poll);
+  match(SafePoint);
+  effect(KILL cr, KILL rax_reg);
 
-  format %{ "testl   rax, [$poll]\t"
-            "# Safepoint: poll for GC" %}
+  format %{ "mov     rax, [thread, #polling_page_offset]\n\t"
+            "testl   rax, [rax]\t# Safepoint: poll for GC" %}
   ins_cost(125);
   ins_encode %{
+    __ movptr(rax, Address(r15_thread, JavaThread::polling_page_offset()));
     __ relocate(relocInfo::poll_type);
     address pre_pc = __ pc();
-    __ testl(rax, Address($poll$$Register, 0));
+    __ testl(rax, Address(rax, 0));
     assert(nativeInstruction_at(pre_pc)->is_safepoint_poll(), "must emit test %%eax [reg]");
   %}
   ins_pipe(ialu_reg_mem);