Skip to content

Commit 7bf4c60

Browse files
author
Hamlin Li
committed
8364120: RISC-V: unify the usage of MacroAssembler::instruction_size
Reviewed-by: fyang
1 parent b7703f7 commit 7bf4c60

File tree

2 files changed

+38
-38
lines changed

2 files changed

+38
-38
lines changed

src/hotspot/cpu/riscv/macroAssembler_riscv.cpp

Lines changed: 21 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -97,52 +97,52 @@ bool MacroAssembler::is_pc_relative_at(address instr) {
9797
// auipc + load
9898
// auipc + fload_load
9999
return (is_auipc_at(instr)) &&
100-
(is_addi_at(instr + instruction_size) ||
101-
is_jalr_at(instr + instruction_size) ||
102-
is_load_at(instr + instruction_size) ||
103-
is_float_load_at(instr + instruction_size)) &&
100+
(is_addi_at(instr + MacroAssembler::instruction_size) ||
101+
is_jalr_at(instr + MacroAssembler::instruction_size) ||
102+
is_load_at(instr + MacroAssembler::instruction_size) ||
103+
is_float_load_at(instr + MacroAssembler::instruction_size)) &&
104104
check_pc_relative_data_dependency(instr);
105105
}
106106

107107
// ie:ld(Rd, Label)
108108
bool MacroAssembler::is_load_pc_relative_at(address instr) {
109109
return is_auipc_at(instr) && // auipc
110-
is_ld_at(instr + instruction_size) && // ld
110+
is_ld_at(instr + MacroAssembler::instruction_size) && // ld
111111
check_load_pc_relative_data_dependency(instr);
112112
}
113113

114114
bool MacroAssembler::is_movptr1_at(address instr) {
115115
return is_lui_at(instr) && // Lui
116-
is_addi_at(instr + instruction_size) && // Addi
117-
is_slli_shift_at(instr + instruction_size * 2, 11) && // Slli Rd, Rs, 11
118-
is_addi_at(instr + instruction_size * 3) && // Addi
119-
is_slli_shift_at(instr + instruction_size * 4, 6) && // Slli Rd, Rs, 6
120-
(is_addi_at(instr + instruction_size * 5) ||
121-
is_jalr_at(instr + instruction_size * 5) ||
122-
is_load_at(instr + instruction_size * 5)) && // Addi/Jalr/Load
116+
is_addi_at(instr + MacroAssembler::instruction_size) && // Addi
117+
is_slli_shift_at(instr + MacroAssembler::instruction_size * 2, 11) && // Slli Rd, Rs, 11
118+
is_addi_at(instr + MacroAssembler::instruction_size * 3) && // Addi
119+
is_slli_shift_at(instr + MacroAssembler::instruction_size * 4, 6) && // Slli Rd, Rs, 6
120+
(is_addi_at(instr + MacroAssembler::instruction_size * 5) ||
121+
is_jalr_at(instr + MacroAssembler::instruction_size * 5) ||
122+
is_load_at(instr + MacroAssembler::instruction_size * 5)) && // Addi/Jalr/Load
123123
check_movptr1_data_dependency(instr);
124124
}
125125

126126
bool MacroAssembler::is_movptr2_at(address instr) {
127127
return is_lui_at(instr) && // lui
128-
is_lui_at(instr + instruction_size) && // lui
129-
is_slli_shift_at(instr + instruction_size * 2, 18) && // slli Rd, Rs, 18
130-
is_add_at(instr + instruction_size * 3) &&
131-
(is_addi_at(instr + instruction_size * 4) ||
132-
is_jalr_at(instr + instruction_size * 4) ||
133-
is_load_at(instr + instruction_size * 4)) && // Addi/Jalr/Load
128+
is_lui_at(instr + MacroAssembler::instruction_size) && // lui
129+
is_slli_shift_at(instr + MacroAssembler::instruction_size * 2, 18) && // slli Rd, Rs, 18
130+
is_add_at(instr + MacroAssembler::instruction_size * 3) &&
131+
(is_addi_at(instr + MacroAssembler::instruction_size * 4) ||
132+
is_jalr_at(instr + MacroAssembler::instruction_size * 4) ||
133+
is_load_at(instr + MacroAssembler::instruction_size * 4)) && // Addi/Jalr/Load
134134
check_movptr2_data_dependency(instr);
135135
}
136136

137137
bool MacroAssembler::is_li16u_at(address instr) {
138138
return is_lui_at(instr) && // lui
139-
is_srli_at(instr + instruction_size) && // srli
139+
is_srli_at(instr + MacroAssembler::instruction_size) && // srli
140140
check_li16u_data_dependency(instr);
141141
}
142142

143143
bool MacroAssembler::is_li32_at(address instr) {
144144
return is_lui_at(instr) && // lui
145-
is_addiw_at(instr + instruction_size) && // addiw
145+
is_addiw_at(instr + MacroAssembler::instruction_size) && // addiw
146146
check_li32_data_dependency(instr);
147147
}
148148

@@ -5110,7 +5110,7 @@ address MacroAssembler::emit_reloc_call_address_stub(int insts_call_instruction_
51105110

51115111
int MacroAssembler::max_reloc_call_address_stub_size() {
51125112
// Max stub size: alignment nop, target address.
5113-
return 1 * instruction_size + wordSize;
5113+
return 1 * MacroAssembler::instruction_size + wordSize;
51145114
}
51155115

51165116
int MacroAssembler::static_call_stub_size() {

src/hotspot/cpu/riscv/macroAssembler_riscv.hpp

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1240,7 +1240,7 @@ class MacroAssembler: public Assembler {
12401240
void far_jump(const Address &entry, Register tmp = t1);
12411241

12421242
static int far_branch_size() {
1243-
return 2 * 4; // auipc + jalr, see far_call() & far_jump()
1243+
return 2 * MacroAssembler::instruction_size; // auipc + jalr, see far_call() & far_jump()
12441244
}
12451245

12461246
void load_byte_map_base(Register reg);
@@ -1644,9 +1644,9 @@ class MacroAssembler: public Assembler {
16441644
public:
16451645
enum {
16461646
// movptr
1647-
movptr1_instruction_size = 6 * instruction_size, // lui, addi, slli, addi, slli, addi. See movptr1().
1648-
movptr2_instruction_size = 5 * instruction_size, // lui, lui, slli, add, addi. See movptr2().
1649-
load_pc_relative_instruction_size = 2 * instruction_size // auipc, ld
1647+
movptr1_instruction_size = 6 * MacroAssembler::instruction_size, // lui, addi, slli, addi, slli, addi. See movptr1().
1648+
movptr2_instruction_size = 5 * MacroAssembler::instruction_size, // lui, lui, slli, add, addi. See movptr2().
1649+
load_pc_relative_instruction_size = 2 * MacroAssembler::instruction_size // auipc, ld
16501650
};
16511651

16521652
static bool is_load_pc_relative_at(address branch);
@@ -1701,11 +1701,11 @@ class MacroAssembler: public Assembler {
17011701
// addi/jalr/load
17021702
static bool check_movptr1_data_dependency(address instr) {
17031703
address lui = instr;
1704-
address addi1 = lui + instruction_size;
1705-
address slli1 = addi1 + instruction_size;
1706-
address addi2 = slli1 + instruction_size;
1707-
address slli2 = addi2 + instruction_size;
1708-
address last_instr = slli2 + instruction_size;
1704+
address addi1 = lui + MacroAssembler::instruction_size;
1705+
address slli1 = addi1 + MacroAssembler::instruction_size;
1706+
address addi2 = slli1 + MacroAssembler::instruction_size;
1707+
address slli2 = addi2 + MacroAssembler::instruction_size;
1708+
address last_instr = slli2 + MacroAssembler::instruction_size;
17091709
return extract_rs1(addi1) == extract_rd(lui) &&
17101710
extract_rs1(addi1) == extract_rd(addi1) &&
17111711
extract_rs1(slli1) == extract_rd(addi1) &&
@@ -1725,10 +1725,10 @@ class MacroAssembler: public Assembler {
17251725
// addi/jalr/load
17261726
static bool check_movptr2_data_dependency(address instr) {
17271727
address lui1 = instr;
1728-
address lui2 = lui1 + instruction_size;
1729-
address slli = lui2 + instruction_size;
1730-
address add = slli + instruction_size;
1731-
address last_instr = add + instruction_size;
1728+
address lui2 = lui1 + MacroAssembler::instruction_size;
1729+
address slli = lui2 + MacroAssembler::instruction_size;
1730+
address add = slli + MacroAssembler::instruction_size;
1731+
address last_instr = add + MacroAssembler::instruction_size;
17321732
return extract_rd(add) == extract_rd(lui2) &&
17331733
extract_rs1(add) == extract_rd(lui2) &&
17341734
extract_rs2(add) == extract_rd(slli) &&
@@ -1742,7 +1742,7 @@ class MacroAssembler: public Assembler {
17421742
// srli
17431743
static bool check_li16u_data_dependency(address instr) {
17441744
address lui = instr;
1745-
address srli = lui + instruction_size;
1745+
address srli = lui + MacroAssembler::instruction_size;
17461746

17471747
return extract_rs1(srli) == extract_rd(lui) &&
17481748
extract_rs1(srli) == extract_rd(srli);
@@ -1753,7 +1753,7 @@ class MacroAssembler: public Assembler {
17531753
// addiw
17541754
static bool check_li32_data_dependency(address instr) {
17551755
address lui = instr;
1756-
address addiw = lui + instruction_size;
1756+
address addiw = lui + MacroAssembler::instruction_size;
17571757

17581758
return extract_rs1(addiw) == extract_rd(lui) &&
17591759
extract_rs1(addiw) == extract_rd(addiw);
@@ -1764,7 +1764,7 @@ class MacroAssembler: public Assembler {
17641764
// jalr/addi/load/float_load
17651765
static bool check_pc_relative_data_dependency(address instr) {
17661766
address auipc = instr;
1767-
address last_instr = auipc + instruction_size;
1767+
address last_instr = auipc + MacroAssembler::instruction_size;
17681768

17691769
return extract_rs1(last_instr) == extract_rd(auipc);
17701770
}
@@ -1774,7 +1774,7 @@ class MacroAssembler: public Assembler {
17741774
// load
17751775
static bool check_load_pc_relative_data_dependency(address instr) {
17761776
address auipc = instr;
1777-
address load = auipc + instruction_size;
1777+
address load = auipc + MacroAssembler::instruction_size;
17781778

17791779
return extract_rd(load) == extract_rd(auipc) &&
17801780
extract_rs1(load) == extract_rd(load);

0 commit comments

Comments
 (0)