@@ -47,12 +47,25 @@ public class CPUInfoTest {
4747
4848 static {
4949 if (Platform .isX86 () || Platform .isX64 ()) {
50+ // @formatter:off
51+ // Checkstyle: stop
52+ // See hotspot/cpu/x86/vm_version_x86.hpp for the list of supported features.
5053 wellKnownCPUFeatures = Set .of (
51- "adx" , "aes" , "bmi1" , "bmi2" , "cmov" , "cx8" , "fxsr" , "mmx" , "clmul" , "clflush" , "clflushopt" , "clwb" ,
52- "sha" , "fma" , "popcnt" , "vzeroupper" , "erms" , "rtm" , "mmxext" , "3dnowpref" , "lzcnt" , "ht" ,
53- "tsc" , "tscinvbit" , "tscinv" , "sse" , "sse2" , "sse3" , "ssse3" , "sse4.1" , "sse4.2" , "sse4a" , "avx" , "avx2" ,
54- "avx512f" , "avx512dq" , "avx512pf" , "avx512er" , "avx512cd" , "avx512bw" , "avx512vl" ,
55- "avx512_vpopcntdq" , "avx512_vpclmulqdq" , "avx512_vbmi2" , "avx512_vaes" , "avx512_vnni" );
54+ "cx8" , "cmov" , "fxsr" , "ht" ,
55+ "mmx" , "3dnowpref" , "sse" , "sse2" ,
56+ "sse3" , "ssse3" , "sse4a" , "sse4.1" ,
57+ "sse4.2" , "popcnt" , "lzcnt" , "tsc" ,
58+ "tscinvbit" , "tscinv" , "avx" , "avx2" ,
59+ "aes" , "erms" , "clmul" , "bmi1" ,
60+ "bmi2" , "rtm" , "adx" , "avx512f" ,
61+ "avx512dq" , "avx512pf" , "avx512er" , "avx512cd" ,
62+ "avx512bw" , "avx512vl" , "sha" , "fma" ,
63+ "vzeroupper" , "avx512_vpopcntdq" , "avx512_vpclmulqdq" , "avx512_vaes" ,
64+ "avx512_vnni" , "clflush" , "clflushopt" , "clwb" ,
65+ "avx512_vmbi2" , "avx512_vmbi" , "hv"
66+ );
67+ // @formatter:on
68+ // Checkstyle: resume
5669 } else {
5770 wellKnownCPUFeatures = null ;
5871 }
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