@@ -1420,17 +1420,31 @@ class RepresentationSelector {
14201420 return jsgraph_->simplified ();
14211421 }
14221422
1423- void LowerToCheckedInt32Mul (Node* node, Truncation truncation,
1424- Type input0_type, Type input1_type) {
1425- // If one of the inputs is positive and/or truncation is being applied,
1426- // there is no need to return -0.
1427- CheckForMinusZeroMode mz_mode =
1428- truncation.IdentifiesZeroAndMinusZero () ||
1429- IsSomePositiveOrderedNumber (input0_type) ||
1430- IsSomePositiveOrderedNumber (input1_type)
1431- ? CheckForMinusZeroMode::kDontCheckForMinusZero
1432- : CheckForMinusZeroMode::kCheckForMinusZero ;
1433- ChangeOp (node, simplified ()->CheckedInt32Mul (mz_mode));
1423+ template <Phase T>
1424+ void VisitForCheckedInt32Mul (Node* node, Truncation truncation,
1425+ Type input0_type, Type input1_type,
1426+ UseInfo input_use) {
1427+ DCHECK_EQ (node->opcode (), IrOpcode::kSpeculativeNumberMultiply );
1428+ // A -0 input is impossible or will cause a deopt.
1429+ DCHECK (BothInputsAre (node, Type::Signed32 ()) ||
1430+ !input_use.truncation ().IdentifiesZeroAndMinusZero ());
1431+
1432+ CheckForMinusZeroMode mz_mode;
1433+ Type restriction;
1434+ if (IsSomePositiveOrderedNumber (input0_type) ||
1435+ IsSomePositiveOrderedNumber (input1_type)) {
1436+ mz_mode = CheckForMinusZeroMode::kDontCheckForMinusZero ;
1437+ restriction = Type::Signed32 ();
1438+ } else if (truncation.IdentifiesZeroAndMinusZero ()) {
1439+ mz_mode = CheckForMinusZeroMode::kDontCheckForMinusZero ;
1440+ restriction = Type::Signed32OrMinusZero ();
1441+ } else {
1442+ mz_mode = CheckForMinusZeroMode::kCheckForMinusZero ;
1443+ restriction = Type::Signed32 ();
1444+ }
1445+
1446+ VisitBinop<T>(node, input_use, MachineRepresentation::kWord32 , restriction);
1447+ if (lower<T>()) ChangeOp (node, simplified ()->CheckedInt32Mul (mz_mode));
14341448 }
14351449
14361450 void ChangeToInt32OverflowOp (Node* node) {
@@ -1618,12 +1632,22 @@ class RepresentationSelector {
16181632 VisitBinop<T>(node, lhs_use, rhs_use, MachineRepresentation::kWord32 );
16191633 if (lower<T>()) DeferReplacement (node, lowering->Int32Mod (node));
16201634 } else if (BothInputsAre (node, Type::Unsigned32OrMinusZeroOrNaN ())) {
1635+ Type const restriction =
1636+ truncation.IdentifiesZeroAndMinusZero () &&
1637+ TypeOf (node->InputAt (0 )).Maybe (Type::MinusZero ())
1638+ ? Type::Unsigned32OrMinusZero ()
1639+ : Type::Unsigned32 ();
16211640 VisitBinop<T>(node, lhs_use, rhs_use, MachineRepresentation::kWord32 ,
1622- Type::Unsigned32 () );
1641+ restriction );
16231642 if (lower<T>()) ChangeToUint32OverflowOp (node);
16241643 } else {
1644+ Type const restriction =
1645+ truncation.IdentifiesZeroAndMinusZero () &&
1646+ TypeOf (node->InputAt (0 )).Maybe (Type::MinusZero ())
1647+ ? Type::Signed32OrMinusZero ()
1648+ : Type::Signed32 ();
16251649 VisitBinop<T>(node, lhs_use, rhs_use, MachineRepresentation::kWord32 ,
1626- Type::Signed32 () );
1650+ restriction );
16271651 if (lower<T>()) ChangeToInt32OverflowOp (node);
16281652 }
16291653 return ;
@@ -2254,22 +2278,16 @@ class RepresentationSelector {
22542278 if (BothInputsAre (node, Type::Signed32 ())) {
22552279 // If both inputs and feedback are int32, use the overflow op.
22562280 if (hint == NumberOperationHint::kSignedSmall ) {
2257- VisitBinop<T>(node, UseInfo::TruncatingWord32 (),
2258- MachineRepresentation::kWord32 , Type::Signed32 ());
2259- if (lower<T>()) {
2260- LowerToCheckedInt32Mul (node, truncation, input0_type,
2261- input1_type);
2262- }
2281+ VisitForCheckedInt32Mul<T>(node, truncation, input0_type,
2282+ input1_type,
2283+ UseInfo::TruncatingWord32 ());
22632284 return ;
22642285 }
22652286 }
22662287
22672288 if (hint == NumberOperationHint::kSignedSmall ) {
2268- VisitBinop<T>(node, CheckedUseInfoAsWord32FromHint (hint),
2269- MachineRepresentation::kWord32 , Type::Signed32 ());
2270- if (lower<T>()) {
2271- LowerToCheckedInt32Mul (node, truncation, input0_type, input1_type);
2272- }
2289+ VisitForCheckedInt32Mul<T>(node, truncation, input0_type, input1_type,
2290+ CheckedUseInfoAsWord32FromHint (hint));
22732291 return ;
22742292 }
22752293
@@ -4002,7 +4020,6 @@ template <>
40024020void RepresentationSelector::SetOutput<RETYPE>(
40034021 Node* node, MachineRepresentation representation, Type restriction_type) {
40044022 NodeInfo* const info = GetInfo (node);
4005- DCHECK (info->restriction_type ().Is (restriction_type));
40064023 DCHECK (restriction_type.Is (info->restriction_type ()));
40074024 info->set_output (representation);
40084025}
@@ -4012,7 +4029,6 @@ void RepresentationSelector::SetOutput<LOWER>(
40124029 Node* node, MachineRepresentation representation, Type restriction_type) {
40134030 NodeInfo* const info = GetInfo (node);
40144031 DCHECK_EQ (info->representation (), representation);
4015- DCHECK (info->restriction_type ().Is (restriction_type));
40164032 DCHECK (restriction_type.Is (info->restriction_type ()));
40174033 USE (info);
40184034}
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