I am an automation enthusiast working with many projects related to Robotics and AI. A graduate from π¨βπ» Aalto University, pursuing a Masters degree in Autonomous Systems. I work as a Robotics Engineer, specializaing in Localization & Navigation. I am also an enthusiast for embedded tech related hardware projects.
Interests: Autonomuous Vehicles, Space Robotics, Aerospace, Infrastructure Automation, Logistics Robots.
*Some repositories are currently Private. (They will be Open Sourced soon).
Connected Vehicle Platooning [Github*]
- ROS packages for robot communication and multi robot controllers for predecessor following vehicle platoons.
- Analysis of stability of semi-autonomous platoons.
- Algorithms for tracking an autonomous robot by using sensor data from the IMU and camera system.
- OpenCV & Tensorflow with YOLOv3 for processing camera images to detect objects, lanes & traffic signs.
- Custom-designed path-planning algorithm for road navigation. Implemented using ROS framework and MORSE simulator.
Driverless Formula Race Car - Mapping System [Website]
- Computer-vision algorithms for cone detection and mapping system with OpenCV & Tensorflow for FaSTTUBe TU Berlin's Formula Student Driverless Vehicle Team.
Lunar Rover - Electrical System Design [Github*]
- Lunar Rover prototype design with navigation and telemetry.
- Indoor localization system for a UAV to navigate inside industrial chimneys for structural inspection.
- Localisation system used Arduino with ultrasonic rangefinders, LiDAR and image processing on OpenCV.
- AI & Robotics Systems Project
AI Agent for Pong [Github*]
- Agent for playing the Pong game using the OpenAI gym and PyTorch frameworks.
- Model training with CNN-based image processing using Advantage Actor-Critic(A2C) with Proximal Policy Optimization (PPO) methodology.
- Predict forest cover type using cartographic data and a variety of machine learning classification algorithms like KNN, Naive Bayes, etc.
Processor Designing & Implementation on FPGA [Github]
- Design of two processors: a single bus 8-bit processor and a 4-stage 8-bit pipeline processor design.
- Design validated using Verilog on a Xilinx Artix 7 Nexys 4 FPGAs.
RISC-V Instruction Disassembler [Github]
- Disassembly tool for RISC-V Architecture
- DSP adaptive noise cancellation filter on the Xilinx Artix 7 Nexys 4 FPGA kit by interfacing with MATLAB via FPGA in the loop (FIL).
Wireless Electromyograph [Video]
- Portable electromyograph with wireless data collection and monitoring system over Bluetooth using AtMega microcontrollers.
- Remote data sampler & MATLAB GUI app.