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Commit 5ee6736

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Lars T Hansen
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Bug 1669938 - Promote pseudo-min/max wasm SIMD instructions to accepted status. r=jseward
Background: WebAssembly/simd#122 For all the pseudo-min/max SIMD instructions: - remove the internal 'Experimental' opcode suffix in the C++ code - remove the guard on experimental Wasm instructions in all the C++ decoders - move the test cases from simd/experimental.js to simd/ad-hack.js I have checked that current V8 and wasm-tools use the same opcode mappings. V8 in turn guarantees the correct mapping for LLVM and binaryen. Differential Revision: https://phabricator.services.mozilla.com/D92928
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+32
-69
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9 files changed

+32
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‎js/src/jit-test/tests/wasm/simd/ad-hack.js

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -588,6 +588,9 @@ function min_u(bits) {
588588
}
589589
}
590590

591+
function pmin(x, y) { return y < x ? y : x }
592+
function pmax(x, y) { return x < y ? y : x }
593+
591594
assertEq(max_s(8)(1, 2), 2);
592595
assertEq(max_s(8)(1, 128), 1);
593596
assertEq(min_s(8)(1, 2), 1);
@@ -689,6 +692,10 @@ for ( let [op, memtype, rop, resultmemtype] of
689692
['f64x2.gt', Float64Array, gt(-1), BigInt64Array],
690693
['f64x2.le', Float64Array, le(-1), BigInt64Array],
691694
['f64x2.ge', Float64Array, ge(-1), BigInt64Array],
695+
['f32x4.pmin', Float32Array, pmin],
696+
['f32x4.pmax', Float32Array, pmax],
697+
['f64x2.pmin', Float64Array, pmin],
698+
['f64x2.pmax', Float64Array, pmax],
692699
])
693700
{
694701
let [ins, mem, resultmem] = insAndMemBinop(op, memtype, resultmemtype);

‎js/src/jit-test/tests/wasm/simd/experimental.js

Lines changed: 0 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -50,9 +50,6 @@ function iota(len) {
5050
return xs;
5151
}
5252

53-
function pmin(x, y) { return y < x ? y : x }
54-
function pmax(x, y) { return x < y ? y : x }
55-
5653
const v2vSig = {args:[], ret:VoidCode};
5754

5855
function V128Load(addr) {
@@ -66,39 +63,6 @@ function V128StoreExpr(addr, v) {
6663
SimdPrefix, V128StoreCode, 4, varU32(0)];
6764
}
6865

69-
// Pseudo-min/max, https://github.com/WebAssembly/simd/pull/122
70-
var fxs = [5, 1, -4, NaN];
71-
var fys = [6, 0, -7, 3];
72-
var dxs = [5, NaN];
73-
var dys = [6, 0];
74-
75-
for ( let [opcode, xs, ys, operator] of [[F32x4PMinCode, fxs, fys, pmin],
76-
[F32x4PMaxCode, fxs, fys, pmax],
77-
[F64x2PMinCode, dxs, dys, pmin],
78-
[F64x2PMaxCode, dxs, dys, pmax]] ) {
79-
var k = xs.length;
80-
var ans = iota(k).map((i) => operator(xs[i], ys[i]))
81-
82-
var ins = wasmEval(moduleWithSections([
83-
sigSection([v2vSig]),
84-
declSection([0]),
85-
memorySection(1),
86-
exportSection([{funcIndex: 0, name: "run"},
87-
{memIndex: 0, name: "mem"}]),
88-
bodySection([
89-
funcBody({locals:[],
90-
body: [...V128StoreExpr(0, [...V128Load(16),
91-
...V128Load(32),
92-
SimdPrefix, varU32(opcode)])]})])]));
93-
94-
var mem = new (k == 4 ? Float32Array : Float64Array)(ins.exports.mem.buffer);
95-
set(mem, k, xs);
96-
set(mem, 2*k, ys);
97-
ins.exports.run();
98-
var result = get(mem, 0, k);
99-
assertSame(result, ans);
100-
}
101-
10266
// Widening integer dot product, https://github.com/WebAssembly/simd/pull/127
10367

10468
var ins = wasmEval(moduleWithSections([

‎js/src/jit/MacroAssembler.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2653,8 +2653,7 @@ class MacroAssembler : public MacroAssemblerSpecific {
26532653
inline void unsignedWidenLowInt32x4(FloatRegister src, FloatRegister dest)
26542654
DEFINED_ON(x86_shared, arm64);
26552655

2656-
// Compare-based minimum/maximum (experimental as of August, 2020)
2657-
// https://github.com/WebAssembly/simd/pull/122
2656+
// Compare-based minimum/maximum
26582657

26592658
inline void pseudoMinFloat32x4(FloatRegister rhs, FloatRegister lhsDest)
26602659
DEFINED_ON(x86_shared, arm64);

‎js/src/jit/x86-shared/CodeGenerator-x86-shared.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2594,16 +2594,16 @@ void CodeGenerator::visitWasmBinarySimd128(LWasmBinarySimd128* ins) {
25942594
case wasm::SimdOp::F64x2Ge:
25952595
masm.compareFloat64x2(Assembler::GreaterThanOrEqual, rhs, lhsDest);
25962596
break;
2597-
case wasm::SimdOp::F32x4PMaxExperimental:
2597+
case wasm::SimdOp::F32x4PMax:
25982598
masm.pseudoMaxFloat32x4(rhs, lhsDest);
25992599
break;
2600-
case wasm::SimdOp::F32x4PMinExperimental:
2600+
case wasm::SimdOp::F32x4PMin:
26012601
masm.pseudoMinFloat32x4(rhs, lhsDest);
26022602
break;
2603-
case wasm::SimdOp::F64x2PMaxExperimental:
2603+
case wasm::SimdOp::F64x2PMax:
26042604
masm.pseudoMaxFloat64x2(rhs, lhsDest);
26052605
break;
2606-
case wasm::SimdOp::F64x2PMinExperimental:
2606+
case wasm::SimdOp::F64x2PMin:
26072607
masm.pseudoMinFloat64x2(rhs, lhsDest);
26082608
break;
26092609
case wasm::SimdOp::I32x4DotSI16x8Experimental:

‎js/src/wasm/WasmBaselineCompile.cpp

Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -14970,17 +14970,13 @@ bool BaseCompiler::emitBody() {
1497014970
CHECK_NEXT(dispatchVectorBinary(NarrowUI32x4));
1497114971
case uint32_t(SimdOp::V8x16Swizzle):
1497214972
CHECK_NEXT(dispatchVectorBinary(Swizzle));
14973-
case uint32_t(SimdOp::F32x4PMaxExperimental):
14974-
CHECK_SIMD_EXPERIMENTAL();
14973+
case uint32_t(SimdOp::F32x4PMax):
1497514974
CHECK_NEXT(dispatchVectorBinary(PMaxF32x4));
14976-
case uint32_t(SimdOp::F32x4PMinExperimental):
14977-
CHECK_SIMD_EXPERIMENTAL();
14975+
case uint32_t(SimdOp::F32x4PMin):
1497814976
CHECK_NEXT(dispatchVectorBinary(PMinF32x4));
14979-
case uint32_t(SimdOp::F64x2PMaxExperimental):
14980-
CHECK_SIMD_EXPERIMENTAL();
14977+
case uint32_t(SimdOp::F64x2PMax):
1498114978
CHECK_NEXT(dispatchVectorBinary(PMaxF64x2));
14982-
case uint32_t(SimdOp::F64x2PMinExperimental):
14983-
CHECK_SIMD_EXPERIMENTAL();
14979+
case uint32_t(SimdOp::F64x2PMin):
1498414980
CHECK_NEXT(dispatchVectorBinary(PMinF64x2));
1498514981
case uint32_t(SimdOp::I32x4DotSI16x8Experimental):
1498614982
CHECK_SIMD_EXPERIMENTAL();

‎js/src/wasm/WasmConstants.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -660,8 +660,8 @@ enum class SimdOp {
660660
F32x4Div = 0xe7,
661661
F32x4Min = 0xe8,
662662
F32x4Max = 0xe9,
663-
F32x4PMinExperimental = 0xea,
664-
F32x4PMaxExperimental = 0xeb,
663+
F32x4PMin = 0xea,
664+
F32x4PMax = 0xeb,
665665
F64x2Abs = 0xec,
666666
F64x2Neg = 0xed,
667667
// Round = 0xee
@@ -672,8 +672,8 @@ enum class SimdOp {
672672
F64x2Div = 0xf3,
673673
F64x2Min = 0xf4,
674674
F64x2Max = 0xf5,
675-
F64x2PMinExperimental = 0xf6,
676-
F64x2PMaxExperimental = 0xf7,
675+
F64x2PMin = 0xf6,
676+
F64x2PMax = 0xf7,
677677
I32x4TruncSSatF32x4 = 0xf8,
678678
I32x4TruncUSatF32x4 = 0xf9,
679679
F32x4ConvertSI32x4 = 0xfa,

‎js/src/wasm/WasmIonCompile.cpp

Lines changed: 4 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -4905,13 +4905,10 @@ static bool EmitBodyExprs(FunctionCompiler& f) {
49054905
case uint32_t(SimdOp::F64x2Le):
49064906
case uint32_t(SimdOp::F64x2Ge):
49074907
case uint32_t(SimdOp::V8x16Swizzle):
4908-
CHECK(
4909-
EmitBinarySimd128(f, /* commutative= */ false, SimdOp(op.b1)));
4910-
case uint32_t(SimdOp::F32x4PMaxExperimental):
4911-
case uint32_t(SimdOp::F32x4PMinExperimental):
4912-
case uint32_t(SimdOp::F64x2PMaxExperimental):
4913-
case uint32_t(SimdOp::F64x2PMinExperimental):
4914-
CHECK_SIMD_EXPERIMENTAL();
4908+
case uint32_t(SimdOp::F32x4PMax):
4909+
case uint32_t(SimdOp::F32x4PMin):
4910+
case uint32_t(SimdOp::F64x2PMax):
4911+
case uint32_t(SimdOp::F64x2PMin):
49154912
CHECK(
49164913
EmitBinarySimd128(f, /* commutative= */ false, SimdOp(op.b1)));
49174914
case uint32_t(SimdOp::I8x16Splat):

‎js/src/wasm/WasmOpIter.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -430,10 +430,10 @@ OpKind wasm::Classify(OpBytes op) {
430430
case SimdOp::I16x8NarrowSI32x4:
431431
case SimdOp::I16x8NarrowUI32x4:
432432
case SimdOp::V8x16Swizzle:
433-
case SimdOp::F32x4PMinExperimental:
434-
case SimdOp::F32x4PMaxExperimental:
435-
case SimdOp::F64x2PMinExperimental:
436-
case SimdOp::F64x2PMaxExperimental:
433+
case SimdOp::F32x4PMin:
434+
case SimdOp::F32x4PMax:
435+
case SimdOp::F64x2PMin:
436+
case SimdOp::F64x2PMax:
437437
case SimdOp::I32x4DotSI16x8Experimental:
438438
WASM_SIMD_OP(OpKind::Binary);
439439
case SimdOp::I8x16Neg:

‎js/src/wasm/WasmValidate.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1052,12 +1052,12 @@ static bool DecodeFunctionBodyExprs(const ModuleEnvironment& env,
10521052
case uint32_t(SimdOp::I16x8NarrowSI32x4):
10531053
case uint32_t(SimdOp::I16x8NarrowUI32x4):
10541054
case uint32_t(SimdOp::V8x16Swizzle):
1055+
case uint32_t(SimdOp::F32x4PMax):
1056+
case uint32_t(SimdOp::F32x4PMin):
1057+
case uint32_t(SimdOp::F64x2PMax):
1058+
case uint32_t(SimdOp::F64x2PMin):
10551059
CHECK(iter.readBinary(ValType::V128, &nothing, &nothing));
10561060

1057-
case uint32_t(SimdOp::F32x4PMaxExperimental):
1058-
case uint32_t(SimdOp::F32x4PMinExperimental):
1059-
case uint32_t(SimdOp::F64x2PMaxExperimental):
1060-
case uint32_t(SimdOp::F64x2PMinExperimental):
10611061
case uint32_t(SimdOp::I32x4DotSI16x8Experimental):
10621062
CHECK_SIMD_EXPERIMENTAL();
10631063
CHECK(iter.readBinary(ValType::V128, &nothing, &nothing));

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