-
π¨βπ» All of my projects are available at https://github.com/moinijaz
-
π¬ Ask me about Verilog, SystemVerilog, Python Scripting
-
π« How to reach me moin.ijaz9@gmail.com
Popular repositories Loading
-
FPGA_PRIMITIVES_MODELS
FPGA_PRIMITIVES_MODELS PublicForked from os-fpga/FPGA_PRIMITIVES_MODELS
Verilog 1
-
-
-
yosys-rs-plugin
yosys-rs-plugin PublicForked from os-fpga/yosys-rs-plugin
Rapidsilicon's Yosys Plugin
Verilog
-
-
Something went wrong, please refresh the page to try again.
If the problem persists, check the GitHub status page or contact support.
If the problem persists, check the GitHub status page or contact support.