@@ -79,26 +79,28 @@ datatype operand =
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| Address of address
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- fun zpRead16 addr =
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- Word16.orb (w8ToW16 (rd (wram, addr)), Word16.<< (w8ToW16 (rd (wram, ( addr+0wx1) mod 0wx100 )), 0wx8))
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+ fun samePageRead16 addr =
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+ Word16.orb (w8ToW16 (rd (wram, addr)), Word16.<< (w8ToW16 (rd (wram, Word16.orb (Word16.andb ( addr, 0wxff00), (addr +0wx1) mod 0wx100) )), 0wx8))
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exception InvaildAccess
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(* val address : registers * address -> word16 *)
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fun address (regs, ZeroPage x) = w8ToW16 x
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| address (regs, Absolute x) = x
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- | address (regs, Relative x) = (#PC regs) + w8ToW16 x
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- | address (regs, Indirect x) = read16 x(* w8ToW16 (read x) *)
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+ | address (regs, Relative x) = (#PC regs) + w8ToW16 x - (if x >= 0w128 then 0w256
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+ else 0w0)
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+ | address (regs, Indirect x) = samePageRead16 x
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| address (regs, ZeroPageIndexedX x) = ((w8ToW16 x) + w8ToW16 (#X regs)) mod 0wx100
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| address (regs, ZeroPageIndexedY x) = ((w8ToW16 x) + w8ToW16 (#Y regs)) mod 0wx100
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| address (regs, AbsoluteIndexedX x) = x + w8ToW16 (#X regs)
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| address (regs, AbsoluteIndexedY x) = x + w8ToW16 (#Y regs)
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- | address (regs, IndexedIndirect x) = zpRead16 ((w8ToW16 x + w8ToW16 (#X regs)) mod 0wx100)
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- | address (regs, IndirectIndexed x) = (zpRead16 (w8ToW16 x)) + w8ToW16 (#Y regs)
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+ | address (regs, IndexedIndirect x) = samePageRead16 ((w8ToW16 x + w8ToW16 (#X regs)) mod 0wx100)
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+ | address (regs, IndirectIndexed x) = (samePageRead16 (w8ToW16 x)) + w8ToW16 (#Y regs)
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| address _ = raise InvaildAccess
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fun value (regs, Immediate x) = x
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| value (regs, Address a) = read (address (regs, a))
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+
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(* valueしたいかどうか *)
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datatype instruction =
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ADC of operand
@@ -134,7 +136,7 @@ datatype instruction =
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| LDX of operand
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| LDY of operand
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| LSR of operand
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- | NOP of address
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+ | NOP of operand
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| ORA of operand
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| PHA of address
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| PHP of address
@@ -401,7 +403,7 @@ fun fetchAndDecode (pc: word16): instruction * word16 =
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| 0wxE6 => (INC (Address (zp ())), pc + 0w2)
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| 0wxE8 => (INX Implied, pc + 0w1)
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| 0wxE9 => (SBC (imm ()), pc + 0w2)
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- | 0wxEA => (NOP Implied, pc + 0w1)
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+ | 0wxEA => (NOP (Address Implied) , pc + 0w1)
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| 0wxEC => (CPX (Address (abs ())), pc + 0w3)
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| 0wxED => (SBC (Address (abs ())), pc + 0w3)
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| 0wxEE => (INC (Address (abs ())), pc + 0w3)
@@ -412,7 +414,31 @@ fun fetchAndDecode (pc: word16): instruction * word16 =
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| 0wxF8 => (SED Implied, pc + 0w1)
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| 0wxF9 => (SBC (Address (aby ())), pc + 0w3)
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| 0wxFD => (SBC (Address (abx ())), pc + 0w3)
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- | 0wxFE => (INC (Address (abx ())), pc + 0w3)
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+ | 0wxFE => (INC (Address (abx ())), pc + 0w3)
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+ (* some illegal opcodes for an test *)
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+ | 0wx04 => (NOP (Address (zp())), pc + 0w2)
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+ | 0wx44 => (NOP (Address (zp())), pc + 0w2)
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+ | 0wx64 => (NOP (Address (zp())), pc + 0w2)
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+ | 0wx0C => (NOP (Address (abs())), pc + 0w3)
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+ | 0wx14 => (NOP (Address (zpx())), pc + 0w2)
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+ | 0wx34 => (NOP (Address (zpx())), pc + 0w2)
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+ | 0wx54 => (NOP (Address (zpx())), pc + 0w2)
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+ | 0wx74 => (NOP (Address (zpx())), pc + 0w2)
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+ | 0wxD4 => (NOP (Address (zpx())), pc + 0w2)
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+ | 0wxF4 => (NOP (Address (zpx())), pc + 0w2)
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+ | 0wx1A => (NOP (Address Implied), pc + 0w1)
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+ | 0wx3A => (NOP (Address Implied), pc + 0w1)
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+ | 0wx5A => (NOP (Address Implied), pc + 0w1)
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+ | 0wx7A => (NOP (Address Implied), pc + 0w1)
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+ | 0wxDA => (NOP (Address Implied), pc + 0w1)
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+ | 0wxFA => (NOP (Address Implied), pc + 0w1)
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+ | 0wx80 => (NOP (imm ()), pc + 0w2)
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+ | 0wx1C => (NOP (Address (abx ())), pc + 0w3)
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+ | 0wx3C => (NOP (Address (abx ())), pc + 0w3)
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+ | 0wx5C => (NOP (Address (abx ())), pc + 0w3)
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+ | 0wx7C => (NOP (Address (abx ())), pc + 0w3)
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+ | 0wxDC => (NOP (Address (abx ())), pc + 0w3)
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+ | 0wxFC => (NOP (Address (abx ())), pc + 0w3)
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| _ => (print (Word16.toString pc ^ " :"
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^ Word8.toString (read pc) ^ " "
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^ Word8.toString (read (0w1 + pc)) ^ " "
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