add support for left aligned assembler directives (e.g. .set)

Much open-source code out there has .global, .set, etc directives starting
in the first column of a line. This change allows assembling such code.

Incidentally this also fixes a bug, where directives without parameters,
such as .text, .data, etc were silently accepted when left-aligned but
in those cases treated as labels instead of section headers.

Author: wnienhaus

esp32_ulp/assemble.py

@@ -118,7 +118,7 @@ def parse_line(self, line):
         """
         if not line:
             return
-        has_label = line[0] not in '\t '
+        has_label = line[0] not in '\t .'
         if has_label:
             label_line = line.split(None, 1)
             if len(label_line) == 2:

tests/assemble.py

@@ -4,25 +4,29 @@
 
 src = """\
         .set const, 123
+.set const_left, 976
 
 start:  wait 42
         ld r0, r1, 0
         st  r0,  r1,0
         halt
 end:
+.data
 """
 
 
 def test_parse_line():
     a = Assembler()
     lines = iter(src.splitlines())
     assert a.parse_line(next(lines)) == (None, '.set', ('const', '123', ))
+    assert a.parse_line(next(lines)) == (None, '.set', ('const_left', '976', ))
     assert a.parse_line(next(lines)) == None
     assert a.parse_line(next(lines)) == ('start', 'wait', ('42', ))
     assert a.parse_line(next(lines)) == (None, 'ld', ('r0', 'r1', '0', ))
     assert a.parse_line(next(lines)) == (None, 'st', ('r0', 'r1', '0', ))
     assert a.parse_line(next(lines)) == (None, 'halt', ())
     assert a.parse_line(next(lines)) == ('end', None, ())
+    assert a.parse_line(next(lines)) == (None, '.data', ())  # test left-aligned directive is not treated as label
 
 
 def test_parse():
@@ -36,9 +40,11 @@ def test_assemble():
     a = Assembler()
     a.assemble(src)
     assert a.symbols.has_sym('const')
+    assert a.symbols.has_sym('const_left')
     assert a.symbols.has_sym('start')
     assert a.symbols.has_sym('end')
     assert a.symbols.get_sym('const') == (ABS, None, 123)
+    assert a.symbols.get_sym('const_left') == (ABS, None, 976)
     assert a.symbols.get_sym('start') == (REL, TEXT, 0)
     assert a.symbols.get_sym('end') == (REL, TEXT, 4)
     assert len(b''.join(a.sections[TEXT])) == 16  # 4 instructions * 4B

tests/compat/symbols.S

@@ -1,10 +1,12 @@
             .text
 
             .set constant42, 42
+.set notindented, 1
 
 start:      move r0, data0
             move r1, data1
             move r2, constant42
+            move r3, notindented
 
             # count from 0 .. 42 in stage register
             stage_rst