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Achievement: Arctic Code Vault ContributorAchievement: Pull Shark

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Starred repositories

5 stars written in SystemVerilog
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lowRISC / lowrisc-chip

The root repo for lowRISC project and FPGA demos.

SystemVerilog 596 148 Updated Aug 3, 2023

trivialmips / nontrivial-mips

NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.

SystemVerilog 581 100 Updated Jul 7, 2020

lowRISC / ariane

Forked from openhwgroup/cva6

Ariane is a 6-stage RISC-V CPU

SystemVerilog 126 25 Updated Dec 4, 2019

trivialmips / TrivialMIPS

MIPS32 CPU implemented in SystemVerilog, with superscalar and FPU support

SystemVerilog 105 34 Updated Apr 29, 2019

Harry-Chen / fpga-virtual-console

VT220-compatible console on Cyclone IV EP4CE55F23I7

SystemVerilog 39 9 Updated Jun 28, 2018

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