diff --git a/src/common.rs b/src/common.rs index 864e9292..872cc6ce 100644 --- a/src/common.rs +++ b/src/common.rs @@ -7,8 +7,13 @@ pub enum Architecture { Arm, I386, Mips, + Mips64, S390x, Wasm32, + PowerPc, + PowerPc64, + Riscv32, + Riscv64, X86_64, } @@ -23,9 +28,14 @@ impl Architecture { Architecture::Arm => Some(AddressSize::U32), Architecture::I386 => Some(AddressSize::U32), Architecture::Mips => Some(AddressSize::U32), + Architecture::Mips64 => Some(AddressSize::U64), Architecture::S390x => Some(AddressSize::U64), Architecture::Wasm32 => Some(AddressSize::U32), Architecture::X86_64 => Some(AddressSize::U64), + Architecture::PowerPc => Some(AddressSize::U32), + Architecture::PowerPc64 => Some(AddressSize::U64), + Architecture::Riscv64 => Some(AddressSize::U64), + Architecture::Riscv32 => Some(AddressSize::U32), } } } diff --git a/src/elf.rs b/src/elf.rs index 69e7d109..249ce8da 100644 --- a/src/elf.rs +++ b/src/elf.rs @@ -735,6 +735,8 @@ pub const SHF_COMPRESSED: u32 = 1 << 11; pub const SHF_MASKOS: u32 = 0x0ff0_0000; /// Processor-specific section flags. pub const SHF_MASKPROC: u32 = 0xf000_0000; +/// This section is excluded from the final executable or shared library. +pub const SHF_EXCLUDE: u32 = 0x8000_0000; /// Section compression header. /// diff --git a/src/write/elf.rs b/src/write/elf.rs index d3ce541e..e93a193b 100644 --- a/src/write/elf.rs +++ b/src/write/elf.rs @@ -77,6 +77,11 @@ impl Object { Architecture::X86_64 => true, Architecture::S390x => true, Architecture::Mips => false, + Architecture::Mips64 => false, + Architecture::PowerPc => false, + Architecture::PowerPc64 => false, + Architecture::Riscv64 => false, + Architecture::Riscv32 => false, _ => { return Err(Error(format!( "unimplemented architecture {:?}", @@ -349,6 +354,11 @@ impl Object { Architecture::X86_64 => elf::EM_X86_64, Architecture::S390x => elf::EM_S390, Architecture::Mips => elf::EM_MIPS, + Architecture::Mips64 => elf::EM_MIPS, + Architecture::PowerPc => elf::EM_PPC, + Architecture::PowerPc64 => elf::EM_PPC64, + Architecture::Riscv64 => elf::EM_RISCV, + Architecture::Riscv32 => elf::EM_RISCV, _ => { return Err(Error(format!( "unimplemented architecture {:?}",