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max-nigri/README.md

Max Nigri

Logic Design Engineer | ASIC & FPGA Specialist

About Me

I am Max Nigri, Seasoned technologist and entrepreneur with extensive experience across multiple domains of the chip design industry. Strong focus on accelerating cloud workloads through domain-specific architecture (DSA), achieving order-of-magnitude improvements in price-performance.Possess deep expertise across the entire technology stack—from software APIs down to logic gates. Skilled in workload analysis, performance modeling, architectural design, data structure definition, hardware/software interface design, RTL development, and backend implementation

This profile serves as the hub for my open-source contributions and technical projects.

Featured Projects

🚀 Logic Simulation Engine (2015)

This repository represents the results of two years of intense development, creating the first logic simulator based on a dedicated hardware architecture rather than standard software.

🚀 Jpeg Encoder Engine (2006).

This repository documents a hardware design project developed as part of the Advanced Logic Design course I taught at the Computer Engineering Department, The Hebrew University of Jerusalem, from 2006 to 2017

🚀 SCS16 Core (2008)

SCS16 is a microcontroller core featuring a 16-bit datapath and single-cycle instruction execution. Development of the SCS16 architecture began in 2003, and this repository makes the 2008 version publicly available for the first time.

Professional Links

👯 I’m looking to collaborate on any interesting topic related to workloads acceleration using Domain Specific Compute Architecture (DSCA)

📫 How to reach me: max.nigri@gmail.com

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  1. jpeg_project_2006 jpeg_project_2006 Public

    Hardware implementation of a JPEG encoder for FPGA/ASIC, developed as an academic project in the Advanced Logic Design course (Hebrew University, 2006–2017). Project by Max Nigri

    HTML 1

  2. scs16-core-2008 scs16-core-2008 Public

    scs16 is a micro controller core, with 16b data path and single cycle instructions, developed started at 2003, I'm making the 2008 version public. this core is very efficient replacing FSM and maki…

    Verilog 1

  3. logic-simulation-engine logic-simulation-engine Public

    this is the results of 2 years of development of the first logic simulator that is based on HW instead of SW. Project by Max Nigri

    Verilog 1