- Table of Contents
- Abstract
- Description
- Circuit Design & Waveform
- Software Tools Used
- Acknowlegdements
This paper presents, how to send a self-correcting message with the help of hamming code. Hamming code is an error detection and correction technique. Message bits are received in signal form and then check if there any bits get flipped due to noise and if is so then message get corrected by itself. Self-correcting message applies its 5 extended parity bits to check for each 11-bit data. If one bit get flipped, then that error bit is identified and corrected by this system, and if 2 bits get flipped then machine is able to detect that 2 errors are present. This system can be also used in Compact Disc (CD) and Digital Versatile Disc (DVD)
Self-Correcting message system works for each 11 bits data which are further converted to 16 bits which includes 4 bits for redundancy for parity check and 1 bit is extended parity check. In this design, even parity is considered that is number of 1’s in data bits is even. Before transmitting the data, parity bits are generated for each 11 bit of data and transmits the 16 bits of data. And after transmission some checks are performed and which can be used for correcting any errors.
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1. Extended Hamming Code Technique for (15+1,11)
For creation of the algorithm or logic behind the Extended Hamming Code with 11 data bits and 4 parity bit checks on 11 data bits along with 1 one complete parity matrix approach is used
- Circuit Design Approach
Verilog Code for Inverter
module vinayak_inverter(output Y, input A); not (Y, A); endmodule
Verilog Code for Frequency_Divider
module vinayak_frequency_divider ( clk,out_clk ); output out_clk; input clk ; reg [2:0]m; initial m = 0; always @ (negedge (clk)) begin m <= m + 1; end assign out_clk = m[2]; endmodule
Explanation
Hamming Code Encoder Block is created using verilog Code.
Inputs provided for this encoder is as follows
- Inverted Window Comparator 2nd Opamp Output
- Constant 0 bit
- XNOR Output
- Inverted Window Comparator 2nd Opamp Output
- Frequency Divider by 8 Output
- Inverted Window Comparator 1st Opamp Output
- Clock Pulse
- Inverted Window Comparator 1st Opamp Output
- XNOR Output
- Frequency Divider by 8 Output
- Constant 0 bit
Output of Hamming Code Encoder is as follows
- Constant 0 bit
- Frequency Divider by 8 Output
- XNOR Output
- Inverted Window Comparator 1st Opamp Output
- Clock Pulse
- Inverted Window Comparator 1st Opamp Output
- Frequency Divider by 8 Output
- Inverted Window Comparator 2nd Opamp Output
- XNOR Output
- Constant 0 bit
- Inverted Window Comparator 2nd Opamp Output
- Extended Hamming COde Parity Bit
- 1st Parity bit
- 2nd Parity Bit
- 3rd Parity Bit
- 4th Parity Bit
Verilog Code for Hamming Code Encoder
module vinayak_hamming_ecoder( input [10:0] data_in, output [10:0] data_out, output p0, output p1, output p2, output p3, output p4 ); wire p_0,p_1,p_2,p_3,p_4; assign p_1 = data_in[0] ^ data_in[1] ^ data_in[3] ^ data_in[4] ^ data_in[6] ^ data_in[8] ^ data_in[10]; assign p_2 = data_in[0] ^ data_in[2] ^ data_in[3] ^ data_in[5] ^ data_in[6] ^ data_in[9] ^ data_in[10]; assign p_3 = data_in[1] ^ data_in[2] ^ data_in[3] ^ data_in[7] ^ data_in[8] ^ data_in[9] ^ data_in[10]; assign p_4 = data_in[4] ^ data_in[5] ^ data_in[6] ^ data_in[7] ^ data_in[8] ^ data_in[9] ^ data_in[10]; assign p_0 = data_in[0] ^ data_in[1] ^ data_in[2] ^ data_in[3] ^ data_in[4] ^ data_in[5] ^ data_in[6] ^ data_in[7] ^ data_in[8] ^ data_in[9] ^ data_in[10] ^ p_1 ^ p_2 ^ p_3 ^ p_4 ; assign data_out = {data_in}; assign p0 = p_0; assign p1 = p_1; assign p2 = p_2; assign p3 = p_3; assign p4 = p_4; endmodule
Explanation
Hamming Code decoder give output as a original data bits wrt parity bits received with data bits. Input bits for Hamming Code decoder bloack is output bits of Hamming Code Encoder Block. Hamming COde Decoder Circuit Block give output as follows:
- Is error bit is present or not
- All parity bits which are calculated from input data bit and parity bit
- Original Data bits if one bit is corrected among 11 data bit
Verilog Code for Hamming Code Decoder
module vinayak_hamming_decoder( input [15:0] data_in, output parity, output [3:0] p, output [10:0] data ); assign p[0] = data_in[1] ^ data_in[3] ^ data_in[5] ^ data_in[7] ^ data_in[9] ^ data_in[11] ^ data_in[13] ^ data_in[15]; assign p[1] = data_in[2] ^ data_in[3] ^ data_in[6] ^ data_in[7] ^ data_in[10] ^ data_in[11] ^ data_in[14] ^ data_in[15]; assign p[2] = data_in[4] ^ data_in[5] ^ data_in[6] ^ data_in[7] ^ data_in[12] ^ data_in[13] ^ data_in[14] ^ data_in[15]; assign p[3] = data_in[8] ^ data_in[9] ^ data_in[10] ^ data_in[11] ^ data_in[12] ^ data_in[13] ^ data_in[14] ^ data_in[15]; assign parity = data_in[0] ^ data_in[1] ^ data_in[2] ^ data_in[3] ^ data_in[4] ^ data_in[5] ^ data_in[6] ^ data_in[7] ^ data_in[8] ^ data_in[9] ^ data_in[10] ^ data_in[11] ^ data_in[12] ^ data_in[13] ^ data_in[14] ^ data_in[15]; assign data[0] = data_in[3]; assign data[1] = data_in[5]; assign data[2] = data_in[6]; assign data[3] = data_in[7]; assign data[4] = data_in[9]; assign data[5] = data_in[10]; assign data[6] = data_in[11]; assign data[7] = data_in[12]; assign data[8] = data_in[13]; assign data[9] = data_in[14]; assign data[10] = data_in[15]; endmodule
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Verilator is a free and open-source software tool which converts Verilog code to a cycle-accurate behavioral model in C++ or SystemC.
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A web-based IDE that is used to design and simulate digital circuits using Verilog, and the language extension of Verilog, TL-Verilog.
6. SkyWater KY130 PDK
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