forked from Nuand/bladeRF
-
Notifications
You must be signed in to change notification settings - Fork 0
/
CHANGELOG
68 lines (52 loc) · 2.02 KB
/
CHANGELOG
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
================================================================================
bladeRF HDL Change Log Summary
For more detailed information, please see the git change log and issue tracker
hosted on GitHub: https://github.com/nuand/bladeRF
================================================================================
v0.1.2 (2014-10-22)
--------------------------------
* Fixed issues with TX_NOW and dropped messages. This fixes issues
#334 and #335.
v0.1.1 (2014-10-22)
--------------------------------
* Fixed timing errors that caused failures in SPI communication with the
LMS6002D. This addresses the LMS calbration failure assocaited with issue
#269.
v0.1.0 (2014-10-21)
--------------------------------
* Backwards-compatible features introduced:
- Added option to divide sample counter by 2.
- Added "TX_NOW"
* Fixes:
- Addessed data/timestamp slipping
- Fixed readback of current timestamp value
- Send zero samples TX module to mitigate effect of default output power
from the LMS after intialization.
v0.0.6 (2014-07-20)
--------------------------------
* Fixed FPGA correction for gain/phase
v0.0.5 (2014-06-21)
--------------------------------
* Added expansion board support for XB-200
v0.0.4 (2014-05-07)
--------------------------------
* Added metadata timestamp support
- Added RX/TX metadata FIFOs
* Added FPGA digital loopback
v0.0.3 (2014-02-01)
--------------------------------
* Tweaked constraints for FX3 interface drive strength
* Add 32-bit counter mode for RX performance testing
v0.0.2 (2014-01-14)
--------------------------------
* Tweaked constraints for the FX3 interface
* Fixed SPI/UART signal contention issue
* Fixed phase range for IQ correction block
v0.0.1 (2013-12-28)
--------------------------------
* Updated to use Quartus 13.1 tools
- Renamed OpenCores I2C Qsys core to not conflict
* Introduced faster UART bridge (4Mbps versus 115.2kbps)
* Added IQ correction block
* Added FPGA version numbering
* Made FX3 GPIF FSM more maintainable