fuse.log

Running: D:\ISEXixin\14.7\ISE_DS\ISE\bin\nt64\unwrapped\fuse.exe -intstyle ise -incremental -lib unisims_ver -lib unimacro_ver -lib xilinxcorelib_ver -o B:/XikangStevenLab1/Try1_Try1_sch_tb_isim_beh.exe -prj B:/XikangStevenLab1/Try1_Try1_sch_tb_beh.prj work.Try1_Try1_sch_tb work.glbl 
ISim P.20131013 (signature 0x7708f090)
Number of CPUs detected in this system: 8
Turning on mult-threading, number of parallel sub-compilation jobs: 16 
Determining compilation order of HDL files
Analyzing Verilog file "B:/XikangStevenLab1/Try1.vf" into library work
Analyzing Verilog file "B:/XikangStevenLab1/Banch1.v" into library work
Analyzing Verilog file "D:/ISEXixin/14.7/ISE_DS/ISE//verilog/src/glbl.v" into library work
Starting static elaboration
Completed static elaboration
Compiling module AND2
Compiling module NAND2
Compiling module NOR2
Compiling module OR2
Compiling module Try1
Compiling module Try1_Try1_sch_tb
Compiling module glbl
Time Resolution for simulation is 1ps.
Compiled 7 Verilog Units
Built simulation executable B:/XikangStevenLab1/Try1_Try1_sch_tb_isim_beh.exe
Fuse Memory Usage: 28596 KB
Fuse CPU Usage: 421 ms