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[AArch64][Clang] Update new Neon vector element types. #142760
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This updates the element types used in the new __Int8x8_t types added in llvm#126945, mostly to allow C++ name mangling in ItaniumMangling mangleAArch64VectorBase to work correctly. Char is replaced by SignedCharTy or UnsignedCharTy as required and Float16Ty is better using HalfTy to match the vector types. Same for Long types.
@llvm/pr-subscribers-backend-aarch64 @llvm/pr-subscribers-clang Author: David Green (davemgreen) ChangesThis updates the element types used in the new __Int8x8_t types added in #126945, mostly to allow C++ name mangling in ItaniumMangling mangleAArch64VectorBase to work correctly. Char is replaced by SignedCharTy or UnsignedCharTy as required and Float16Ty is better using HalfTy to match the vector types. Same for Long types. Patch is 39.44 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/142760.diff 3 Files Affected:
diff --git a/clang/include/clang/Basic/AArch64ACLETypes.def b/clang/include/clang/Basic/AArch64ACLETypes.def
index 9acfd693288cf..bbe0c85f9ffbe 100644
--- a/clang/include/clang/Basic/AArch64ACLETypes.def
+++ b/clang/include/clang/Basic/AArch64ACLETypes.def
@@ -123,31 +123,31 @@
//===- Neon Vector point types --------------------------------------------===//
-NEON_VECTOR_TYPE(__Int8x8_t, CharTy, 8, 8, VectorKind::Neon)
+NEON_VECTOR_TYPE(__Int8x8_t, SignedCharTy, 8, 8, VectorKind::Neon)
NEON_VECTOR_TYPE(__Int16x4_t, ShortTy, 16, 4, VectorKind::Neon)
NEON_VECTOR_TYPE(__Int32x2_t, IntTy, 32, 2, VectorKind::Neon)
-NEON_VECTOR_TYPE(__Uint8x8_t, CharTy, 8, 8, VectorKind::Neon)
+NEON_VECTOR_TYPE(__Uint8x8_t, UnsignedCharTy, 8, 8, VectorKind::Neon)
NEON_VECTOR_TYPE(__Uint16x4_t, UnsignedShortTy, 16, 4, VectorKind::Neon)
NEON_VECTOR_TYPE(__Uint32x2_t, UnsignedIntTy, 32, 2, VectorKind::Neon)
-NEON_VECTOR_TYPE(__Float16x4_t, Float16Ty, 16, 4, VectorKind::Neon)
+NEON_VECTOR_TYPE(__Float16x4_t, HalfTy, 16, 4, VectorKind::Neon)
NEON_VECTOR_TYPE(__Float32x2_t, FloatTy, 32, 2, VectorKind::Neon)
-NEON_VECTOR_TYPE(__Poly8x8_t, CharTy, 8, 8, VectorKind::NeonPoly)
+NEON_VECTOR_TYPE(__Poly8x8_t, UnsignedCharTy, 8, 8, VectorKind::NeonPoly)
NEON_VECTOR_TYPE(__Poly16x4_t, UnsignedShortTy, 16, 4, VectorKind::NeonPoly)
NEON_VECTOR_TYPE(__Bfloat16x4_t, BFloat16Ty, 16, 4, VectorKind::Neon)
-NEON_VECTOR_TYPE(__Int8x16_t, CharTy, 8, 16, VectorKind::Neon)
+NEON_VECTOR_TYPE(__Int8x16_t, SignedCharTy, 8, 16, VectorKind::Neon)
NEON_VECTOR_TYPE(__Int16x8_t, ShortTy, 16, 8, VectorKind::Neon)
NEON_VECTOR_TYPE(__Int32x4_t, IntTy, 32, 4, VectorKind::Neon)
-NEON_VECTOR_TYPE(__Int64x2_t, LongLongTy, 64, 2, VectorKind::Neon)
-NEON_VECTOR_TYPE(__Uint8x16_t, CharTy, 8, 16, VectorKind::Neon)
+NEON_VECTOR_TYPE(__Int64x2_t, LongTy, 64, 2, VectorKind::Neon)
+NEON_VECTOR_TYPE(__Uint8x16_t, UnsignedCharTy, 8, 16, VectorKind::Neon)
NEON_VECTOR_TYPE(__Uint16x8_t, UnsignedShortTy, 16, 8, VectorKind::Neon)
NEON_VECTOR_TYPE(__Uint32x4_t, UnsignedIntTy, 32, 4, VectorKind::Neon)
-NEON_VECTOR_TYPE(__Uint64x2_t, UnsignedLongLongTy, 64, 2, VectorKind::Neon)
-NEON_VECTOR_TYPE(__Float16x8_t, Float16Ty, 16, 8, VectorKind::Neon)
+NEON_VECTOR_TYPE(__Uint64x2_t, UnsignedLongTy, 64, 2, VectorKind::Neon)
+NEON_VECTOR_TYPE(__Float16x8_t, HalfTy, 16, 8, VectorKind::Neon)
NEON_VECTOR_TYPE(__Float32x4_t, FloatTy, 32, 4, VectorKind::Neon)
NEON_VECTOR_TYPE(__Float64x2_t, DoubleTy, 64, 2, VectorKind::Neon)
-NEON_VECTOR_TYPE(__Poly8x16_t, CharTy, 8, 16, VectorKind::NeonPoly)
+NEON_VECTOR_TYPE(__Poly8x16_t, UnsignedCharTy, 8, 16, VectorKind::NeonPoly)
NEON_VECTOR_TYPE(__Poly16x8_t, UnsignedShortTy, 16, 8, VectorKind::NeonPoly)
-NEON_VECTOR_TYPE(__Poly64x2_t, UnsignedLongLongTy, 64, 2, VectorKind::NeonPoly)
+NEON_VECTOR_TYPE(__Poly64x2_t, UnsignedLongTy, 64, 2, VectorKind::NeonPoly)
NEON_VECTOR_TYPE(__Bfloat16x8_t, BFloat16Ty, 16, 8, VectorKind::Neon)
NEON_VECTOR_TYPE(__Mfloat8x8_t, MFloat8Ty, 8, 8, VectorKind::Neon)
NEON_VECTOR_TYPE(__Mfloat8x16_t, MFloat8Ty, 8, 16, VectorKind::Neon)
diff --git a/clang/test/AST/ast-dump-aarch64-neon-types.c b/clang/test/AST/ast-dump-aarch64-neon-types.c
index 16255cd51c9d8..f509bd880c14b 100644
--- a/clang/test/AST/ast-dump-aarch64-neon-types.c
+++ b/clang/test/AST/ast-dump-aarch64-neon-types.c
@@ -9,7 +9,7 @@
// RUN: %clang_cc1 -verify -verify-ignore-unexpected=note -triple arm-linux-gnu %s -x c++
__Int8x8_t Int8x8;
-// CHECK: Int8x8 '__Int8x8_t':'__attribute__((neon_vector_type(8))) char'
+// CHECK: Int8x8 '__Int8x8_t':'__attribute__((neon_vector_type(8))) signed char'
// expected-error@-2{{unknown type name '__Int8x8_t'}}
__Int16x4_t Int16x4;
@@ -21,7 +21,7 @@ __Int32x2_t Int32x2;
// expected-error@-2{{unknown type name '__Int32x2_t'}}
__Uint8x8_t Uint8x8;
-// CHECK: Uint8x8 '__Uint8x8_t':'__attribute__((neon_vector_type(8))) char'
+// CHECK: Uint8x8 '__Uint8x8_t':'__attribute__((neon_vector_type(8))) unsigned char'
// expected-error@-2{{unknown type name '__Uint8x8_t'}}
__Uint16x4_t Uint16x4;
@@ -33,7 +33,7 @@ __Uint32x2_t Uint32x2;
// expected-error@-2{{unknown type name '__Uint32x2_t'}}
__Float16x4_t Float16x4;
-// CHECK: Float16x4 '__Float16x4_t':'__attribute__((neon_vector_type(4))) _Float16'
+// CHECK: Float16x4 '__Float16x4_t':'__attribute__((neon_vector_type(4))) __fp16'
// expected-error@-2{{unknown type name '__Float16x4_t'}}
__Float32x2_t Float32x2;
@@ -41,7 +41,7 @@ __Float32x2_t Float32x2;
// expected-error@-2{{unknown type name '__Float32x2_t'}}
__Poly8x8_t Poly8x8;
-// CHECK: Poly8x8 '__Poly8x8_t':'__attribute__((neon_polyvector_type(8))) char'
+// CHECK: Poly8x8 '__Poly8x8_t':'__attribute__((neon_polyvector_type(8))) unsigned char'
// expected-error@-2{{unknown type name '__Poly8x8_t'}}
__Poly16x4_t Poly16x4;
@@ -53,7 +53,7 @@ __Bfloat16x4_t Bfloat16x4;
// expected-error@-2{{unknown type name '__Bfloat16x4_t'}}
__Int8x16_t Int8x16;
-// CHECK: Int8x16 '__Int8x16_t':'__attribute__((neon_vector_type(16))) char'
+// CHECK: Int8x16 '__Int8x16_t':'__attribute__((neon_vector_type(16))) signed char'
// expected-error@-2{{unknown type name '__Int8x16_t'}}
__Int16x8_t Int16x8;
@@ -65,11 +65,11 @@ __Int32x4_t Int32x4;
// expected-error@-2{{unknown type name '__Int32x4_t'}}
__Int64x2_t Int64x2;
-// CHECK: Int64x2 '__Int64x2_t':'__attribute__((neon_vector_type(2))) long long'
+// CHECK: Int64x2 '__Int64x2_t':'__attribute__((neon_vector_type(2))) long'
// expected-error@-2{{unknown type name '__Int64x2_t'}}
__Uint8x16_t Uint8x16;
-// CHECK: Uint8x16 '__Uint8x16_t':'__attribute__((neon_vector_type(16))) char'
+// CHECK: Uint8x16 '__Uint8x16_t':'__attribute__((neon_vector_type(16))) unsigned char'
// expected-error@-2{{unknown type name '__Uint8x16_t'}}
__Uint16x8_t Uint16x8;
@@ -81,11 +81,11 @@ __Uint32x4_t Uint32x4;
// expected-error@-2{{unknown type name '__Uint32x4_t'}}
__Uint64x2_t Uint64x2;
-// CHECK: Uint64x2 '__Uint64x2_t':'__attribute__((neon_vector_type(2))) unsigned long long'
+// CHECK: Uint64x2 '__Uint64x2_t':'__attribute__((neon_vector_type(2))) unsigned long'
// expected-error@-2{{unknown type name '__Uint64x2_t'}}
__Float16x8_t Float16x8;
-// CHECK: Float16x8 '__Float16x8_t':'__attribute__((neon_vector_type(8))) _Float16'
+// CHECK: Float16x8 '__Float16x8_t':'__attribute__((neon_vector_type(8))) __fp16'
// expected-error@-2{{unknown type name '__Float16x8_t'}}
__Float32x4_t Float32x4;
@@ -97,7 +97,7 @@ __Float64x2_t Float64x2;
// expected-error@-2{{unknown type name '__Float64x2_t'}}
__Poly8x16_t Poly8x16;
-// CHECK: Poly8x16 '__Poly8x16_t':'__attribute__((neon_polyvector_type(16))) char'
+// CHECK: Poly8x16 '__Poly8x16_t':'__attribute__((neon_polyvector_type(16))) unsigned char'
// expected-error@-2{{unknown type name '__Poly8x16_t'}}
__Poly16x8_t Poly16x8;
@@ -105,7 +105,7 @@ __Poly16x8_t Poly16x8;
// expected-error@-2{{unknown type name '__Poly16x8_t'}}
__Poly64x2_t Poly64x2;
-// CHECK: Poly64x2 '__Poly64x2_t':'__attribute__((neon_polyvector_type(2))) unsigned long long'
+// CHECK: Poly64x2 '__Poly64x2_t':'__attribute__((neon_polyvector_type(2))) unsigned long'
// expected-error@-2{{unknown type name '__Poly64x2_t'}}
__Bfloat16x8_t Bfloat16x8;
diff --git a/clang/test/CodeGen/AArch64/mixed-neon-types.c b/clang/test/CodeGen/AArch64/mixed-neon-types.c
index 47681a507d715..34fbe499f4052 100644
--- a/clang/test/CodeGen/AArch64/mixed-neon-types.c
+++ b/clang/test/CodeGen/AArch64/mixed-neon-types.c
@@ -3,23 +3,23 @@
// RUN: %clang_cc1 -triple aarch64-linux-gnu -target-feature +neon -x c++ %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK-CPP
// REQUIRES: aarch64-registered-target
-typedef __Uint32x4_t X;
+typedef __Uint8x16_t X;
-// CHECK-C-LABEL: define dso_local <4 x i32> @test(
-// CHECK-C-SAME: <4 x i32> noundef [[X:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-C-LABEL: define dso_local <16 x i8> @test(
+// CHECK-C-SAME: <16 x i8> noundef [[X:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK-C-NEXT: [[ENTRY:.*:]]
-// CHECK-C-NEXT: [[X_ADDR:%.*]] = alloca <4 x i32>, align 16
-// CHECK-C-NEXT: store <4 x i32> [[X]], ptr [[X_ADDR]], align 16
-// CHECK-C-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[X_ADDR]], align 16
-// CHECK-C-NEXT: ret <4 x i32> [[TMP0]]
+// CHECK-C-NEXT: [[X_ADDR:%.*]] = alloca <16 x i8>, align 16
+// CHECK-C-NEXT: store <16 x i8> [[X]], ptr [[X_ADDR]], align 16
+// CHECK-C-NEXT: [[TMP0:%.*]] = load <16 x i8>, ptr [[X_ADDR]], align 16
+// CHECK-C-NEXT: ret <16 x i8> [[TMP0]]
//
-// CHECK-CPP-LABEL: define dso_local noundef <4 x i32> @_Z4test12__Uint32x4_t(
-// CHECK-CPP-SAME: <4 x i32> noundef [[X:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-CPP-LABEL: define dso_local noundef <16 x i8> @_Z4test12__Uint8x16_t(
+// CHECK-CPP-SAME: <16 x i8> noundef [[X:%.*]]) #[[ATTR0:[0-9]+]] {
// CHECK-CPP-NEXT: [[ENTRY:.*:]]
-// CHECK-CPP-NEXT: [[X_ADDR:%.*]] = alloca <4 x i32>, align 16
-// CHECK-CPP-NEXT: store <4 x i32> [[X]], ptr [[X_ADDR]], align 16
-// CHECK-CPP-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[X_ADDR]], align 16
-// CHECK-CPP-NEXT: ret <4 x i32> [[TMP0]]
+// CHECK-CPP-NEXT: [[X_ADDR:%.*]] = alloca <16 x i8>, align 16
+// CHECK-CPP-NEXT: store <16 x i8> [[X]], ptr [[X_ADDR]], align 16
+// CHECK-CPP-NEXT: [[TMP0:%.*]] = load <16 x i8>, ptr [[X_ADDR]], align 16
+// CHECK-CPP-NEXT: ret <16 x i8> [[TMP0]]
//
X test(X x) {
return x;
@@ -28,47 +28,520 @@ X test(X x) {
#include <arm_neon.h>
// CHECK-C-LABEL: define dso_local <16 x i8> @testboth(
-// CHECK-C-SAME: <4 x i32> noundef [[X:%.*]]) #[[ATTR0]] {
+// CHECK-C-SAME: <16 x i8> noundef [[X:%.*]]) #[[ATTR0]] {
// CHECK-C-NEXT: [[ENTRY:.*:]]
// CHECK-C-NEXT: [[__P0_ADDR_I:%.*]] = alloca <16 x i8>, align 16
// CHECK-C-NEXT: [[__P1_ADDR_I:%.*]] = alloca <16 x i8>, align 16
// CHECK-C-NEXT: [[__RET_I:%.*]] = alloca <16 x i8>, align 16
-// CHECK-C-NEXT: [[X_ADDR:%.*]] = alloca <4 x i32>, align 16
-// CHECK-C-NEXT: store <4 x i32> [[X]], ptr [[X_ADDR]], align 16
-// CHECK-C-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[X_ADDR]], align 16
-// CHECK-C-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>
-// CHECK-C-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr [[X_ADDR]], align 16
-// CHECK-C-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[TMP2]] to <16 x i8>
-// CHECK-C-NEXT: store <16 x i8> [[TMP1]], ptr [[__P0_ADDR_I]], align 16
-// CHECK-C-NEXT: store <16 x i8> [[TMP3]], ptr [[__P1_ADDR_I]], align 16
-// CHECK-C-NEXT: [[TMP4:%.*]] = load <16 x i8>, ptr [[__P0_ADDR_I]], align 16
-// CHECK-C-NEXT: [[TMP5:%.*]] = load <16 x i8>, ptr [[__P1_ADDR_I]], align 16
-// CHECK-C-NEXT: [[ADD_I:%.*]] = add <16 x i8> [[TMP4]], [[TMP5]]
+// CHECK-C-NEXT: [[X_ADDR:%.*]] = alloca <16 x i8>, align 16
+// CHECK-C-NEXT: store <16 x i8> [[X]], ptr [[X_ADDR]], align 16
+// CHECK-C-NEXT: [[TMP0:%.*]] = load <16 x i8>, ptr [[X_ADDR]], align 16
+// CHECK-C-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr [[X_ADDR]], align 16
+// CHECK-C-NEXT: store <16 x i8> [[TMP0]], ptr [[__P0_ADDR_I]], align 16
+// CHECK-C-NEXT: store <16 x i8> [[TMP1]], ptr [[__P1_ADDR_I]], align 16
+// CHECK-C-NEXT: [[TMP2:%.*]] = load <16 x i8>, ptr [[__P0_ADDR_I]], align 16
+// CHECK-C-NEXT: [[TMP3:%.*]] = load <16 x i8>, ptr [[__P1_ADDR_I]], align 16
+// CHECK-C-NEXT: [[ADD_I:%.*]] = add <16 x i8> [[TMP2]], [[TMP3]]
// CHECK-C-NEXT: store <16 x i8> [[ADD_I]], ptr [[__RET_I]], align 16
-// CHECK-C-NEXT: [[TMP6:%.*]] = load <16 x i8>, ptr [[__RET_I]], align 16
-// CHECK-C-NEXT: ret <16 x i8> [[TMP6]]
+// CHECK-C-NEXT: [[TMP4:%.*]] = load <16 x i8>, ptr [[__RET_I]], align 16
+// CHECK-C-NEXT: ret <16 x i8> [[TMP4]]
//
-// CHECK-CPP-LABEL: define dso_local noundef <16 x i8> @_Z8testboth12__Uint32x4_t(
-// CHECK-CPP-SAME: <4 x i32> noundef [[X:%.*]]) #[[ATTR0]] {
+// CHECK-CPP-LABEL: define dso_local noundef <16 x i8> @_Z8testboth12__Uint8x16_t(
+// CHECK-CPP-SAME: <16 x i8> noundef [[X:%.*]]) #[[ATTR0]] {
// CHECK-CPP-NEXT: [[ENTRY:.*:]]
// CHECK-CPP-NEXT: [[__P0_ADDR_I:%.*]] = alloca <16 x i8>, align 16
// CHECK-CPP-NEXT: [[__P1_ADDR_I:%.*]] = alloca <16 x i8>, align 16
// CHECK-CPP-NEXT: [[__RET_I:%.*]] = alloca <16 x i8>, align 16
-// CHECK-CPP-NEXT: [[X_ADDR:%.*]] = alloca <4 x i32>, align 16
-// CHECK-CPP-NEXT: store <4 x i32> [[X]], ptr [[X_ADDR]], align 16
-// CHECK-CPP-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[X_ADDR]], align 16
-// CHECK-CPP-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>
-// CHECK-CPP-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr [[X_ADDR]], align 16
-// CHECK-CPP-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[TMP2]] to <16 x i8>
-// CHECK-CPP-NEXT: store <16 x i8> [[TMP1]], ptr [[__P0_ADDR_I]], align 16
-// CHECK-CPP-NEXT: store <16 x i8> [[TMP3]], ptr [[__P1_ADDR_I]], align 16
-// CHECK-CPP-NEXT: [[TMP4:%.*]] = load <16 x i8>, ptr [[__P0_ADDR_I]], align 16
-// CHECK-CPP-NEXT: [[TMP5:%.*]] = load <16 x i8>, ptr [[__P1_ADDR_I]], align 16
-// CHECK-CPP-NEXT: [[ADD_I:%.*]] = add <16 x i8> [[TMP4]], [[TMP5]]
+// CHECK-CPP-NEXT: [[X_ADDR:%.*]] = alloca <16 x i8>, align 16
+// CHECK-CPP-NEXT: store <16 x i8> [[X]], ptr [[X_ADDR]], align 16
+// CHECK-CPP-NEXT: [[TMP0:%.*]] = load <16 x i8>, ptr [[X_ADDR]], align 16
+// CHECK-CPP-NEXT: [[TMP1:%.*]] = load <16 x i8>, ptr [[X_ADDR]], align 16
+// CHECK-CPP-NEXT: store <16 x i8> [[TMP0]], ptr [[__P0_ADDR_I]], align 16
+// CHECK-CPP-NEXT: store <16 x i8> [[TMP1]], ptr [[__P1_ADDR_I]], align 16
+// CHECK-CPP-NEXT: [[TMP2:%.*]] = load <16 x i8>, ptr [[__P0_ADDR_I]], align 16
+// CHECK-CPP-NEXT: [[TMP3:%.*]] = load <16 x i8>, ptr [[__P1_ADDR_I]], align 16
+// CHECK-CPP-NEXT: [[ADD_I:%.*]] = add <16 x i8> [[TMP2]], [[TMP3]]
// CHECK-CPP-NEXT: store <16 x i8> [[ADD_I]], ptr [[__RET_I]], align 16
-// CHECK-CPP-NEXT: [[TMP6:%.*]] = load <16 x i8>, ptr [[__RET_I]], align 16
-// CHECK-CPP-NEXT: ret <16 x i8> [[TMP6]]
+// CHECK-CPP-NEXT: [[TMP4:%.*]] = load <16 x i8>, ptr [[__RET_I]], align 16
+// CHECK-CPP-NEXT: ret <16 x i8> [[TMP4]]
//
-int8x16_t testboth(X x) {
+uint8x16_t testboth(X x) {
return vaddq_u8(x, x);
}
+
+// CHECK-C-LABEL: define dso_local <8 x i8> @test__Int8x8_t(
+// CHECK-C-SAME: <8 x i8> noundef [[X:%.*]]) #[[ATTR0]] {
+// CHECK-C-NEXT: [[ENTRY:.*:]]
+// CHECK-C-NEXT: [[X_ADDR:%.*]] = alloca <8 x i8>, align 8
+// CHECK-C-NEXT: store <8 x i8> [[X]], ptr [[X_ADDR]], align 8
+// CHECK-C-NEXT: [[TMP0:%.*]] = load <8 x i8>, ptr [[X_ADDR]], align 8
+// CHECK-C-NEXT: ret <8 x i8> [[TMP0]]
+//
+// CHECK-CPP-LABEL: define dso_local noundef <8 x i8> @_Z14test__Int8x8_t10__Int8x8_t(
+// CHECK-CPP-SAME: <8 x i8> noundef [[X:%.*]]) #[[ATTR0]] {
+// CHECK-CPP-NEXT: [[ENTRY:.*:]]
+// CHECK-CPP-NEXT: [[X_ADDR:%.*]] = alloca <8 x i8>, align 8
+// CHECK-CPP-NEXT: store <8 x i8> [[X]], ptr [[X_ADDR]], align 8
+// CHECK-CPP-NEXT: [[TMP0:%.*]] = load <8 x i8>, ptr [[X_ADDR]], align 8
+// CHECK-CPP-NEXT: ret <8 x i8> [[TMP0]]
+//
+int8x8_t test__Int8x8_t(__Int8x8_t x) { return x; }
+// CHECK-C-LABEL: define dso_local <4 x i16> @test__Int16x4_t(
+// CHECK-C-SAME: <4 x i16> noundef [[X:%.*]]) #[[ATTR0]] {
+// CHECK-C-NEXT: [[ENTRY:.*:]]
+// CHECK-C-NEXT: [[X_ADDR:%.*]] = alloca <4 x i16>, align 8
+// CHECK-C-NEXT: store <4 x i16> [[X]], ptr [[X_ADDR]], align 8
+// CHECK-C-NEXT: [[TMP0:%.*]] = load <4 x i16>, ptr [[X_ADDR]], align 8
+// CHECK-C-NEXT: ret <4 x i16> [[TMP0]]
+//
+// CHECK-CPP-LABEL: define dso_local noundef <4 x i16> @_Z15test__Int16x4_t11__Int16x4_t(
+// CHECK-CPP-SAME: <4 x i16> noundef [[X:%.*]]) #[[ATTR0]] {
+// CHECK-CPP-NEXT: [[ENTRY:.*:]]
+// CHECK-CPP-NEXT: [[X_ADDR:%.*]] = alloca <4 x i16>, align 8
+// CHECK-CPP-NEXT: store <4 x i16> [[X]], ptr [[X_ADDR]], align 8
+// CHECK-CPP-NEXT: [[TMP0:%.*]] = load <4 x i16>, ptr [[X_ADDR]], align 8
+// CHECK-CPP-NEXT: ret <4 x i16> [[TMP0]]
+//
+int16x4_t test__Int16x4_t(__Int16x4_t x) { return x; }
+// CHECK-C-LABEL: define dso_local <2 x i32> @test__Int32x2_t(
+// CHECK-C-SAME: <2 x i32> noundef [[X:%.*]]) #[[ATTR0]] {
+// CHECK-C-NEXT: [[ENTRY:.*:]]
+// CHECK-C-NEXT: [[X_ADDR:%.*]] = alloca <2 x i32>, align 8
+// CHECK-C-NEXT: store <2 x i32> [[X]], ptr [[X_ADDR]], align 8
+// CHECK-C-NEXT: [[TMP0:%.*]] = load <2 x i32>, ptr [[X_ADDR]], align 8
+// CHECK-C-NEXT: ret <2 x i32> [[TMP0]]
+//
+// CHECK-CPP-LABEL: define dso_local noundef <2 x i32> @_Z15test__Int32x2_t11__Int32x2_t(
+// CHECK-CPP-SAME: <2 x i32> noundef [[X:%.*]]) #[[ATTR0]] {
+// CHECK-CPP-NEXT: [[ENTRY:.*:]]
+// CHECK-CPP-NEXT: [[X_ADDR:%.*]] = alloca <2 x i32>, align 8
+// CHECK-CPP-NEXT: store <2 x i32> [[X]], ptr [[X_ADDR]], align 8
+// CHECK-CPP-NEXT: [[TMP0:%.*]] = load <2 x i32>, ptr [[X_ADDR]], align 8
+// CHECK-CPP-NEXT: ret <2 x i32> [[TMP0]]
+//
+int32x2_t test__Int32x2_t(__Int32x2_t x) { return x; }
+// CHECK-C-LABEL: define dso_local <8 x i8> @test__Uint8x8_t(
+// CHECK-C-SAME: <8 x i8> noundef [[X:%.*]]) #[[ATTR0]] {
+// CHECK-C-NEXT: [[ENTRY:.*:]]
+// CHECK-C-NEXT: [[X_ADDR:%.*]] = alloca <8 x i8>, align 8
+// CHECK-C-NEXT: store <8 x i8> [[X]], ptr [[X_ADDR]], align 8
+// CHECK-C-NEXT: [[TMP0:%.*]] = load <8 x i8>, ptr [[X_ADDR]], align 8
+// CHECK-C-NEXT: ret <8 x i8> [[TMP0]]
+//
+// CHECK-CPP-LABEL: define dso_local noundef <8 x i8> @_Z15test__Uint8x8_t11__Uint8x8_t(
+// CHECK-CPP-SAME: <8 x i8> noundef [[X:%.*]]) #[[ATTR0]] {
+// CHECK-CPP-NEXT: [[ENTRY:.*:]]
+// CHECK-CPP-NEXT: [[X_ADDR:%.*]] = alloca <8 x i8>, align 8
+// CHECK-CPP-NEXT: store <8 x i8> [[X]], ptr [[X_ADDR]], align 8
+// CHECK-CPP-NEXT: [[TMP0:%.*]] = load <8 x i8>, ptr [[X_ADDR]], align 8
+// CHECK-CPP-NEXT: ret <8 x i8> [[TMP0]]
+//
+uint8x8_t test__Uint8x8_t(__Uint8x8_t x) { return x; }
+// CHECK-C-LABEL: define dso_local <4 x i16> @test__Uint16x4_t(
+// CHECK-C-SAME: <4 x i16> noundef [[X:%.*]]) #[[ATTR0]] {
+// CHECK-C-NEXT: [[ENTRY:.*:]]
+// CHECK-C-NEXT: [[X_ADDR:%.*]] = alloca <4 x i16>, align 8
+// CHECK-C-NEXT: store <4 x i16> [[X]], ptr [[X_ADDR]], align 8
+// CHECK-C-NEXT: [[TMP0:%.*]] = load <4 x i16>, ptr [[X_ADDR]], align 8
+// CHECK-C-NEXT: ret <4 x i16> [[TMP0]]
+//
+// CHECK-CPP-LABEL: define dso_local noundef <4 x i16> @_Z16test__Uint16x4_t12__Uint16x4_t(
+// CHECK-CPP-SAME: <4 x i16> noundef [[X:%.*]]) #[[ATTR0]] {
+// CHECK-CPP-NEXT: [[ENTRY:.*:]]
+// CHECK-CPP-NEXT: [[X_ADDR:%.*]] = alloca <4 x i16>, align 8
+// CHECK-CPP-NEXT: store <4 x i16> [[X]], ptr [[X_ADDR]], align 8
+// CHECK-CPP-NEXT: [[TMP0:%.*]] = load <4 x i16>, ptr [[X_ADDR]], align 8
+// CHECK-CPP-NEXT: ret <4 x i16> [[TMP0]]
+//
+uint16x4_t test__Uint16x4_t(__Uint16x4_t x) { return x; }
+// CHECK-C-LABEL: define dso_local <2 x i32> @test__Uint32x2_t(
+// CHECK-C-SAME: <2 x i32> noundef [[X:%.*]]) #[[ATTR0]] {
+// CHECK-C-NEXT: [[ENTRY:.*:]]
+// CHECK-C-NEXT: [[X_ADDR:%.*]] = alloca <2 x i32>, align 8
+// CHECK-C-NEXT: store <2 x i32> [[X]], ptr [[X_ADDR]], align 8
+// CHECK-C-NEXT: [[TMP0:%.*]] = load <2 x i32>, ptr [[X_ADDR]], align 8
+// CHECK-C-NEXT: ret <2 x i32> [[TMP0]]
+//
+// CHECK-CPP-LABEL: define dso_local noundef <2 x i32> @_Z16test__Uint32x2_t12__Uint32x2_t(
+// CHECK-CPP-SAME: <2 x i32> noundef [[X:%.*]]) #[[ATTR0]] {
+// CHECK-CPP-NEXT: [[ENTRY:.*:]]
+// CHECK-CPP-NEXT: [[X_ADDR:%.*]] = alloca <2 x i32>, align 8
+// CHECK-CPP-NEXT: store <2 x i32> [[X]], ptr [[X_ADDR]], align 8
+// CHECK-CPP-NEXT: [[TMP0:%.*]] = load <2 x i32>, ptr [[X_ADDR]], align 8
+// CHECK-CPP-NEXT: ret <2 x i32> [[TMP0]]
+//
+uint32x2_t test__Uint32x2_t(__Uint32x2_t x) { return x; }
+// CHECK-C-LABEL: define dso_local <4 x half> @test__Float16x4_t(
+// CHECK-C-SAME: <4 x half> noundef [[X:%.*]]) #[[ATTR0]] {
+// CHECK-C-NEXT: [[ENTRY:.*:]]
+// CHECK-C-NEXT: [[X_ADDR:%.*]] = alloca <4 x half>, align 8
+// CHECK-C-NEXT: store <4 x half> [[X]], ptr [[X_ADDR]], align 8
+// CHECK-C-NEXT: [[TMP0:%.*]] = load <4 x half>, ptr [[X_ADDR]], align 8
+// CHECK-C-NEXT: ret <4 x half> [[TMP0]]
+//
+// CHECK-CPP-LABEL: define dso_local noundef <4 x half> @_Z17test__Float16x4_t13__Float16x4_t(
+// CHECK-CPP-SAME: <4 x half> noundef [[X:%.*]]) #[[ATTR0]] {
+// CHECK-CPP-NEXT: [[ENTRY:.*:]]
+// CHECK-CPP-NEXT: [[X_ADDR:%.*]] = alloca <4 x half>, align 8
+// CHECK-CPP-NEXT: store <4 x half> [[X]], p...
[truncated]
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This updates the element types used in the new __Int8x8_t types added in #126945, mostly to allow C++ name mangling in ItaniumMangling mangleAArch64VectorBase to work correctly. Char is replaced by SignedCharTy or UnsignedCharTy as required and Float16Ty is better using HalfTy to match the vector types. Same for Long types.