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[RISCV] Add compress patterns for qc.extu and qc.mvltui #140682

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[RISCV] Add compress patterns for qc.extu and qc.mvltui #140682

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[RISCV] Add compress patterns for qc.extu and qc.mvltui
hchandel May 20, 2025
1c95e65
fixup! Address comments regarding isCompressOnly
hchandel May 22, 2025
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6 changes: 6 additions & 0 deletions llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
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Original file line number Diff line number Diff line change
Expand Up @@ -1489,6 +1489,9 @@ def : CompressPat<(QC_E_SW GPR:$rs2, GPRMem:$rs1, simm12:$imm12),
let Predicates = [HasVendorXqcicm, IsRV32] in {
def : CompressPat<(QC_MVEQI GPRC:$rd, GPRC:$rd, 0, GPRC:$rs1),
(QC_C_MVEQZ GPRC:$rd, GPRC:$rs1)>;
let isCompressOnly = true in
def : CompressPat<(QC_MVLTUI GPRC:$rd, GPRC:$rd, 1, GPRC:$rs1),
(QC_C_MVEQZ GPRC:$rd, GPRC:$rs1)>;
}

let Predicates = [HasVendorXqcibm, IsRV32] in {
Expand All @@ -1501,6 +1504,9 @@ def : CompressPat<(BSETI GPRC:$rs1, GPRC:$rs1, uimmlog2xlennonzero:$shamt),
(QC_C_BSETI GPRC:$rs1, uimmlog2xlennonzero:$shamt)>;
def : CompressPat<(BEXTI GPRC:$rs1, GPRC:$rs1, uimmlog2xlennonzero:$shamt),
(QC_C_BEXTI GPRC:$rs1, uimmlog2xlennonzero:$shamt)>;
let isCompressOnly = true in
def : CompressPat<(QC_EXTU GPRC:$rd, GPRC:$rd, 1, uimmlog2xlennonzero:$shamt),
(QC_C_BEXTI GPRC:$rd, uimmlog2xlennonzero:$shamt)>;
} // Predicates = [HasVendorXqcibm, HasStdExtZbs, IsRV32]

let isCompressOnly = true, Predicates = [HasVendorXqcilb, IsRV32] in {
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5 changes: 5 additions & 0 deletions llvm/test/MC/RISCV/xqcibm-valid.s
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Expand Up @@ -133,6 +133,11 @@ qc.c.extu x15, 32
# CHECK-ENC: encoding: [0xaa,0x15]
qc.extu x11, x11, 11, 0

# CHECK-NOALIAS: qc.c.bexti a1, 5
# CHECK-ALIAS: bexti a1, a1, 5
# CHECK-ENC: encoding: [0x95,0x91]
qc.extu x11, x11, 1, 5

# CHECK-NOALIAS: qc.c.bexti s1, 8
# CHECK-ALIAS: bexti s1, s1, 8
# CHECK-ENC-ZBS: encoding: [0xa1,0x90]
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5 changes: 5 additions & 0 deletions llvm/test/MC/RISCV/xqcicm-valid.s
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Expand Up @@ -130,3 +130,8 @@ qc.mvgeui x9, x10, 31, x12
# CHECK-ENC: encoding: [0x06,0xae]
qc.mveqi x9, x9, 0, x12

# CHECK-NOALIAS: qc.c.mveqz s1, a2
# CHECK-ALIAS: qc.mveqi s1, s1, 0, a2
# CHECK-ENC: encoding: [0x06,0xae]
qc.mvltui x9, x9, 1, x12

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