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[SelectionDAG] Adaptation for FP operation lowering #138553

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7 changes: 6 additions & 1 deletion llvm/include/llvm/IR/FloatingPointOps.def
Original file line number Diff line number Diff line change
Expand Up @@ -14,12 +14,17 @@
#define FUNCTION(N,D)
#endif

#ifndef CONSTRAINED
#define CONSTRAINED(N,D) FUNCTION(N,D)
#endif

// Arguments of the entries are:
// - intrinsic function name,
// - DAG node corresponding to the intrinsic.

FUNCTION(experimental_constrained_fadd, FADD)
CONSTRAINED(experimental_constrained_fadd, FADD)
FUNCTION(nearbyint, FNEARBYINT)
FUNCTION(trunc, FTRUNC)

#undef FUNCTION
#undef CONSTRAINED
62 changes: 58 additions & 4 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -6802,9 +6802,7 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
case Intrinsic::exp10:
case Intrinsic::floor:
case Intrinsic::ceil:
case Intrinsic::trunc:
case Intrinsic::rint:
case Intrinsic::nearbyint:
case Intrinsic::round:
case Intrinsic::roundeven:
case Intrinsic::canonicalize: {
Expand All @@ -6826,9 +6824,7 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
case Intrinsic::exp10: Opcode = ISD::FEXP10; break;
case Intrinsic::floor: Opcode = ISD::FFLOOR; break;
case Intrinsic::ceil: Opcode = ISD::FCEIL; break;
case Intrinsic::trunc: Opcode = ISD::FTRUNC; break;
case Intrinsic::rint: Opcode = ISD::FRINT; break;
case Intrinsic::nearbyint: Opcode = ISD::FNEARBYINT; break;
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Why are these two not needed?

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They are handles together with all floating-point operations, see the code added at line 6958.

case Intrinsic::round: Opcode = ISD::FROUND; break;
case Intrinsic::roundeven: Opcode = ISD::FROUNDEVEN; break;
case Intrinsic::canonicalize: Opcode = ISD::FCANONICALIZE; break;
Expand Down Expand Up @@ -6959,6 +6955,11 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I,
#include "llvm/IR/ConstrainedOps.def"
visitConstrainedFPIntrinsic(cast<ConstrainedFPIntrinsic>(I));
return;
#define CONSTRAINED(INTRINSIC, DAGN)
#define FUNCTION(INTRINSIC, DAGN) case Intrinsic::INTRINSIC:
#include "llvm/IR/FloatingPointOps.def"
visitFPOperationIntrinsic(I, Intrinsic);
return;
#define BEGIN_REGISTER_VP_INTRINSIC(VPID, ...) case Intrinsic::VPID:
#include "llvm/IR/VPIntrinsics.def"
visitVectorPredicationIntrinsic(cast<VPIntrinsic>(I));
Expand Down Expand Up @@ -8350,6 +8351,59 @@ void SelectionDAGBuilder::visitConstrainedFPIntrinsic(
setValue(&FPI, FPResult);
}

void SelectionDAGBuilder::visitFPOperationIntrinsic(const CallInst &CI,
unsigned Intrinsic) {
SDLoc sdl = getCurSDLoc();
bool StrictFP =
FuncInfo.Fn->getAttributes().hasFnAttr(llvm::Attribute::StrictFP);

int Opcode = -1;
switch (Intrinsic) {
#define CONSTRAINED(NAME, DAGN)
#define FUNCTION(NAME, DAGN) \
case Intrinsic::NAME: \
Opcode = StrictFP ? ISD::STRICT_##DAGN : ISD::DAGN; \
break;
#include "llvm/IR/FloatingPointOps.def"
}

SDNodeFlags Flags;
if (CI.getExceptionBehavior() == fp::ExceptionBehavior::ebIgnore)
Flags.setNoFPExcept(true);
Comment on lines +8371 to +8372
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Can you reorder this with the use of CI.getExceptionBehavior below, so all of the exception mode dependent code is together

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This code was copied from visitConstrainedFPIntrinsic. Maybe it should be removed at all.

if (auto *FPOp = dyn_cast<FPMathOperator>(&CI))
Flags.copyFMF(*FPOp);

SmallVector<SDValue, 4> Operands;
if (StrictFP)
Operands.push_back(DAG.getRoot());
for (unsigned I = 0, E = CI.arg_size(); I != E; ++I)
Operands.push_back(getValue(CI.getArgOperand(I)));

const TargetLowering &TLI = DAG.getTargetLoweringInfo();
EVT VT = TLI.getValueType(DAG.getDataLayout(), CI.getType());
SDVTList VTs = StrictFP ? DAG.getVTList(VT, MVT::Other) : DAG.getVTList(VT);

SDValue Result = DAG.getNode(Opcode, sdl, VTs, Operands, Flags);

SDValue OutChain;
if (StrictFP) {
OutChain = Result.getValue(1);
switch (CI.getExceptionBehavior()) {
case fp::ExceptionBehavior::ebIgnore:
case fp::ExceptionBehavior::ebMayTrap:
PendingConstrainedFP.push_back(OutChain);
break;
case fp::ExceptionBehavior::ebStrict:
PendingConstrainedFPStrict.push_back(OutChain);
break;
}
SDValue FPResult = Result.getValue(0);
setValue(&CI, FPResult);
} else {
setValue(&CI, Result);
}
}

static unsigned getISDForVPIntrinsic(const VPIntrinsic &VPIntrin) {
std::optional<unsigned> ResOPC;
switch (VPIntrin.getIntrinsicID()) {
Expand Down
1 change: 1 addition & 0 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
Original file line number Diff line number Diff line change
Expand Up @@ -627,6 +627,7 @@ class SelectionDAGBuilder {
void visitIntrinsicCall(const CallInst &I, unsigned Intrinsic);
void visitTargetIntrinsic(const CallInst &I, unsigned Intrinsic);
void visitConstrainedFPIntrinsic(const ConstrainedFPIntrinsic &FPI);
void visitFPOperationIntrinsic(const CallInst &I, unsigned Intrinsic);
void visitConvergenceControl(const CallInst &I, unsigned Intrinsic);
void visitVectorHistogram(const CallInst &I, unsigned IntrinsicID);
void visitVectorExtractLastActive(const CallInst &I, unsigned Intrinsic);
Expand Down
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