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BasicAA: Fix assert when indexing address spaces with different sizes #103713
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@llvm/pr-subscribers-llvm-analysis Author: Matt Arsenault (arsenm) ChangesFixes #103500 Full diff: https://github.com/llvm/llvm-project/pull/103713.diff 2 Files Affected:
diff --git a/llvm/lib/Analysis/BasicAliasAnalysis.cpp b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
index 7bfb23e14aaa79..e11d019b90fa67 100644
--- a/llvm/lib/Analysis/BasicAliasAnalysis.cpp
+++ b/llvm/lib/Analysis/BasicAliasAnalysis.cpp
@@ -354,6 +354,9 @@ struct CastedValue {
}
bool hasSameCastsAs(const CastedValue &Other) const {
+ if (V->getType() != Other.V->getType())
+ return false;
+
if (ZExtBits == Other.ZExtBits && SExtBits == Other.SExtBits &&
TruncBits == Other.TruncBits)
return true;
diff --git a/llvm/test/Analysis/BasicAA/issue103500.ll b/llvm/test/Analysis/BasicAA/issue103500.ll
new file mode 100644
index 00000000000000..3532e6e9479e5b
--- /dev/null
+++ b/llvm/test/Analysis/BasicAA/issue103500.ll
@@ -0,0 +1,18 @@
+; RUN: opt -aa-pipeline=basic-aa -passes=aa-eval -print-all-alias-modref-info -disable-output %s 2>&1 | FileCheck %s
+
+target datalayout = "p0:64:64-p5:32:32"
+
+; CHECK: Function: indexing_different_sized_addrspace: 2 pointers, 0 call sites
+; CHECK: MayAlias: i32* %gep.in.0, i32 addrspace(5)* %gep.in.5.1
+
+define i1 @indexing_different_sized_addrspace(ptr addrspace(5) %arg, i64 %arg1, i32 %arg2) {
+bb:
+ %arg.addrspacecast = addrspacecast ptr addrspace(5) %arg to ptr
+ %gep.in.5 = getelementptr i8, ptr addrspace(5) %arg, i32 16
+ %gep.in.0 = getelementptr i8, ptr %arg.addrspacecast, i64 %arg1
+ %gep.in.5.1 = getelementptr i8, ptr addrspace(5) %gep.in.5, i32 %arg2
+ %load.0 = load i32, ptr %gep.in.0, align 4
+ %load.1 = load i32, ptr addrspace(5) %gep.in.5.1, align 4
+ %cmp = icmp slt i32 %load.0, %load.1
+ ret i1 %cmp
+}
|
nikic
approved these changes
Aug 14, 2024
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LGTM
bwendling
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Aug 15, 2024
nikic
referenced
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Aug 20, 2024
…KnownNonEqual`; NFC Downstream hit this assert, since it doesn't really make any difference, just change code to return false.
sarnex
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to intel/llvm
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Sep 11, 2024
… (#103713) (#15347) Cherry pick llvm/llvm-project#103713 to fix AMD postcommit testing. Closes: #15227 Co-authored-by: Matt Arsenault <Matthew.Arsenault@amd.com>
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Fixes #103500