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Issues list

Undesirable rematerialization of stack address computation backend:AArch64 bugzilla Issues migrated from bugzilla
#35839 opened Feb 23, 2018 by eugenis
[SLP] Vectorizing jumbled memory loads causes big regressions on AARch64 backend:AArch64 bugzilla Issues migrated from bugzilla
#35021 opened Dec 15, 2017 by eastig
3
optimize re-materialization of FP constants backend:AArch64 bugzilla Issues migrated from bugzilla llvm:regalloc
#34469 opened Oct 29, 2017 by compnerd
'for' loops on arrays of SIMD variables are compiled to inefficient code backend:AArch64 bugzilla Issues migrated from bugzilla
#34293 opened Oct 14, 2017 by llvmbot
5
Assertion `DAG.getTargetLoweringInfo().isTypeLegal(PartVT) && "Copying to an illegal type!"' failed. backend:AArch64 bugzilla Issues migrated from bugzilla tools:llc
#34281 opened Oct 12, 2017 by llvmbot
12
[AArch64] Add support for stack protector using pointer authentication backend:AArch64 bugzilla Issues migrated from bugzilla
#33474 opened Aug 8, 2017 by llvmbot
2
Zero-size byval argument crashes AArch64 isel backend:AArch64 bugzilla Issues migrated from bugzilla confirmed Verified by a second party
#32644 opened Jun 3, 2017 by llvmbot
1
More efficient remainder lowering backend:AArch64 bugzilla Issues migrated from bugzilla
#31811 opened Mar 29, 2017 by llvmbot
6
Poor instruction scheduling for salsa20 cypher hot loop backend:AArch64 bugzilla Issues migrated from bugzilla
#31786 opened Mar 27, 2017 by llvmbot
11
[AArch64] -mgeneral-regs-only inconsistent with gcc backend:AArch64 bugzilla Issues migrated from bugzilla
#30140 opened Oct 26, 2016 by pirama-arumuga-nainar
@gburgessiv
16
StackProtector codegen for AArch64/Android kernel uses bionic TLS backend:AArch64 bugzilla Issues migrated from bugzilla
#30136 opened Oct 25, 2016 by eugenis
1
CFG simplify sink performance regression on AArch64 in libcxx std::map backend:AArch64 bugzilla Issues migrated from bugzilla llvm:optimizations regression
#29800 opened Sep 20, 2016 by bmrzycki
@jmolloy
25
[AArch64] orr wzr vs. mov backend:AArch64 bugzilla Issues migrated from bugzilla
#29336 opened Aug 13, 2016 by rotateright
[AArch64] recognize the shufflevector equivalent of a vector select backend:AArch64 bugzilla Issues migrated from bugzilla
#28904 opened Jul 13, 2016 by rotateright
9
@llvm.maxnum.* does not handle signaling NaNs the same way as IEEE 754-2008 backend:AArch64 bugzilla Issues migrated from bugzilla floating-point Floating-point math invalid Resolved as invalid, i.e. not a bug
#27737 opened Apr 15, 2016 by stoklund mannequin
5
[AArch64] Set preferred function alignment backend:AArch64 bugzilla Issues migrated from bugzilla
#26184 opened Dec 11, 2015 by llvmbot
3
Optimize vadd_s64(vget_low_s64(x), vget_high_s64(x)) as vaddvq_s64(x) backend:AArch64 bugzilla Issues migrated from bugzilla missed-optimization
#25986 opened Nov 23, 2015 by llvmbot
2
[aarch64] invalid operand for instruction on SIMD instructions backend:AArch64 bugzilla Issues migrated from bugzilla confirmed Verified by a second party
#25577 opened Oct 16, 2015 by llvmbot
5
Suboptimal across lane float min/max reduction backend:AArch64 bugzilla Issues migrated from bugzilla missed-optimization
#25520 opened Oct 12, 2015 by llvmbot
1
Missed pattern match for UADDV backend:AArch64 bugzilla Issues migrated from bugzilla missed-optimization
#25467 opened Oct 7, 2015 by llvmbot
1
[AArch64LoadStoreOptimizer] Pair loads of different widths; e.g., LDRW + LDRX backend:AArch64 bugzilla Issues migrated from bugzilla
#24881 opened Aug 19, 2015 by llvmbot
[AArch64][PeepholeOptimizer] Look through PHIs to find additional register sources backend:AArch64 bugzilla Issues migrated from bugzilla incomplete Issue not complete (e.g. missing a reproducer, build arguments, etc.)
#24879 opened Aug 19, 2015 by llvmbot
5
[AArch64] Improve load/store optimizer to generate load pairs in the face of output-/anti-register dependencies backend:AArch64 bugzilla Issues migrated from bugzilla confirmed Verified by a second party
#24848 opened Aug 17, 2015 by llvmbot
1
[AArch64] Unnecessary Spill/Reload callee-saved registers backend:AArch64 bugzilla Issues migrated from bugzilla
#24484 opened Jul 13, 2015 by llvmbot
2
__builtin_init_dwarf_reg_size_table (initDwarfEHRegSizeTable) needed for AArch64 backend:AArch64 bugzilla Issues migrated from bugzilla
#23371 opened Mar 23, 2015 by emaste
3
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